JP2016013022A - Switching control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switching control device which stabilizes control by cancelling output fluctuation caused by correction while avoiding the generation of overlapping surge in a DC voltage converter and a power converter.SOLUTION: The switching control device which is applied to a motor generator drive system including a step-up converter and an inverter, avoids overlapping of a surge voltage by correcting switch timing tsw1 of a first correction target of the step-up converter in any other period than a switching prohibited period Pp so as not to overlap the switch timing of a phase of either the step-up converter or the inverter. When the overlapping surge is avoided by correcting the switch timing tsw1 of the first correction target, step-up converter switch correction means further corrects switch timing tsw2 of a second correction target so as to fix an average duty before and after the correction. Therefore, the output fluctuation caused by the first correction is cancelled and step-up control can be stabilized.

Description

  The present invention relates to a DC voltage converter and a switching control device that controls the operation of a switching element for a power converter that converts DC power output from the DC voltage converter.

Conventionally, in switching control devices that control the operation of switching elements for DC voltage converters and power converters that convert DC power output by the DC voltage converters, this occurs due to overlapping switching timings of the switching elements. A technique for avoiding “superimposition of surge voltage” is known.
For example, in the switching control device disclosed in Patent Document 1, when switching timings of switching elements of a boost converter that is a DC voltage converter and an inverter that is a power converter overlap, the switching timing of the inverter is set to a predetermined inverter shielding period. Correction is made so as to be delayed at the end of the (switching prohibition period).

JP 2011-160570 A

  In the switching control device of Patent Document 1, by correcting the switching timing to avoid the superimposed surge, the average duty ratio (duty) and the boost voltage change discontinuously throughout the period before and after the corrected switching timing. Output fluctuations may occur. As a result, when the load of the power converter is, for example, a motor generator that functions as a power source of a vehicle, the drive of the motor generator becomes unstable, and drivability may be reduced.

  The present invention was created in view of the above points, and its purpose is to cancel the output fluctuation caused by the correction and stabilize the control while avoiding the occurrence of the superimposed surge in the DC voltage converter and the power converter. Another object is to provide a switching control device.

The present invention is applied to a load driving system including a DC voltage converter and a power converter, and relates to a switching control device for controlling switching timing of a switching element of the DC voltage converter and a switching element pair of the power converter. It is.
Here, the DC voltage converter has a reactor capable of storing and discharging electric energy, and at least one switching element connected to the reactor, and is input to the reactor from a DC power source by turning on and off the switching element. The input voltage (VL) is converted into the output voltage (VH).
The power converter has a plurality of pairs of switching elements including a high potential side switching element and a low potential side switching element, and the DC power output from the DC voltage converter is obtained by alternately turning on and off the paired switching elements. Convert to AC power and output to load.

The switching control device of the present invention includes a DC voltage converter control circuit, a DC voltage converter drive circuit, a power converter control circuit, a power converter drive circuit, a switching prohibition period calculation unit, and a switching correction unit.
The DC voltage converter control circuit calculates a control amount of the DC voltage converter according to a command voltage (VHcom) with respect to the output voltage of the DC voltage converter.
The DC voltage converter drive circuit operates the switching element of the DC voltage converter according to the control amount of the DC voltage converter calculated by the DC voltage converter control circuit.
The power converter control circuit calculates a control amount of the power converter according to the required output of the load.
The power converter drive circuit operates the switching element pair of the power converter according to the control amount of the power converter calculated by the power converter control circuit.

The switching prohibition period calculation means is “a period during which switching of the switching elements of the DC voltage converter is prohibited over a predetermined period synchronized with the switching timing prior to switching timing of at least a pair of switching elements constituting the power converter”, Or, a switching prohibition period (Pp) that is “a period during which switching of the switching elements of the power converter is prohibited for a predetermined period synchronized with the switching timing prior to the switching timing of at least one switching element of the DC voltage converter”. calculate.
Here, the width of the switching prohibition period is set so as to secure a time for the surge voltage to attenuate to such an extent that the switching voltage does not affect each switching element in consideration of the assumed surge voltage and the variation in characteristics of each switching element. Is done.

When it is predicted that the switching timing of at least one switching element of the DC voltage converter or at least one pair of switching elements constituting the power converter will fall within the switching prohibition period, the switching correction means sets the switching timing. The first correction target switching timing (tsw1) is used to correct the first correction target switching timing outside the switching prohibition period.
The switching correction unit further determines the second correction target switching timing (tsw2), which is the switching timing next to the first correction target switching timing, according to the correction amount of the first correction target switching timing. Thus, the switching timing of the second correction target is corrected.

The switching control device of the present invention may employ any of the following configurations depending on the timing for determining the correction amount of the switching timing of the second correction target.
In the configuration in which the correction amount of the immediately following switching timing is determined prior to each switching timing, the first correction that is the previous switching timing is set with the switching timing of the second correction target as “the switching timing of the current correction target”. The correction amount of the switching timing of the second correction target is determined with reference to the correction amount of the target switching timing.
In the other configuration, at this time, the first correction target switching timing is corrected outside the switching prohibition period, and at the same time, the correction amount of the first correction target switching timing is reflected, and the second switching timing is the next. The correction amount of the correction target switching timing is determined.

  Further, the switching control device of the present invention includes, as a switching correction unit, an aspect including “a DC voltage converter switching correction unit that corrects a switching timing of at least one switching element of the DC voltage converter”, and “a power converter” The power converter switching correction means for correcting the switching timing of at least one pair of switching elements that constitutes “.

In the aspect provided with the DC voltage converter switching correction means, the switching prohibition period calculated by the switching prohibition period calculation means is a predetermined value synchronized with the switching timing prior to the switching timing of at least one pair of switching elements constituting the power converter. This is a “DC voltage converter switching prohibition period” in which switching of the switching elements of the DC voltage converter is prohibited over a period.
When the switching timing of the switching element of the DC voltage converter is predicted to fall within the DC voltage converter switching prohibition period, the DC voltage converter switching correction means determines the switching timing as “the switching timing of the first correction target”. And

In the aspect including the power converter switching correction unit, the switching prohibition period calculated by the switching prohibition period calculation unit is a power for a predetermined period synchronized with the switching timing prior to the switching timing of at least one switching element of the DC voltage converter. This is a “power converter switching prohibition period” in which switching of switching elements of the converter is prohibited.
When it is predicted that the switching timing of at least one pair of switching elements constituting the power converter falls within the power converter switching prohibition period, the power converter switching correction unit sets the switching timing to “first correction target”. Switching timing ”.

  As a specific example of the configuration of “correcting the switching timing of the second correction target in accordance with the correction amount of the switching timing of the first correction target” in the present invention, “switching of the first and second correction targets” There is a configuration in which the correction is performed so that the average time ratio of one of the switching elements or the pair of switching elements in the period before and after the timing becomes equal before and after the correction. Here, the “time ratio (duty)” is a ratio of on time or off time to the switching period. Further, making the average duty ratio constant corresponds to matching the reactor current flowing through the reactor of the DC voltage converter before and after correction.

  Here, when it is predicted that the switching timing of the second correction target corrected according to the correction amount of the switching timing of the first correction target is expected to fall within the switching prohibition period, the switching correction means For the third correction target switching timing (tsw3), which is the switching timing next to the second correction target switching timing, the correction timing is further corrected outside the switching prohibition period. You may correct | amend so that the average time ratio of one of the switching element or the switching element pair in the period before and behind the 3rd correction | amendment switching timing may become equivalent before correction | amendment and after correction | amendment.

  Further, the switching correction means is opposite to the temporarily calculated correction amount by the value of the on time or the off time of one of the switching element or the switching element pair obtained by the temporarily calculated correction amount with respect to the second correction target switching timing. You may make it correct to the correction amount of a direction. Further, regarding the third correction target switching timing, the correction amount may be set to 0 according to the temporarily calculated correction amount value.

Alternatively, in the switching control device including the DC voltage converter switching correction means for correcting the switching timing of at least one switching element of the DC voltage converter as the switching correction means, the output voltage of the DC voltage converter is made constant. It is good also as composition which corrects.
Specifically, the switching timing next to the switching timing of the second correction target is set as the third correction target switching timing (tsw3), which is the switching timing one time before the switching timing of the first correction target “reference time”. (T0) ”to the corrected first switching timing (tsw1 ′), the corrected second switching timing (tsw2 ′), and the corrected third switching timing (tsw3 ′). A first time after correction (T1), a second time after correction (T2), and a third time after correction (T3), respectively. Then, the DC voltage converter switching correction means calculates the second time after correction and the third time after correction so that the output voltage of the DC voltage converter in the period of two carrier cycles from the reference time is constant. To do.

  In the switching control device of the present invention, when the switching timings of the switching elements of the DC voltage converter and the power converter are predicted to overlap, the switching correction unit corrects the switching timing of the first correction target outside the switching prohibition period. Therefore, occurrence of superimposed surge can be avoided.

In addition, the switching correction means of the present invention not only corrects the switching timing of the first correction target, but also as the “post-processing” according to the correction amount of the switching timing of the first correction target. The correction target switching timing is further corrected. Thereby, the output fluctuation caused by the correction of the switching timing of the first correction target can be canceled, and the average duty ratio and the boosted voltage can be kept constant throughout the period before and after the switching timing of the first correction target.
Therefore, DC voltage conversion control such as boosting and load drive control can be stabilized while avoiding the occurrence of superimposed surges in the DC voltage converter and the power converter.

1 is an overall configuration diagram of a motor generator drive system to which a switching control device according to each embodiment of the present invention is applied. FIG. 2 is a schematic block diagram showing a control configuration related to switching timing of a boost converter in the switching control device of FIG. 1. It is a time chart explaining a switching prohibition period. 5 is a time chart showing “correction of boost converter switching timing” according to the first embodiment of the present invention. 3 is a detailed control block of a boost converter switching correction unit according to the first embodiment of the present invention. It is a time chart of the switching timing correction process by 1st Embodiment of this invention. It is a flowchart of the correction process of FIG. It is a time chart of the switching timing correction process by 2nd Embodiment of this invention. It is a time chart of the correction direction correction process by 3rd Embodiment of this invention. 10 is a flowchart of a correction direction correction process in FIG. 9. It is a time chart of the correction amount reset process by 4th Embodiment of this invention. 12 is a time chart for explaining a correction amount lower limit value (Δa <0) and a correction amount upper limit value (Δb> 0) in the correction amount reset process of FIG. 11; It is a flowchart of the correction amount reset process of FIG. It is a time chart of the switching timing correction process by 5th Embodiment of this invention. It is a whole block diagram of the motor generator drive system with which the switching control apparatus by 6th Embodiment of this invention is applied. It is a time chart which shows "correction of inverter switching timing" by a 6th embodiment of the present invention.

Embodiments of a switching control device according to the present invention will be described below with reference to the drawings. In a plurality of embodiments, substantially the same configuration or substantially the same step in the flowchart is denoted by the same reference numeral or the same step number, and description thereof is omitted.
The switching control device according to the embodiment of the present invention is applied to, for example, a drive system that drives a motor generator used as a power source of a hybrid vehicle or an electric vehicle. This motor generator drive system includes a boost converter that boosts the power supply voltage of the battery, and an inverter that converts DC power output from the boost converter into AC power and outputs the AC power to the motor generator.

  Each of the boost converter and the inverter is driven by an on / off operation of a switching element. The switching control device of the present invention relates to switching timing for switching on / off of a switching element, and is characterized by correcting the switching timing in order to avoid a “superimposed surge” described later. The correction of the switching timing includes a case where the switching timing of the boost converter is corrected and a case where the switching timing of the inverter is corrected.

  Hereinafter, the case of mainly correcting the switching timing of the boost converter will be described as the first to fifth embodiments. The basic concept for correcting the switching timing of the inverter is almost the same as that for correcting the switching timing of the boost converter, and therefore will be collectively described in the sixth embodiment. Further, in the specification, when “this embodiment” is described, matters common to the first to sixth embodiments will be described.

<Mode for correcting the switching timing of the boost converter>
A configuration and operation common to the switching control devices of the first to fifth embodiments will be described with reference to FIGS.
As shown in FIG. 1, a motor generator drive system 1 as a “load drive system” includes a battery 15 as a “DC power supply”, a boost converter 20 as a “DC voltage converter”, and an inverter as a “power converter”. 30, a motor generator 4 (shown as “MG” in the figure) as a “load”, a switching control device 50, and the like.

First, a system configuration other than the boost converter 20 and the inverter 30 will be described.
The battery 15 is a direct current power source constituted by a chargeable / dischargeable power storage device such as nickel hydride or lithium ion. In addition, an electric double layer capacitor or the like may be used as a DC power source.

  The motor generator 4 is, for example, a permanent magnet type synchronous three-phase AC motor. The motor generator 4 is mounted on a hybrid vehicle or an electric vehicle, and functions as a motor in a narrow sense that generates torque for driving driving wheels via a transmission or the like by a power running operation, and torque transmitted from the engine or driving wheels. It also has a function as a generator that generates power by regenerative operation.

  The rotation angle sensor 45 provided in the vicinity of the rotor of the motor generator 4 is constituted by, for example, a resolver or a rotary encoder, and detects the electrical angle θ. The electrical angle θ detected by the rotation angle sensor 45 is input to the switching control device 50 and used for computation such as dq conversion of current vector control. Also, the electrical angle θ is time-differentiated to calculate the electrical angular velocity ω. The calculation of the electrical angular velocity ω may be performed inside the switching control device 50 or may be performed outside.

Next, the configuration of boost converter 20 will be described. Boost converter 20 includes a reactor 21, a boost drive unit 22, a smoothing capacitor 25, and the like.
Reactor 21 has an inductance L, an induced voltage is generated in accordance with a change in current IL, and electric energy is accumulated.

  The step-up drive unit 22 is connected between the output terminal of the reactor 21 and the high potential side switching element 23 connected between the high potential line of the inverter 30, and between the output terminal of the reactor 21 and the negative electrode of the battery 15. The low-potential side switching element 24 is configured. The high potential side switching element 23 is also referred to as “upper arm switching element”, and the low potential side switching element 24 is also referred to as “lower arm switching element”.

The upper and lower arm switching elements 23 and 24 are turned on and off alternately and complementarily in accordance with a converter drive signal Sc (see FIG. 3) from the boost converter drive circuit 54.
As described above, the boost drive unit 22 of the present embodiment is configured as a “switching element pair”. However, the boost drive unit according to another embodiment of the present invention may be configured by one or more switching elements that do not form a pair.

When the high potential side switching element 23 is off and the low potential side switching element 24 is on, the reactor current IL flows through the reactor 21, whereby energy is accumulated.
When the high-potential side switching element 23 is on and the low-potential side switching element 24 is off, the energy stored in the reactor 21 is released, so that the output voltage VH is boosted by superimposing an induced voltage on the battery input voltage VL. Is charged in the smoothing capacitor 25.

The inverter 30 has a three-phase (U-phase, V-phase, W-phase) switching element pair composed of bridge-connected high potential side switching elements 31, 32, 33 and low potential side switching elements 34, 35, 36. doing. Similarly to the boost converter 20, the high potential side switching elements 31, 32, 33 are also referred to as “upper arm switching elements”, and the low potential side switching elements 34, 35, 36 are also referred to as “lower arm switching elements”. The “upper and lower arm switching elements” corresponds to “a pair of switching elements” recited in the claims.
The switching elements 31 to 36 of the upper and lower arms of each phase are turned on and off alternately and complementarily in accordance with an inverter drive signal Si (see FIG. 3) from the inverter drive circuit 64.

  The inverter 30 receives DC power of the output voltage VH boosted from the battery input voltage VL by the boost converter 20. When the switching elements of the upper and lower arms of each phase are turned on / off, the DC power VH is converted into three-phase AC power Vu, Vv, Vw and supplied to the motor generator 4.

Next, the configuration of the switching control device 50 will be described with reference to FIGS. 1 and 2.
The switching control device 50 is configured by a microcomputer or the like, and includes a CPU, a ROM, an I / O (not shown), a bus line that connects these configurations, and the like. The switching control device 50 executes control by software processing by executing a program stored in advance by the CPU or hardware processing by a dedicated electronic circuit.
The switching control device 50 receives a command torque trq ^* for the motor generator 4 commanded by a host vehicle control circuit or the like, an electrical angle θ and an electrical angular velocity ω of the motor generator 4. The electrical angular velocity ω [rad / s] may be calculated inside the switching control device 50, and may be further converted into the rotation speed N [rpm].

  As a basic configuration, the switching control device 50 includes a control circuit 51 and a drive circuit 54 for the boost converter 20, and a control circuit 61 and a drive circuit 64 for the inverter 30. The step-up converter control circuit 51 and the step-up converter drive circuit 54 correspond to a “DC voltage converter control circuit” and a “DC voltage converter drive circuit” recited in the claims, and include an inverter control circuit 61 and an inverter drive circuit 64. Corresponds to “a power converter control circuit” and “a power converter drive circuit” recited in the claims.

  Further, the switching control device 50 includes a switching prohibition period calculation unit 52 and a boost converter switching correction unit 53 as “DC voltage converter switching correction unit”. Particularly in the first to fifth embodiments, the boost converter switching correction means 53 includes a previous value reference unit 530 and a SW correction unit 535 (see FIG. 5). This characteristic configuration will be described later.

  Boost converter control circuit 51 calculates a control amount of boost converter 20 based on command voltage VHcom with respect to output voltage VH of boost converter 20. The boost converter drive circuit 54 generates a drive signal Sc based on the control amount of the boost converter 20 calculated by the boost converter control circuit 51, and alternately turns on and off the switching elements 23 and 24 of the upper and lower arms of the boost drive unit 22. .

The boost converter control circuit 51 according to the present embodiment calculates a duty that is an on / off time ratio with respect to a switching period as a boost converter 20 control amount. Boost converter drive circuit 54 compares the duty with a triangular wave carrier to generate a PWM signal.
Hereinafter, in this specification, the command value of the on-time ratio (on-duty) with respect to the switching period of the high potential side switching element 23 is defined as “duty”. If the dead time is ignored, the on-duty of the low-potential side switching element 24 matches the off-duty of the high-potential side switching element 23 and corresponds to “1-duty”. Note that “duty” is generally used in units of [%], but in this specification, the duty is defined as “a dimensionless number between 0 and 1”.

Inverter control circuit 61 calculates a control amount of inverter 30 based on command torque trq ^* for motor generator 4. The inverter drive circuit 64 generates a drive signal Si based on the control amount of the inverter 30 calculated by the inverter control circuit 61, and alternately turns on / off the switching elements 31 to 36 of the upper and lower arms of each phase.

The inverter control circuit 61 of this embodiment calculates each phase duty from the phase voltage command value of each phase as a control amount of the inverter 30. The inverter drive circuit 64 compares each phase duty with a triangular wave carrier to generate a PWM signal.
Hereinafter, in this specification, the on-duty command value of the high potential side switching elements 31, 32, 33 of each phase is defined as “duty”. If the dead time is ignored, the on-duty of the low potential side switching elements 34, 35, 36 of each phase corresponds to “1-duty” with respect to the duty of the corresponding high potential side switching element.

  Therefore, when both boost converter 20 and inverter 30 are described in English as “duty”, it means “on-duty command value of high potential side switching element”. Further, when particularly distinguishing, the duty of boost converter 20 is described as “CNV-duty”, and the duty of any phase of inverter 30 is described as “INV-duty”. When it is obvious from the context of the specification which duty is shown, it is simply written as “duty”.

The general configuration of the boost converter control circuit 51 is shown on the left side of FIG. Boost converter control circuit 51 has command voltage generation unit 511, feedback calculation unit 512, and feedforward calculation unit 513.
The command voltage generation unit 511 calculates the command voltage VHcom based on the command torque trq ^* and the electrical angular velocity ω. The feedback calculation unit 512 calculates the duty feedback term dfb by PI calculation so that the deviation between the command voltage VHcom and the output voltage VH converges to zero. The feedforward calculation unit 513 calculates the feedforward term df of duty. Boost converter control circuit 51 outputs a duty obtained by adding feedback term dfb and feedforward term ff.

  The inverter control circuit 61 generally uses a dq-axis current vector to control the current deviation between the command current and the actual current so that the current deviation converges to zero, and the torque deviation between the command torque and the actual torque. A configuration using a torque feedback control system that controls to converge to zero is known. In these control methods, each phase duty calculated based on the phase voltage command value of each phase is output. Since such a configuration of the inverter control circuit 61 is a well-known technique, a detailed description thereof is omitted.

Next, the roles of the switching prohibition period calculation unit 52 and the boost converter switching correction unit 53 will be described with reference to the time chart of FIG.
The time chart of FIG. 3 shows the relationship between the drive signal Si for the high potential side switching element of any phase of the inverter 30 and the drive signal Sc for the high potential side switching element 23 of the boost converter 20. Specifically, the inverter carrier Ci, the inverter drive signal Si, the converter carrier Cc, and the converter drive signal Sc are shown in order from the top of the figure.

  The subscript “i” of the symbol indicates an inverter, and “c” indicates a boost converter. Hereinafter, “boost converter” is abbreviated as “converter” as appropriate. Further, “switching timing of the switching element of the boost converter 20” is omitted as “switching timing of the boosting converter”, and “switching timing of the switching element of any phase of the inverter 30” is omitted as “switching timing of the inverter”.

  When the drive signals Si and Sc are on, the high potential side switching element is on and the low potential side switching element is off. When the drive signals Si and Sc are off, the high potential side switching element is off. This indicates that the switching element is off and the low potential side switching element is on. In other words, on the assumption that the dead time is ignored, the drive signals Si and Sc represent the operating state of the “switching element pair” forming a pair.

Further, in the following time chart, “when the duty exceeds the carriers Ci and Cc, the drive signals Si and Sc are on”, and when “the duty is below the carriers Ci and Cc, the drive signals Si and Sc are off”. Define to be Therefore, the drive signals Si and Sc rise from off to on while the carriers Ci and Cc descend from the peak to the valley, and fall from on to off while the carriers Ci and Cc rise from the valley to the peak. For example, the drive signal Sc of the boost converter 20 rises between tc1 and tc2 in FIG.
The precautions regarding FIG. 3 are the same for the following time charts.

  As shown in FIG. 3, the inverter control circuit 61 and the boost converter control circuit 51 obtain the latest control information for each of the peaks of the carriers Ci and Cc, perform control calculation, and determine the next duty. The determined next duty is set in the inverter drive circuit 64 and the boost converter drive circuit 54, and is reflected in the peaks and valleys of the next carriers Ci and Cc. Further, the inverter control circuit 61 and the boost converter control circuit 51 operate independently.

  By the way, when the switching element performs a switching operation, a surge voltage (V = −L × dI / dt) is generated due to a sudden increase or decrease in current. When switching timings of a plurality of switching elements are close to each other, a phenomenon of “superimposed surge” in which a surge voltage is superimposed and increased occurs. If this superimposed surge exceeds the breakdown voltage of the switching element, the switching element may be destroyed.

In FIG. 3, a period including the avoidance period δ before and after the rise of the inverter drive signal Si is referred to as a “(boost converter) switching prohibition period Pp” indicated by a one-dot chain line. In addition, the switching timing that is predicted to enter the switching prohibition period Pp among a plurality of switching timings of the drive signal is “tsw1”.
The avoidance period δ is set so as to secure a time during which the surge voltage is attenuated to such an extent that the surge voltage does not affect each switching element in consideration of the assumed surge voltage and variation in characteristics of each switching element. When the switching timing of the boost converter is predicted to enter the switching prohibition period Pp, it is required to correct the switching timing tsw1 outside the switching prohibition period Pp in advance.

  Conventionally, when the switching timing of switching elements between phases in an inverter overlaps, a technique (Patent No. 4428386) for avoiding overlapping switching timing by delaying the switching timing of any phase, or a boost converter and an inverter There is known a technique (Patent Document 1: Japanese Patent Application Laid-Open No. 2011-160570) that avoids overlapping of the switching timing by delaying the switching timing of the inverter when the switching timing of the switching elements overlaps.

Inheriting these ideas of the prior art, the switching prohibition period calculating means 52 of the switching control device 50 according to the first to fifth embodiments is arranged in advance of the switching timing of the switching element pair of any phase constituting the inverter 30. A “switching prohibition period Pp” for prohibiting switching of the switching elements 23 and 24 of the boost converter 20 over a predetermined period synchronized with the switching timing is calculated. For example, if the next INV-duty is calculated at the timing ti0 of the valley of the inverter carrier Ci, switching is prohibited based on the determined INV-duty from the completion ti ^* of the control calculation before the timing ti1 of the next peak. The period Pp is calculated.

Further, when it is predicted that the switching timing of the boost converter 20 falls within the switching prohibition period Pp, the boost converter switching correction unit 53 sets the switching timing of the boost converter 20 as “the first correction target switching timing tsw1”. Execute correction processing.
For example, when the control calculation of the boost converter 20 is performed at the valley timing tc0 of the converter carrier Cc, at the time tc ^* when the control calculation is completed, it is determined whether or not the next switching timing falls within the switching prohibition period Pp. When the timing is predicted to fall within the switching prohibition period Pp, correction processing is executed.

  Supplementally, as shown on the right side of FIG. 2, boost converter switching correction means 53 includes various information such as command voltage VHcom, output voltage VH, reactor current IL as well as switching prohibition period Pp from switching prohibition period calculation means 52. , And the duty (before correction) output from the boost converter control circuit 51 is corrected.

The boost converter switching correction means 53 outputs a duty (after correction) to the boost converter drive circuit 54. The duty (after correction) may be the same value as the duty (before correction), or may be increased or decreased duty_A, duty_B (see FIG. 4). Note that “carrier cycle change” shown in parentheses will be described as another embodiment.
Boost converter drive circuit 54 compares duty (after correction) and carrier Cc, and outputs drive signal Sc (ScA, ScB) to boost drive unit 22.

Here, FIG. 4 is referred to regarding the correction of the switching timing of the boost converter by the correction of the duty. FIG. 4 is a diagram focusing on carrier Cc and drive signal Sc of boost converter 20 in FIG.
At the correction processing start timing tc ^{* in} FIG. 4, the next rising timing of the drive signal Sc is predicted to enter the switching inhibition period Pp, and is set as the first correction target switching timing tsw1.

  Then, as in the conventional technique, the duty before correction is decreased and changed to duty_B, so that the switching timing tsw1 can be delayed to the timing tsw1 'after the switching prohibition period Pp. Contrary to the prior art, the switching timing tsw1 can be advanced to the timing before the switching prohibition period Pp by increasing the duty before correction and changing it to duty_A. On the other hand, when the switching timing tsw1 of the first correction target is the falling timing, the duty is increased when the switching timing tsw1 is delayed, and the duty is decreased when the switching timing tsw1 is advanced.

  Hereinafter, the drive signal corrected to advance the switching timing is represented as ScA, and the drive signal corrected to delay the switching timing is represented as ScB. In addition, when the correction amount is represented by timing, the correction amount in the direction to advance the switching timing of the correction target is represented by a negative value such as “−Δ1”, and the correction amount in the delay direction is represented by a positive value such as “+ Δ1”. Represented by the value of.

As described above, the switching control device 50 according to the first to fifth embodiments is different from the prior art in that it can correct not only the direction of delaying the switching timing tsw1 but also the direction of speeding up. However, the bigger difference is in the following points.
In the prior art of Patent Document 1, by correcting the switching timing tsw1 of the first correction target in order to avoid the superimposed surge, an output such that the average duty and the boost voltage change discontinuously throughout the period before and after the correction. Variations may occur. As a result, driving of the motor generator 40 that is a load becomes unstable, and drivability may be reduced.

On the other hand, when the boost converter switching correction means 53 of the switching control device 50 of the first to fifth embodiments of the present invention corrects the first correction target switching timing tsw1 and avoids the superimposed surge, it ends only with that. Instead, the next switching timing is corrected as the “second correction target switching timing (tsw2)” so as to compensate the correction amount for the first correction target switching timing tsw1. In some cases, the next switching timing is further corrected as the “third correction target switching timing (tsw3)”. That is, “post-processing after correction” is executed in order to cancel the output fluctuation caused by the correction of the switching timing tsw1 of the first correction target (appropriately abbreviated as “first correction”) and stabilize the control. It is characterized by that.
Therefore, the “switching timing correction process” of each embodiment includes at least two stages of correction. Hereinafter, a specific configuration of the switching timing correction process will be described for each embodiment.

(First embodiment)
Next, the switching timing correction process of the first embodiment will be described with reference to the detailed block diagram of FIG. 5, the time chart of FIG. 6, and the flowchart of FIG.
As shown in FIG. 5, the boost converter switching correction unit 53 includes a previous value reference unit 530 and a SW (switching) correction unit 535. The “correction amount” in FIG. 5 means a correction amount for the duty.

The previous value reference unit 530 receives the duty (before correction) calculated by the boost converter control circuit 51, and outputs the value obtained by subtracting the previous correction amount by the subtractor 532 as duty_tmp. As the “previous correction amount”, the “current correction amount” calculated by the subtractor 533 is input through the delay element 531.
The SW correction unit 535 receives the duty_tmp output from the previous value reference unit 530 and the switching prohibition period Pp calculated by the switching prohibition period calculation unit 52, and is used to correct the switching timing of the correction target to a desired timing. (After correction) is output. The duty_tmp and the duty (after correction) are fed back to the subtracter 533, and the difference between them is calculated as “current correction amount”.

FIG. 6 shows, in order from the top, the duty for converter carrier Cc before correction, after correction by calculation I, and after correction by calculation II, and drive signals Sc, ScB, ScB ′ generated by the duty. .
Hereinafter, the “calculation I” refers to a correction calculation for the first correction target switching timing tsw1. The calculation I is executed at the calculation start timing tc ^* I before the valley timing tc1 of the converter carrier Cc immediately before the first correction target switching timing tsw1.
“Calculation II” refers to a correction calculation for the second correction target switching timing tsw2. The calculation II is executed immediately after the first correction target switching timing tsw1 and at the calculation start timing tc ^* II before the peak timing tc2 of the converter carrier Cc immediately before the second correction target switching timing tsw2. The

Here, in 1st Embodiment, a process is complete | finished by correction | amendment of the 2nd correction object switching timing tsw2, and correction | amendment of the following switching timing tsw3 is not required. Therefore, “tsw3” is not “correction target switching timing” and may be described as “t3”. However, parenthesized parenthesis is given as (tsw3) for relation to the second embodiment described later.
In the second embodiment or the like, the correction calculation for the third correction target switching timing tsw3 is referred to as “calculation III”, and the valley timing tc3 of the converter carrier Cc immediately after the second correction target switching timing tsw2. Is executed at the calculation start timing tc ^* III (shown in parentheses in FIG. 6).

In the example of FIG. 6, the duty before correction is 0.5 (= 50%). That is, both the on-duty and off-duty of the high potential side switching element 23 are 0.5. The number “0.5” described corresponding to the on period and the off period of the drive signal Sc is the on duty and the off duty.
In addition, the switching timing before the switching timing of the first correction target is t0, the switching timing four times after the switching timing t0 is t4, and the average on-duty in the converter carrier two cycles (2T) from t0 to t4 is This is called “average duty”. Before correction, the average duty is naturally “0.5”.

First, at the calculation start timing tc ^* I, based on the information of the switching prohibition period Pp calculated by the switching prohibition period calculation means 52 from the output of the inverter control circuit 61, the first correction target switching timing tsw1 is set to the switching prohibition period Pp. Expected to enter. Therefore, in the calculation I, by generating the drive signal ScB in which the duty before correction is increased by 0.1 to duty_B in order to avoid the superimposed surge, the first correction target switching timing tsw1 (falling in this example) is generated. Timing) is corrected to the switching timing tsw1 ′ after the switching prohibition period Pp.

  As a result, the on-duty immediately before the corrected switching timing tsw1 'increases by 0.1 to 0.6, and the off-duty immediately after becomes 0.4. Therefore, the average duty is (0.6 + 0.5) /2=0.55. This means that the output fluctuation in which the output voltage VH of the boost converter 20 temporarily becomes larger than the request is caused by the correction of the switching timing of the first correction target.

  Next, in the calculation II, a correction for compensating for the correction of “on duty = + 0.1” in the calculation I is performed for the second correction target switching timing tsw2. For that purpose, the on-duty in the next on-period may be reduced by 0.1. In this example, since the second correction target switching timing tsw2 is the rising timing, the second correction target switching timing is generated by generating the drive signal ScB in which the duty is decreased by 0.1 to duty_B ′ in the calculation II. tsw2 is corrected to the switching timing tsw2 ′ (open arrow).

  As a result, the average duty after correction is (0.6 + 0.4) /2=0.5, which coincides with the average duty before correction. As described above, the first embodiment is characterized in that the switching timing tsw2 of the second correction target is corrected from the viewpoint of making the average duty after correction coincide with the average duty before correction. “Making the average duty after correction coincide with the average duty before correction” is also simply referred to as “making the average duty constant”.

Here, attention is paid to a change in reactor current IL flowing through reactor 21 of boost converter 20. Reactor current IL may be detected by a current sensor provided in boost converter 20 or may be estimated by equation (1).

Symbols and units (shown in []) of formula (1) are as follows.
IL_est [A]: Reactor current (estimated value)
Nm [1 / s]: Speed of the motor generator 4 trq [V · A · s]: Torque of the motor generator 4 L [V · s / A]: Inductance of the reactor 21 Toff [s]: High potential side switching element 23 OFF time (= ON time of the low potential side switching element 24)

  Reactor current IL flows from battery 15 side to inverter 30 side during motoring operation of motor generator 4, and the sign is positive. On the other hand, reactor current IL flows from inverter 30 side to battery 15 side during regenerative operation of motor generator 4, and the sign is negative. Here, it is assumed that reactor current IL is positive on the premise of the power running operation.

  When the drive signal Sc is off, that is, when the high potential side switching element 23 is on, the reactor current IL decreases. When the drive signal Sc is off, that is, when the low potential side switching element 24 is on, the reactor current IL increases. Therefore, the reactor current IL at the rise when the drive signal Sc changes from off to on has a maximum value IL-H, and the reactor current IL at the fall when the drive signal Sc changes from on to off as a minimum value IL-L. Become. Further, if the input voltage VL and the output voltage VH of the boost converter 20 are constant, the slope of the decrease and increase of the reactor current IL is constant (see the description of the fifth embodiment described later).

  When the correction I of “duty + 0.1” is performed on the switching timing tsw1 of the first correction target in the calculation I, the minimum value IL-L of the reactor current (solid line) at the switching timing tsw1 ′ after the correction is calculated (two points). It decreases compared to the chain line). However, by correcting “duty−0.1” with respect to the switching timing tsw2 in the calculation II, the corrected reactor current IL returns to the line of the reactor current IL before correction. This is called “the reactor currents before and after the correction match”. That is, “making the average duty constant” corresponds to “matching the reactor currents before and after correction”.

Next, refer to the flowchart of FIG. In the description of the flowchart below, the symbol “S” means a step. The entire “correction amount calculation” process is referred to as S10 in FIGS. In the following description, numerical values of the duty in FIG. 6 are described in [].
In S11, the delay element 531 changes the “current correction amount” [0.6−0.5 = + 0.1] in the previous calculation I to the “previous correction amount” [+0.1] in the calculation II. change.
In S12, the subtracter 532 subtracts the previous correction amount from the duty (before correction) to calculate duty_tmp [0.5−0.1 = 0.4].

  In S13, the SW correction unit 535 calculates duty (after correction) [0.4] based on the duty_tmp and the switching prohibition period Pp. Here, in the calculation II of the first embodiment, it is assumed that the switching timing tsw2 'of the second correction target after correction by the calculation I does not fall within the switching prohibition period Pp. On the other hand, the processing when the corrected second correction target switching timing tsw2 'falls within the switching prohibition period Pp will be described in the second embodiment below.

In S13, the subtracter 533 subtracts duty_tmp from the duty (after correction) to obtain “current correction amount” [0.4−0.4 = 0]. Here, it should be noted that “current correction amount” means a relative correction amount of duty (after correction) with respect to duty_tmp.
When the duty (after correction) is equal to duty_tmp, the “current correction amount” is zero. That is, it means that the compensation of the calculation I is completed in the current calculation II and there is no carry-over to the next (calculation III).

As described above, in the first embodiment, when the switching timing tsw1 of the first correction target is corrected to avoid the superimposed surge, it does not end only as in the prior art of Patent Document 1, but the average duty is constant. As described above, the second correction target switching timing tsw2 is corrected.
Therefore, the output fluctuation caused by the first correction can be canceled and the boost control can be stabilized.

(Second Embodiment)
The switching timing correction process according to the second embodiment of the present invention will be described with reference to the time chart of FIG. In the second embodiment, in the calculation II, when it is predicted that the switching timing tsw2 ′ of the second correction target after the correction by the calculation I falls within the switching prohibition period Pp, the correction is performed again. The “correction amount” in the second embodiment and below means a correction amount for timing.
In addition, the flowchart regarding 2nd Embodiment is shown in FIG. 10 of 3rd Embodiment.

In the calculation I at the calculation start timing tc ^* I in FIG. 8, the first correction target switching timing tsw1 is corrected by the correction amount + Δ1 at the switching timing tsw1 ′ after the switching prohibition period Pp1. In accordance with the correction of the calculation I, the switching timing tsw2 of the second correction target is scheduled to be corrected to the switching timing tsw2 ′ delayed by the correction amount + Δ1, as indicated by the dashed arrow.
However, since the switching timing tsw2 ′ is predicted to enter the switching prohibition period Pp2 at the calculation start timing tc ^* II, in the calculation II, the correction amount is set to the timing tsw2 ′ ′ before the switching prohibition period Pp2. Re-correct by -Δ2. The re-corrected switching timing tsw2 ′ ′ is (+ Δ1-Δ2) timing with respect to the second correction target switching timing tsw2 before correction.

At this stage, the average duty in the period from t0 to t4 is not constant, and the reactor currents IL do not match. Therefore, the third correction target switching timing tsw3 is further corrected by the calculation III at the calculation start timing tc ^* III. In this case, by correcting the switching timing tsw3 of the third correction target by −Δ2 in the calculation III, the average duty can be made constant, and the reactor currents IL before and after correction can be matched.

As described above, in the second embodiment, when the switching timing tsw2 ′ of the second correction target scheduled by the calculation I is predicted to enter the switching prohibition period Pp2, the correction is performed again outside the switching prohibition period Pp2 by the calculation II. By doing so, it is possible to avoid the occurrence of superimposed surge.
Further, by compensating for the correction amount including the third correction target switching timing tsw3, the output fluctuation caused by the first correction can be canceled and the boost control can be stabilized as in the first embodiment.

(Third embodiment)
The correction direction correction processing according to the third embodiment of the present invention will be described with reference to the time chart of FIG. 9 and the flowchart of FIG.
In the calculation II of FIG. 9, the correction amount −Δ2 is “preliminarily calculated” so that the second correction target switching timing tsw2 is set to the timing tsw2 ′ ′ before the switching prohibition period Pp2. This is the same as FIG.

Furthermore, in the third embodiment, when it is assumed that the second correction target switching timing tsw2 (rising timing in this example) that is the “current switching timing” in the calculation II is corrected by the correction amount −Δ2, A time T _2-1 from the corrected fall timing tsw1 ′ to the current corrected rise timing tsw2 ′ ′ (in this example, the switching element OFF time) ”is evaluated.

In this example, it is assumed that the off time T _2-1 to be evaluated is less than a predetermined time lower limit value α. In another example, it is assumed that the off time to be evaluated exceeds a predetermined time upper limit value β.
In another example, when the current switching timing is the falling timing, and the previous switching timing is the rising timing, switching from the rising timing after the previous correction to the corrected falling timing calculated temporarily this time is performed. The on-time of the element is evaluated. Then, it is assumed that the on-time to be evaluated is less than a predetermined time lower limit value α or exceeds a predetermined time upper limit value β.

If the off time of the high potential side switching element 23 is shorter than the lower limit value α or the on time is longer than the upper limit value β, the continuous energization time of the high potential side switching element 23 may exceed the allowable range and heat may be generated due to overcurrent. is there.
Conversely, when the off time of the high potential side switching element 23 is longer than the upper limit value β or the on time is shorter than the lower limit value α, the continuous energization time of the low potential side switching element 24 exceeds the allowable range, and heat is generated due to overcurrent. There is a risk.

  Therefore, when the off time or the on time to be evaluated is lower than the lower limit value α or higher than the upper limit value β, the correction amount is corrected in a direction opposite to the direction of the temporarily calculated correction amount. In this example, with respect to the switching timing tsw2 'after the correction by the calculation I, the provisionally calculated "advancing direction" correction amount-[Delta] 2 is corrected to the opposite "a retarding direction" correction amount + [Delta] 2. If the second correction target switching timing tsw2 before the correction is used as a reference, the correction amount (+ Δ1 + Δ2) is corrected, and the switching timing after the second correction is expressed as tsw2 ′ ′ ′.

In this case, the switching timing tsw2 ′ ′ ′ after re-correction must naturally be outside the switching prohibition period Pp2. Further, the off time to be evaluated with respect to the switching timing tsw2 ′ ′ ′ after re-correction must be included in the range of “lower limit value α or higher and upper limit value β or lower”.
Thus, when the second correction target switching timing tsw2 is corrected to the switching timing tsw2 ′ ′ ′ after re-correction, in the calculation III, the average duty in the period from t0 to t4 is made constant as in the second embodiment. As described above, the third correction target switching timing tsw3 is corrected to the switching timing tsw3 ′ ′ delayed by the correction amount + Δ2.

The flowchart in FIG. 10 illustrates the correction direction correction process with the calculation II relating to the second correction target switching timing tsw2 as “current”.
In S10 (defined in FIG. 7), the correction amount of the switching timing tsw2 of this time, that is, the second correction target is calculated so as to compensate the correction amount of the switching timing tsw1 of the first correction target.

S21 and S22 are steps common to the calculation II in the second embodiment described above.
In S21, it is determined whether or not the second correction target switching timing tsw2 ′ corrected according to the correction amount of the first correction target switching timing tsw1 falls within the switching prohibition period Pp2. If the switching timing tsw2 ′ is predicted to enter the switching prohibition period Pp2 (S21: YES), the switch timing tsw2 ′ is re-corrected to the switching timing tsw2 ″ outside the switching prohibition period Pp2 in S22, and then to S31. move on. If the switching timing tsw2 ′ does not fall within the switching prohibition period Pp2 (S21: NO), the routine is terminated.

In S31, the ON time or OFF time of the switching element to be evaluated is compared with the time lower limit value α and the time upper limit value β. When the on-time or off-time to be evaluated falls below the time lower limit value α or exceeds the time upper limit value β (S31: YES), the correction amount is corrected in the direction opposite to the temporarily calculated correction amount direction. .
On the other hand, in S31, when the on-time or off-time to be evaluated is in the range between the time lower limit value α and the time upper limit value β (S31: NO), the temporarily calculated correction amount is determined.

After S32, in S40 corresponding to the next calculation III, according to the processing of S10, the accumulated correction amounts of the first and second correction target switching timings tsw1 and tsw2 are compensated, and the average duty is made constant. The switching timing tsw3 of the third correction target is corrected.
As described above, in the third embodiment, the output fluctuation caused by the first correction can be canceled and the boost control can be stabilized while preventing the switching elements 23 and 24 from generating heat due to overcurrent.

(Fourth embodiment)
The correction amount reset processing according to the fourth embodiment of the present invention will be described with reference to the time charts of FIGS. 11 and 12 and the flowchart of FIG.
In the calculation II of FIG. 11, the switching timing tsw2 of the second correction target is corrected by the correction amount −Δ2, and further in the calculation III, the switching timing tsw3 of the third correction target is set so that the average duty is constant. The steps up to the point of “temporarily calculating” the correction amount −Δ2 are the same as those in FIG. 8 of the second embodiment.

  Furthermore, in the fourth embodiment, the value of the correction amount of the third correction target switching timing tsw3 temporarily calculated in the calculation III is evaluated. When the correction amount of the third correction target switching timing tsw3 is a negative value in the “advancing direction”, compared with the correction amount lower limit value Δa, and when the correction amount is a positive value in the “delaying direction”, the correction amount upper limit value Compare with Δb. When the negative correction amount is smaller than the correction amount lower limit value Δa, or when the positive correction amount is larger than the correction amount upper limit value Δb, the correction amount at the third correction target switching timing tsw3 is set to 0. It is characterized by.

When correcting not only to the switching timings tsw1 and tsw2 of the first and second correction targets but also to the switching timing tsw3 of the third correction target, the absolute value of the correction amount that is accumulated and reflected the previous correction amount two times before. May become unexpectedly large. In such a case, in the fourth embodiment, it is determined that it is preferable to reset the correction amount to 0 once.
In the example of FIG. 11, since the correction amount (−Δ2) of the third correction target switching timing tsw3 temporarily calculated in the calculation III is smaller than the correction amount lower limit value Δa, the correction amount is set to zero.

Setting of the correction amount lower limit value Δa and the correction amount upper limit value Δb will be described with reference to FIG.
The upper and lower limit values of the duty in the PWM control of the boost converter 20 can be calculated according to circuit constants, boost ratios, and the like.
As shown in FIG. 12A, according to the difference between the duty upper limit value and the duty (before correction), before the peak of the converter carrier Cc, the correction amount upper limit that can most delay the falling timing tsw_dn. The value Δb is determined, and after the peak timing, the correction amount lower limit value Δa that can make the rising timing tsw_up the earliest is determined.
Similarly, as shown in FIG. 12B, a correction amount that can most delay the rising timing tsw_up before the valley timing of the converter carrier Cc according to the difference between the duty (before correction) and the duty lower limit value. The upper limit value Δb is determined, and after the trough timing, the correction amount lower limit value Δa that can make the fall timing tsw_dn the earliest is determined.

The flowchart of FIG. 13 describes the correction amount reset processing, assuming that the calculation II related to the second correction target switching timing tsw2 is “previous” and the calculation III related to the third correction target switching timing tsw3 is “current”. Is.
In S10 (calculation II), the correction amount at the previous time, that is, the switching timing tsw2 of the second correction target is calculated so as to compensate the correction amount at the previous time, that is, the first correction target switching timing tsw1.

  S21 and S22 are substantially the same as FIG. In the case of YES in S21, the correction amount of the first correction target switching timing tsw1 cannot be completely compensated by the correction of the second correction target switching timing tsw2, and therefore the third correction target in the calculation III. A request for calculating the correction amount of the switching timing tsw3 is generated. If NO in S21, the routine ends.

In S40 (calculation III provisional), the correction amount for the current timing, that is, the third correction target switching timing tsw3 is provisionally calculated so as to compensate for the previous correction amount and the previous correction amount.
In S41, it is determined whether the temporarily calculated negative correction amount is smaller than the correction amount lower limit value Δa or whether the temporarily calculated positive correction amount is larger than the correction amount upper limit value Δb.
If YES in S41, the correction amount is set to 0 (reset) in S42. On the other hand, when NO in S41, the correction amount is confirmed, and the third correction target switching timing tsw3 is corrected.

  As described above, in the fourth embodiment, the correction amount of the third correction target switching timing tsw3 is limited to a value within a range in which normal boost control is possible, so that the first correction is performed while preventing runaway control. The output fluctuation caused by the above can be canceled and the boost control can be stabilized.

(Fifth embodiment)
The switching timing correction process according to the fifth embodiment of the present invention will be described with reference to the time chart of FIG. All of the switching timing correction processes of the first to fourth embodiments are based on the basic idea of compensating for the change in duty caused by the correction of the switching timing tsw1 of the first correction target and making the average duty constant. On the other hand, the fifth embodiment is based on the idea that “the boosted output voltage VH is constant”.

In the fifth embodiment, at the calculation start timing tc ^* I, “the first correction target switching timing tsw1 expected to enter the switching prohibition period Pp” is changed to the switching timing tsw1 ′ after the switching prohibition period Pp. to correct. Then, at the subsequent calculation start timing tc ^* II, the “second correction target switching timing tsw2” next to the first correction target switching timing tsw1, and the next “third correction target switching”. The timing “tsw3” is corrected to the corrected switching timings tsw2 ′ and tsw3 ′ by operations described below.

  Here, the switching timing one time before the first correction target switching timing tsw1 is set to “reference time t0”. In addition, the time from the reference time t0 to the corrected switching timings tsw1 ', tsw2', and tsw3 'are defined as a corrected first time τ1, a corrected second time τ2, and a corrected third time τ3, respectively. Then, paying attention to changes in the reactor current IL and the output voltage VH in the period of two carrier cycles (2T) from the reference time t0 to the switching timing t4 four times later, the corrected second time τ2 and the corrected third time By calculating the time τ3, the second and third correction target switching timings tsw2 ′ and tsw3 ′ are determined.

  Further, the reactor currents IL at the reference time t0 and the corrected switching timings tsw1 ', tsw2', and tsw3 'are I0, I1, I2, and I3, respectively. Further, for convenience, a period from 0 to τ1 from the reference time t0 is “first term”, a period from τ1 to τ2 is “second term”, a period from τ2 to τ3 is “third term”, and τ3 to 2T. This period is called “fourth term”.

  In the first and third terms when the corrected drive signal ScB is on, that is, the high potential side switching element 23 is on, the reactor current IL decreases from I0 to I1 and from I2 to I3. In addition, in the second term and the fourth term in which the drive signal ScB is off, that is, the low potential side switching element 24 is on, the reactor current IL increases from I1 to I2 and from I3 to I4. Therefore, the reactor currents I0 and I2 at the time of rising when the drive signal ScB is switched from OFF to ON have maximum values, and the reactor currents I1 and I3 at the time of falling when the drive signal ScB is switched from ON to OFF are minimum values.

Using the input voltage VL and output voltage VH of the boost converter 20 and the inductance L of the reactor 21, the slope (<0) when the reactor current IL is decreased is expressed by Equation (2.1), and the slope when the reactor current IL is increased (> 0) is represented by the formula (2.2).
Slope when reactor current IL decreases = (VL−VH) / L (2.1)
Slope when reactor current IL increases = VL / L (2.2)

Also, assuming that the capacitance of the smoothing capacitor 25 is C and the load current flowing through the motor generator 4 is Im, the output voltage VH of the first term and the third term in which the drive signal ScB is on is expressed by the equation (3.1): The output voltages VH of the second term and the fourth term are expressed by equation (3.2).

  When the load current Im is constant and the coefficient (1 / C) is 1, the output voltages VH of the first term and the third term correspond to the trapezoidal positive areas S1 and S3 illustrated by the broken line hatching, The output voltages VH of the term and the fourth term correspond to the rectangular negative areas -S2 and -S4 shown in the same manner. In the fifth embodiment, the correction amount of each switching timing is set so that the sum of the areas of the first and third terms (S1 + S3) is equal to the sum of the absolute values of the areas of the second and fourth terms (S2 + S4). Is set to make the output voltage VH constant.

The details of the calculation for making the output voltage VH constant will be described below.
At the calculation start timing tc ^* II shown in FIG. 14, the carrier period T of the converter carrier Cc, the inductance L of the reactor 21, the input voltage VL of the boost converter 20, the output voltage VH, the load current Im, the reactor currents I0, I1, and The corrected first time τ1 is treated as a constant or a known variable.

Here, the input voltage VL, the output voltage VH, the load current Im, and the like naturally change in a long span. However, in the short period before and after this calculation, it is regarded as a constant, and for example, an instantaneous value at a certain time before the calculation start timing tc ^* II may be adopted, or an average value in a past predetermined period may be adopted. Also good. The reactor current I1 and the corrected first time τ1 are determined by calculation at the immediately preceding calculation start timing tc ^* I.
On the other hand, at the calculation start timing tc ^* II, the reactor currents I2, I3, the corrected second time τ2, and the corrected third time τ3 at the future switching timings tsw2 ′ and tsw3 ′ are unknown values.

As described above, equation (4.1) is set from (S1 + S3) = (S2 + S4). In the following formulas (4.1) to (4.10), numbers “0” to “4” of I0 to I4 and τ1 to τ3 are written in subscripts.

Next, the slope of the reactor current IL with respect to the difference between the end time and the start time in each term is expressed by an equation. In the fourth term, Equation (4.2) is obtained from the relationship of “I4 = I0”.

Moreover, about a 2nd term and a 3rd term, Formula (4.3) and (4.4) are obtained.

When formula (4.1) is arranged, formula (4.5) is obtained.

When both sides of Expression (4.2) and Expression (4.3) are added, Expression (4.6) is derived.

From equations (4.2), (4.3), and (4.4), when unknown reactor currents I2 and I3 are eliminated, equation (4.7) is derived. Here, the right side of the equation (4.7) is set to “K” and rewritten into a simple equation (4.8). K is a constant calculated only with a known value.

By substituting Equation (4.6) and Equation (4.8) into Equation (4.5) and eliminating the corrected second time τ2, Equation (4.9) is derived.

When formula (4.9) is rearranged for the corrected third time τ3, formula (4.10) is obtained.

  According to Equation (4.10), the corrected third time τ3 can be calculated using only known values. If the corrected third time τ3 can be calculated, the corrected second time τ2 can be calculated using equation (4.8), and the second and third correction target switching timings tsw2 ′ and tsw3 ′ are determined. can do.

  As described above, the fifth embodiment is different from the above-described first to fourth embodiments in that “the fluctuation caused by the correction that moves the switching timing tsw1 of the first correction target outside the switching prohibition period Pp, The second and third correction target switching timings tsw2 and tsw3 are compensated for, ”and thus has the technical feature of the present invention in common. Thereby, while avoiding the occurrence of the superimposed surge in the DC voltage converter and the power converter, the output fluctuation caused by the correction can be canceled and the control can be stabilized.

  On the other hand, in the first to fourth embodiments described above, the variation caused by the correction of the switching timing tsw1 of the first correction target is compensated by the idea of “constant average duty”, whereas the fifth embodiment. However, the point of compensation is that the output voltage VH is constant.

Regarding the timing of the correction calculation, in the first to fourth embodiments described above, at the calculation start timing immediately before the switching timing of each correction target, the current correction is performed with reference to the previous correction amount or the previous correction amount. Whereas the amount is determined, in the fifth embodiment, at the calculation start timing tc ^* II, the second and third correction target switching timings tsw2 ′ and tsw3 ′ corresponding to the next time and the next time are calculated simultaneously. Different. In other words, it is the difference between “correction going back in the past” and “correction that schedules the future”. However, as will be described in the “other embodiments” at the end of the specification, in the embodiment in which the average duty is corrected to be constant, “correction for the future” may be performed.

<Mode for correcting inverter switching timing>
Next, a sixth embodiment for correcting the switching timing of the inverter 30 will be described with reference to the overall configuration diagram of FIG. 15 and the time chart of FIG.
A switching control device 60 shown in FIG. 15 has inverter switching correction means 63 as “power converter switching correction means” instead of the boost converter switching correction means 53 of FIG. The configuration of the control block relating to the inverter is the reverse of the configuration of FIG.

  The switching prohibition period calculation unit 62 has the same function as the switching prohibition period calculation unit 52 in FIG. 1 in that the switching prohibition period Pp shown in FIG. 3 is calculated. However, since the destination of sending the information of the switching prohibition period Pp is the inverter switching correction means 63, the reference numeral “62” different from that of the switching prohibition period calculation means 52 is given.

The time chart of FIG. 16 corresponds to FIG. 4 and shows the correction process of the switching timing of the inverter 30. Assuming a three-phase AC inverter, the time chart of FIG. 15 corresponds to any of the U phase, V phase, and W phase.
When the duty exceeds the carrier Ci, the inverter drive signal Si is turned on, and when the duty is lower than the carrier Ci, the inverter drive signal Si is turned off.

  The switching prohibition period calculation means 62 prohibits switching of the switching elements 31 to 36 of the inverter 30 for a predetermined period synchronized with the switching timing prior to the switching timing of the switching elements 23 and 24 of the boost converter 20. Pp "is calculated.

  When the switching timing of any one or more phases is predicted to fall within the switching prohibition period Pp, the inverter switching correction unit 63 sets the switching timing of that phase as “first correction target switching timing tsw1”. Thereafter, in the same way as the correction of the switching timing of the boost converter according to the above-described embodiment, the output fluctuation caused by the correction of the switching timing tsw1 of the first correction target is changed to the second and third correction target thereafter. Compensation is performed by correcting the switching timings tsw2 and tsw3.

  As a result, the inverter 30 can also cancel the output fluctuation caused by the first correction and stabilize the energization control of the motor generator 4 while avoiding the occurrence of the superimposed surge by the switching timing correction of the first correction target. .

(Other embodiments)
(A) The “DC voltage converter” of the present invention is not limited to the step-up converter that steps up the input voltage, but may be a step-down converter that steps down the input voltage. Further, the step-up / down converter is not limited to the one including the pair of upper and lower arm switching elements, and may be any one including at least one switching element.
As a method of calculating the command voltage VHcom in the boost converter, a method other than the method of calculating the command voltage trq ^* and the electrical angular velocity ω by the command voltage generation unit (see FIG. 2) may be used. For example, “calculate command voltage VHcom from dq axis voltages Vd and Vq in inverter control”, “command command voltage VHcom from host ECU according to vehicle state (for example, when engine is started)” Etc. are considered.

  (A) The “power converter” of the present invention is not limited to an inverter that converts DC power to AC power, but may be an H bridge circuit that converts DC power to DC power and drives a DC motor, for example. In the case of an inverter, the number of phases of AC power is not limited to three phases, and may be four or more phases. Furthermore, the number of power converters is not limited to one, and a plurality of power converters may be provided.

(C) In the above embodiment, the boost converter control circuit 51 and the inverter control circuit 61 calculate the duty of the switching element as the control amount of the boost converter 20 and the control amount of the inverter 30. The boost converter drive circuit 54 and the inverter drive circuit 64 generate a PWM signal based on the comparison between the duty and the carrier, and drive by PWM control.
However, the method for generating the drive signal for the switching element is not limited to this. The switching timing correction processing according to the present invention can be applied to any switching control device that can control the ON / OFF switching timing by some method.
In the embodiment using a carrier, the carrier may be a sawtooth wave instead of a triangular wave.

(D) In the present invention, the configuration of the correction calculation timing for the second correction target switching timing tsw2 may be any of the following.
[1] The second correction target switching timing tsw2 is used as the “current” correction target switching timing, and the correction amount is determined immediately before. The first correction target switching timing is the previous switching timing. The correction amount of the second correction target switching timing tsw2 is determined with reference to the correction amount of tsw1. This corresponds to the first to fourth embodiments. The correction calculation timing for the third correction target switching timing tsw3 can be similarly considered.

[2] Using the first correction target switching timing tsw1 as the current correction target switching timing, the first correction target switching timing tsw1 is corrected outside the switching prohibition period Pp, and at the same time, the first correction target switching timing tsw1 is corrected. Reflecting the correction amount of the switching timing tsw1, the correction amount of the second correction target switching timing tsw2, which is the next switching timing, is determined.
As a modification of the first to fourth embodiments, if the next duty is estimated and calculated in advance to calculate the switching prohibition period Pp, the second correction target is corrected when the switching timing tsw1 of the first correction target is corrected. It is also possible to simultaneously perform the correction calculation of the switching timing tsw2.
In the fifth embodiment, at the calculation start timing tc ^* II, corrections for the second and third correction target switching timings tsw2 and tsw3 are calculated simultaneously.

(E) As a method of correcting the switching timing in the configuration for performing PWM control, the above embodiment has basically described the method of changing the duty. However, except for the fifth embodiment, as described in parentheses in FIG. 2, the switching timing may be corrected by changing the carrier cycle (frequency).
Furthermore, the switching timing may be defined by the electrical angle of the motor generator 4 in addition to the method of defining on the time axis.

(F) The “load” driven by the power output from the “power converter” is not limited to a rotating machine such as a motor generator, but may be a device using a high voltage such as a discharge tube or an X-ray generator.
(G) A rotating machine as a load is not limited to one used as a power source for a hybrid vehicle or an electric vehicle, but is used for a vehicle auxiliary machine, a train other than a vehicle, an elevator, a general machine, or the like. May be. The switching control device of the present invention is effectively applied to a system in which at least superposition of surge voltage may be a problem.
As mentioned above, this invention is not limited to the said embodiment at all, In the range which does not deviate from the meaning of invention, it can implement with a various form.

1 ... Motor generator drive system (load drive system),
15 ... Battery (DC power supply),
20 ... Boost converter (DC voltage converter),
21: Reactor,
23, 31, 32, 33 ... high potential side switching element,
24, 34, 35, 36 ... low potential side switching elements,
30: Inverter (power converter),
4 ... Motor generator (load),
50, 60 ... switching control device,
51... Boost converter control circuit (DC voltage converter control circuit)
52 ... switching prohibition period calculation means,
53... Boost converter switching correction means (DC voltage converter switching correction means)
54 ... Boost converter drive circuit (DC voltage converter drive circuit),
61... Inverter control circuit (power converter control circuit),
62 ... switching prohibition period calculation means,
63: Inverter switching correction means (power converter switching correction means),
64: Inverter drive circuit (power converter drive circuit).

Claims (6)

A reactor (21) capable of storing and discharging electric energy, and at least one switching element (23, 24) connected to the reactor, and turning on and off the switching element, the DC power supply (15) A DC voltage converter (20) for converting an input voltage (VL) input to the reactor into an output voltage (VH); and
By having a plurality of switching element pairs composed of high potential side switching elements (31, 32, 33) and low potential side switching elements (34, 35, 36), and alternately turning on and off the switching elements forming a pair, Applied to a load drive system (1) comprising a power converter (30) for converting DC power output by the DC voltage converter into AC power and outputting it to a load;
A switching control device (50, 60) for controlling the switching timing of the switching element of the DC voltage converter and the switching element pair of the power converter,
A DC voltage converter control circuit (51) for calculating a control amount of the DC voltage converter according to a command voltage (VHcom) with respect to an output voltage of the DC voltage converter;
A DC voltage converter drive circuit (54) for operating a switching element of the DC voltage converter according to a control amount of the DC voltage converter calculated by the DC voltage converter control circuit;
A power converter control circuit (61) for calculating a control amount of the power converter according to a required output of the load;
A power converter drive circuit (64) for operating a switching element pair of the power converter according to a control amount of the power converter calculated by the power converter control circuit;
Prior to the switching timing of at least one pair of switching elements constituting the power converter, a period during which switching of the switching elements of the DC voltage converter is prohibited over a predetermined period synchronized with the switching timing, or the DC voltage converter Prior to the switching timing of at least one switching element, switching prohibition period calculating means for calculating a switching prohibition period (Pp), which is a period during which switching of the switching element of the power converter is prohibited over a predetermined period synchronized with the switching timing (52, 62),
When the switching timing of at least one switching element of the DC voltage converter or at least a pair of switching elements constituting the power converter is predicted to fall within the switching prohibition period, the switching timing is set to the first Switching correction means (53, 63) for correcting the switching timing of the first correction target outside the switching prohibition period,
With
The switching correction unit further includes a second correction target switching timing (tsw2) that is a switching timing next to the first correction target switching timing.
The switching control device (50, 60), wherein the switching timing of the second correction target is corrected according to the correction amount of the switching timing of the first correction target. The switching correction means includes
Regarding the switching timing (tsw2) of the second correction target,
The correction is performed so that the average time ratio of one of the switching element or the pair of switching elements in the period before and after the switching timing of the first and second correction targets is equal between before and after the correction. The switching control device according to claim 1. The switching correction means includes
When it is predicted that the switching timing (tsw2 ′) of the second correction target corrected according to the correction amount of the switching timing of the first correction target is predicted to fall within the switching prohibition period, the second correction target Is further corrected outside the switching prohibition period,
And about the switch timing (tsw3) of the 3rd correction object which is the switch timing next to the switch timing of the 2nd correction object,
Correction is performed so that the average time ratio of one of the switching elements or the pair of switching elements in the period before and after the switching timing of the first, second, and third correction objects is the same before and after correction. The switching control apparatus according to claim 2. With respect to the sign of the correction amount at the switching timing of the correction target, if the correction amount in the direction to be delayed with respect to the switching timing before correction is defined as positive, the correction amount in the direction to advance is defined as negative
The switching correction means includes
When the switching timing of the second correction target is corrected in the direction of the temporarily calculated correction amount, the on time or the off time of one of the switching element or the switching element pair is set to a predetermined time lower limit value (α). 4. The switching control device according to claim 3, wherein when the value is less than or exceeds a predetermined time upper limit value (β), the correction amount is corrected to a correction amount in a direction opposite to the provisionally calculated correction amount. 5. The switching correction means includes
About the correction amount temporarily calculated for the switching timing of the third correction target,
When the negative correction amount in the direction to advance the switching timing is smaller than a predetermined correction amount lower limit value (Δa), or the positive correction amount in the direction to delay the switching timing is larger than the predetermined correction amount upper limit value (Δb). When
The switching control device according to claim 3 or 4, wherein the correction amount of the switching timing of the third correction target is set to zero. The switching control device (50) according to claim 1, further comprising a DC voltage converter switching correction means (53) for correcting a switching timing of at least one switching element of the DC voltage converter as the switching correction means. ,
A switching timing next to the switching timing of the second correction target is set as a switching timing (tsw3) of the third correction target, and a reference time (t0) which is a switching timing immediately before the switching timing of the first correction target. ) To the corrected first switching timing (tsw1 ′), the corrected second switching timing (tsw2 ′), and the corrected third switching timing (tsw3 ′). Assuming that the first time after correction (τ1), the second time after correction (τ2), and the third time after correction (τ3),
The DC voltage converter switching correction means,
Carrier cycle (T), circuit constant (L), input voltage (VL) and output voltage (VH) of the DC voltage converter, load current (Im) flowing through the load, the reference time and the corrected first time Based on the reactor current (I0, I1) flowing through the reactor of the DC voltage converter at the switching timing of 1, and the corrected first time,
The switching control is characterized in that the corrected second time and the corrected third time are calculated so that the output voltage of the DC voltage converter in the period of two carrier cycles from the reference time is constant. apparatus.

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