JP2016005132A - High frequency amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high frequency amplifier capable of improving output and efficiency by reducing a loss without removing a chip capacitor.SOLUTION: A short stub 1 is constituted in a high range side of a fundamental wave connected to a chip capacitor 1a using a first transmission line 1b whose length is shorter than λ/4. To a connection part between the first transmission line 1b and the chip capacitor 1a, an open stub 2 is connected in a length of λ/4 on a lower range side of the fundamental wave. A second transmission line 3 and a wire 5 to which the short stub 1 is connected is connected to the output side of a transistor.

Description

  The present invention relates to an internal matching type high-frequency amplifier using a short stub.

  FIG. 11 is a circuit diagram showing a conventional transformation circuit of an internal matching type high-frequency amplifier using a short stub. The circuit shown in the figure includes an FET (field effect transistor) 101, a short stub 102, a transmission line 103, and a wire 104, and the short stub 102 includes a transmission line 102b having a tip capacitor 102a connected to the tip. By using the short stub 102, the output capacitance of the FET 101 is canceled, and the output impedance of the FET 101 is increased as shown in FIG. This technique can reduce the area of the matching circuit in an internal matching type high-frequency amplifier that requires miniaturization, and achieves both wide bandwidth and miniaturization (see, for example, Patent Document 1).

JP 2011-35761 A

  However, in the conventional high-frequency amplifier, there is a problem that the internal resistance of the chip capacitor 102a used for the short stub 102 becomes a loss component, which reduces the output and efficiency of the high-frequency amplifier.

  The present invention has been made to solve the above-described problems, and reduces the loss without removing the chip capacitor at the tip of the short stub, which is necessary for widening the bandwidth of the internal matching type high frequency amplifier. An object of the present invention is to obtain a high frequency amplifier capable of improving efficiency.

  The high-frequency amplifier according to the present invention includes a short stub including a first transmission line having a length shorter than λ / 4 on the high frequency side of the fundamental wave connected to the chip capacitor, and a connection between the first transmission line and the chip capacitor. An open stub having a length of λ / 4 and a second transmission line and a wire connected to a short stub are connected to the output side of the transistor on the low frequency side of the fundamental wave connected to the part.

  In the high frequency amplifier according to the present invention, an open stub having a length of λ / 4 is connected to the connection portion between the first transmission line and the chip capacitor on the low frequency side of the fundamental wave. Can be improved.

1 is a configuration diagram showing a high-frequency amplifier according to Embodiment 1 of the present invention. It is explanatory drawing which shows the circuit loss of the high frequency amplifier by Embodiment 1 of this invention compared with the past. It is explanatory drawing which shows the frequency characteristic of the chip capacitor and open stub of the high frequency amplifier by Embodiment 1 of this invention. It is a block diagram which shows the circuit layout of the high frequency amplifier by Embodiment 1 of this invention. It is a block diagram which shows the high frequency amplifier by Embodiment 2 of this invention. It is explanatory drawing which shows the transformation | transformation by the impedance area | region where the operation efficiency of FET of the high frequency amplifier by Embodiment 2 of this invention becomes the maximum, the 2nd transmission line, and a wire. It is a block diagram which shows the high frequency amplifier by Embodiment 3 of this invention. It is a block diagram which shows the circuit layout of the high frequency amplifier by Embodiment 4 of this invention. It is a block diagram which shows the circuit layout of the high frequency amplifier by Embodiment 5 of this invention. It is a block diagram which shows the circuit layout of the high frequency amplifier by Embodiment 6 of this invention. It is a block diagram which shows the conventional high frequency amplifier. It is explanatory drawing which shows the output impedance of the FET of the conventional high frequency amplifier, the transformation | transformation by a short stub, and the transformation | transformation by a transmission line.

Embodiment 1 FIG.
1 is a block diagram showing a circuit on the output side of a high-frequency amplifier according to Embodiment 1 of the present invention.
The illustrated high frequency amplifier includes a short stub 1 using a chip capacitor 1 a and a first transmission line 1 b, an open stub 2 connected to a part of the short stub 1, a second transmission line 3, and a third transmission line 4. , Wire 5 and FET 6. The short stub 1 is a stub having a short point (short-circuit point) at the tip, and uses the first transmission line 1b having a length shorter than λ / 4 on the high frequency side of the fundamental wave to which the chip capacitor 1a is connected. It is configured. The end opposite to the short-circuit point is connected to a connection point between the second transmission line 3 and the third transmission line 4. The open stub 2 is a stub whose tip is open (open). The second transmission line 3 is connected to the output terminal of the FET 6 through the wire 5, and the third transmission line 4 is a line for constituting an output side matching circuit.

  Thus, in Embodiment 1, since the open stub 2 is connected to the short stub 1, the circuit loss can be reduced as compared with the conventional configuration as shown in FIG. In the figure, the broken line 21 is the present invention provided with the open stub 2, and the solid line 22 indicates the conventional configuration. Hereinafter, the reason why the circuit loss can be reduced will be described. Hereinafter, fH means the high frequency side in the fundamental frequency band, and fL means the low frequency side in the fundamental frequency band.

  First, by setting the length of the first transmission line 1b in the short stub 1 to λ / 4 @ fH or less, the short stub 1 is positively used as a matching circuit in the fundamental frequency band of fL to fH. Since the chip capacitor 1a has a resistance component inside, the internal resistance of the chip capacitor 1a can be seen from the fundamental waves of fL to fH, and the circuit loss increases. Further, since the short stub 1 is close to short at fL and close to open at fH, it is more susceptible to the internal resistance of the chip capacitor 1a at fL than fH, and the circuit loss at fL is higher than fH as shown in FIG. growing.

  Here, it is considered that an open stub 2 having a length of λ / 4 @ fL is connected to a connection point of the chip capacitor 1a. FIG. 3 shows frequency characteristics of the chip capacitor 1 a and the open stub 2. Although the chip capacitor 1a has an internal resistance, an ideal short circuit cannot be realized (see FIG. 3A), but the open stub 2 can realize an ideal short circuit compared to the chip capacitor 1a (FIG. 3B). reference). For this reason, fL makes it easier to see a short on the open stub 2 side than the chip capacitor 1a at the root of the open stub 2, and makes the resistance of the chip capacitor 1a less visible. As a result, the circuit loss at fL can be reduced as shown in FIG. As shown in FIG. 3B, since the root of the open stub 2 is not short at fH, the effect of reducing the circuit loss is small.

  FIG. 4 shows a layout of a high-frequency amplifier to which the configuration of the first embodiment is applied. An input side matching circuit 11 is formed on the input substrate 10 and connected to the FET 6. An output side matching circuit composed of the short stub 1 and the open stub 2 is formed on the output substrate 20 and connected to the FET 6. The chip capacitor 1a is connected to the first transmission line 1b formed on the output substrate 20.

  As described above, according to the high frequency amplifier of the first embodiment, the short stub including the first transmission line having a length shorter than λ / 4 on the high frequency side of the fundamental wave connected to the chip capacitor, An open stub having a length of λ / 4 on the low frequency side of the fundamental wave connected to the connection portion of 1 transmission line and the chip capacitor, and a second transmission line and a wire connected to the short stub are connected to the output side of the transistor Therefore, it is possible to reduce the loss and improve the output and efficiency without removing the chip capacitor at the tip of the short stub necessary for widening the bandwidth of the internal matching type high frequency amplifier.

Embodiment 2. FIG.
FIG. 5 is a configuration diagram illustrating the high-frequency amplifier according to the second embodiment. The high-frequency amplifier according to the second embodiment includes a short stub 1, an open stub 2, a second transmission line 3, a third transmission line 4, a wire 5, and an FET 6. The configuration on the drawing is the embodiment shown in FIG. Although it is the same as that of the structure of form 1, the value of each part differs.

That is, in the second embodiment, the length of the open stub 2 is λ / 8 @ fH to λ / 4 @ fH, the capacitance of the chip capacitor 1a is 100 pF or less, the open stub 2 to the second transmission line 3 and the third transmission line 3 The length of the first transmission line 1b up to the transmission line 4 is λ / 8 @ fH, the length of the second transmission line 3 is λ · 3/8 @ 2fH to λ · 4/8 @ 2fH, The length is set to 0.4 mm or less.
The reason why the operation efficiency of the high-frequency amplifier can be further improved by such a configuration will be described below.

  In the fundamental wave, the open stub 2 having a length of λ / 8 @ fH to λ / 4 @ fH becomes a length of λ / 4 @ 2fH to λ / 2 @ 2fH in the double wave, and is inductive (L property). It becomes. On the other hand, since the chip capacitor 1a is capacitive (C property), the connection point between the open stub 2 and the short stub 1 is doubled (2fH) by performing LC parallel resonance with the open stub 2 and the second harmonic (2fH). ), And the short stub 1 is λ / 8 @ fH (λ / 4 for the second harmonic), so the connection between the short stub 1, the second transmission line 3, and the third transmission line 4 is established. The point is short-circuited at a second harmonic (2 fH) (see short-circuit in FIGS. 5 and 6).

  Next, the length of the second transmission line 3 shown in FIG. 5 is appropriately selected between 3/8 · λ @ 2fH to 4/8 · λ @ 2fH, and the length of the wire 5 is appropriately selected to be 0.4 mm or less. As a result, as shown in FIG. 6, the second harmonic impedance when the load side is viewed from the end of the FET 6 is transformed into a region where the operation efficiency is maximized. As described above, a broadband and highly efficient characteristic can be obtained.

  The values of the chip capacitor 1a having a capacitance of 100 pF or less and the length of the wire 5 of 0.4 mm or less are values in actual operation in the high-frequency amplifier. How to obtain these values will be further described.

The idea of setting the capacitance of the chip capacitor 1a to 100 pF or less is to take a value that is sufficiently short-circuited at the fundamental wave. For example, suppose the definition of “sufficiently short” assumes that the real part of the impedance Z of the capacitor is 0.1Ω or less and the imaginary part is 1Ω or less. Depending on the size and size, self-resonance occurs due to the parasitic inductance.
In calculation, the frequency band generally used is short enough for each of the L band (1 to 2 GHz), S band (2 to 4 GHz), C band (4 to 8 GHz), and X to Ku band (8 to 18 GHz). When the capacity required for realization is obtained, the result is as follows.
“If you use 100 to 80 pF in the L band, 80 to 40 pF in the S band, 40 to 20 pF in the C band, and 20 to 15 pF in the X to Ku band, it will be short enough”. However, in actual operation, the chip capacitor 1a has a self-resonant frequency depending on its type and size, and an optimum capacitance value is selected as necessary. At this time, for example, it is considered that the effect can be obtained even if the design is made at 40 pF which does not provide a sufficient short in the L band.

  Regarding the length of the wire 5 (inductance size), if the wire 5 is long (inductance is large), the output impedance of the FET 6 shown in FIG. 12 rotates clockwise without changing the distance from the center of the circle. When moving to the real axis (a line crossing the center of the Smith chart), the impedance becomes low because it becomes closer to a short circuit. Therefore, basically, the shorter the length of the wire 5 is, the smaller the rotation amount of the output impedance of the FET 6 becomes, and it becomes possible to bring it to a higher impedance by the subsequent transformation by the short stub 1 and the effect can be obtained. It becomes easy. From this, even if the length of the wire 5 is limited to 0.4 mm or less, a broadband characteristic can be obtained.

  Next, with regard to the second harmonic impedance when the load side is viewed from the end of the FET 6, the length between 3/8 · λ @ 2fH to 4/8 · λ @ 2fH is between the wire 5 and the short @ 2fH. 2 transmission lines 3 are contained. In FIG. 6, the length of 3/8 · λ @ 2fH follows the broken line arrow from the short point and is directly below the Smith chart (position of 270 °). Further, the length of 4/8 · λ @ 2fH returns to the short point after making a round of the Smith chart in the Smith chart of FIG. That is, only this line is transformed into an impedance region in which the operation efficiency of the FET 6 shown in FIG. 6 is maximized. Since the design is rotated by an amount corresponding to the sum of the line length of 3/8 · λ @ 2fH to 4/8 · λ @ 2fH and an inductance component of 0.4 mm or less, the operation efficiency of the FET 6 is maximized. The length of the second transmission line 3 and the wire 5 having a length of 3/8 · λ @ 2fH to 4/8 · λ @ 2fH is optimized so as to enter the impedance region.

  In the above example, fH has been described as an example of the frequency at which the operating efficiency is desired to be improved. However, since the line length is determined by the frequency at which the operating efficiency is desired to be improved, the frequency is not limited to fH, and may be fL or other frequencies.

  As described above, according to the high frequency amplifier of the second embodiment, the length of the first transmission line in the short stub is λ / 8 as the fundamental wave, and the length of the open stub is λ / 8 to λ as the fundamental wave. / 4, capacitance of 100 pF or less where the chip capacitor resonates in parallel with the open stub, the length of the second transmission line from the connection point of the short stub and the second transmission line to the wire end is 3/8 · Since the output circuit having λ˜4 / 8 · λ and the wire length of 0.4 mm or less is connected to the transistor, the operational efficiency in practical operation as a high frequency amplifier can be further improved.

Embodiment 3 FIG.
FIG. 7 is a configuration diagram illustrating the high-frequency amplifier according to the third embodiment.
In the second embodiment, the open stub 2 is made inductive (L property) with a second harmonic, and the short stub 1 is shown as an open stub with a second harmonic by resonating in parallel with the chip capacitor 1a. On the other hand, in the third embodiment, the open stub 2 is made capacitive (C property) with a second harmonic, a short transmission line (fourth transmission line 1c) is added to the chip capacitor 1a, and the chip capacitor 1a side is changed. An example of making the short stub 1 look like an open stub with a second harmonic by making the open stub 2, the chip capacitor 1 a and the fourth transmission line 1 c resonate in parallel with the second harmonic by making it inductive (L). It is. In FIG. 7, the configuration on the drawing is the same as that of the second embodiment shown in FIG. 5 except that a fourth transmission line 1c is added. To do.

  By setting the length of the open stub 2 to λ / 2 @ 2fH to 3/4 · λ @ 2fH, the open stub 2 becomes capacitive (C property) with a second harmonic wave. By setting the length of the fourth transmission line 1c to the connection point to be λ / 4 @ 2fH or less, the chip capacitor 1a side from the connection point of the open stub 2 becomes inductive (L property). As a result, the open stub 2, the chip capacitor 1 a and the fourth transmission line 1 c are caused to resonate in parallel with the second harmonic, and the connection point of the open stub 2 is opened with the second harmonic, whereby the short stub 1 is doubled. Can be shown as an open stub. The length of the first transmission line 1b from the connection point of the open stub 2 to the second transmission line 3 and the third transmission line 4 is λ / 8 @ fH (λ / 4 for the second harmonic). Thus, the connection point of the short stub 1, the second transmission line 3, and the third transmission line 4 is short-circuited at the second harmonic. Furthermore, by appropriately selecting the length of the second transmission line 3 from 3/8 · λ @ 2fH to 4/8 · λ @ 2fH and the length of the wire 5 to 0.4 mm or less, FIG. As shown, the second harmonic impedance when the load side is viewed from the end of the FET 6 can be transformed into a region where the operating efficiency is maximized. As described above, a broadband and highly efficient characteristic can be obtained.

  As described above, according to the high frequency amplifier of the third embodiment, the length of the first transmission line in the short stub is λ / 8 as the fundamental wave, and the length of the open stub is λ / 2 as the double wave. 3/4 · λ, the length of the fourth transmission line from the connection end of the open stub to the chip capacitor is λ / 4 or less at a double wave, the capacity of the chip capacitor is 100 pF or less, the short stub and the second transmission line The second transmission line length from the connection point to the wire end is 3/8 · λ to 4/8 · λ with a double wave, and the output circuit with a wire length of 0.4 mm or less is connected to the transistor As a result, the operational efficiency in actual operation as a high frequency amplifier can be further improved.

Embodiment 4 FIG.
Although the circuit configuration using one chip capacitor is used in the first embodiment, an example using two chip capacitors 1a is shown in FIG. 8 as the fourth embodiment. As shown in the drawing, by arranging two chip capacitors 1a in parallel instead of one, the combined resistance inside the chip capacitor 1a is reduced, and the circuit loss can be reduced. Since the configuration other than this is the same as that of the first embodiment shown in FIG. 4, the same reference numerals are assigned to the corresponding portions, and the description thereof is omitted. Note that the effect can be obtained with three or more chip capacitors 1a instead of two.

  As described above, according to the high frequency amplifier of the fourth embodiment, the short stub is configured by connecting a plurality of chip capacitors connected in parallel to the first transmission line. Loss can be reduced.

Embodiment 5 FIG.
As shown in FIG. 4, the circuit layout of the first embodiment is asymmetrical (vertically asymmetric in the drawing) with respect to the FET 6, but an example in which the circuit layout is vertically symmetric is shown in FIG. Show.

  Since the FET 6 has a plurality of cells arranged side by side, in the configuration of the first embodiment, the appearance of the short stub 1 is different from the one end cell and the other end cell, and as a result, the impedance when the load side is viewed from each cell. May vary, and each cell may not operate uniformly, leading to a decrease in output and efficiency of the high-frequency amplifier. Therefore, by using two chip capacitors 1a and making the circuit layout symmetrical, it is possible to reduce nonuniform operation between cells.

  As described above, according to the high frequency amplifier of the fifth embodiment, since the circuit layout is such that the short stub is symmetric with respect to the transistor, nonuniform operation between the cells of the transistor can be reduced.

Embodiment 6 FIG.
In the fourth embodiment, the combined resistance of the chip capacitor 1a is reduced by arranging a plurality of chip capacitors in parallel. In the fifth embodiment, the circuit layout is symmetric to reduce the non-uniform operation of each cell of the FET 6. These configurations may be combined, and this is shown in FIG.

  With this configuration, it is possible to simultaneously achieve a reduction in loss due to the chip capacitor 1a and a reduction in non-uniform operation of each cell of the FET 6.

  In each of the above embodiments, the FET has been described as an example of the transistor, but other transistors such as a bipolar transistor can be similarly applied.

  Further, within the scope of the present invention, the invention of the present application can be freely combined with each embodiment, modified with any component in each embodiment, or omitted with any component in each embodiment. .

  DESCRIPTION OF SYMBOLS 1 Short stub, 1a Chip capacitor, 1b 1st transmission line, 1c 4th transmission line, 2 Open stub, 3 2nd transmission line, 4th 3rd transmission line, 5 wires, 6 FET, 10 input board, 11 Input side matching circuit, 20 Output board.

Claims (5)

A short stub comprising a first transmission line having a length shorter than λ / 4 on the high frequency side of the fundamental wave connected to the chip capacitor;
An open stub having a length of λ / 4 on the low frequency side of the fundamental wave connected to the connection portion of the first transmission line and the chip capacitor;
A high-frequency amplifier, wherein a second transmission line and a wire to which the short stub is connected are connected to an output side of a transistor. The length of the first transmission line in the short stub is λ / 8 in fundamental wave,
The length of the open stub is λ / 8 to λ / 4 as a fundamental wave,
A capacitance of 100 pF or less at which the chip capacitor resonates in parallel with the open stub;
The length of the second transmission line from the connection point of the short stub and the second transmission line to the wire end is 3/8 · λ to 4/8 · λ,
2. The high frequency amplifier according to claim 1, wherein an output circuit having a length of the wire of 0.4 mm or less is connected to the transistor. The length of the first transmission line in the short stub is λ / 8 as a fundamental wave,
The length of the open stub is λ / 2 to 3/4 · λ in a double wave,
The length of the fourth transmission line from the connection end of the open stub to the chip capacitor is λ / 4 or less at a second harmonic,
The capacitance of the chip capacitor is 100 pF or less,
The length of the second transmission line from the connection point of the short stub and the second transmission line to the wire end is 3/8 · λ to 4/8 · λ,
2. The high frequency amplifier according to claim 1, wherein an output circuit having a length of the wire of 0.4 mm or less is connected to the transistor.   4. The high-frequency amplifier according to claim 1, wherein a plurality of chip capacitors connected in parallel are connected to the first transmission line to form the short stub.   5. The high-frequency amplifier according to claim 1, wherein the short stub is symmetric with respect to the transistor.

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