JP2015195430A - Data storage control device and data storage control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a data storage technology capable of efficiently using a memory.SOLUTION: A data storage control device includes: a compression section; a write control section which writes compressed data into a memory 10 as write data; and an input buffer memory 31 which temporarily holds image data to be supplied to the compression section. The compression section compresses image data for each first block and outputs compressed data for each second block BL2 formed from N (N is an integer equal to or more than 1) pieces of first blocks. The compression section utilizes a first block that is not subjected to compression, as a reference object (reference type processing). The input buffer memory 31 holds image data regarding a first block that is not completely utilized as the compression object and the reference object and releases, in predetermined timing, a storage region allocated to a first block that is completely utilized as the compression object and the reference object.

Description

  The present invention relates to a data storage control device and a data storage control method.

  Various techniques are associated with data storage.

  For example, image data of still images and moving images is subjected to compression processing for the purpose of reducing the data amount. Patent Document 1 describes a technique for compressing video data to a smaller size by combining lossy compression and lossless compression. Patent Document 2 describes a technique that is highly likely to reduce the amount of data while generating lossless data without data deterioration.

  Patent Document 3 discloses an access technology for a memory that has a plurality of banks and requires a predetermined number of clock cycles or more between the previous and subsequent accesses when continuously accessing the same bank. Have been described.

JP 2009-260977 A JP2013-135254A Japanese Patent No. 5147102

  There have been various demands on data storage technology. For example, there is a demand for reducing the use capacity of the memory or for efficiently using the memory. The techniques of Patent Documents 1 to 3 are considered to be examples of those developed to meet the demand.

  An object of the present invention is to realize, for example, either a reduction in the use capacity of a memory or an efficient use of a memory by a technique completely different from the conventional one.

  A data storage control device according to a first aspect of the present invention includes a compression unit that compresses image data and outputs compressed data, a write control unit that writes the compressed data to a memory as write data, and the compression unit And an input buffer memory for temporarily holding the image data to be supplied. The compression unit compresses the image data for each first block including image blocks having a predetermined area size, and compresses the image data for each second block including N (N is an integer of 1 or more) first blocks. Output data. The processing in the compression unit includes reference type processing that uses the first block that is not the compression target as a reference target. The input buffer memory holds the image data for the first block that has not been used as the compression target and the reference target, and the first block has been used as the compression target and the reference target The storage area allocated to is released at a predetermined timing.

  A data storage control device according to a second aspect of the present invention is the data storage control device according to the first aspect, wherein the compression unit is configured to receive X (X is an integer of 1 or more) from the input buffer memory. The image data is acquired in units of a third block including the second block, and the input buffer memory manages the storage area in association with the third block.

  A data storage control device according to a third aspect of the present invention is the data storage control device according to the first or second aspect, wherein the write data output from the compression unit is transferred to the write control unit. The output buffer memory is further included for temporarily holding. The memory has a plurality of banks, and the write control unit switches the plurality of banks for each write data and writes the write data to the memory.

  A data storage control device according to a fourth aspect of the present invention is the data storage control device according to the third aspect, wherein the write control unit has Y outputs (Y is an integer of 2 or more) in the output buffer memory. ), The Y write data are collectively written in the memory.

  A data storage control device according to a fifth aspect of the present invention is the data storage control device according to any one of the first to fourth aspects, wherein image processing is performed in a macro stage before the input buffer memory. The processing is performed in units of blocks, and the V second blocks (V is an integer of 1 or more) correspond to the W macro blocks (W is an integer of 1 or more).

  A data storage control method according to a sixth aspect of the present invention includes: (a) a step of compressing image data and outputting compressed data; (b) a step of writing the compressed data into memory as write data; c) temporarily storing the image data used in the step (a) in an input buffer memory. In the step (a), the image data is compressed for each first block composed of image blocks having a predetermined area size, and for each second block composed of N (N is an integer of 1 or more) first blocks. The compressed data is output. The step (a) includes a reference process that uses the first block that is not a compression target as a reference target. In the step (c), the image data is held in the input buffer memory for the first block that has not been used as the compression target and the reference target, and is used as the compression target and the reference target. The storage area of the input buffer memory allocated to the completed first block is released at a predetermined timing.

  According to the first and sixth aspects, the input buffer memory can be used efficiently. Moreover, the same effect is acquired also in the 2nd-5th aspect which quotes a 1st aspect.

  The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings.

1 is a block diagram illustrating an encoding apparatus according to Embodiment 1. FIG. 1 is a block diagram illustrating a data storage control device according to Embodiment 1. FIG. It is a figure explaining a processing block about Embodiment 1 (Y component). It is a figure explaining the processing block about Embodiment 1 (Cb component and Cr component). 3 is a block diagram illustrating an example of a lossless compression unit according to Embodiment 1. FIG. 6 is a conceptual diagram illustrating a first example of lossless compression in the first embodiment. FIG. 5 is a block diagram illustrating an example of a lossy compression unit according to Embodiment 1. FIG. 6 is a block diagram illustrating a first example of a lossy compression processing unit in the first embodiment. FIG. FIG. 10 is a diagram illustrating a first example of a lossy compression processing unit in the first embodiment. FIG. 10 is a block diagram illustrating a second example of a lossy compression processing unit in the first embodiment. FIG. 10 is a block diagram illustrating a third example of a lossy compression processing unit in the first embodiment. FIG. 10 is a block diagram illustrating a fourth example of a lossy compression processing unit in the first embodiment. 4 is a block diagram illustrating an example of a compressed data generation unit according to Embodiment 1. FIG. FIG. 6 is a diagram for explaining an example of calculation using weak LPF in the first embodiment. FIG. 10 is a diagram for explaining an example of calculation using strong LPF in the first embodiment. FIG. 5 is a diagram for explaining an example of an order of information holding accuracy in the first embodiment. It is a figure explaining the 1st numerical example about Embodiment 1 (Y component). It is a figure explaining the 1st numerical example about Embodiment 1 (Cb component). It is a figure explaining the 1st numerical example about Embodiment 1 (Cr component). 6 is a diagram for describing a second numerical example with respect to the first embodiment. FIG. 6 is a diagram for describing a second numerical example with respect to the first embodiment. FIG. 6 is a diagram for describing a second numerical example with respect to the first embodiment. FIG. 6 is a diagram for describing a second numerical example with respect to the first embodiment. FIG. 6 is a diagram for describing a second numerical example with respect to the first embodiment. FIG. 6 is a diagram for describing a second numerical example with respect to the first embodiment. FIG. 6 is a diagram for describing a second numerical example with respect to the first embodiment. FIG. 6 is a diagram for describing a second numerical example with respect to the first embodiment. FIG. 6 is a conceptual diagram illustrating a second example of lossless compression in the first embodiment. FIG. 6 is a diagram for explaining a third numerical example with respect to the first embodiment. FIG. 6 is a diagram for explaining a third numerical example with respect to the first embodiment. FIG. 6 is a diagram for explaining a third numerical example with respect to the first embodiment. FIG. 6 is a diagram for explaining a third numerical example with respect to the first embodiment. FIG. 6 is a diagram for explaining a third numerical example with respect to the first embodiment. FIG. 6 is a diagram for explaining a third numerical example with respect to the first embodiment. FIG. 6 is a diagram for explaining a third numerical example with respect to the first embodiment. FIG. 6 is a diagram for explaining a third numerical example with respect to the first embodiment. FIG. FIG. 10 is a block diagram illustrating a fifth example of a lossy compression processing unit in the first embodiment. FIG. 10 is a conceptual diagram illustrating a fifth example of a lossy compression processing unit in the first embodiment. FIG. 10 is a diagram for explaining a numerical example related to the fifth example of the lossy compression processing unit in the first embodiment. FIG. 10 is a diagram for explaining a numerical example related to the fifth example of the lossy compression processing unit in the first embodiment. 1 is a block diagram illustrating a data read control device according to a first embodiment. FIG. 10 is a diagram for explaining a data configuration in the second embodiment. FIG. 10 is a diagram illustrating a first example of data transfer control according to the second embodiment. FIG. 10 is a diagram illustrating a second example of data transfer control according to the second embodiment. FIG. 10 is a diagram for explaining a third example of data transfer control in the second embodiment.

<Embodiment 1>
<Encoding device>
FIG. 1 illustrates a block diagram of an encoding apparatus 1 for the first embodiment. The encoding device 1 is, for example, H.264. H.264, MPEG (Moving Picture Experts Group) -2, MPEG-4, and the like, and performs compression processing (in other words, encoding processing) on moving image data.

  According to the example of FIG. 1, the motion prediction unit 4 reads image data to be encoded from the storage unit 2, reads reference image data used for motion prediction from the storage unit 3, and based on the image data Motion prediction. Motion prediction is performed on a so-called macroblock basis. Here, an example in which the storage units 2 and 3 are SRAMs (Static Random Access Memory) is given, and the storage units 2 and 3 may be referred to as SRAMs 2 and 3 in some cases.

  The result data of motion prediction is converted by the conversion unit 5 by, for example, discrete cosine transform (DCT). Further, the transform unit 5 performs quantization on the obtained transform coefficient (so-called DCT coefficient). The quantized transform coefficient is entropy-encoded by the entropy encoding unit 6 and output from the entropy encoding unit 6 as a bit stream of compressed image data. For entropy coding, techniques such as CABAC (Context-based Adaptive Binary Arithmetic Coding) and CAVLC (Context-based Adaptive Variable Length Coding) are used.

  The quantized transform coefficient is also supplied to the inverse transform unit 7. The inverse transform unit 7 performs processing reverse to that of the transform unit 5, that is, inverse quantization and inverse DCT, thereby generating a residual signal related to the motion prediction result. The residual signal is combined with the predicted image data supplied from the motion prediction unit 4 and input to the deblocking filter 8. In the deblocking filter 8, a deblocking process, that is, a process of reducing block noise generated at a macroblock boundary is executed.

  The image data after deblocking is stored in the storage unit 10 by the data storage control device 9. Here, an example in which the storage unit 10 is a DRAM (Dynamic Random Access Memory) is given, and the storage unit 10 may be referred to as a DRAM 10. The image data in the DRAM 10 is read by the data read control device 11 and stored in the SRAM 3 as reference image data.

  The data storage control device 9 compresses reference image data generated in the encoding device 1 (more specifically, reference image data after deblocking in the example of FIG. 1), and then stores the compressed data in the DRAM 10. . Conversely, the data read control device 11 restores the compressed data stored in the DRAM 10 and stores it in the SRAM 3. The data storage control device 9 and the data read control device 11 can also be applied to devices having a configuration different from the example of FIG.

<Outline of data storage control device>
FIG. 2 illustrates a block diagram of the data storage control device 9. According to the example of FIG. 2, the data storage control device 9 includes an input buffer memory 31, a compression unit 32, an output buffer memory 33, and a write control unit 34. Hereinafter, the buffer memory may be abbreviated as a buffer.

  The input buffer 31 is composed of, for example, an SRAM. The input buffer 31 temporarily holds image data supplied to the compression unit 32. Here, the image data supplied to the compression unit 32 is reference image data (more specifically, reference image data after deblocking).

  Here, an example is shown in which an image is represented by Y, Cb, and Cr components. In this case, the image data indicates Y component image data, Cb component image data, and Cr component image data. However, the data storage control device 9 can be applied to an example in which an image is expressed by other components.

  The compression unit 32 includes a compressed data generation unit 41 and a selection unit 42.

  The compressed data generation unit 41 is configured to be able to generate a plurality of types of compressed data from image data acquired via the input buffer 31. More specifically, the compressed data generation unit 41 includes a lossless compression unit 51 that performs lossless compression and a lossy compression unit 52 that performs lossy compression. Note that lossless compression is also referred to as lossless compression, and lossy compression is also referred to as lossy compression.

  Then, the compressed data generation unit 41 generates a plurality of types of compressed data by compressing the image data using the lossless compression unit 51 and the lossy compression unit 52. The compressed data generation unit 41 may be configured to generate a part or all of a plurality of types of compressed data in parallel (in other words, simultaneously), or in series (in other words, (Sequentially) may be configured to generate.

  The selection unit 42 performs a predetermined selection process on each type of compressed data generated by the compressed data generation unit 41. Specifically, in the selection process, it is determined whether each type of compressed data generated by the compressed data generation unit 41 satisfies a predetermined selection condition, and one compressed data that satisfies the predetermined selection condition is selected. .

  The selection conditions include a data size condition and a data accuracy condition. The data size condition is a condition that the data size is not more than a specified value. The data accuracy condition is a condition that the information holding accuracy is the highest among the compressed data satisfying the data size condition. The information holding accuracy represents how much information provided by image data before compression is held after compression and decompression. Information holding accuracy may be called restoration accuracy.

  The output buffer 33 temporarily holds the compressed data selected by the selection unit 42, in other words, the compressed data output from the compression unit 32, and supplies the compressed data to the write control unit 34.

  The write control unit 34 writes the compressed data in the output buffer 33 to the storage unit 10 (see FIG. 1) as write data. Considering an example in which the storage unit 10 is a DRAM, the write control unit 34 can be configured by a so-called DRAM controller. Therefore, hereinafter, the write control unit 34 may be referred to as a DRAM controller 34.

  Here, in the data storage control device 9, the image data is processed in units of image blocks. Such processing blocks are illustrated in FIGS. 3 relates to Y component image data, and FIG. 4 relates to Cb component and Cr component image data. As shown in FIGS. 3 and 4, the data storage control device 9 uses two types of image blocks called a first block BL1 and a second block BL2.

  Here, for the Y component image data (see FIG. 3), the first block BL1 is configured with a region size of 4 × 1 pixels, and the second block BL2 is configured with a region size of 16 × 4 pixels. I will give you. In this case, the second block BL2 is constituted by the first block BL1 of 4 × 4 blocks. In other words, the second block BL2 can be divided into 16 first blocks BL1.

  As for Cb component and Cr component image data (see FIG. 4), the first block BL1 is configured with an area size of 8 × 1 pixels, and the second block BL2 is configured with an area size of 8 × 2 pixels. Give an example. In this case, the second block BL2 is configured by the first block BL1 of 1 × 2 blocks. In other words, the second block BL2 can be divided into two first blocks BL1.

  The second block BL2 is composed of N (N is an integer of 1 or more) first blocks BL1, and the value of N is 2 or more in the examples of FIGS. However, the value of N may be 1. In this case, the second block BL2 and the first block BL1 have the same area size.

  H. For example, a macroblock MB (see FIGS. 3 and 4) used in H.264, MPEG, or the like is set to an area size of 16 × 16 pixels or 8 × 8 pixels, for example. The encoding apparatus 1 is H.264. When conforming to H.264, MPEG, etc., for example, image data is input to the input buffer 31 in units of such macroblocks MB.

  For example, in the compressed data generation unit 41, lossless compression and lossy compression are performed for each first block BL1. For example, in the selection unit 42, a selection process is performed for each second block BL2.

  Hereinafter, a more specific example of the data storage control device 9 will be described.

<Lossless compression unit>
FIG. 5 shows an example of the lossless compression unit 51. According to the example of FIG. 5, the lossless compression unit 51 includes a lossless compression processing unit 61, and the lossless compression processing unit 61 executes predetermined lossless compression for each first block BL1.

  FIG. 6 illustrates lossless compression performed by the lossless compression processing unit 61. FIG. 6 shows the first block BL1 of the Y component, and for the sake of explanation, the four pixels PX constituting the first block BL1 are called PXa, PXb, PXc, and PXd from the left end. In addition, pixel values (in other words, pixel data) P of the pixels PXa, PXb, PXc, and PXd are Pa, Pb, Pc, and Pd.

  According to the example of FIG. 6, the pixel value of the pixel PXa remains Pa after compression. On the other hand, the pixel value of the pixel PXb is converted to {Pb−Pa}, the pixel value of the pixel PXc is converted to {Pc−Pb}, and the pixel value of the pixel PXd is converted to {Pd−Pc}.

  That is, the lossless compression processing unit 61 determines a pair of adjacent pixels PX in the first block BL1 as a compression target pixel and a reference pixel, and sequentially selects the pair of pixels PX in the first block BL1. Thus, the compression target pixel and the reference pixel are sequentially determined. Then, the lossless compression processing unit 61 performs a lossless compression in which the difference between the pixel values of the compression target pixel and the reference pixel is obtained and the obtained difference value is assigned to the compression target pixel. In the example of FIG. 6, in the pair of pixels PX, the left adjacent pixel PX is set as the reference pixel, but the right adjacent pixel PX may be set as the reference pixel. Note that similar lossless compression can be performed on the Cb component and the Cr component.

  Note that other types of lossless compression may be employed in the lossless compression processing unit 61. Further, the lossless compression unit 51 may include a plurality of lossless compression processing units 61 that perform different types of lossless compression.

<Lossy compression section>
FIG. 7 shows an example of the lossy compression unit 52. According to the example of FIG. 7, the lossy compression unit 52 includes a plurality of lossy compression processing units 62 that perform different types of lossy compression. With reference to FIGS. 8-12, the 1st example-4th example of the lossy compression process part 62 are shown.

  As shown in FIG. 8, the lossy compression processing unit 62a of the first example generates compressed data by executing a low-pass process that is a process of applying a low-pass filter (LPF) to the compression target data. That is, low-pass processing is a type of lossy compression. For example, a horizontal low-pass filter can be used as the low-pass filter.

  An example of a 9-tap horizontal low-pass filter will be described with reference to FIG. Here, the pixel value of the target pixel is P4, the pixel values of the four pixels on the left side of the target pixel are P0 to P3, and the pixel values of the four pixels on the right side of the target pixel are P5 to P8. The LPF coefficients for these nine pixels are C0 to C8. In this case, a value calculated by the mathematical formula shown in FIG. 9 is assigned to the target pixel after the low-pass processing.

  By sequentially setting each pixel in the first block BL1 as a target pixel, the low-pass process for the first block BL1 is completed. In addition, according to the example of FIG. 9, the pixel value of the first block BL1 adjacent to the first block BL1 to be compressed is also referred to.

  As shown in FIG. 10, the lossy compression processing unit 62b of the second example generates compressed data by executing low-pass processing and lossless compression in this order on the compression target data. Here, the low-pass processing is the same as the lossy compression processing unit 62a (see FIG. 8), and the lossless compression is the same as the lossless compression processing unit 61 (see FIG. 5).

  As shown in FIG. 11, the lossy compression processing unit 62c of the third example generates compressed data by performing low-pass processing, lossless compression, and bit shift processing in this order on the compression target data. Here, the low-pass processing and the lossless compression are the same as those of the lossy compression processing unit 62b (see FIG. 10). In the bit shift process, a difference value obtained by lossless compression (more specifically, a bit string when the difference value is expressed in binary) is bit-shifted to the least significant bit (LSB) side by a predetermined shift amount. Let Hereinafter, the bit shift toward the least significant bit may be referred to as right bit shift or right shift.

  Here, if a plurality of shift amounts are used, a plurality of pieces of compressed data can be generated for one piece of compression target data as in the lossy compression processing unit 62d (see FIG. 12) of the fourth example.

  It is also possible to employ configurations other than the first to fourth examples for the lossy compression processing unit 62. For example, the LPF processing may be omitted in the lossy compression processing units 62b to 62d (see FIGS. 10 to 12). Further, another lossy compression processing unit 62 can be configured by changing the action strength of the LPF. Note that the action strength of the LPF can be adjusted by controlling the LPF coefficient.

<Specific example of compressed data generation unit>
FIG. 13 shows a block diagram of an example of the compressed data generation unit 41. In the example of FIG. 13, it is assumed that the lossless compression unit 51 is configured by the examples of FIGS. 5 and 6. In the example of FIG. 13, the lossy compression unit 52 includes four lossy compression processing units 62.

  Specifically, the four lossy compression processing units 62 are composed of two lossy compression processing units 62b1 and 62b2 configured by the lossy compression processing unit 62b (see FIG. 10) and a lossy compression processing unit 62d (see FIG. 12). The two lossy compression processing units 62d1 and 62d2 are configured. The lossy compression processing units 62b1 and 62d1 share the low-pass processing and the lossless compression execution unit, and the bit shift process is performed on the output of the lossy compression processing unit 62b1, thereby outputting the lossy compression processing unit 62d1. Is generated. Similarly, the lossy compression processing units 62b2 and 62d2 share a low-pass processing and lossless compression execution unit. The LPF shared by the lossy compression processing units 62b1 and 62d1 has a smaller working strength than the LPF shared by the lossy compression processing units 62b2 and 62d2. FIG. 14 illustrates an operation with a weak LPF, and FIG. 15 illustrates an operation with a strong LPF.

  As shown in FIG. 13, the compressed data generated by the lossless compression processing unit 61 is called Da.

  The compressed data generated by the lossy compression processing unit 62b1 having a weak LPF is referred to as Db. Two pieces of compressed data generated by the lossy compression processing unit 62d1 having a weak LPF are referred to as Dc and Dd. The compressed data Dc is obtained by right-shifting the compressed data Db by 1 bit, and the compressed data Dd is obtained by right-shifting the compressed data Db by 2 bits.

  The compressed data generated by the lossy compression processing unit 62b2 having a strong LPF is referred to as De. Two pieces of compressed data generated by the lossy compression processing unit 62d2 having a strong LPF will be referred to as Df and Dg. The compressed data Df is obtained by right-shifting the compressed data De by 1 bit, and the compressed data Dg is obtained by right-shifting the compressed data De by 2 bits.

  Hereinafter, the operation of the compression unit 32 will be described more specifically with reference to the example of FIG.

<Operation example of compression unit>
As described above, in the compression unit 32, the compressed data generation unit 41 generates a plurality of types of compressed data from one image data, and the selection unit 42 selects one of the plurality of types of compressed data. In the selection process by the selection unit 42, a data size condition and a data accuracy condition are applied.

  First, the data accuracy condition will be described. As described above, the data accuracy condition is a condition that the information holding accuracy is the highest among the compressed data satisfying the data size condition. It is assumed that the order of information holding accuracy is defined in advance through prior simulations, experiments, and the like, and information on the order is given to the selection unit 42 in advance.

  Below, the example of FIG. 16 is referred about the order of the information retention precision of compression data Da-Dg (refer FIG. 13). According to the example of FIG. 16, the information holding accuracy of the lossless compressed data Da is the highest. Then, the information holding accuracy decreases in the order of the lossy compressed data Db, De, Dc, Df, Dd, and the information holding accuracy of the lossy compressed data Dg is the lowest.

  Next, data size conditions will be described. As described above, the data size condition is a condition that the data size of the compressed data is equal to or smaller than a specified value. More specifically, the data size condition requires that the data size is not more than a specified value for all the first blocks BL1 included in the second block BL2 used in the selection process. The data size condition will be specifically described with reference to numerical examples in FIGS.

  In FIG. 17 and the like, the four numerical values in the first block BL1 are data (in other words, pixel values) of four pixels included in the first block BL1. FIGS. 17, 18 and 19 show image data of Y component, Cb component and Cr component, respectively. Further, lossless compression by the method of FIG. 6 is applied, and lossless compressed data Da is generated. The compressed data generation unit 41 may be configured to process part or all of the first block BL1 included in the second block BL2 in parallel, or may be configured to generate serially. May be.

  In the compressed data, the pixels in the first block BL1 are classified into determination target pixels and excluded pixels. In FIG. 17 to FIG. 19, sand pattern hatching is applied to the excluded pixels. In FIG. 17, the leftmost pixel is set as an excluded pixel, and the other three pixels are set as determination target pixels. In FIGS. 18 and 19, the leftmost pixel is set as an excluded pixel, and the other seven pixels are set as determination target pixels. That is, during lossless compression, pixels that are used only as reference pixels are set as excluded pixels.

  The data size condition requires that the pixel value of the determination target pixel (here, the difference value obtained by lossless compression) can be expressed by a predetermined number of bits or less. The specified number of bits is set to a number of bits smaller than the number of bits (here, 8 bits) assigned to display each pixel value of the compression target data (that is, image data input to the compression unit 32). The

  As an example, the prescribed number of bits for the Y component image data is 5 bits. In this case, the data size condition requires that the pixel value of the determination target pixel be within a numerical range that can be expressed by 5 bits (that is, −16 to +15). Negative numbers are expressed using 2's complement. As an example, the specified number of bits for the image data of the Cb component and the Cr component is 4 bits. In this case, the data size condition requires that the pixel value of the determination target pixel is within a numerical range that can be expressed by 4 bits (ie, from −8 to +7).

  In the examples of FIGS. 17 to 19, it can be understood that the pixel values of the determination target pixels can be expressed by a predetermined number of bits or less in all the first blocks BL1. As a result, the examples of FIGS. 17 to 19 satisfy the data size condition.

  Here, in the example of FIGS. 17 to 19, lossless compressed data Da is generated. As described above, the information holding accuracy of the lossless compressed data Da is the highest (see FIG. 16). Therefore, according to the examples of FIGS. 17 to 19, the compressed data Da satisfies both the data size condition and the data accuracy condition. As a result, the compressed data Da is selected by the selection unit 42 and output from the compression unit 32.

  Now, before compression, the data size of the second block BL2 is calculated as follows. That is, the data size of the Y component is 512 bits (= {8 bits × 4 pixels} × 16 blocks). The data size of the Cb component is 128 bits (= {8 bits × 8 pixels} × 2 blocks). The data size of the Cr component is also 128 bits. Therefore, the total is 768 bits.

  On the other hand, when the data size condition is satisfied after compression, the data size of the second block BL2 is calculated as follows. That is, the data size of the Y component is 368 bits (= {8 bits × 1 pixel + 5 bits × 3 pixels} × 16 blocks). The data size of the Cb component is 72 bits (= {8 bits × 1 pixel + 4 bits × 7 pixels} × 2 blocks). The data size of the Cr component is also 72 bits. Therefore, the total is 512 bits.

  That is, when the data size condition is satisfied, the second block BL2 can be compressed from 768 bits to 512 bits.

  With reference to FIGS. 20-25, another numerical example is shown. 20 to 25 exemplify only the Y component, the Cb component and the Cr component are similarly understood.

  In FIG. 20, lossless compression is performed on the compression target data (that is, image data input to the compression unit 32), and lossless compressed data Da is generated (see FIG. 13).

  In FIG. 21, low-pass processing using weak LPF and lossless compression are performed in this order on the compression target data, and lossy compressed data Db is generated (see FIG. 13). As described with reference to FIG. 9, in the low-pass processing for the first block BL1 at the left end and the right end in the second block BL2, the first block BL1 in the adjacent second block BL2 (indicated by a two-dot chain line in FIG. 22). The first block BL1 shown) is used.

  FIG. 23 exemplifies lossy compressed data Dc generated by executing low pass processing with weak LPF, lossless compression, and right bit shift processing (for one bit) in this order on the compression target data. (See FIG. 13). The lossy compressed data Dd generated by the right bit shift process for 2 bits is not shown.

  In FIG. 24, low-pass processing using strong LPF and lossless compression are performed in this order on the compression target data, and lossy compressed data De is generated (see FIG. 13). FIG. 25 exemplifies lossy compressed data Df generated by executing low pass processing by strong LPF, lossless compression, and right bit shift processing (for one bit) in this order for the compression target data. (See FIG. 13). The lossy compressed data Dg generated by the right bit shift process for 2 bits is not shown.

  In the examples of FIGS. 20 to 25, the pixel values surrounded by circles in the compressed data Da, Db, Dc, De do not exist within a numerical range (ie, −16 to +15) that can be expressed by 5 bits. For this reason, the compressed data Da, Db, Dc, and De do not satisfy the data size condition. On the other hand, as can be seen from FIG. 25, the compressed data Df satisfies the data size condition. In this case, referring to FIG. 16, the compressed data Df has the highest information holding accuracy among the compressed data satisfying the data size condition. That is, the compressed data Df also satisfies the data accuracy condition. Therefore, the compressed data Df is selected by the selection unit 42 and output from the compression unit 32.

  FIG. 26 shows image data when the compressed data Df is restored. FIG. 27 shows an error between the image data restored from the compressed data Df and the image data before compression. According to FIG. 27, the sum of absolute values of errors is 40.

  Here, the determination of the data size condition is efficiently performed in order from the higher information holding accuracy among the plural types of compressed data generated by the compressed data generation unit 41. This is because if the compressed data satisfying the data size condition is found, the determination of the data size condition can be omitted for the remaining compressed data. For example, when the compressed data generation unit 41 generates a plurality of types of compressed data in series, if compressed data that satisfies the data size condition is found, generation of the remaining compressed data can be omitted for the second block BL2. .

  If the prescribed number of bits in the data size condition is M bits, compressed data that satisfies the data size condition can be reliably generated by providing a bit shift process with a shift amount of {8-M} bits.

<Further examples of lossless compression>
Now, in the lossless compression described with reference to FIG. 6, the pixel value difference is calculated using the left adjacent pixel as a reference pixel, excluding the leftmost pixel. According to this method, it is easy to obtain a small difference value. As a result, the shift amount in the bit shift process can be reduced, in other words, the number of stages of the bit shift process can be reduced.

  On the other hand, when the lossless compression of FIG. 6 is used in the lossy compression processing unit 62, the error is accumulated toward the right side in the first block BL1, in other words, the error is diffused to the right side in the first block BL1. There is a case to go.

  In contrast, the lossless compression shown in FIG. 28 can suppress error diffusion. Specifically, according to the example of FIG. 28, the pixel value of the pixel PXa remains Pa after compression. On the other hand, the pixel value of the pixel PXb is converted to {Pb−Pa}, the pixel value of the pixel PXc is converted to {Pc−Pa}, and the pixel value of the pixel PXd is converted to {Pd−Pa}.

  That is, the example of FIG. 28 is the same as that of FIG. 6 in that the processing content for calculating the difference between pixel values is the same as that of FIG. Specifically, in the example of FIG. 28, a pixel PX at a fixed position designated in advance in the first block BL1 is defined as a reference pixel, and each pixel PX other than the fixed position in the first block is defined as a compression target pixel. The pixel classification is adopted. In the example of FIG. 28, the fixed position is the left end in the first block BL1, but other positions may be determined as the fixed position. Note that similar lossless compression can be performed on the Cb component and the Cr component.

  Numerical examples of the lossless compression of FIG. 28 are shown in FIGS. Note that although only the Y component is illustrated in FIGS. 29 to 34, the Cb component and the Cr component are similarly understood.

  In FIG. 29, low-pass processing using weak LPF and lossless compression in FIG. 28 are executed in this order on the compression target data, and lossy compressed data Db is generated (see FIG. 13). FIG. 30 shows the lossy compressed data Dc generated by performing low pass processing with weak LPF, lossless compression of FIG. 28, and right bit shift processing (for one bit) in this order on the compression target data. (See FIG. 13). FIG. 31 illustrates lossy compressed data Dd generated by right bit shift processing for 2 bits (see FIG. 13).

  In FIG. 32, low-pass processing using strong LPF and lossless compression in FIG. 28 are executed in this order on the compression target data, and lossy compressed data De is generated (see FIG. 13). FIG. 33 shows the lossy compressed data Df generated by executing the low pass processing by strong LPF, the lossless compression of FIG. 28, and the right bit shift processing (for 1 bit) in this order on the compression target data. (See FIG. 13). FIG. 34 illustrates lossy compressed data Dg generated by right bit shift processing for 2 bits (see FIG. 13).

  According to the examples of FIGS. 29 to 34, the compressed data Dg satisfies both the data size condition and the data accuracy condition. Therefore, the compressed data Dg is selected by the selection unit 42 and output from the compression unit 32.

  FIG. 35 shows image data when the compressed data Dg in FIG. 34 is restored. FIG. 36 shows an error between the image data restored from the compressed data Dg and the image data before compression. According to FIG. 36, the sum of absolute values of errors is 60.

  Here, the lossless compression unit 51 and the lossy compression unit 52 adopt the same method of lossless compression, but are not limited to this example. For example, the lossless compression unit 51 may adopt the method of FIG. 6 and the lossy compression unit 52 may adopt the method of FIG. Further, when the lossy compression unit 52 includes a plurality of lossy compression processing units 62, lossless compression of a method different from the lossless compression processing unit 61 may be employed in some or all of the lossy compression processing units 62. If lossless compression of the same method is employed, for example, the device design can be simplified. It is also possible to share a circuit for lossless compression. On the other hand, if lossless compression of a different method is adopted, for example, the information holding accuracy can be adjusted, thereby increasing the degree of freedom in device design.

<Further examples of lossy compression>
A further example of the lossy compression processing unit 62 will be described with reference to FIGS. 37 and 38. The lossy compression processing unit 62e in FIG. 37 generates compressed data by performing bit reduction processing on the compression target pixels in the compression target data. In the bit reduction process, as shown in FIG. 38, the number of bits of the pixel value is reduced by deleting a predetermined range of bits from the least significant bit (LSB) side of the bit string representing the pixel value.

  FIG. 38 shows an example in which the pixel value before compression is “01011001” in binary notation (“89” in decimal notation) and the lower 3 bits are deleted. In other words, the upper 5 bits “01011” are extracted as compressed data and output from the lossy compression processing unit 62e.

  Here, if the upper 5 bits are extracted, the pixel value of the compression target pixel can be surely kept within a numerical range (ie, −16 to +15) that can be expressed by 5 bits.

  FIG. 39 shows a numerical example when the compressed data generated by the bit deletion process is restored. In the restoration process, “000” is synthesized as the lower 3 bits of the compressed pixel value of 5 bits. FIG. 40 shows the error of the image data before and after compression. According to FIG. 40, the sum of absolute values of errors is 236.

  In the example of FIG. 39, all the pixels in the second block BL2 are the compression target pixels. According to this, for example, the device design can be simplified. On the other hand, for example, only the right three pixels in the first block BL1 may be set as the compression target pixels. In any example, the compression target pixel is set as the determination target pixel in the selection unit 42.

  Note that the same bit deletion processing can be applied to the Cb component and the Cr component. Further, the lossy compression processing unit 62e having the bit reduction process may be combined with another lossy compression processing unit. Further, another lossy compression processing unit 62 may be configured by combining the bit reduction process with various processes (see, for example, FIGS. 10 to 13).

<Effect>
According to the data storage control device 9, the reference image data is compressed and then stored in the DRAM 10. For this reason, the used capacity of the DRAM 10 can be reduced.

  Moreover, the data size of the compressed data for each second block BL2 output from the compression unit 32 is the same regardless of which compression method is used in the compression unit 32. That is, the compressed data output from the compression unit 32 has a fixed length.

  Here, when the data size is different for each block, in order to pack the data of each block and store it in the DRAM, the address of each storage area must be managed based on the difference in the data size. Further, if the storage area is equally divided according to the maximum data size in order to simplify the address management, the use capacity of the DRAM will not be reduced.

  However, according to the data storage control device 9, the compressed data is output from the compression unit 32 with the same data size as described above. Therefore, compressed data can be packed and stored by simple address management. Further, by compressing and storing the compressed data, it is possible to contribute to a reduction in the used capacity of the DRAM 10. For example, since the second block BL2 can be compressed to a data size of 2/3 (= 512 bits / 768 bits) as described above, the used capacity of the DRAM 10 can be reduced to 2/3.

<Data read control device>
FIG. 41 is a block diagram illustrating the data read control device 11. 41, the data read control device 11 includes a read control unit 134, an input buffer 131, and an expansion unit 132.

  The read control unit 134 reads the compressed data in the storage unit 10 (see FIG. 1) and transfers it to the input buffer 131. Considering an example in which the storage unit 10 is a DRAM, the read control unit 134 can be configured by a so-called DRAM controller. Therefore, hereinafter, the read control unit 134 may be referred to as a DRAM controller 134.

  The input buffer 131 is configured by an SRAM, for example. The input buffer 131 temporarily holds the compressed data supplied to the decompression unit 132.

  The decompressing unit 132 decompresses the compressed data acquired via the input buffer 131. The decompression unit 132 includes an decompression data generation unit 141 and a selection unit 142. The decompressed data generation unit 141 includes a lossless compression unit 151 and a lossy compression unit 152. The lossless compression unit 151 and the lossy compression unit 152 have the same configuration as the lossless compression unit 51 and the lossy compression unit 52 of the data storage control device 9 (see FIG. 2). The selection unit 142 has the same configuration as the selection unit 42 of the data storage control device 9.

  Therefore, the decompressed data generation unit 141 generates a plurality of types of data from the compressed data read from the DRAM 10. Then, the selection unit 142 selects one data that satisfies a predetermined selection condition (that is, a selection condition adopted by the selection unit 42) from the plurality of types of data. The data selected by the selection unit 142 is transferred to the SRAM 3 as decompressed data.

  Here, the reference image data (in the example of FIG. 1, reference image data after deblocking) generated in the encoding device 1 is compressed by the data storage control device 9 and then restored by the data read control device 11. , And supplied to the motion prediction unit 4. In this case, in order to perform motion prediction satisfactorily, an image that is the same as or as close as possible to the reference image before compression (in other words, an image that has an error within an allowable range compared to the reference image before compression) 4 is preferably supplied. The allowable error is set in advance through, for example, prior simulation, experiment, or the like.

  For example, it is assumed that the compressed data generating unit 41 and the decompressed data generating unit 141 adopt the configuration shown in FIG. In that case, the compressed data Dc, Dd, Df, and Dg that have been subjected to the bit shift process can be provided with a reference image within an allowable error range by being expanded by the same method as that compression method. On the other hand, the compressed data Da, Db, and De that are not subjected to bit shift processing can provide a reference image within an allowable error range by any decompression method. In view of this point, with respect to the compressed data Dc, Dd, Df, and Dg that have undergone the bit shift process, it is preferable to instruct the selection unit 142 of the expansion unit 132 about the expansion data to be selected.

  For example, the selection unit 42 of the compression unit 32 may generate additional information related to the selected compressed data and store the additional information in the DRAM 10 in association with the compressed data. The data read control device 11 reads additional information from the DRAM 10 together with the compressed data, and the additional information is supplied to the selection unit 142. Thereby, the selection unit 142 can operate according to the selection instruction included in the additional information.

  The additional information can be composed of, for example, a 3-bit flag. More specifically, one of the bits indicates the presence / absence of a selection instruction to the selection unit 142 of the decompression unit 132. The remaining two bits are an identifier as to which of the compressed data Dc, Dd, Df, and Dg the compressed data corresponds to, that is, a specific instruction as to which decompressed data should be selected. The number of identifier bits may be defined according to the number of compressed data to be identified.

  The configuration of the additional information is not limited to the above example. Further, in the DRAM 10, the additional information storage area is set continuously with the corresponding compressed data storage area. Alternatively, the additional information may be stored in a storage area away from the corresponding compressed data. For example, a storage area for storing only additional information may be provided in the DRAM 10.

  Here, as described above, each second block BL2 is compressed to a fixed length (for example, 512 bits). The additional information is generated for each second block BL2, and the data size thereof is 3 bits at most in the above example. For this reason, even when additional information is employed, the effects described above for the data storage control device 9 can be similarly obtained.

<Embodiment 2>
In the second embodiment, data transfer control in the data storage control device 9 will be described.

  As described in the first embodiment, the low-pass processing used in lossy compression also refers to the pixel value of the first block BL1 adjacent to the first block BL1 to be compressed (see FIGS. 9 and 22). That is, the low-pass process is an example of a reference type process that uses the first block BL1 that is not a compression target as a reference target.

  In this case, the input buffer 31 holds image data not only for the first block BL1 that has not been used as a compression target but also for the first block BL1 that has not been used as a reference target. There is a need.

  On the other hand, the image data may be deleted from the input buffer 31 for the first block BL1 that has been used as a compression target and has been used as a reference target. That is, the input buffer 31 releases the storage area used by the image data of the first block BL1 that has been used as a compression target and a reference target at a predetermined timing after the use is completed (in other words, in an overwritable state). ).

  This will be described with reference to FIGS. The Y component image data will be described below, but the Cb component and the Cr component are understood in the same manner.

  Here, as shown in FIGS. 42 and 43, an example is given in which Y component pixel data is supplied to the input buffer 31 in a raster order for each macroblock MB of 16 × 16 pixels. In order to distinguish the macroblock MB, a branch number is added after the code “MB” as shown in FIG. The addition of branch numbers is also used for other codes.

  It is assumed that the compression unit 32 acquires image data from the input buffer 31 in units of a third block including X (X is an integer equal to or greater than 1) second blocks BL2. The third block is understood as a macroblock MB (ie, X = 4) in the example of FIG.

  In the example of FIG. 43, the input buffer 31 has four storage areas # 1 to # 4. Each of the four storage areas # 1 to # 4 may be constituted by separate SRAMs. In this case, the generic name of the four SRAMs corresponds to the input buffer 31.

  In the example of FIG. 43, when low-pass processing is performed on the first block BL1 included in the macroblock MB_2, the adjacent macroblocks MB_1 and MB_3 are used as reference targets. Therefore, the macro blocks MB_1, MB_2, and MB_3 need to exist in the input buffer 31.

  On the other hand, at that time, the use of the macro block MB_0 as the compression target and the reference target is finished. For this reason, the storage area # 1 in which the macroblock MB_0 is stored is released, for example, after the time t2 when the macroblock MB_2 is to be compressed. In the example of FIG. 43, image data of the macro block MB_4 is stored in the storage area # 1 at the subsequent time t4.

  In this case, the input buffer memory 31 manages the storage areas # 1 to # 4 in association with the macro block MB as the third block.

  By managing the data in the input buffer 31 in this way, the input buffer 31 can be used efficiently. Further, the capacity of the input buffer 31 may be small by using the storage area of the input buffer 31 in a cyclic manner.

  Here, the DRAM 10 has a plurality of (here, eight) banks BK. For this reason, the DRAM controller 34 switches the bank BK for each write data and writes the write data to the DRAM 10. In the example of FIG. 43, the bank BK is switched for each second block BL2.

  In the example of FIG. 44, image data is supplied to the input buffer 31 in raster order in units of the second block BL2. In addition, the compression unit 32 acquires image data from the input buffer 31 in units of a third block including X (X is an integer of 1 or more) second blocks BL2. In the example of FIG. 44, the third block is understood as one second block BL2 (ie, X = 1).

  In the example of FIG. 44, when low-pass processing is performed on the first block BL1 included in the second block BL2_20, the adjacent second blocks BL2_10 and BL2_30 are used as reference targets. Therefore, the second blocks BL2_10, BL2_20, and BL2_30 need to exist in the input buffer 31.

  On the other hand, at that time, the use of the second block BL2_00 as the compression target and the reference target is finished. Therefore, the storage area # 1 in which the second block BL2_00 is stored is released, for example, after the time t2 when the second block BL2_20 is the compression target. In the example of FIG. 44, the image data of the second block BL2_40 is stored in the storage area # 1 at the subsequent time t4.

  Also in this case, the input buffer memory 31 manages the storage areas # 1 to # 4 in association with the second block BL2 as the third block.

  Also in the example of FIG. 44, the DRAM controller 34 switches the bank BK for each write data and writes the write data to the DRAM 10.

  Here, in the example of FIG. 44, the DRAM controller 34 writes the write data for one bank BK (that is, one second block BL2) to the DRAM 10 one by one. On the other hand, the Y write data for the bank BK (Y = 4 in the example of FIG. 45) is accumulated in the output buffer 33, and the Y write data are waited. May be collectively written in the DRAM 10.

  As described above, image processing is performed in units of macroblocks MB before the input buffer 31 (such as the deblocking filter 8). In the example of FIGS. 42 to 45, one macro block MB corresponds to four second blocks BL2. In addition, data input to the input buffer 31 is performed for each of the four second blocks BL2 in the example of FIG. 43, whereas it is performed for each of the second blocks BL2 in the examples of FIGS. 44 and 45. . Data writing to the DRAM 10 is performed for each of the four second blocks BL2 in the examples of FIGS. 43 and 45, whereas in the example of FIG. 44, the data is written for each of the second blocks BL2.

  In view of this point, by setting the second block BL2 so that one macroblock MB is composed of a plurality of second blocks BL2, a block smaller than the second block BL2 (hereinafter referred to as a small block). Can be prevented from occurring.

  Therefore, it is easy to manage the storage area of the input buffer 31 in the data input / output of the input buffer 31. Such manageability leads to efficient use of the input buffer 31.

  In addition, the absence of small blocks in data transfer to the DRAM 10 is useful for efficient generation of transfer data. Further, it is possible to avoid an increase in bus bandwidth for transferring small blocks. That is, the bus bandwidth can be reduced. Further, since there is no small block, the DRAM controller 34 can easily manage the address of the DRAM 10 (in other words, access management).

  Further, by setting the second block BL2 so that one macroblock MB is composed of a plurality of second blocks BL2, data storage control can be performed in various encoding devices that perform image processing in units of the macroblock MB. There is an advantage that the device 9 can be easily introduced.

  Here, these effects can also be obtained when one macroblock MB is composed of one second block BL2. The same applies to the case where a plurality of macroblocks MB correspond to one second block BL2. Further, when a plurality of macroblocks MB correspond to a plurality of second blocks BL2, in other words, a plurality of macroblocks MB are regarded as one block, and a plurality of such blocks are not generated so that the small block does not occur. The above effect can also be obtained when the second block BL2 is divided.

  If these are expressed together, the second block BL2 is set so that V (V is an integer of 1 or more) second blocks BL2 correspond to W (W is an integer of 1 or more) macroblocks MB. By doing so, the above effect can be obtained.

  The second embodiment can also be applied when the compression unit 32 employs a compression method different from that of the first embodiment. The compression method may be moving image compression or still image compression (for example, JPEG (Joint Photographic Expert Group)).

  Further, the reference type process may be a process other than the low-pass process. Lossless compression may also include reference processing.

<Modification>
In the first and second embodiments, it is assumed that various processing contents in the data storage control device 9 and the encoding device 1 are all configured by hardware. On the other hand, part or all of such various processing contents can be realized by software (in other words, the microprocessor executes a program).

  Although the present invention has been described in detail, the above description is illustrative in all aspects, and the present invention is not limited thereto. It is understood that countless variations that are not illustrated can be envisaged without departing from the scope of the present invention.

9 Data Storage Controller 31 Input Buffer Memory 32 Compression Unit 33 Output Buffer Memory 34 DRAM Controller (Write Control Unit)
41 Compression Data Generation Unit 42 Selection Unit 51 Lossless Compression Unit 52 Lossy Compression Unit 61 Lossless Compression Processing Units 62, 62a to 62e, 62b1, 62b2, 62d1, 62d2 Lossy Compression Processing Unit BL1 First Block BL2 Second Block BK Bank

Claims (6)

A compression unit that compresses image data and outputs compressed data;
A write control unit for writing the compressed data into memory as write data;
An input buffer memory that temporarily holds the image data supplied to the compression unit;
The compression unit compresses the image data for each first block including image blocks having a predetermined area size, and compresses the image data for each second block including N (N is an integer of 1 or more) first blocks. Output data,
The processing in the compression unit includes reference type processing that uses the first block that is not the compression target as a reference target,
The input buffer memory holds the image data for the first block that has not been used as the compression target and the reference target, and the first block has been used as the compression target and the reference target Release the storage area allocated to
Data storage controller. The data storage control device according to claim 1,
The compression unit acquires the image data from the input buffer memory in units of a third block including X (X is an integer of 1 or more) the second block,
The input buffer memory manages the storage area in association with the third block;
Data storage controller. The data storage control device according to claim 1 or 2,
In order to supply the write data output from the compression unit to the write control unit, further comprising an output buffer memory that temporarily holds,
The memory has a plurality of banks,
The write control unit switches the plurality of banks for each write data, and writes the write data to the memory.
Data storage controller. A data storage control device according to claim 3,
The write control unit waits for the write data for Y banks (Y is an integer of 2 or more) to be accumulated in the output buffer memory, and collects the Y write data together. Data storage controller that writes to memory. A data storage control device according to any one of claims 1 to 4, wherein
Image processing is performed in units of macroblocks before the input buffer memory,
V (where V is an integer equal to or greater than 1) the second blocks correspond to W (W is an integer equal to or greater than 1) the macroblocks;
Data storage controller. (A) compressing the image data and outputting the compressed data;
(B) writing the compressed data into memory as write data;
(C) temporarily storing the image data used in the step (a) in an input buffer memory,
In the step (a), the image data is compressed for each first block composed of image blocks having a predetermined area size, and for each second block composed of N (N is an integer of 1 or more) first blocks. Outputting the compressed data;
The step (a) includes a reference type process that uses the first block that is not a compression target as a reference target,
In the step (c), the image data is held in the input buffer memory for the first block that has not been used as the compression target and the reference target, and is used as the compression target and the reference target. Releasing the storage area of the input buffer memory allocated to the finished first block at a predetermined timing;
Data storage control method.

Images