JP2015192253A - key matrix circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress expansion of a mounting space while configuring a matrix circuit using an ordinary switch capable of cost reduction and an external resistor, the matrix circuit being capable of accurately detecting pressed keys even in the case where three keys are simultaneously pressed.SOLUTION: A key matrix circuit includes two key scan output signal lines and a plurality of key return input signal lines which are disposed side by side so as to cross the two key scan output signal lines. Each of the key scan output signal lines and each of the key return input signal lines are connected by key switch wiring including a key switch, respectively. The key switch wiring connected with at least one key scan output signal line has a basic configuration in which key switch wiring including a signal control resistor is used alternately.

Description

  The present invention relates to a key matrix circuit.

  A key matrix circuit is generally used for operation keys (for example, a numeric keypad) of electronic devices such as mobile phones and car navigations that have become widespread in recent years. Devices that use such a key matrix circuit have become more complicated to operate as their functions improve, and using only a conventional key alone has all of the functions of the devices. It has become difficult to respond.

  For this reason, it is possible not only to use a single key but also to use multiple keys at the same time, thereby enabling key operations corresponding to more functions without increasing the number of keys. It is desired. However, in the key matrix circuit, if three keys are pressed simultaneously, it may be indistinguishable from the case where other keys that are not pressed are pressed, and there is a problem that accurate detection cannot be performed. It was.

  In order to solve such a problem, for example, in Patent Document 1, for example, by using key switches with resistors for all key switches, even if three keys are simultaneously pressed down, it is accurate. Describes a configuration capable of detecting a pressed key.

JP 2009-32203 A

  However, a key switch with a resistor is a special part and is expensive. When the configuration described in Patent Document 1 is adopted, there is a problem that it is difficult to keep the cost low. On the other hand, if an external resistor is added to a normal key switch to realize a function similar to that of a key switch with a resistor, it can be constructed at a low cost. For this reason, if all the key switches with resistors described in Patent Document 1 are replaced with a configuration in which normal key switches and external resistors are combined, the cost can be kept low.

  However, operation keys that use a key matrix circuit are not allowed to occupy a large mounting space. For this reason, a new combination of a normal key switch and an external resistor can be used. An increase in mounting space due to the required external resistor becomes a problem.

  The present invention has been made in view of such circumstances, and a key matrix circuit capable of accurately detecting a pressed key switch even when three key switches are simultaneously pressed. An object of the present invention is to provide a key matrix circuit that can be realized with a configuration using a normal key switch and an external resistor that can be reduced in cost, while suppressing an increase in mounting space.

In order to solve the above-described problems, the present invention is grasped by the following configuration.
(1) One aspect of the key matrix circuit of the present invention includes a plurality of keys to which a power supply voltage is applied via a first key scan output signal line, a second key scan output signal line, and a pull-up resistor. A return input signal line; a first key switch group electrically connecting the first key scan output signal line and each key return input signal line when pressed; and the first key switch group when pressed. 2 key scan output signal lines and a second key switch group for electrically connecting each of the key return input signal lines, the key switch of the first key switch group and the first key scan signal. A circuit in which a resistor is inserted and a circuit in which a resistor is not inserted are alternately used between the lines or between the key switch of the first key switch group and the key return input signal line, and the second A circuit in which no resistor is inserted is used between the key switch of the key switch group and the second key scan signal line, and between the key switch of the second key switch group and the key return input signal line. .

(2) According to another aspect of the key matrix circuit of the present invention, a first key scan output signal line, a second key scan output signal line,
A plurality of key return input signal lines to which a power supply voltage is applied via a pull-up resistor;
A first key switch group that electrically connects the first key scan output signal line and each key return input signal line when pressed;
A second key switch group for electrically connecting the second key scan output signal line and each key return input signal line when pressed;
A sneak route via two key switches connected to the first key return signal input line and a key switch connected to a second key return input signal line not adjacent to the first key return input signal line In addition, the key switch and the key switch are connected to two routes of a normal route that passes only through the key switch connected to the second key return input signal line to which the other key switch is connected. There are one or more locations where resistors are arranged between the key scan output signal lines or between the key switch and the key return input signal line to which the key switch is connected, and a plurality of the resistors arranged in the wraparound route The resistance value of the resistor is selected so that the combined resistance value and the resistance value of the resistor arranged in the normal route are different from each other. To have.

  According to the present invention, even when three key switches are simultaneously pressed, a key matrix circuit capable of accurately detecting the key switch being pressed down can be reduced in cost. It is possible to provide a key matrix circuit that realizes a configuration using a key switch and an external resistor while suppressing an increase in mounting space.

It is a figure which shows the structure of the key matrix circuit of 1st Embodiment of this invention. (A) It is a figure of operation | movement description of 1st Embodiment. (B) It is the figure which showed the equivalent circuit of (a). (A) It is a figure of operation | movement description of 1st Embodiment. (B) It is the figure which showed the equivalent circuit of (a). (A) It is a figure explaining the misdetection at the time of simultaneous pressing of a key switch. (B) It is the figure which showed the equivalent circuit of (a). (A) It is a figure for operation | movement description of 2nd Embodiment. (B) It is the figure which showed the equivalent circuit of (a). (A) It is a figure for demonstrating how to select the resistance value of the signal control resistance B. FIG. (B) It is the figure which showed the equivalent circuit of (a).

  DESCRIPTION OF EMBODIMENTS Hereinafter, a mode for carrying out the present invention (hereinafter referred to as this embodiment) will be described in detail with reference to the accompanying drawings. Note that the same numbers are assigned to the same elements throughout the description of the present embodiment.

(Configuration of the first embodiment)
FIG. 1 shows the configuration of the key matrix circuit 10 of the present embodiment. As shown in FIG. 1, the key matrix circuit 10 of the present embodiment includes a key matrix unit 11 and a control unit 12.

The key matrix unit 11 has two key scan output signal lines (scan line KS_A, scan line KS_B).
Hereinafter, for simplification of description, unless otherwise specified, the scan line KS_A is referred to as a first key scan output signal line, and the scan line KS_B is referred to as a second key scan output signal line. However, when the scan line KS_B is the first key scan output signal line, the scan line KS_A is the second key scan output signal line.

  As shown in FIG. 1, a plurality of key return input signal lines (return lines KR_1,...) With respect to the first key scan output signal line (scan line KS_A) and the second key scan output signal line (scan line KS_B). KR_2, KR_3, KR_4) are arranged so as to cross each other. The key scan output signal line and the key return input signal line intersect in the figure, but are not electrically connected at the intersection.

  In FIG. 1, the key return input signal lines are not crossed on the wiring path from the key matrix unit 11 to the control unit 12, but are in the middle of being led out from the key matrix unit 11 to the control unit 12. Then, there are cases where they intersect due to wiring. However, even in that case, it is not necessarily electrically connected.

  Further, the scan line KS_A and the return line KR_1 are electrically connected when the key switch SW1 is pressed, and the scan line KS_A and the return line KR_2 are electrically connected when the key switch SW2 is pressed, and the scan line KS_A and return line KR_3 are electrically connected when key switch SW3 is pressed, and scan line KS_A and return line KR_4 are electrically connected when key switch SW4 is pressed. In the following, the key switch, the wiring that connects the scan line corresponding to the key switch, the wiring that connects the return line corresponding to the key switch, and the scan line corresponding to the key switch and the key switch, or the key switch and the key switch A signal control resistor, which will be described later, may be disposed between the return lines corresponding to. When these are expressed together, they are called key switch wiring.

Hereinafter, unless otherwise specified, the key switches corresponding to the first key scan output signal line (scan line KS_A) and the key return input signal lines (return lines KR_1, KR_2, KR_3, KR_4) are pressed. When the key switch wirings that are electrically connected at this time are expressed together, they are referred to as a first key switch wiring group.
As described above, when the scan line KS_A is called a second key scan output signal line, the first key switch wiring group is called a second key switch wiring group.

  Similarly, the scan line KS_B and the return line KR_1 are electrically connected when the key switch SW5 is pressed, and the scan line KS_B and the return line KR_2 are electrically connected when the key switch SW6 is pressed, and scan. The line KS_B and the return line KR_3 are electrically connected when the key switch SW7 is pressed, and the scan line KS_B and the return line KR_4 are electrically connected when the key switch SW8 is pressed.

In the following description, the second key scan output signal line (scan line KS_B), each key return input signal line (return lines KR_1, KR_2, KR_3, KR_4) and the corresponding key switch are pressed unless otherwise specified. When the key switch wirings that are electrically connected at this time are collectively expressed, they are referred to as a second key switch wiring group.
As described above, when the scan line KS_B is referred to as a first key scan output signal line, the second key switch wiring group is referred to as a first key switch wiring group.

  In the example shown in FIG. 1, the signal control resistor R_SW1 is provided in the key switch wiring provided with the key switch SW1, and the signal control resistance R_SW3 is provided in the key switch wiring provided with the key switch SW3. .

In the following description, the signal control resistor provided in the first key switch wiring group may be referred to as a signal control resistor A.
Unless otherwise specified, the description will proceed assuming that the signal control resistors A have the same resistance value.
However, as described above, when the scan line KS_A is referred to as the second key scan output signal line, the scan line KS_B is the first key scan output signal line, and the key switch wiring group of the scan line KS_B Is a first key switch wiring group.
Therefore, in this case, the signal control resistor A means a signal control resistor provided in the key switch wiring group of the key scan output signal line (scan line KS_B).

As shown in FIG. 1, a power supply voltage VDD is applied to each key return input signal line (return lines KR_1, KR_2, KR_3, KR_4) via a pull-up resistor (R1, R2, R3, R4), respectively. ing.
In general, the power supply voltage VDD is often applied to any key return input signal line. Therefore, unless otherwise specified, each key return input signal line will be described below. It is assumed that the same power supply voltage VDD is applied to (return lines KR_1, KR_2, KR_3, KR_4).

(Basic operation of key matrix circuit)
In the following, the basic operation of how the key switch ON / OFF is detected in the above configuration will be briefly described. In the following description, when the key switch is ON, it is said that the key switch is depressed, and when it is OFF, the key switch is not depressed.

  First, the power supply voltage VDD is always applied to each key return input signal line (return lines KR_1, KR_2, KR_3, KR_4) via pull-up resistors (R1, R2, R3, R4).

The control unit 12 includes a microcomputer having four A / D (Analog / Digital) input ports (not shown), and each key return input signal line (return line KR_1, KR_2, KR_3, KR_4) are connected.
Therefore, when none of the key switches is turned off, that is, when not pressed down, the voltage value (potential difference) corresponding to the applied power supply voltage VDD at each input port, that is, voltage value = VDD. The state of is detected.

  On the other hand, for the two key scan output signal lines (scan line KS_A, scan line KS_B), the voltage value of the key scan output signal line to be scanned = 0, and the voltage value of the other key scan output signal line = VDD. . This operation is switched at regular time intervals.

  That is, the voltage value of the first key scan output signal line (scan line KS_A) = 0 and the voltage value of the second key scan output signal line (scan line KS_B) = VDD is for a certain period of time. The key scan output signal line being performed is the first key scan output signal line (scan line KS_A).

After the elapse of a certain time, the voltage value of the first key scan output signal line (scan line KS_A) is High and the voltage value of the second key scan output signal line (scan line KS_B) is set to 0. At this time, the key scan output signal line that is scanning is the second key scan output signal line (scan line KS_B).
Thus, the scan of the key scan output signal line is repeated alternately at a certain time interval.

Here, the case where the key scan output signal line that performs scanning is the first key scan output signal line (scan line KS_A) will be described below.
In this case, when any of the key switches SW1, SW2, SW3, and SW4 is OFF, that is, when not pressed down, the voltage value (potential difference) corresponding to the applied power supply voltage VDD is also applied to each input port. That is, a state where the voltage value = VDD is detected.

On the other hand, for example, when the key switch SW2 is turned on, that is, pressed down, the key return wiring signal of the first key scan output signal line (scan line KS_A) and the return line KR_2 by the key switch wiring having the key switch SW2. It will conduct with the line.
Therefore, the voltage value of the first key scan output signal line (scan line KS_A) = 0 and the voltage value of the key return input signal line of the return line KR_2 = 0.

  The key return input signal line of the return line KR_2 is connected to the SW2 and SW6 key switch wirings. The key scan output signal line being scanned is the first key scan output signal line (scan line KS_A). Therefore, the key switch corresponding to this is SW2.

Therefore, when the voltage value (potential difference) of the key return input signal line of the return line KR_2 changes while scanning the first key scan output signal line (scan line KS_A), the key switch SW2 is turned on, that is, pressed. It is detected that it is lowered.
Similarly, when only the key switch SW1 is ON, that is, when it is depressed, it is detected that the key switch SW1 is depressed basically by the same operation as the operation of the key switch SW2. Become.

  However, since the signal switch resistor R_SW1 is provided in the key switch wiring having the key switch SW1, the voltage value Low of the key return input signal line of the return line KR_1 is the voltage value at the time of the key switch SW2 = It is detected as a voltage value (potential difference) different from zero.

Even when other key switches are pressed, the basic operation, that is, when any key scan output signal line is being scanned, changes in the voltage value (potential difference) of which key return input signal line are detected. It is determined which key switch is turned on, that is, pressed.
However, as mentioned above, the voltage value (potential difference) of the key return input signal line is detected as a different voltage value (potential difference) depending on whether or not it passes through the signal control resistor.

(Operation when multiple key switches are pressed simultaneously)
The basic operation of the present invention is as described above. Hereinafter, a case where a plurality of key switches are simultaneously turned on, that is, pressed down will be described.
FIG. 2A shows a circuit diagram that is basically the same as FIG. 1, but in order to make the signal flow easier to see, key scan output signal lines (scan lines KS_A, KS_B) and key return input signal lines ( Only the portions of the return lines KR_1, KR_2, KR_3, and KR_4) are mainly shown, and the controller 12 and the pull-up resistors (R1, R2, R3, and R4) are omitted.

First, an operation when a plurality of key switches of four adjacent key switch wiring groups (for example, SW1, SW2, SW5, SW6) are simultaneously pressed will be described.
Hereinafter, unless otherwise specified, the key switch wiring group means the key switches SW1, SW2, SW5, and SW6.

First, the description will be made on the assumption that the key switches SW1, SW2, and SW5 that are diagonally hatched in FIG. 2A are simultaneously depressed in the key switch wiring group.
In the basic operation of the key matrix circuit described above, the voltage value has been described as changing. However, for the sake of simplification, the description will be given as the signal flow using the expression scan signal.

  Although not shown in FIG. 2, when the scan line KS_A is scanned, that is, when a scan signal is output to the scan line KS_A, the flow of the scan signal (voltage change flow) is a key switch. The signals are input to return lines KR_1 and KR_2 via SW1 and key switch SW2, respectively.

  In this case, when scanning the scan line KS_A, a scan signal is input to the return lines KR_1 and KR_2 corresponding to the depressed key switches SW1 and SW2 (change in voltage value (potential difference) is detected). Thus, it is determined that the key switches SW1 and SW2 are pressed down. Since this is a correct determination state, there is no problem.

  On the other hand, as shown in FIG. 2A, when a scan signal is output from the scan line KS_B (voltage value Low of the scan line KS_B) in order to scan the scan line KS_B, the scan signal is input to the return line KR_2. There are two routes.

First, when one normal key switch is pressed, the scan signal is input to the return line KR_2 when passing through the solid line path shown in FIG. 2A, that is, the key switch SW6 is pressed down. It is a case.
Since it is more common to depress one key switch, hereinafter, the path of the scan signal in this case is referred to as a normal route.

On the other hand, as can be seen from FIG. 2A, when these three key switches (SW1, SW2, SW5) are simultaneously depressed, the scan signal is returned to the return line KR_2 even through the path indicated by the dotted line. Can be entered.
Hereinafter, such a path of the scan signal passing through the plurality of key switches is referred to as a wraparound route.

Currently, the key switches (SW1, SW2, SW5) are actually pressed down, but normally, it is considered that the scan signal is input to the return line KR_2 via a general route. Then, there is a possibility that the key switch SW6 is erroneously detected as being depressed even though the key switch SW6 is not depressed.
Alternatively, if it is assumed that such a sneak route exists, it cannot be determined which of the key switches SW5 and SW6 is depressed.

Hereinafter, the operation of this configuration when there are two routes with the possibility of erroneous detection as described above will be further described.
FIG. 2B shows an equivalent circuit in which the scan signal path is shown linearly.
In FIG. 2B, the pull-up resistor R1 and the control unit 12 are omitted.

The left side of FIG. 2B shows an equivalent circuit in the case of a normal route, while the right side of FIG. 2B shows an equivalent circuit of a wraparound route.
As shown in FIG. 2B, in the configuration of the present invention, the signal control resistor does not exist in the normal route, while the signal control resistor R_SW1 exists in the wraparound route.
Accordingly, the scan signal input to the return line KR_2 is detected as a different voltage value (potential difference) because it is affected by the presence or absence of the signal control resistor in the normal route and the sneak route.

Next, let us consider a case where it is assumed that the key switches SW1, SW2, and SW6 that are obliquely hatched in FIG.
Although not shown here, when the scan line KS_A is scanned, the same result as described above is obtained, so that the determination state is correct and there is no problem.
On the other hand, in the case of scanning the scan line KS_B, as shown in FIG. 3A, again, two routes are input to the return line KR_1, that is, a normal route indicated by a solid line and a wraparound route indicated by a dotted line. And exist.

However, in the configuration of the present invention, as shown in FIG. 3 (b), there is no signal control resistance in the case of the normal route (left side in the figure), while in the case of the wraparound route (right side in the figure) There is a control resistor R_SW1.
Therefore, the scan signal input to the return line KR_1 is input via the sneak route because there is no signal control resistor in the normal route and a signal control resistor in the sneak route in the normal route and the sneak route. The voltage of the scan signal is higher than the voltage of the scan signal input via the normal route because the signal control resistor is interposed. Based on this voltage value (potential difference), it can be determined which key switch is being pressed, and erroneous detection can be avoided.

Here, the following can be understood by paying attention to the relationship between the normal route and the wraparound route in FIGS. 2 (a) and 3 (a).
For example, referring to FIG. 2A, of the four adjacent key switches, the sneak route passes through three key switches (SW1, SW2, SW5), and the normal route remains as one key switch. Via (SW6).
The same relationship can be seen from FIG. That is, the wraparound route passes through the three key switches (SW1, SW2, SW6), and the normal route passes through the remaining one key switch (SW5).

  In the example shown in FIGS. 2A and 3A, the sneak route passes through both the key switches SW1 and SW2, and the signal control resistor R_SW1 is provided in the key switch wiring of the key switch SW1 of the scan line KS_A. Therefore, the sneak route is always affected by this resistance.

On the other hand, the normal route is only when passing through the key switch SW5 or key switch SW6 when scanning the scan line KS_B, and these key switch wirings have no signal control resistance.
Therefore, in the above case, the wraparound route and the normal route always have different voltage values (potential differences).

  Even if the signal control resistor is not provided in the key switch wiring of the key switch SW1, it is obvious that the same result is obtained even if it is provided in the key switch wiring of the key switch SW2.

On the other hand, although not shown as a pattern for simultaneously pressing down three of the four adjacent key switches, the key switches SW1, SW5, and SW6 are pressed down and the key switch SW2 is not pressed down. There are cases like this.
However, in this case as well, the wraparound route described above passes through the three key switches, and the normal route passes through the remaining one key switch.

  That is, the scan signal from the scan line KS_A is a sneak route inputted to the return line KR_2 via the key switches SW1 → SW5 → SW6, while the normal route is inputted to the return line KR_2 via the key switch SW2. Route.

As a feature of this circuit, there is a point that a signal control resistor provided in the scan line KS_A is provided in one key switch wiring.
That is, in this example, the signal control resistor R_SW1 is provided in the key switch wiring of the key switch SW1, the key switch wiring of the next key switch SW2 has no signal control resistance, and the signal control resistance is in the key switch wiring of the key switch SW3. R_SW3 is provided, and the presence / absence of a signal control resistor appears alternately such that the key switch wiring of the key switch SW4 has no signal control resistor.

  With this arrangement, as described above, the normal route passes only through the remaining one key switch that does not pass through the wraparound route. Therefore, when there is no signal control resistor in the normal route (via the key switch SW2), Therefore, the signal control resistor R_SW1 exists in the sneak route (via SW1 → SW5 → SW6), and the voltage value (potential difference) is different between the normal route and the sneak route.

  Similarly, even when the key switches SW2, SW5, and SW6 are depressed and the key switch SW1 is not depressed, in the normal route, the signal control resistor R_SW1 is connected via the key switch SW1. The affected scan signal is input to the return line KR_1. However, since there is no signal control resistor in the sneak route (via SW2 → SW6 → SW5), the scan that is input to the return line KR_1 by the sneak route. The signal is not affected by the signal control resistor.

Therefore, the voltage value (potential difference) differs between the normal route and the wraparound route.
It is clear that this relationship is the same even if the signal control resistor is not provided in the key switch wiring of the key switch SW1, but is provided in the key switch wiring of the key switch SW2. .

The arrangement state of the key switches SW1, SW2, SW5, SW6 when the signal control resistor is provided in the key switch wiring of the key switch SW2 is as shown in FIG. 2 (a), the key switches SW2, SW3, SW6. In the key switch wiring group of SW7, there is no difference from the state where the signal control resistor R_SW3 is provided in the key switch SW3.
For this reason, with this configuration, no erroneous detection will occur no matter how adjacent four key switch wiring groups are determined.

On the other hand, even if a return line such as a return line KR_5 and a return line KR_6 is further provided before the return line KR_4 to increase the number of key switches, the increase in the return lines is caused by the increase in the number of adjacent four key switch wiring groups. Since the number only increases, it is still possible to avoid false detection.
Therefore, in this configuration, the number of return lines is not particularly limited.
Here, looking at this configuration, only one of the four key switch wirings is provided with a signal control resistor.

  Therefore, compared to the case where signal control resistors are arranged on all the key switch wirings, only a quarter of the signal control resistors are required, so that the space required for arranging the signal control resistors can be greatly reduced. Is possible.

(Configuration of Second Embodiment)
In the first embodiment, the signal control resistors A are alternately provided in the first key switch wiring group, and the signal control resistors are not provided in the second key switch wiring group.
In the second embodiment, the signal control resistor B is also provided in the second key switch wiring group.
In the first embodiment, it has been shown that the erroneous detection in the four adjacent key switch wiring groups can be surely avoided. However, in the second embodiment, the erroneous detection is not required even if the adjacent four key switch wiring groups are not used. It can be avoided.

  For example, in the case of the first embodiment, assuming that the key switches SW3, SW7, and SW5 that are diagonally hatched in FIG. 4A are simultaneously depressed, when scanning the scan line KS_A, There are a normal route indicated by a solid line and a wraparound route indicated by a dotted line.

Then, as shown in FIG. 4B, in this case, there is a signal control resistor R_SW1 in the normal route, and there is also a signal control resistor R_SW3 in the sneak route, so if resistance value R_SW1 = resistance value R_SW3, There is a possibility of erroneous detection that the key switch SW1 that has not been pressed is pressed.
Here, if the resistance value R_SW1 is not equal to the resistance value R_SW3, erroneous detection can be avoided again.

  However, considering the case where the number of return lines is larger, this relationship always occurs when the key switch having the same relationship as the key switch SW5 is pressed when the key switches SW3 and SW7 are depressed. .

  That is, the key switch SW5 is a key switch in the other key switch wiring connected to the return line KR_1 to which the key switch wiring of the key switch SW1 provided with the signal control resistor R_SW1 is connected. The key switch wiring having the key switch SW5 has no signal control resistor. The same thing happens if a key switch in the same state is pressed.

  More specifically, although not shown, if there is a return line KR_-1 on the left side of the diagram and a return line KR_-2 on the left side, the signal control resistors are alternately arranged. Therefore, the signal control resistor R_SW-2 is provided in the key switch wiring of the key switch SW-2 that connects the return line KR_-2 and the scan line KS_A.

Since the key switch wiring of the key switch SW that connects the return line KR_-2 and the scan line KS_B is not provided with a signal control resistor like the key switch wiring of the key switch SW5, this key switch SW The key switch SW of the switch wiring is in the same state as the key switch SW5. Therefore, when the key switch SW is depressed, the same state as that when the key switch SW5 is depressed is generated.
As described earlier, in order to avoid erroneous detection when the key switch SW5 is pressed down, it has been described that the resistance value R_SW1 is not equal to the resistance value R_SW3, but erroneous detection can be avoided. Resistance value R_SW-2 ≠ resistance value R_SW3 must be satisfied.

  This can be understood by repetitively verifying each key switch, but if this method is used to avoid false detection, the signal control resistors A provided in the first key switch wiring group are all different resistors. You must have a value.

On the other hand, as described above, in the second embodiment, the signal control resistor B is also appropriately disposed in the second key switch wiring group.
That is, as shown in FIG. 5A, by providing a signal control resistor B (R_SW5) in the key switch wiring having the key switch SW5, as shown in FIG. The signal control resistor that passes through is only the signal control resistor R_SW1, but the signal control resistors R_SW3 and R_SW5 exist in series in the sneak route.
Therefore, even if the relationship of resistance value R_SW1 = resistance value R_SW3 exists, the signal control resistor R_SW5 exists in the sneak route, so that the voltage value (potential difference) differs between the normal route and the sneak route, thereby avoiding erroneous detection. it can.

If the signal control resistor B is also arranged in the key switch wiring of the key switch SW that connects the return line KR_-2 and the scan line KS_B described above, even if the resistance value R_SW-2 = resistance value R_SW3. False detection is avoided.
Therefore, naturally, in the first embodiment of the present invention, all the resistance values of the signal control resistor A may be different, but as the number of return lines increases, so many types of signal control resistors are required. .
Since the types of signal control resistors are not unlimited, when this is taken into consideration, when the number of return lines is large, the second key switch wiring group of the second embodiment of the present invention is appropriately set. It can be said that it is preferable to arrange the signal control resistor B.

However, in this case, the resistance value of the signal control resistor B is selected so that the resistance value of the wraparound route and the resistance value of the normal route are different.
For example, FIG. 6 shows a case where the resistance arrangement is the same as in FIG. 5, but in FIG. 5, the key switch SW1 is pushed down and the key switch SW5 is pushed down instead of the key switch SW5 being pushed down. The case where it is made not to lower is shown.
Then, as shown in FIG. 6A, when scanning the scan line KS_B, there are a normal route with a solid line and a wraparound route with a dotted line.
FIG. 6B shows an equivalent circuit of the normal route and the sneak route. The resistance value of the normal route is the resistance value of the signal control resistor B (R_SW5).
On the other hand, since there is a signal control resistor A (R_SW1, R_SW3) in the wraparound route, the resistance value (synthetic resistance value) of the wraparound route is twice the resistance value of the signal control resistor A.
Here, if the signal control resistor B (R_SW5) has a resistance value twice that of the signal control resistor A, the resistance value of the normal route and the resistance value of the wraparound route are the same.
Therefore, in this case, the voltage value (potential difference) is the same between the normal route and the sneak route, which results in erroneous detection.
Therefore, when the signal control resistor B is provided, the resistance value of the signal control resistor B is selected so that the resistance value of the wraparound route and the resistance value of the normal route are different.

In the above description, the case where three keys are simultaneously pressed has been described as an example, but the number of key switches simultaneously pressed may be larger.
In this case, as shown in the second embodiment, by providing the signal control resistor B to an appropriate key switch wiring in the second key switch wiring group, it is possible to suppress erroneous detection due to the wraparound route.
In addition, by providing several types of signal control resistors B and using not only the placement location but also the difference in resistance values, it is possible to further suppress erroneous detection.

  In the second embodiment, even if the signal control resistors B are provided in all the key switch wires of the second key switch wire group, the signal control resistors A are only alternately provided in the first key switch wire group. Therefore, the number of required signal control resistors is reduced by 25% in consideration of providing the signal control resistors for all the key switch wirings. Therefore, it is possible to reduce the space required for arranging the signal control resistors as compared with the case where the signal control resistors are provided in all the key switch wirings.

  As described above, in the first embodiment, which is the basic configuration of the present invention, even if any three key switches in the adjacent four switch groups are pressed, they are surely pressed without erroneous detection. It is possible to determine which key switch is present.

One of the main usage forms of the key matrix circuit is an operation key (for example, a numeric keypad) of an electronic device such as a mobile phone or a car navigation. Of course, this operation is often manually performed by a person. .
Therefore, when a plurality of key switches are pressed down at the same time, it can often be said that it is performed within the reach of the finger.
For this reason, when the keys are simultaneously pressed, the frequency of the key switches between adjacent ones is high, but in the basic configuration of the present invention, the simultaneous key pressing between the adjacent key switches having a high frequency is good. Can be detected.

  In addition, since no signal control resistor is provided in the key switch wiring having all the key switches in order to realize it, an increase in space for arranging the signal control resistor can be greatly reduced. It is also good in terms of space saving required for the matrix circuit.

  In the second embodiment of the present invention, the number of signal control resistors is slightly larger than in the first embodiment, but false detection is performed not only when adjacent key switches but also when simultaneously pressing down between separated key switches. A suppressed key matrix circuit can be realized. By appropriately designing the arrangement location and the resistance value of the signal control resistor, it is possible to realize a key matrix circuit corresponding to simultaneous depression of more complicated and more key switches.

  As mentioned above, although preferred embodiment of this invention was explained in full detail, it cannot be overemphasized that the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiments. Further, it is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  DESCRIPTION OF SYMBOLS 10 ... Key matrix circuit, 11 ... Key matrix part, 12 ... Control part, KS_A, KS_B ... Scan line (key scan output signal line), KR_1-KR_4 ... Return line (key return input signal line), SW1, SW2, SW3 , SW4, key switches (first key switch wiring group), SW5, SW6, SW7, SW8, key switches (second key switch wiring group), R_SW1, R_SW3, R_SW5, R_SW7, signal control resistors

Claims (2)

A key matrix circuit,
A first key scan output signal line; a second key scan output signal line;
A plurality of key return input signal lines to which a power supply voltage is applied via a pull-up resistor;
A first key switch group that electrically connects the first key scan output signal line and each key return input signal line when pressed;
A second key switch group for electrically connecting the second key scan output signal line and each key return input signal line when pressed;
A circuit in which a resistor is inserted between the key switch of the first key switch group and the first key scan signal line, or between the key switch of the first key switch group and the key return input signal line. And a circuit in which no resistor is inserted are used alternately, between the key switch of the second key switch group and the second key scan signal line, and between the key switch of the second key switch group and the key. A key matrix circuit, wherein a circuit in which no resistor is inserted is used between return input signal lines. A key matrix circuit,
A first key scan output signal line; a second key scan output signal line;
A plurality of key return input signal lines to which a power supply voltage is applied via a pull-up resistor;
A first key switch group that electrically connects the first key scan output signal line and each key return input signal line when pressed;
A second key switch group for electrically connecting the second key scan output signal line and each key return input signal line when pressed;
A sneak route via two key switches connected to the first key return signal input line and a key switch connected to a second key return input signal line not adjacent to the first key return input signal line In addition, the key switch and the key switch are connected to two routes of a normal route that passes only through the key switch connected to the second key return input signal line to which the other key switch is connected. There are one or more locations where resistors are arranged between the key scan output signal lines or between the key switch and the key return input signal line to which the key switch is connected, and a plurality of the resistors arranged in the wraparound route The resistance value of the resistor is selected so that the combined resistance value and the resistance value of the resistor arranged in the normal route are different from each other. Key matrix circuit, characterized in that is.

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