JP2015192173A - Signal processor, image reader, information processor, and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a signal processor which allows a post-stage circuit to recognize the colors, corresponding to image information, from specific colors in a predetermined color order, compared with a case where I/O means outputs the image information, acquired in synchronism with input of a synchronization signal in a form irrelevant to the color, and to provide an image reader, an information processor and a program.SOLUTION: An AFE20 outputs the image information indicating images created for each of a plurality of predetermined colors, in the color order of a plurality of circulating colors, along with a first synchronization signal in a form corresponding to the color. In synchronism with input of the first synchronization signal outputted by the AFE20, an I/O circuit 34 acquires the image information corresponding to the first synchronization signal thus inputted. The image information thus acquired is outputted, in color order, to a control circuit 202 from that corresponding to a specific synchronization signal in a form depending on a specific color included in a plurality of colors in the first synchronization signal.

Description

  The present invention relates to a signal processing device, an image reading device, an information processing device, and a program.

  Patent Document 1 discloses an image forming apparatus that includes an image reading unit that reads an image of a document, and an image forming unit that forms an image on a sheet based on image information indicating the image read by the image reading unit. ing. The image forming apparatus described in Japanese Patent Application Laid-Open No. H10-260260 adds color identification data indicating which part of image information obtained by reading an image by an image reading unit is image information indicating what color image. It is characterized by having data adding means.

JP 2004-72215 A

  The problem of the present invention is that the input / output means outputs the image information to the subsequent circuit as compared with the case where the image information acquired in synchronization with the input of the synchronization signal in a form irrelevant to the color is output to the subsequent circuit as it is. To provide a signal processing device, an image reading device, an information processing device, and a program capable of recognizing colors corresponding to information in a predetermined color order from a specific color.

  The signal processing device according to claim 1, wherein image information indicating an image generated for each of a plurality of predetermined colors is output together with a synchronization signal in a form corresponding to the color in the color order in which the plurality of colors circulate. In synchronization with the input of the synchronization signal output by the output means, the image information corresponding to the input synchronization signal is acquired, and the acquired image information is Input / output means for outputting image information corresponding to a specific synchronization signal in a form corresponding to a specific color included in the plurality of colors in the signal to a subsequent circuit in the color order.

  In the signal processing device according to claim 1, as in the invention according to claim 2, the input / output unit receives an instruction signal instructing to output the acquired image information to the subsequent circuit. After being input, the image information corresponding to the input specific synchronization signal is output to the subsequent circuit in the color order.

  3. The signal processing device according to claim 1, wherein, as in the invention according to claim 3, the synchronization signal is a pulse, and the time width of the pulse that is the specific synchronization signal is another synchronization signal. Is longer than the pulse duration.

  In the signal processing device according to claim 3, as in the invention according to claim 4, the time width of the pulse is different for each corresponding color.

  5. The signal processing device according to claim 1, wherein, as in the invention according to claim 5, the post-stage circuit converts the image information output by the input / output unit to the specific color. To the color order.

  The image reading apparatus according to claim 6 receives reflected light when light of each of a plurality of predetermined colors is irradiated in an order in which the plurality of colors circulate with respect to an image area including an image on a recording medium. The generation unit that generates image information indicating the image obtained by receiving light in the order of the colors, and the image information generated by the generation unit are set as processing targets. And the signal processing device described.

  An information processing apparatus according to a seventh aspect is based on the image reading apparatus according to the sixth aspect and image information output to the subsequent circuit by the input / output means in the signal processing apparatus included in the image reading apparatus. And an image forming apparatus for forming an image.

  The program according to claim 8 is a program for causing a computer to function as input / output means in the signal processing device according to any one of claims 1 to 5.

  According to the first, sixth, seventh and eighth aspects of the present invention, the input / output means obtains image information acquired in synchronization with the input of a synchronization signal in a form unrelated to color. Compared with the case of outputting to the subsequent circuit as it is, the subsequent circuit can be made to recognize the color corresponding to the image information from the specific color in the predetermined color order.

  According to the second aspect of the present invention, the instruction signal is input to the input / output unit for each image information, and the input / output unit outputs both the image information and the instruction signal together with the synchronization signal unrelated to the color to the subsequent circuit. As compared with the above, the color corresponding to the image information can be recognized in the order of a predetermined color from the specific color by the subsequent circuit with less data.

  According to the third aspect of the present invention, the specific synchronization signal and the other synchronization signal can be configured with a simple configuration as compared with the case where the time width of the pulse that is the specific synchronization signal is not longer than the time width of the pulse that is the other synchronization signal. And can be identified.

  According to the fourth aspect of the present invention, the colors corresponding to the synchronization signals can be individually identified with a simple configuration as compared with the case where the time width of the pulse does not differ for each corresponding color.

  According to the invention according to claim 5, compared to the case where the image information is not output in the color order from the image information corresponding to the specific synchronization signal, for the subsequent circuit having the function of processing in the predetermined color order from the specific color, It is possible to suppress the processing for the image information from being performed in the subsequent circuit in a state where the color corresponding to the image information is shifted.

It is a perspective view which shows an example of the external appearance of the information processing apparatus which concerns on a comparative example and embodiment. It is a perspective view which shows an example of the one part external appearance of the image reading part contained in the information processing apparatus which concerns on a comparative example and embodiment. It is a schematic side view which shows an example of a structure of the image reading part contained in the information processing apparatus which concerns on a comparative example and embodiment. It is a block diagram which shows an example of the hardware constitutions of the electric system of the information processing apparatus which concerns on a comparative example and embodiment. It is a block diagram which shows an example of the electric hardware constitutions of the image reading part main body in the image reading part contained in the information processing apparatus which concerns on a comparative example. In a comparative example, it is a conceptual diagram which shows an example of the circulation color order of the image information acquired by each of an input-output circuit and a control circuit, and the circulation color order recognized by the control circuit. In a comparative example, it is a conceptual diagram which shows another example of the circulation color order of the image information acquired in each of an input-output circuit and a control circuit, and the circulation color order recognized by the control circuit. In the comparative example, a signal (first synchronization signal and image information) input to the input / output circuit, a fourth CLK signal generated and output in the input / output circuit, and a signal (second synchronization signal) output from the input / output circuit And image information), and a time chart showing an example of the circulation color order recognized by the control circuit. In the comparative example, an example of a cyclic color order recognized by a signal input to the input / output circuit, a fourth CLK signal generated and output in the input / output circuit, a signal output by the input / output circuit, and the control circuit ( It is a time chart which shows an example when the input of a 1st synchronizing signal is prevented by noise. In the comparative example, an example of a cyclic color order recognized by a signal input to the input / output circuit, a fourth CLK signal generated and output in the input / output circuit, a signal output by the input / output circuit, and the control circuit ( It is a time chart which shows an example when the output of the 4th CLK signal is prevented by noise. It is a block diagram which shows an example of the hardware constitutions of the electric system of the image reading part main body in the image reading part contained in the information processing apparatus which concerns on 1st and 2nd embodiment. FIG. 12 is a block diagram illustrating an example of a main function of an input / output circuit included in the image reading unit main body illustrated in FIG. 11. It is a flowchart which shows an example of the flow of the flag setting process which concerns on embodiment. It is a continuation of the flowchart shown in FIG. It is a flowchart which shows an example of the flow of the signal generation process which concerns on embodiment. It is a flowchart which shows an example of the flow of the image information acquisition process which concerns on embodiment. It is a flowchart which shows an example of the flow of the image information output process which concerns on embodiment. In an embodiment, it is a wave form chart showing an example of the 4th CLK signal outputted by the 1st PLL, and the 1st synchronizing signal inputted into an input-output circuit from AFE. In an embodiment, it is a key map showing an example of a circulation color order of image information acquired by each of an input-output circuit and a control circuit, and a circulation color order recognized by a control circuit. In the embodiment, an example of a cyclic color order recognized by a signal input to the input / output circuit, a fourth CLK signal generated and output in the input / output circuit, a signal output by the input / output circuit, and the control circuit ( It is a time chart which shows an example when the input of a 1st synchronizing signal is prevented by noise. In the embodiment, an example of a cyclic color order recognized by a signal input to the input / output circuit, a fourth CLK signal generated and output in the input / output circuit, a signal output by the input / output circuit, and the control circuit ( It is a time chart which shows an example when the output of the 4th CLK signal is prevented by noise. It is a time chart which shows an example (an example in case the input interval of the 1st synchronizing signal is constant) of the 1st synchronizing signal and image information which are inputted into an input / output circuit concerning a comparative example and an embodiment. Example of first synchronization signal and image information input to input / output circuit according to embodiment (only input interval between first synchronization signal corresponding to B image information and first synchronization signal corresponding to R image information is other It is a time chart which shows an example when it differs from an input space | interval.

[Comparative example]
Before describing an example of an embodiment for carrying out the present invention in detail, a comparative example for an example of an embodiment for carrying out the present invention will be described first.

  As an example, as illustrated in FIG. 1, the information processing apparatus 100 includes an image reading unit 102, an image forming unit 104 (an example of an image forming apparatus according to the present invention), a paper storage unit 106, and a UI (user interface) unit 108. It has.

  The image reading unit 102 includes a document table 110 and a discharge table 112. A pair of guide members 114 </ b> A and 114 </ b> B are provided on the upper surface of the document table 110. One of the pair of guide members 114A and 114B is manually moved in the width direction of the document placed on the document table 110, and guides the document in the transport direction when the document placed on the document table 110 is transported. To do. The image reading unit 102 captures documents placed on the document table 110 one by one, reads the images of the captured documents by a line sequential method, and acquires image information indicating the read images. Then, the acquired image information is output to a CPU 162 (to be described later), and then the document is discharged to the discharge table 112.

  Here, “reading an image” means optically detecting the density of an image (hereinafter referred to as “image density”), and an input / output circuit 200 described later sends image information to a control circuit 202 described later. Means to output. In other words, the image density refers to the density of the image. In addition, the above-described line sequential method is a method of color separation by switching the red, green, and blue light sources every time one line is read by a single reading operation by a line sensor (in this example, a photoelectric conversion element 156 described later). Refers to the method of

  The paper storage unit 106 stores paper, which is an example of a recording medium, according to size. The image forming unit 104 takes out the paper from the paper storage 106 and forms an image on the extracted paper. The image formed on the sheet is, for example, an image indicated by image information acquired by the CPU 162 described later from the image reading unit 102, an image indicated by image information acquired by the CPU 162 from the external device 176 described later, or image quality. This refers to a reference image for adjustment (so-called patch). The image forming unit 104 discharges the sheet on which the image is formed to the discharge table 116. The method for forming an image may be an electrophotographic method or an ink jet method.

  The UI unit 108 includes a touch panel display 108A for displaying an image and a switch 108B. The touch panel display 108A and the switch 108B accept various instructions from the user of the information processing apparatus 100. As an example of various instructions, an instruction to start image reading with respect to the image reading unit 102 (hereinafter referred to as “scan start instruction” for convenience of explanation) and an image forming unit 104 to start image formation. Instructions are given. The touch panel display 108A displays various information such as a result of processing executed according to the received instruction and an alarm.

  As an example, as shown in FIGS. 2 and 3, the image reading unit 102 includes a casing 120 and a document conveying device 122, and the document conveying device 122 includes a document table 110 and a discharge table 112.

  As an example, as shown in FIG. 2, the housing 120 accommodates the image reading unit main body 140, and a rectangular opening 124 (in this example, an opening larger than an A3 size document) is formed on the upper surface of the housing 120. Is formed. The opening 124 is shielded by a platen glass 128 on which the document 126 (see FIG. 3) is placed. In the image reading unit 102 according to this example, a colorless and transparent glass plate is applied as an example of the platen glass 128. However, the present invention is not limited to this, and any document plate having translucency may be used.

  Fixing portions 128 </ b> A and 128 </ b> B are provided on the upper surface of the housing 120. A hinge member (not shown) provided on the bottom surface of the document conveying device 122 (see FIG. 3) is fixed to the fixing portions 128A and 128B, and the document conveying device 122 is opened and closed via the hinge member.

  A document set guide 130 formed of a rectangular frame is provided around the platen glass 128. The document set guide 130 has a slightly convex step from the platen glass 128, and the document 126 is positioned by aligning the corners of the document 126 so as to contact the step of the document set guide 130. An alignment mark (not shown) and a document size label (not shown) are provided on the upper surface of the document setting guide 130. The alignment mark is a mark used when the corner of the document 126 is aligned with the corner of the document set guide 130. The document size label is positioned at the edge of the document 126 when the standard size (B5, A4, B4, A3) document 126 is placed on the platen glass 128 by aligning the corners with the alignment mark. It is a landmark.

  As an example, in the document conveying device 122 shown in FIG. 3, the document placed on the document table 110 (the uppermost document when a plurality of sheets are stacked) is sent to a document reversing unit (not shown) and reversed. While passing through the reading area on the platen glass 128. Then, the image is read while the document passes through the reading area, and is then discharged to the discharge table 112.

  As an example, as illustrated in FIG. 3, the image reading unit main body 140 includes a CIS (Contact Image Sensor) 142, an image processing circuit 144, and a motor 146. The CIS 142 and the image processing circuit 144 are mounted on a carriage 148, and the carriage 148 moves in the sub-scanning direction (X direction shown in FIG. 3) that is the longitudinal direction of the opening 124 by receiving the driving force of the motor 146.

  The CIS 142 includes a first LED (Light Emitting Diode) 150A, a second LED 150B, and a third LED 150C. The first LED 150A is an LED having an emission wavelength of red (hereinafter referred to as “R”), the second LED 150B is an LED having an emission wavelength of green (hereinafter referred to as “G”), and the third LED 150C is blue ( Hereinafter, it is an LED having an emission wavelength of “B”. The first LED 150A, the second LED 150B, and the third LED 150C are sequentially driven so that light of each color of RGB is emitted in a predetermined order. Here, the predetermined order refers to a predetermined color order in which RGB circulates (hereinafter, referred to as “circulating color order” for convenience of explanation). Hereinafter, for convenience of explanation, when it is not necessary to distinguish between the first LED 150A, the second LED 150B, and the third LED 150C, they are referred to as “LED 150”.

  The CIS 142 includes a light guide 152, a light collecting unit 154, a photoelectric conversion element 156 (an example of a generation unit according to the present invention), and an AFE (Analog Front End: Analog Front End) 158.

  As an example, as shown in FIG. 2, the light guide 152 is formed in a long shape along the main scanning direction (Y direction shown in FIG. 3) that is the short direction of the opening 124. As an example, as shown in FIG. 3, an LED 150 is attached to one end of the light guide 152, and the light guide 152 guides the light emitted by the LED 150 to the document 126 through the platen glass 128.

  The light condensing unit 154 is a lens unit in which a plurality of erecting equal-magnification imaging lens elements are arranged along the main scanning direction (see FIG. 2). The light reflected by the original 126 when the light is irradiated is condensed.

  A plurality of photoelectric conversion elements 156 are arranged along the main scanning direction, and receive light (image formation) light collected by the light collecting unit 154 (an example of reflected light according to the present invention) to perform photoelectric conversion. As a result, image information that is an electrical signal corresponding to the amount of received light is generated and output. The image information generated and output by the photoelectric conversion element 156 is image information indicating an R image, image information indicating a G image, and image information indicating a B image.

  In the following, for convenience of explanation, image information indicating an R image is referred to as “R image information”, image information indicating a G image is referred to as “G image information”, and image information indicating a B image is “ This is referred to as “B image information”. In the following, for convenience of explanation, when it is not necessary to distinguish between the R image information, the G image information, and the B image information, they are referred to as “image information”.

  The AFE 158 adjusts the image information input from the photoelectric conversion element 156 using an amplifier, an A / D converter, a filter, and the like (not shown), and outputs the adjusted image information.

  The image processing circuit 144 has a function of processing the image information input from the AFE 158 in order of the circulated color from a specific color (here, R), and performs shading correction and pixel arrangement conversion processing on the image information input from the AFE 158. And the like.

  As an example, as illustrated in FIG. 4, the information processing apparatus 100 includes a controller 160. The controller 160 includes a CPU (Central Processing Unit) 162, a primary storage unit 164, and a secondary storage unit 166. The primary storage unit 164 is a volatile memory (for example, RAM (Random Access Memory)) used as a work area or the like when executing various programs. The secondary storage unit 166 is a non-volatile memory (for example, a flash memory or an HDD (Hard Disk Drive)) that stores in advance a control program for controlling the operation of the information processing apparatus 100, various parameters, and the like. The CPU 162, the primary storage unit 164, and the secondary storage unit 166 are connected to each other via a bus 168.

  The information processing apparatus 100 is an input / output interface (I / O) 170 that electrically connects the CPU 162 and various input / output devices to control transmission / reception of various information between the CPU 162 and various input / output devices. It has. The information processing apparatus 100 includes an image reading unit 102, an image forming unit 104, and a UI unit 108 as input / output devices that are electrically connected to the CPU 162 via the bus 168 by being connected to the I / O 170. ing. Further, the information processing apparatus 10 includes an external interface (I / F) 172 and a communication I / F 174 as input / output devices.

  The external I / F 172 is connected to an external device (for example, a USB memory), and manages transmission / reception of various types of information between the external device and the CPU 162. The communication I / F 174 is connected to a communication means such as a LAN (Local Area Network) or the Internet, and transmits / receives various information to / from an external device 176 (for example, a personal computer) connected to the communication means. To manage.

  The CPU 162 transmits / receives various information to / from the input / output device via the bus 168 and the I / O 170, thereby grasping the operation state of the input / output device and controlling the input / output device.

  As an example, as shown in FIG. 5, the image reading unit main body 140 includes a motor drive circuit 180. The motor drive circuit 180 is connected to each of the motor 146 and the I / O 170, and the motor 146 according to a drive control signal input from the CPU 162 via the I / O 170 in response to a scan start instruction received by the UI unit 108. Control the drive.

  The CIS 142 includes an LED drive circuit 182. The LED drive circuit 182 is connected to each of the first LED 150A, the second LED 150B, and the third LED 150C. The AFE 158 is connected to the LED drive circuit 182 and is connected to the I / O 170 via the signal line 184. The AFE 158 controls the driving of the LED drive circuit 182 according to the lighting start signal input from the CPU 162 via the I / O 170 and the signal line 184 in accordance with the scan start instruction received by the UI unit 108. Under the control of the AFE 158, the LED drive circuit 182 causes the first LED 150A, the second LED 150B, and the third LED 150C to repeatedly emit light in the order of the first LED 150A, the second LED 150B, and the third LED 150C. That is, when the lighting start signal is input, the AFE 158 controls the ED drive circuit 182 so that the first LED 150A of the LEDs 150 emits light first, and thereafter the LEDs 150 emit light according to the circulation color order from B.

  The AFE 158 is connected to the photoelectric conversion element 156 and is connected to the I / O 170 via the signal line 186. The AFE 158 includes a signal generation circuit 188. The signal generation circuit 188 generates a first synchronization signal and a first clock signal (first CLK signal) based on a basic clock signal (basic CLK signal) input from the CPU 162 via the I / O 170 and the signal line 186. . The first synchronization signal is a single pulse (hereinafter simply referred to as “pulse”). Here, the pulse refers to, for example, a single rectangular wave in which the signal level changes from a low level to a high level and then changes from a high level to a low level.

  The image processing circuit 144 includes an input / output circuit 200, a control circuit 202, and a memory 204. In this example, an FPGA (Field Programmable Gate Array) is adopted as an example of the input / output circuit 200. In this example, as an example of the control circuit 202, a CPU on which an ASIC (Application Specific Integrated Circuit) is mounted is adopted.

  The input / output circuit 200 is connected to the AFE 158 via each of the signal lines 190, 192 and 194. The AFE 158 outputs the first CLK signal generated by the signal generation circuit 188 to the input / output circuit 200 via the signal line 190, and inputs / outputs the first synchronization signal generated by the signal generation circuit 188 via the signal line 192. The signal is output to the circuit 200 according to the first CLK signal.

  The AFE 158 performs a process corresponding to a process performed by a general AFE on each piece of image information input from the photoelectric conversion element 156 in the circulation color order (here, the circulation color order starting from R). Then, the image information is output to the input / output circuit 200 via the signal line 194 in the circulation color order (the order in which the image information is input) in accordance with the output of the first synchronization signal. Here, outputting the image information in accordance with the output of the first synchronization signal means that the image information (image information having an empty area) is output in synchronization with the output of the first synchronization signal.

  The input / output circuit 200 receives the first synchronization signal at a timing determined based on the first CLK signal input from the AFE 158, and acquires corresponding image information in synchronization with the input of the first synchronization signal. To do. The corresponding image information refers to image information output together with the first synchronization signal by the AFE 158. Further, in this comparative example, for convenience of explanation, when the first synchronization signal is input to the input / output circuit 200, it is assumed that the first synchronization signal is input at an interval A as shown in FIG. Yes.

  The input / output circuit 200 is connected to the I / O 170 via each of the signal lines 206 and 208, and is connected to the control circuit 202 via each of the signal lines 210, 212, and 214. The control circuit 202 is connected to each of the memory 204 and the I / O 170.

  The input / output circuit 200 generates a third clock signal (third CLK signal) used by the control circuit 202 in accordance with the second clock signal (second CLK signal) input from the CPU 162 via the I / O 170 and the signal line 208. Then, the generated third CLK signal is output to the control circuit 202 via the signal line 210.

  The input / output circuit 200 receives a scan start signal (an example of an instruction signal according to the present invention) from the CPU 162 via the I / O 170 and the signal line 206 every time the first synchronization signal is input. A second synchronization signal that is a pulse is generated according to the second CLK signal. Then, the generated second synchronization signal is output to the control circuit 202 via the signal line 210. The input / output circuit 200 ends the generation of the second synchronization signal when the scan end signal is input from the CPU 162 via the I / O 170 and the signal line 206. The instruction signal according to the present invention refers to a signal that instructs the input / output circuit 200 to output the acquired image information to a subsequent circuit (in this example, the control circuit 202 as an example).

  Further, the input / output circuit 200 outputs the acquired image information to the control circuit 202 via the signal line 214 in the acquisition order (circulating color order) according to the output of the second synchronization signal. Here, outputting the image information in accordance with the output of the second synchronization signal means that the image information is output in synchronization with the output of the second synchronization signal. Note that the scan start signal is generated and output in units of pages by the CPU 162 in accordance with the scan start instruction received by the UI unit 108.

  The control circuit 202 acquires the image information input from the input / output circuit 200 according to the second synchronization signal, and temporarily stores the acquired image information in the memory 202. The control circuit 202 acquires image information from the memory 204 at a timing determined based on the third CLK signal input from the input / output circuit 200. Then, after performing predetermined processing (for example, shading correction) on the acquired image information, the image information is output to a predetermined output destination (for example, CPU 162) via the I / O 170.

  When the scan start signal is input to the input / output circuit 200, the control circuit 202 outputs the color corresponding to the image information acquired in synchronization with the input of the second synchronization signal (in other words, the image indicated by the image information). First, R is recognized. Thereafter, until the scan end signal is input to the input / output circuit 200, the control circuit 202 follows the color R corresponding to the image information acquired in synchronization with the input of the second synchronization signal. Each time the second synchronization signal is input from the color (here, B) in the order of the circulation color, it is recognized. That is, in other words, after the scan start signal is input to the input / output circuit 200, the control circuit 202 recognizes RGB, which is a color corresponding to the image information acquired from the input / output circuit 200, in order of the circulating color from R.

  The control circuit 202 performs image processing on the acquired image information on the assumption that the R image information is first output by the input / output circuit 200 after the scan start signal is input to the input / output circuit 200.

  Therefore, as shown in FIG. 6 as an example, after the B image information is acquired by the input / output circuit 200 and before the R image information is acquired, the scan start signal is input to the input / output circuit 200 In the control circuit 202, image information is acquired in the order of circulating colors starting from R. In this case, the control circuit 202 recognizes the image information in the order of the circulating colors starting from R and performs image processing. That is, in the control circuit 202, the circulation color order of the color corresponding to the actually acquired image information matches the recognized circulation color order.

  In the following description, for convenience of explanation, the circulation color order of colors corresponding to the image information actually acquired by the control circuit 202 is referred to as “acquired circulation color order”, and the circulation color order recognized by the control circuit 202 is “ This is referred to as “recognized circulation color order”.

  On the other hand, as shown in FIG. 7, when the scan start signal is input to the input / output circuit 200 after the R image information is acquired by the input / output circuit 200 and before the G image information is acquired. In the control circuit 202, image information is acquired in the order of the circulating colors starting from G. However, the control circuit 202 recognizes the image information in the order of the circulating colors starting from R and performs image processing. That is, in the control circuit 202, the acquired circulation color order does not match the recognized circulation color order. Therefore, although the image information is actually acquired in the order of the circulating colors starting from G, the image processing is performed assuming that the image information is acquired in the order of the circulating colors starting from R. Therefore, the image indicated by the image information output by the control circuit 202 is an image in which color misregistration has occurred.

  In the input / output circuit 200, a fourth CLK signal that is a clock signal determined based on the first CLK signal is generated. The fourth CLK signal refers to a clock signal that defines the timing at which the first synchronization signal output from the AFE 158 is input to the input / output circuit 200. In the input / output circuit 200, when a scan start signal is input, as shown in FIG. 8 as an example, the first synchronization signal is input in accordance with the fourth CLK signal. The input / output circuit 200 acquires the image information in the order of the circulating colors in synchronization with the input of the first synchronization signal. Also, a second synchronization signal is generated in response to the input of the first synchronization signal and output to the control circuit 202, and the image information is output to the control circuit 202 in the order of acquisition (circulation color order) in accordance with the output of the second synchronization signal. . In this case, the control circuit 202 recognizes the image information acquired from the input / output circuit 200 in the order of the circulation color starting from R in the order of acquisition. Therefore, the circulation color order (hereinafter referred to as “output circulation color order”), the acquired circulation color order, and the recognition circulation color order of the image information output by the input / output circuit 200 match.

  However, as shown in FIG. 9 as an example, in the input / output circuit 200, when the first synchronization signal corresponding to the G image information is not input due to the influence of noise (input of the first synchronization signal is hindered by noise). G image information is not acquired. Also. Since the second synchronization signal is generated in response to the input of the first synchronization signal, the second synchronization signal is not generated and the G image information is not output to the control circuit 202. In this case, since the control circuit 202 recognizes the image information input from the input / output circuit 200 in the order of circulation colors starting from R in the order of input, the output circulation color order matches the acquisition circulation color order, but the output circulation color order (Acquired circulation color order) does not match the recognized circulation color order.

  That is, in the example shown in FIG. 9, image information is output in the order of R image information, B image information, and R image information by the input / output circuit 200, but in the control circuit 202, the image information is R image information, G image information. It is recognized that the image information and the B image information are input in this order. In this way, when the circulation color order is erroneously recognized by the control circuit 202, image processing to be performed on the B image information is performed on the G image information, and image processing to be performed on the R image information is performed. This is performed on the B image information. Therefore, the image indicated by the image information output by the control circuit 202 is an image in which color misregistration has occurred.

  As an example, as shown in FIG. 10, in the input / output circuit 200, the output of the fourth CLK signal is stopped due to the influence of noise (the output of the fourth CLK signal is hindered), so that the G image information is handled. Even when the first synchronization signal is not input, the G image information is not acquired. Therefore, although the output circulation color order matches the acquisition circulation color order, the output circulation color order (acquisition circulation color order) does not match the recognition circulation color order.

[Embodiment]
Next, an example of an embodiment according to the present invention will be described in detail. In the following description, the same reference numerals are given to the same components as those described in the comparative example, and the description thereof is omitted. Moreover, below, a different part from said comparative example is demonstrated. In the following, for convenience of explanation, as shown in FIG. 22 as an example, when a first synchronization signal that is an example of a synchronization signal according to the present invention is input to the input / output circuit 34 (see FIG. 11), The description will be made on the assumption that the synchronization signal is input at the interval A.

  As an example, as illustrated in FIGS. 1 to 4, the information processing apparatus 10 according to the present embodiment is different from the information processing apparatus 100 in that an image reading unit 12 is provided instead of the image reading unit 102. As an example, as shown in FIGS. 2 and 3, an image reading unit 102, which is an example of an image reading apparatus according to the present invention, has an image reading unit main body 14 instead of the image reading unit main body 140 compared to the image reading unit 102. It has different points.

  As an example, as shown in FIGS. 3 and 11, the image reading unit main body 14, which is an example of the signal processing apparatus according to the present invention, has a CIS 18 instead of the CIS 142 compared to the image reading unit main body 140. The difference is that an image processing circuit 22 is provided instead of the circuit 144. As an example, as shown in FIG. 11, the CIS 18 is different from the CIS 142 in that it has an AFE 20 which is an example of an output unit according to the present invention, instead of the AFE 158. As an example, as illustrated in FIG. 11, the image processing circuit 22 is different from the image processing circuit 144 in that it includes an input / output circuit 34 that is an example of input / output means according to the present invention. In the following description, when the first synchronization signal is input to the input / output circuit 34, the description will be made on the assumption that the first synchronization signal is input at an interval A as shown in FIG. .

  The AFE 20 outputs the image information in the order of the circulating colors together with the first synchronization signal in a form corresponding to the color. As an example, as shown in FIG. 11, the AFE 20 is different from the AFE 158 in that it has an internal register 30 and a signal generation circuit 32 instead of the signal generation circuit 188. The internal register 30 stores time width information indicating the time width (for example, pulse width) of the pulse of the first synchronization signal corresponding to the R image information. The time width indicated by the time width information refers to, for example, a time width specified by a predetermined number of clocks based on the fourth CLK signal.

  Compared with the signal generation circuit 188, the signal generation circuit 32 is a first synchronization signal (pulse having a time width indicated by the time width information stored in the internal register 30 as a first synchronization signal corresponding to the R image information ( An example of the specific synchronization signal according to the present invention is different in that it is generated and output. The specific synchronization signal according to the present invention refers to a synchronization signal in a form corresponding to a specific color (R as an example here) in the first synchronization signal.

  The input / output circuit 34 acquires corresponding image information in synchronization with the input of the first synchronization signal output from the AFE 20. Then, the acquired image information is output to the control circuit 202 in the order of the circulation color from the image information corresponding to the specific synchronization signal.

  The input / output circuit 34 outputs the acquired image information to the control circuit 202 (an example of a subsequent circuit according to the present invention) in the order of acquisition together with the second synchronization signal generated in response to the input of the first synchronization signal. Further, the input / output circuit 34 outputs, to the control circuit 202, an alternative synchronization signal that substitutes for the second synchronization signal when the first synchronization signal is not input. The case where the first synchronization signal is not inputted is, in other words, the case where the input of the first synchronization signal is hindered due to the influence of noise. That is, here, “the case where the first synchronization signal is not input” means a time when the first synchronization signal is not originally input (for example, between one pulse adjacent to the other pulse at an interval A shown in FIG. 22 and the other pulse). It is not intended that the signal level be low).

  As an example, as illustrated in FIG. 12, the input / output circuit 34 includes a first PLL (Phase Locked Loop) 50, a setting unit 52, a holding output unit 54, a synchronization signal generation unit 56, and a second PLL 58. The setting unit 52 includes a counter 53, and the holding output unit 54 includes a memory 55.

  The first PLL 50, which is an example of a clock output unit according to the present invention, is connected to the signal line 190 and is connected to the setting unit 52 via each of the signal lines 60 and 61. The setting unit 52 is connected to the signal lines 192, 206, 208, and 212, and is connected to the synchronization signal generation unit 56 via the signal line 62. The holding output unit 54 is connected to each of the signal lines 60, 62, 192, 194, 208, 212, 214. The synchronization signal generator 56 is connected to the signal lines 192 and 208. The second PLL 58 is connected to the signal lines 208 and 210.

  The first PLL 50 generates a fourth CLK signal (an example of an input clock signal according to the present invention) with reference to the first CLK signal input via the signal line 190. Then, the generated fourth CLK signal is output to the setting unit 52 and the holding output unit 54 via the signal line 60. In this embodiment, as an example of the fourth CLK signal, a clock signal having a frequency obtained by multiplying the frequency of the first CLK signal by N times (here, three times as an example) is employed.

  In addition, the first PLL 50 performs a reset when a reset execution signal is input from the setting unit 52 via the signal line 61 in a stopped state. Further, the first PLL 50 releases the reset when a reset release signal is input from the setting unit 52 via the signal line 61. Here, the stopped state refers to, for example, a state in which the generation of the fourth CLK signal is stopped because the first PLL 50 is affected by noise. In addition, reset refers to restarting the generation of the fourth CLK signal and waiting for the input of the reset release signal without outputting the generated fourth CLK signal. To cancel the reset means to restart the output of the fourth CLK signal.

  The setting unit 52 detects the edges (rising edge and falling edge) of the pulse that is the first synchronization signal. The counter 53 counts the elapsed time from the time when the rising edge is detected to the time when the falling edge is detected (here, the number of clocks of the fourth CLK signal as an example). In addition, the counter 53 counts the number of clocks of the elapsed time from the time when the first synchronization signal (for example, the falling edge of the pulse) is detected (here, the second CLK signal (an example of the output clock signal according to the present invention)). ). Further, the counter 53 counts the number of output dummy signals described later.

  The setting unit 52 sets various flags based on the count value by the counter 53. Here, setting the flag means turning the flag on or off. The various flags refer to an R identification flag, a G identification flag, a B identification flag, an output permission flag, and a dummy output flag. The R identification flag, G identification flag, and B identification flag are set in an internal register (not shown) of the setting unit 52. The output permission flag is set for the holding output unit 54 and the synchronization signal generating unit 56. The dummy output flag is set for the synchronization signal generator 56.

  The R identification flag is a flag for identifying that the acquired image information is R image information. The G identification flag is a flag for identifying that the acquired image information is G image information. The B identification flag is a flag for identifying that the acquired image information is B image information. The output permission flag is a flag that permits image information to be output to the control circuit 202. The dummy output flag is a flag that permits the output of a dummy signal that is an example of an alternative synchronization signal that substitutes for the second synchronization signal. Hereinafter, for convenience of explanation, when it is not necessary to distinguish between the R identification flag, the G identification flag, and the B identification flag, they are referred to as color identification flags.

  The holding output unit 54 synchronizes with the input of the first synchronization signal via the signal line 192 at a timing determined based on the fourth CLK signal input via the signal line 60, and corresponding image information. Is stored in the memory 55. Then, image information is output on condition that the output permission flag is on. Here, the image information output is held in synchronization with the input of the second synchronization signal via the signal line 212 at a timing determined based on the second CLK signal input via the signal line 208. This indicates that the state image information is output to the control circuit 202 via the signal line 214.

  The synchronization signal generator 56 outputs a synchronization signal on condition that the output permission flag is in an on state. Here, the synchronization signal output refers to generating and outputting a second synchronization signal that is a pulse in response to the first synchronization signal being input via the signal line 192. The second synchronization signal is generated and output at a timing determined based on the second CLK signal input via the signal line 208.

  The synchronization signal generation unit 56 outputs a dummy signal on condition that the dummy output flag is in an on state. The dummy signal output refers to generating and outputting a dummy signal, which is a pulse substituted for the second synchronization signal, in accordance with the second CLK signal input through the signal line 208. The output interval of the dummy signal is, for example, a predetermined interval corresponding to the output interval of the first synchronization signal (hereinafter referred to as “first synchronization signal output interval” for convenience of explanation). The first synchronization signal output interval refers to, for example, a time interval from the rising edge of one first synchronization signal to the rising edge of the other first synchronization signal among the output adjacent first synchronization signals.

  In this embodiment, a case where a dummy signal is generated and output according to the second CLK signal generated and output by the CPU 162 which is a generation output source different from the first PLL 50 is illustrated, but the present invention is not limited thereto. It is not limited. That is, the dummy signal is generated and output in accordance with a clock signal generated and output by a generation output source (here, the first PLL 50) from which the fourth CLK signal is generated and output and an oscillator that is a generation output source other than the CPU 162. You may be made to do.

  The second PLL 58 receives the second CLK signal via the signal line 208, generates a third CLK signal with reference to the input second CLK signal, and sends the generated third CLK signal to the control circuit 202 via the signal line 210. Output.

  Next, the operation of this embodiment will be described. First, the flag setting process executed by the setting unit 52 will be described with reference to FIG.

  In the flag setting process illustrated in FIG. 13, first, in step 200, the setting unit 52 determines whether the output permission flag is turned off in the holding output unit 54 and the synchronization signal generation unit 56. In step 200, when the output permission flag is turned off in the holding output unit 54 and the synchronization signal generating unit 56, the determination is affirmed and the process proceeds to step 202. In step 200, if the output permission flag is not turned off in the holding output unit 54 and the synchronization signal generating unit 56 (if turned on), the determination is negative and the process proceeds to step 220.

  In step 202, the setting unit 52 determines whether a scan start signal is input. If a scan start signal is input in step 202, the determination is affirmed and the routine proceeds to step 204. If the scan start signal is not input in step 202, the determination is negative and the determination in step 202 is performed again.

  In step 204, the setting unit 52 determines whether or not the rising edge of the first synchronization signal has been detected. If the rising edge of the first synchronization signal is detected in step 204, the determination is affirmed and the routine proceeds to step 206. If the rising edge of the first synchronization signal is not detected in step 204, the determination is negative and the determination in step 204 is performed again.

  In step 206, the counter 53 starts counting the number of clocks of the fourth CLK signal, and then proceeds to step 208.

  In step 208, the setting unit 52 determines whether a falling edge of the first synchronization signal is detected. If the falling edge of the first synchronization signal is detected in step 208, the determination is affirmed and the routine proceeds to step 210. If the falling edge of the first synchronization signal is not detected in step 208, the determination is negative and the determination in step 208 is performed again.

  In step 210, the setting unit 52 determines whether or not the count value of the counter 53 that has started counting in step 206 is greater than or equal to the first threshold value. Here, the first threshold refers to the number of clocks corresponding to the time width indicated by the time width information stored in the internal register 30. In step 210, when the count value of the counter 53 that has started counting in step 206 is equal to or larger than the first threshold value, the determination is affirmed and the process proceeds to step 212. In step 210, if the count value of the counter 53 that has started counting in step 206 is less than the first threshold value, the determination is negative and the routine proceeds to step 213.

  In this step 210, the case where the determination is affirmed indicates a case where the first synchronization signal (see FIG. 18) corresponding to the R image information is input to the setting unit 52. In the case where the determination is negative in step 210, the first synchronization signal (see FIG. 18) corresponding to the G image information or the first synchronization signal (see FIG. 18) corresponding to the B image information is set by the setting unit 52. It indicates the case where it is input to.

  In step 213, the counter 53 resets the count value obtained by starting counting in step 206, and then proceeds to step 202. Note that the reset in step 213 and step 214 described later means returning the count value to an initial set value (for example, “0”).

  In step 212, the setting unit 52 turns on the R identification flag and the output permission flag, and then proceeds to step 214.

  In step 214, the counter 53 resets the count value obtained by starting the count in step 206 or the previous main step 214, then starts counting again, and then proceeds to step 216.

  In step 216, the setting unit 52 determines whether a scan end signal is input. If a scan end signal is input in step 216, the determination is affirmed and the routine proceeds to step 218. If the scan end signal is not input in step 216, the determination is negative and the determination in step 200 is performed again.

  In step 218, the setting unit 52 turns off the various flags, and then ends the flag setting process.

  On the other hand, in step 220, the setting unit 52 determines whether or not the first PLL 50 is in a stopped state. In step 220, when the first PLL 50 is in a stopped state, the determination is affirmed and the routine proceeds to step 234 shown in FIG. If it is determined in step 220 that the first PLL 50 is not in a stopped state, the determination is negative and the routine proceeds to step 222.

  In step 222, the setting unit 52 determines whether or not a first synchronization signal (a first synchronization signal corresponding to R image information, G image information, or B image information illustrated in FIG. 18 as an example) has been detected. If the first synchronization signal is detected in step 222, the determination is affirmed and the routine proceeds to step 224. If the first synchronization signal is not detected at step 222, the determination is negative and the routine proceeds to step 230.

  In step 224, the setting unit 52 updates the color identification flags in the order of the circulating colors, and then proceeds to step 226. Updating the color identification flag in the order of the circulation colors means that, for example, when the determination in step 222 is affirmed while the R identification flag is on, the R identification flag is turned off and the G identification flag is turned on. means. For example, when the determination in step 222 is affirmed in a state where the G identification flag is turned on, it means that the G identification flag is turned off and the B identification flag is turned on. Further, for example, if the determination in step 222 is affirmed while the B identification flag is on, it means that the B identification flag is turned off and the R identification flag is turned on.

  In step 226, the setting unit 52 determines whether the dummy output flag is turned on. If the dummy output flag is turned on in step 226, the determination is affirmed and the routine proceeds to step 228. In step 226, if the dummy output flag is not turned on (if turned off), the determination is negative and the routine proceeds to step 214.

  In step 228, the setting unit 52 turns off the dummy output flag, and then proceeds to step 214.

  In step 230, the setting unit 52 determines whether or not the count value of the counter 53 that has started counting in step 214 is greater than or equal to the second threshold value. Here, the second threshold value is, for example, a fourth CLK signal corresponding to a time obtained by adding a predetermined time (for example, a time corresponding to two clocks of the fourth CLK signal) to the first synchronization signal output interval. The number of clocks.

  In step 230, when the count value of the counter 53 that has started counting in step 214 is greater than or equal to the second threshold value, the determination is affirmed and the process proceeds to step 232. In step 230, when the count value of the counter 53 that has started counting in step 214 is less than the second threshold value, the determination is negative and the routine proceeds to step 220.

  In step 232, the setting unit 52 turns on the dummy output flag, and then proceeds to step 214.

  On the other hand, in step 234 shown in FIG. 14, the setting unit 52 outputs a reset execution signal to the first PLL 50, and then proceeds to step 236. The first PLL 50 performs a reset in response to the reset execution signal input from the setting unit 52.

  In step 236, the setting unit 52 turns on the dummy output flag, and then proceeds to step 238.

  In step 238, the setting unit 52 derives the required number of dummy signals output from the synchronization signal generation unit 56 based on the color identification flag that is currently turned on, and then proceeds to step 240. In step 238, the required number of dummy signals is derived according to Table 1 below.

ここで、ダミー信号の必要個数（例えば、表１に示すダミー信号の必要個数）は、現時点でオンされている色識別フラグ、出力再開期間、及び特定色に応じて定まる。出力開始期間とは、第１ＰＬＬ５０により第４ＣＬＫ信号の出力が再開される迄の期間として予め定められた期間を指す。第４ＣＬＫ信号の出力が再開される迄の期間とは、換言すると、第４ＣＬＫ信号の生成が安定する迄の期間を指す。第４ＣＬＫ信号の生成が安定した状態とは、例えば、第１ＣＬＫ信号のクロック数の３倍のクロック数の第４ＣＬＫ信号が継続的に生成されている状態を指す。特定色とは、制御回路２０２に対して最初に出力すべき画像情報に対応する色として予め定められた色（ここでは一例としてＲ）を指す。

Here, the required number of dummy signals (for example, the required number of dummy signals shown in Table 1) is determined according to the color identification flag that is currently turned on, the output restart period, and the specific color. The output start period refers to a period set in advance as a period until the output of the fourth CLK signal is resumed by the first PLL 50. In other words, the period until the output of the fourth CLK signal is resumed refers to the period until the generation of the fourth CLK signal is stabilized. The state in which the generation of the fourth CLK signal is stable refers to, for example, a state in which the fourth CLK signal having a clock number three times the number of clocks of the first CLK signal is continuously generated. The specific color refers to a color (R as an example here) predetermined as a color corresponding to image information to be output to the control circuit 202 first.

  After step 238 is executed, the counter 53 counts the number of dummy signals output by the synchronization signal generator 56.

  In step 240, the setting unit 52 determines whether the number of dummy signals counted by the counter 53 has reached the necessary number derived in step 238. In step 240, when the number of dummy signals counted by the counter 53 reaches the necessary number derived in step 238, the determination is affirmed and the routine proceeds to step 242. In step 240, if the number of dummy signals counted by the counter 53 has not reached the necessary number derived in step 238, the determination is negative and the determination in step 240 is performed again.

  In step 242, the setting unit 52 turns off the dummy output flag, and then proceeds to step 244.

  In step 244, the setting unit 52 outputs a reset release signal to the first PLL 50, and then proceeds to step 214 shown in FIG. The first PLL 50 releases the reset in response to the input of the reset release signal from the setting unit 52.

  Next, the signal generation process executed by the synchronization signal generator 56 will be described with reference to FIG.

  In step 250, the synchronization signal generator 56 determines whether or not the output permission flag is turned on. If the output permission flag is turned on in step 250, the determination is affirmed and the routine proceeds to step 252. In step 250, if the output permission flag is not turned on (if turned off), the determination is negative and the determination in step 250 is performed again.

  In step 252, the synchronization signal generator 56 determines whether or not the dummy output flag is turned on. If the dummy output flag is turned on at step 252, the determination is affirmed and the routine proceeds to step 258. In step 252, if the dummy output flag is not turned on (if turned off), the determination is negative and the routine proceeds to step 254.

  In step 254, the synchronization signal generator 56 determines whether or not the first synchronization signal is input from the AFE 20. If the first synchronization signal is input from the AFE 20 at step 254, the determination is affirmed and the routine proceeds to step 256. If it is determined in step 254 that the first synchronization signal is not input from the AFE 20, the determination is negative and the process proceeds to step 264.

  In step 256, the synchronization signal generation unit 56 generates a second synchronization signal and outputs it to the control circuit 202, and then proceeds to step 264.

  In step 258, the synchronization signal generator 56 determines whether or not the dummy signal generation time has come. Here, the dummy signal generation time refers to the time when the determination in step 252 is affirmed and the time corresponding to the first synchronization signal output interval has elapsed since the dummy signal was output last time. If it is determined in step 258 that the dummy signal generation time has arrived, the determination is affirmed and the routine proceeds to step 260. If it is determined in step 258 that the dummy signal generation time has not arrived, the determination is negative and the determination in step 258 is performed again.

  In step 260, the synchronization signal generation unit 56 generates a dummy signal and outputs the dummy signal to the control circuit 202, and then proceeds to step 262. Note that in this step 260, when the necessary number of “1” or more is derived in step 238 shown in FIG. 14, a dummy signal is generated and output, but “0” is derived as the necessary number. In this case, the process proceeds to step 262 without generating a dummy signal.

  In step 262, the synchronization signal generator 56 determines whether or not the dummy output flag is turned off. If the dummy output flag is turned off at step 262, the determination is affirmed and the routine proceeds to step 264. If the dummy output flag is not turned off (if turned on) at step 262, the determination is negative and the routine proceeds to step 258.

  In step 264, the synchronization signal generator 56 determines whether or not the output permission flag is turned off. In step 264, if the output permission flag is not turned off (if turned on), the determination is negative and the routine proceeds to step 252. If the output permission flag is turned off in step 264, the determination is affirmed and the signal generation process is terminated.

  Next, image information acquisition processing executed by the holding output unit 54 will be described with reference to FIG.

  In the image information acquisition process shown in FIG. 16, first, in step 300, the holding output unit 54 determines whether or not the output permission flag is turned on. In step 300, if the output permission flag is not turned on (if turned off), the determination is negative and the determination in step 300 is performed again. If the output permission flag is turned on in step 300, the determination is affirmed and the routine proceeds to step 302.

  In step 302, the holding output unit 54 determines whether or not the first synchronization signal is input. If the first synchronization signal is not input in step 302, the determination is negative and the determination in step 302 is performed again. If the first synchronization signal is input in step 302, the determination is affirmed and the routine proceeds to step 304.

  In step 304, the holding output unit 54 starts acquiring the image information output by the AFE 20, and then proceeds to step 306.

  In step 306, the holding output unit 54 holds the acquired image information by storing it in the memory 55, and proceeds to step 307.

  In step 307, the holding output unit 54 determines whether the acquisition of the image information corresponding to the first synchronization signal input in step 302 has been completed. If it is determined in step 307 that the acquisition of image information corresponding to the first synchronization signal input in step 302 has not been completed, the determination is negative and the process proceeds to step 306. In step 307, when the acquisition of the image information corresponding to the first synchronization signal input in step 302 is finished, the determination is affirmed and the process proceeds to step 308.

  In step 308, the holding output unit 54 determines whether or not the output permission flag is turned off. If the output permission flag is not turned off at step 308 (if turned on), the determination is negative and the routine proceeds to step 302. If the output permission flag is turned off in step 308, the determination is affirmed and the image information acquisition process is terminated.

  Next, image information output processing executed by the holding output unit 54 will be described with reference to FIG.

  In the image information output process shown in FIG. 17, first, in step 350, the holding output unit 54 determines whether or not the output permission flag is turned on. In step 350, if the output permission flag is not turned on (if turned off), the determination is negative and the determination in step 350 is performed again. If the output permission flag is turned on in step 350, the determination is affirmed and the routine proceeds to step 352.

  In step 352, the holding output unit 54 determines whether or not the second synchronization signal is input. If the second synchronization signal is not input in step 352, the determination is negative and the determination in step 352 is performed again. If the second synchronization signal is input at step 352, the determination is affirmed and the routine proceeds to step 354.

  In step 354, the holding output unit 54 outputs the image information in the holding state (stored in the memory 55 at the present time) to the control circuit 202, and then proceeds to step 356.

  In step 356, the holding output unit 54 determines whether all of the image information in the holding state has been output to the control circuit 202. If it is determined in step 356 that not all of the held image information has been output to the control circuit 202, the determination is negative and the determination in step 356 is performed again. In step 356, when all the held image information is output to the control circuit 202, the determination is affirmed and the process proceeds to step 358.

  In step 358, the holding output unit 54 determines whether or not the output permission flag is turned off. If the output permission flag is not turned off in step 358 (if turned on), the determination is negative and the routine proceeds to step 352. If the output permission flag is turned off in step 358, the determination is affirmed and the image information output process is terminated.

  As described above, when the image information output process is executed by the holding output unit 54, the color corresponding to the image information output by the input / output circuit 34 is acquired by the control circuit 202 as shown in FIG. Matches the color corresponding to the image information to be displayed. Further, when the example shown in FIG. 7 is compared with the example shown in FIG. 19, the acquired circulation color order does not match the recognized circulation color order in the example shown in FIG. The difference is that the circulation color order matches the recognized circulation color order. In this way, the acquired circulation color order and the recognized circulation color order coincide with each other when the output permission flag is turned on by the setting unit 52 and the image information acquisition process and the image information output process are executed by the holding output unit 54. This is because the.

  In the example shown in FIG. 19, a scan start signal is input to the input / output circuit 34 after the R image information is output by the AFE 20 and before the B image information is output. In this case (when the timing at which the scan start signal is input to the input / output circuit 34 does not match the timing at which the RFE information is output by the AFE 20), the input / output circuit 34 does not output the B image information (empty). Output data) and start outputting image information from the R image information. As a result, the B image information is not input from the input / output circuit 34 (because empty data is output by the input / output circuit 34), the control circuit 202 skips the acquisition operation for the B image information, and the image from the R image information. Resume information acquisition. Therefore, the control circuit 202 acquires image information in the order of R image information, G image information, and B image information, and recognizes and acquires image information in the order of R image information, G image information, and B image information. Processing is performed on the acquired image information in the order of acquisition.

  Further, in the information processing apparatus 10 according to the present embodiment, a scan start signal as a color identification flag such as RGB is input to the input / output circuit 34 for each image information, and the input / output circuit 34 displays an image together with a synchronization signal unrelated to color. Compared to the case where both the information and the scan start signal are output to the control circuit 202, the control circuit 202 recognizes the color corresponding to the image information in the order of the circulation color from the specific color with less data exchange.

  On the other hand, when the example shown in FIG. 9 is compared with the example shown in FIG. 20, when the input of the first synchronization signal corresponding to the G image information is hindered by noise, no dummy signal is output in the example shown in FIG. On the other hand, the example shown in FIG. 20 differs in that a dummy signal is output.

  When the output permission flag is turned on, as shown in FIG. 20 as an example, the input / output circuit 34 responds to the input of the first synchronization signal (step 254: Y in FIG. 15), the second synchronization signal. Is generated and output (step 256 in FIG. 15). The control circuit 202 acquires image information in synchronization with the input of the second synchronization signal. Here, when the input of the first synchronization signal corresponding to the G image information is hindered by noise (step 230 in FIG. 13: Y), the input / output circuit 34 does not output the G image information (outputs empty data). ), A dummy signal is generated and output instead of the second synchronization signal (step 260 in FIG. 15).

  In this case, the control circuit 202 skips the acquisition operation for the G image information, and recognizes that the G image information has been acquired by inputting a dummy signal from the input / output circuit 34. Thereafter, when the input of the first synchronization signal is resumed (step 254 in FIG. 15: Y), the input / output circuit 34 generates and outputs the second synchronization signal again (step 256 in FIG. 15). When the output of the second synchronization signal is resumed, the input / output circuit 34 outputs image information (B image information in the example shown in FIG. 20) in synchronization therewith. The control circuit 202 resumes the acquisition of the image information in synchronization with the input of the second synchronization signal again, and recognizes the color (B in the example shown in FIG. 20) corresponding to the acquired image information.

  That is, the control circuit 202 recognizes that the image information has been acquired even if the image information is not actually acquired by inputting the dummy signal until the output of the first synchronization signal is resumed. In addition, the acquired circulation color order matches the recognized circulation color order. Accordingly, even if the input of the first synchronization signal is hindered by noise, the color corresponding to the image information is shifted after the control circuit 202 (the image indicated by the image information output by the image processing performed by the control circuit 202). The occurrence of a situation where the color of the color shifts) is suppressed. Note that the term “control circuit 202 and later” refers to the control circuit 202 and a subsequent stage circuit that acquires and handles image information output by the control circuit 202 (a circuit that is located at a later stage than the control circuit 202).

  On the other hand, when the example shown in FIG. 10 is compared with the example shown in FIG. 21, when the input of the first synchronization signal corresponding to the G image information is hindered by noise, no dummy signal is output in the example shown in FIG. On the other hand, the example shown in FIG. 21 is different in that a dummy signal is output.

  In the present embodiment, as shown in FIG. 21 as an example, even when the second synchronization signal is not generated without the first synchronization signal being input due to the output of the fourth CLK signal being hindered by noise, A dummy signal is output to the control circuit 202. In this case, the control circuit 202 recognizes that the image information has been acquired even if the image information is not actually acquired by inputting the dummy signal until the output of the fourth CLK signal is resumed. In addition, the acquired circulation color order matches the recognized circulation color order. Therefore, even if the output of the fourth CLK signal is hindered by noise, the occurrence of a situation where the color corresponding to the image information shifts after the control circuit 202 is suppressed.

  In the above embodiment, the case where the first synchronization signal is not input due to the influence of noise is exemplified, but the present invention is not limited to this, and the first synchronization signal is caused by a cause other than noise (for example, poor contact). It goes without saying that one synchronization signal may not be input.

  In the above embodiment, the case where the number of dummy signals uniquely derived according to the color identification flag is output on the assumption that the timing at which the fourth CLK signal is restarted is known is described. Is not limited to this. For example, the synchronization signal generation unit 56 outputs a dummy signal after the dummy output flag is turned on until the dummy output flag is turned off and the R identification flag is turned on, and the R identification flag is turned on. In this case, the second synchronization signal may be generated and output. In this case, it is assumed that the color identification flag is updated, but the color identification flag is updated in the order of the circulating colors every time the dummy signal output from the synchronization signal generation unit 56 is detected by the setting unit 52. You can do it. The period until the dummy output flag is turned off and the R identification flag is turned on is, in other words, the period when the dummy output flag is turned off and the G identification flag or the B identification flag is turned on. Point to.

  In the above embodiment, R is exemplified as the color corresponding to the image information that the input / output circuit 34 first outputs to the control circuit 202 after the scan start signal is input to the image processing circuit 22, but the present invention is not limited thereto. It is not limited. The color corresponding to the image information that the input / output circuit 34 first outputs to the control circuit 202 after the scan start signal is input to the image processing circuit 186 is processed by the control circuit 202 in the order of the circulation color from the image information of any color. Depends on what you do. Therefore, when the control circuit 202 performs image processing in the order of the circulation colors from the G image information, the input / output circuit 34 corresponds to the image information that is first output to the control circuit 202 after the scan start signal is input to the image processing circuit 22. The color is G. Further, when the control circuit 202 performs image processing in the order of the circulation colors from the B image information, the input / output circuit 34 corresponds to the image information that is first output to the control circuit 202 after the scan start signal is input to the image processing circuit 22. The color is B.

  In the above embodiment, the time width (pulse width) of the first synchronization signal corresponding to the G image information is not different from the time width of the first synchronization signal corresponding to the B image information. It is not limited to. For example, the time width of the first synchronization signal corresponding to the R image information, the time width of the first synchronization signal corresponding to the G image information, and the time width of the first synchronization signal corresponding to the B image information are made different from each other. You may do it. As a result, the setting unit 52 measures the time width of the first synchronization signal, thereby identifying what color image information is input.

  In the above embodiment, the case where the AFE 20 outputs a pulse whose signal level transitions from a low level to a high level is output as the first synchronization signal. However, the present invention is not limited to this. For example, a signal whose signal level transitions from a high level to a low level may be output as the first synchronization signal. In this case, the color corresponding to the image information is identified from the time width of the low level portion of the first synchronization signal.

  Moreover, although the said embodiment demonstrated on the assumption that the pulse which is a 1st synchronizing signal was a rectangular wave, this invention is not limited to this, For example, the pulse which is a 1st synchronizing signal is: It may be a pulse having another shape such as a triangular wave or a sawtooth wave. The shape of the pulse may be changed for each RGB color. In this case, each color of RGB is uniquely specified from the shape of the pulse.

  Moreover, although the case where a color was identified based on the pulse width which is the time width of the pulse which is a 1st synchronizing signal was illustrated in the said embodiment, this invention is not limited to this. For example, the AFE 20 may output a number of pulses corresponding to the color or a pulse having a height corresponding to the color as the first synchronization signal. Alternatively, the number of pulses may be individually changed for each RGB color, or the pulse height may be individually changed for each RGB color. In this case, each color of RGB is uniquely specified from the number of pulses or the height of the pulses.

  Note that the AFE 20 generates and outputs a first synchronization signal having a time width corresponding to the color, and the input / output circuit 34 identifies the color corresponding to the image information from the time width of the first synchronization signal (the embodiment described above). In the color identification method described in the above, it is not necessary to embed a color identifier in an empty area in image information. Therefore, the color identification method described in the above embodiment is advantageous in that the empty area in the image information can be used for other purposes than the method of embedding the color identifier in the empty area in the image information.

  Moreover, although the said embodiment demonstrated as a premise the case where a 1st synchronizing signal is input with the space | interval A as shown in FIG. 22 as an example, this invention is not limited to this. For example, as shown in FIG. 23, only the input interval between the first synchronization signal corresponding to the B image information and the first synchronization signal corresponding to the subsequent R image information may be the interval B. Also in this case, the timing for restarting the output of the fourth CLK signal is after the output of the dummy signal.

  In addition, the flag setting process, the signal generation process, the image information acquisition process, and the image information output process (hereinafter referred to as “various processes” when there is no need to distinguish between them) described in the above embodiment are merely examples. Therefore, it goes without saying that unnecessary steps may be deleted, new steps may be added, and the processing order may be changed within a range not departing from the spirit. In addition, each process included in the various processes described in the above embodiment is executed by the input / output circuit 34 that is an FPGA, but may be realized by a software configuration using a computer by executing the program. Good. In addition, each process included in the various processes may be realized by a combination of a hardware configuration and a software configuration.

  Moreover, in order to implement | achieve each process included in the various processes demonstrated by the said embodiment with a software structure, CPU in a computer containing CPU, a primary storage part, and a secondary storage part performs various process programs, for example. Various processes may be performed according to the above. Here, the various processing programs need only be stored in the secondary storage unit (for example, flash memory), and the CPU reads the various processing programs from the secondary storage unit and expands them in the primary storage unit (for example, RAM). You can do it afterwards. In this case, the CPU operates as the setting unit 52 that executes the flag setting process (see FIGS. 13 and 14) by executing the flag setting program. Further, the CPU operates as the synchronization signal generation unit 56 that executes the signal generation process (see FIG. 15) by executing the signal generation program. The CPU operates as the holding output unit 54 that executes the image information acquisition process (see FIG. 16) by executing the image information acquisition program. Furthermore, the CPU operates as the holding output unit 54 that executes the image information output process (see FIG. 17) by executing the image information output program.

  In the above embodiment, for convenience of explanation, the image reading unit 12 outputs image information from the AFE 20 to the input / output circuit 34, and the input / output circuit 34 outputs image information to the control circuit 202. However, the present invention is not limited to this. That is, the present invention is also applied to a case where image information is output from one circuit to the other circuit and the other circuit outputs to a subsequent circuit in an apparatus other than the image reading unit 12.

  Moreover, in the said embodiment, although the image information corresponding to each of three colors of RGB is illustrated, this invention is not limited to this. That is, the present invention converts image information corresponding to each of a plurality of predetermined colors (for example, yellow (Y), magenta (M), cyan (C), and black (K)) from one circuit to the other. The present invention is also applied to the case of outputting to a circuit and the other circuit outputting to a subsequent circuit.

DESCRIPTION OF SYMBOLS 10 Information processing apparatus 12 Image reading part 20 AFE
34 Input / output circuit 50 First PLL
156 Photoelectric conversion element 162 CPU
202 Control circuit

Claims (8)

Output means for outputting image information indicating an image generated for each of a plurality of predetermined colors, in a color order in which the plurality of colors circulate together with a synchronization signal in a form corresponding to the color;
In synchronization with the input of the synchronization signal output by the output means, the image information corresponding to the input synchronization signal is acquired, and the acquired image information is acquired from the synchronization signal. Input / output means for outputting to the subsequent circuit in the color order from image information corresponding to a specific synchronization signal in a form corresponding to a specific color included in a plurality of colors;
Including a signal processing apparatus.   The input / output means outputs the acquired image information in the color order from the image information corresponding to the specific synchronization signal input after an instruction signal instructing to output the image information to the subsequent circuit is input. The signal processing apparatus according to claim 1, which outputs to a circuit. The synchronization signal is a pulse;
The signal processing apparatus according to claim 1, wherein a time width of a pulse that is the specific synchronization signal is longer than a time width of a pulse that is another synchronization signal.   The signal processing apparatus according to claim 3, wherein a time width of the pulse is different for each corresponding color.   5. The signal processing apparatus according to claim 1, wherein the subsequent circuit has a function of processing image information output by the input / output unit in order of the color from the specific color. 6. Represents the image obtained by receiving and receiving the reflected light when light of a plurality of predetermined colors is irradiated in the color order in which the plurality of colors circulate with respect to the image area including the image on the recording medium. Generating means for generating image information in the color order;
The signal processing apparatus according to any one of claims 1 to 5, wherein the image information generated by the generation unit is a processing target.
An image reading apparatus. An image reading apparatus according to claim 6;
An image forming apparatus that forms an image based on image information output to the subsequent circuit by the input / output means in the signal processing apparatus included in the image reading apparatus;
An information processing apparatus including: Computer
The program for functioning as an input-output means in the signal processing apparatus of any one of Claims 1-5.

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