JP2015185991A - oscillator - Google Patents

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JP2015185991A
JP2015185991A JP2014059884A JP2014059884A JP2015185991A JP 2015185991 A JP2015185991 A JP 2015185991A JP 2014059884 A JP2014059884 A JP 2014059884A JP 2014059884 A JP2014059884 A JP 2014059884A JP 2015185991 A JP2015185991 A JP 2015185991A
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frequency
oscillation
circuit
oscillation signal
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JP6505371B2 (en
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渡辺　誠
Makoto Watanabe
渡辺　　誠
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Nihon Dempa Kogyo Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To obtain excellent phase noise characteristics, while reducing the number of components.SOLUTION: An oscillator includes an oscillation element 2, an oscillation circuit 3 outputting a first oscillation signal of first frequency by oscillating the oscillation element 2, a divider circuit 4 for outputting a second oscillation signal of second frequency by dividing the frequency of a first oscillation signal outputted from the oscillation circuit 3, and a multiplication circuit 5 for extracting a third oscillation signal of third frequency, that is a prescribed multiple of the second frequency, from the second oscillation signal outputted from the divider circuit 4.

Description

本発明は、異なる周波数の発振信号を出力可能な発振器に関するものである。   The present invention relates to an oscillator that can output oscillation signals having different frequencies.

従来、単一の周波数で発振する発振素子を用いて異なる周波数の発振信号を出力するために、ＰＬＬ回路が用いられている（例えば、特許文献１参照）。   Conventionally, a PLL circuit is used to output an oscillation signal having a different frequency using an oscillation element that oscillates at a single frequency (see, for example, Patent Document 1).

図３は、ＰＬＬ回路１００の構成例を示す図である。ＰＬＬ回路１００は、位相比較器１０１と、ループフィルタ１０２と、電圧制御発振器１０３と、分周器１０４とを備える。位相比較器１０１は、基準信号と、電圧制御発振器１０３が出力し、分周器１０４によって分周された信号との位相を比較し位相差を示す信号を出力する。ループフィルタ１０２は、位相差を示す信号から制御電圧を生成する。電圧制御発振器１０３は、制御電圧により発振信号の周波数を変化させる。   FIG. 3 is a diagram illustrating a configuration example of the PLL circuit 100. The PLL circuit 100 includes a phase comparator 101, a loop filter 102, a voltage controlled oscillator 103, and a frequency divider 104. The phase comparator 101 compares the phases of the reference signal and the signal output from the voltage controlled oscillator 103 and divided by the frequency divider 104, and outputs a signal indicating a phase difference. The loop filter 102 generates a control voltage from the signal indicating the phase difference. The voltage controlled oscillator 103 changes the frequency of the oscillation signal according to the control voltage.

ここで、電圧制御発振器１０３は、基準信号と、分周器１０４からの出力信号との位相差が小さくなるように制御される。分周器１０４は、電圧制御発振器１０３から出力された発振信号を分周して位相比較器１０１に出力する。このようにすることで、ＰＬＬ回路１００は、単一の周波数で発振する発振素子を用いて異なる周波数の発振信号を出力することができる。   Here, the voltage controlled oscillator 103 is controlled such that the phase difference between the reference signal and the output signal from the frequency divider 104 is small. The frequency divider 104 divides the oscillation signal output from the voltage controlled oscillator 103 and outputs it to the phase comparator 101. By doing so, the PLL circuit 100 can output oscillation signals having different frequencies using an oscillation element that oscillates at a single frequency.

特開２００５−２６０５９８号公報JP 2005-260598 A

ＰＬＬ回路１００では、分周器１０４における分周数の設定等が原因となってループフィルタのループ帯域が変化する。このループ帯域の変化は、ＰＬＬ回路１００における出力信号の周波数の可変帯域が広い場合には、位相雑音特性が劣化するといった問題がある。また、ＰＬＬ回路１００は、回路を構成する部品数が多いことから回路規模が大きくなり、小型化し難いという問題もある。   In the PLL circuit 100, the loop band of the loop filter changes due to the setting of the frequency division number in the frequency divider 104 or the like. This change in the loop band has a problem that the phase noise characteristic deteriorates when the variable band of the frequency of the output signal in the PLL circuit 100 is wide. In addition, the PLL circuit 100 has a problem that the circuit scale is large due to the large number of parts constituting the circuit and it is difficult to reduce the size.

そこで、本発明はこれらの点に鑑みてなされたものであり、部品点数を削減し、かつ、良好な位相雑音特性を得ることができる発振器を提供することを目的とする。   Accordingly, the present invention has been made in view of these points, and an object thereof is to provide an oscillator capable of reducing the number of components and obtaining good phase noise characteristics.

本発明の第１の態様の発振器は、第１周波数で発振する発振素子と、前記発振素子を発振させることにより前記第１周波数の第１発振信号を出力する発振回路と、前記発振回路から出力された前記第１発振信号の周波数を分周して第２周波数の第２発振信号を出力する分周回路と、前記分周回路から出力された前記第２発振信号から、前記第２周波数の所定倍数の第３周波数の第３発振信号を抽出して出力する逓倍回路と、を備える。   An oscillator according to a first aspect of the present invention includes an oscillation element that oscillates at a first frequency, an oscillation circuit that outputs the first oscillation signal at the first frequency by causing the oscillation element to oscillate, and an output from the oscillation circuit A frequency dividing circuit that divides the frequency of the first oscillation signal and outputs a second oscillation signal of a second frequency; and the second oscillation signal that is output from the frequency divider circuit, A multiplication circuit that extracts and outputs a third oscillation signal having a third frequency of a predetermined multiple.

本発明の第２の態様の発振器は、第１周波数で発振する発振素子と、前記発振素子を発振させることにより前記第１周波数の第１発振信号を出力する発振回路と、前記発振回路から出力された前記第１発振信号から、前記第１周波数の所定倍数の第４周波数の第４発振信号を抽出して出力する逓倍回路と、前記逓倍回路から出力された前記第４発振信号の周波数を分周して第３周波数の第３発振信号を出力する分周回路と、を備える。   An oscillator according to a second aspect of the present invention includes an oscillation element that oscillates at a first frequency, an oscillation circuit that outputs the first oscillation signal at the first frequency by oscillating the oscillation element, and an output from the oscillation circuit. A multiplier circuit for extracting and outputting a fourth oscillation signal having a fourth frequency that is a predetermined multiple of the first frequency, and a frequency of the fourth oscillation signal output from the multiplier circuit. A frequency-dividing circuit that divides and outputs a third oscillation signal having a third frequency.

上記の発振回路は、前記第１発振信号及び前記第３発振信号の少なくともいずれかを出力するか否かを切り替える出力切替部をさらに備えてもよい。   The oscillation circuit may further include an output switching unit that switches whether to output at least one of the first oscillation signal and the third oscillation signal.

本発明に係る水晶発振器によれば、部品点数を削減し、かつ、良好な位相雑音特性を得ることができるという効果を奏する。   According to the crystal oscillator according to the present invention, it is possible to reduce the number of components and to obtain good phase noise characteristics.

第１の実施形態の発振器の構成例を示す図である。It is a figure which shows the structural example of the oscillator of 1st Embodiment. 第２の実施形態の発振回路の構成例（その１）を示す図である。It is a figure which shows the structural example (the 1) of the oscillation circuit of 2nd Embodiment. 第２の実施形態の発振回路の構成例（その２）を示す図である。It is a figure which shows the structural example (the 2) of the oscillation circuit of 2nd Embodiment. 第２の実施形態の発振回路の構成例（その３）を示す図である。It is a figure which shows the structural example (the 3) of the oscillation circuit of 2nd Embodiment. 第２の実施形態の発振回路の構成例（その４）を示す図である。It is a figure which shows the structural example (the 4) of the oscillation circuit of 2nd Embodiment. ＰＬＬ回路の構成例を示す図である。It is a figure which shows the structural example of a PLL circuit.

＜第１の実施形態＞
［発振器１の回路構成］
図１は、第１の実施形態の発振器１の構成例を示す図である。
発振器１は、発振素子２と、発振回路３と、分周回路４と、逓倍回路５とを備える。
発振素子２は、例えば、ＡＴカットの水晶振動子であり、第１周波数で発振する。なお、発振素子２は、ＳＡＷ（Surface Acoustic Wave）共振子や、ＭＥＭＳ（Micro Electro Mechanical Systems）振動子であってもよい。 <First Embodiment>
[Circuit Configuration of Oscillator 1]
FIG. 1 is a diagram illustrating a configuration example of an oscillator 1 according to the first embodiment.
The oscillator 1 includes an oscillation element 2, an oscillation circuit 3, a frequency divider circuit 4, and a multiplier circuit 5.
The oscillation element 2 is, for example, an AT-cut crystal resonator and oscillates at a first frequency. The oscillation element 2 may be a SAW (Surface Acoustic Wave) resonator or a MEMS (Micro Electro Mechanical Systems) vibrator.

発振回路３は、発振素子２と接続されており、発振素子２を発振させることにより第１周波数の第１発振信号を出力する。発振回路３は、第１発振信号を第１出力端子１１（出力１）に出力するとともに分周回路４に出力する。   The oscillation circuit 3 is connected to the oscillation element 2 and outputs a first oscillation signal having a first frequency by causing the oscillation element 2 to oscillate. The oscillation circuit 3 outputs the first oscillation signal to the first output terminal 11 (output 1) and to the frequency divider circuit 4.

分周回路４は、発振回路３から出力された第１発振信号の周波数を分周して第２周波数の第２発振信号を出力する。例えば、分周回路４は、フリップフロップ回路を縦続に接続することにより、入力された第１発振信号の周波数を分周し、第２周波数の第２発振信号を出力する。ここで、分周回路４における分周比は整数であることとする。   The frequency dividing circuit 4 divides the frequency of the first oscillation signal output from the oscillation circuit 3 and outputs a second oscillation signal having a second frequency. For example, the frequency dividing circuit 4 divides the frequency of the input first oscillation signal by connecting the flip-flop circuits in cascade, and outputs the second oscillation signal having the second frequency. Here, the frequency dividing ratio in the frequency dividing circuit 4 is an integer.

逓倍回路５は、分周回路４から出力された第２発振信号から、第２周波数の所定倍数（例えば、整数倍）の第３周波数の高調波信号である第３発振信号を抽出して出力する。逓倍回路５は、高調波信号を発生させるために、例えばダイオード等により構成された整流回路を含んでもよい。逓倍回路５は、整流回路により整流された信号に含まれる高調波信号をフィルタで抽出する。逓倍回路５が、整流回路とフィルタとを含むことにより、第２発振信号に含まれる高調波成分が比較的小さい場合であっても、高調波信号を抽出することができる。逓倍回路５は、第３周波数の第３発振信号を第２出力端子１２（出力２）に出力する。   The multiplier circuit 5 extracts a third oscillation signal that is a harmonic signal of a third frequency of a predetermined multiple (for example, an integer multiple) of the second frequency from the second oscillation signal output from the frequency divider circuit 4 and outputs the third oscillation signal. To do. The multiplier circuit 5 may include a rectifier circuit configured by a diode or the like, for example, in order to generate a harmonic signal. The multiplier circuit 5 extracts a harmonic signal contained in the signal rectified by the rectifier circuit using a filter. Since the multiplier circuit 5 includes a rectifier circuit and a filter, a harmonic signal can be extracted even when the harmonic component included in the second oscillation signal is relatively small. The multiplier circuit 5 outputs a third oscillation signal having a third frequency to the second output terminal 12 (output 2).

なお、逓倍回路５は、複数のフィルタから構成されてもよい。この場合、逓倍回路５は、これらの複数のフィルタから一のフィルタを選択することにより、第３周波数を変更するようにしてもよい。   The multiplier circuit 5 may be composed of a plurality of filters. In this case, the multiplier circuit 5 may change the third frequency by selecting one filter from the plurality of filters.

また、逓倍回路５は、遅延素子とゲートＩＣとを組み合わせることによって第３周波数の第３発振信号を生成してもよい。具体的には、逓倍回路５は、第２発振信号を遅延素子で遅延させて遅延信号を発生させ、第２発振信号と遅延信号との排他的論理和をとることにより、第２発振信号よりも高い周波数の第３発振信号を生成する。逓倍回路５は、排他的論理和をとった後の信号をフィルタに通すことにより、第３周波数の第３発振信号を抽出してもよい。   The multiplier circuit 5 may generate the third oscillation signal having the third frequency by combining the delay element and the gate IC. Specifically, the multiplication circuit 5 delays the second oscillation signal with a delay element to generate a delay signal, and takes the exclusive OR of the second oscillation signal and the delay signal, thereby obtaining the second oscillation signal from the second oscillation signal. A third oscillation signal having a higher frequency is generated. The multiplier circuit 5 may extract the third oscillation signal of the third frequency by passing the signal after the exclusive OR is passed through a filter.

［第１の実施形態の効果］
以上、第１の実施形態によれば、分周回路４が、発振回路３から出力された第１発振信号の周波数を分周して第２周波数の第２発振信号を出力し、逓倍回路５が、当該第２発振信号から第２周波数の所定倍数の第３周波数の第３発振信号を抽出して出力する。ここで、逓倍回路５は、ＰＬＬ回路を用いることなく所定倍数の高調波のみを選択して出力する。よって、発振器１は、位相雑音を含まない発振信号を得ることができる。また、発振器１は、発振回路３と、分周回路４と、逓倍回路５とにより構成されることから、少ない部品点数で構成することができる。 [Effect of the first embodiment]
As described above, according to the first embodiment, the frequency divider 4 divides the frequency of the first oscillation signal output from the oscillation circuit 3 and outputs the second oscillation signal of the second frequency, and the frequency multiplier 5 Extracts a third oscillation signal having a third frequency that is a predetermined multiple of the second frequency from the second oscillation signal and outputs the third oscillation signal. Here, the multiplier circuit 5 selects and outputs only the harmonics of a predetermined multiple without using a PLL circuit. Therefore, the oscillator 1 can obtain an oscillation signal that does not include phase noise. Further, since the oscillator 1 includes the oscillation circuit 3, the frequency dividing circuit 4, and the multiplication circuit 5, it can be configured with a small number of parts.

なお、本実施形態では、分周回路４の後段に逓倍回路５を接続したが、これに限らず、逓倍回路５の後段に分周回路４を接続してもよい。この場合、逓倍回路５は、発振回路３から出力された第１周波数の第１発振信号から、第１周波数の所定倍数の第４周波数の第４発振信号を抽出して出力し、分周回路４は、逓倍回路５から出力された第４発振信号の第４周波数を分周して第３周波数の第３発振信号を出力する。   In the present embodiment, the multiplier circuit 5 is connected to the subsequent stage of the frequency divider circuit 4. However, the present invention is not limited to this, and the frequency divider circuit 4 may be connected to the subsequent stage of the multiplier circuit 5. In this case, the frequency multiplier 5 extracts and outputs a fourth oscillation signal having a fourth frequency that is a predetermined multiple of the first frequency, from the first oscillation signal having the first frequency output from the oscillation circuit 3, and outputs the fourth oscillation signal. 4 divides the fourth frequency of the fourth oscillation signal output from the multiplier circuit 5 and outputs a third oscillation signal of the third frequency.

逓倍回路５が整流回路を有している場合、第１発振信号が正弦波に近い信号で高調波成分の信号レベルが低い場合であっても、逓倍回路５は、発振回路３が出力する第１発振信号を整流することにより、第１周波数の所定倍数の第４周波数の第４発振信号を抽出することができる。   When the multiplier circuit 5 has a rectifier circuit, even if the first oscillation signal is a signal close to a sine wave and the signal level of the harmonic component is low, the multiplier circuit 5 outputs the first output from the oscillation circuit 3. By rectifying one oscillation signal, a fourth oscillation signal having a fourth frequency that is a predetermined multiple of the first frequency can be extracted.

＜第２の実施形態＞
続いて、第２の実施形態について説明する。
図２Ａ〜図２Ｄは、第２の実施形態の発振器１の構成例を示す図である。
第２の実施形態の発振器１は、第１発振信号及び第３発振信号の少なくともいずれかを出力するか否かを切り替える点で第１の実施形態と異なる。 <Second Embodiment>
Next, the second embodiment will be described.
2A to 2D are diagrams illustrating a configuration example of the oscillator 1 according to the second embodiment.
The oscillator 1 according to the second embodiment is different from the first embodiment in that it switches whether to output at least one of the first oscillation signal and the third oscillation signal.

図２Ａ〜図２Ｄに示す発振器１では、それぞれ、第１発振信号及び第３発振信号の少なくともいずれかを出力するか否かを切り替える出力切替部としてのスイッチ６が設けられている。このスイッチ６は、例えば外部からの信号入力に応じて、オン、オフを切り替える。   In the oscillator 1 shown in FIGS. 2A to 2D, a switch 6 is provided as an output switching unit that switches whether to output at least one of the first oscillation signal and the third oscillation signal. The switch 6 is switched on and off in accordance with, for example, an external signal input.

具体的には、図２Ａでは、スイッチ６は、逓倍回路５の出力側と、第２出力端子１２との間に設けられている。これにより、スイッチ６は、逓倍回路５から出力される第３周波数の第３発振信号の出力を行うか否かを切り替える。   Specifically, in FIG. 2A, the switch 6 is provided between the output side of the multiplier circuit 5 and the second output terminal 12. Thereby, the switch 6 switches whether to output the third oscillation signal of the third frequency output from the multiplier circuit 5.

図２Ｂでは、スイッチ６は、発振回路３の出力側と第１出力端子１１との間、及び逓倍回路５の出力側と第２出力端子１２との間にそれぞれ設けられている。これにより、スイッチ６は、第１周波数の第１発振信号及び第３周波数の第３発振信号のそれぞれについて出力を行うか否かを切り替える。   In FIG. 2B, the switch 6 is provided between the output side of the oscillation circuit 3 and the first output terminal 11 and between the output side of the multiplier circuit 5 and the second output terminal 12. Accordingly, the switch 6 switches whether to output each of the first oscillation signal having the first frequency and the third oscillation signal having the third frequency.

図２Ｃでは、発振器１は、発振回路３からの出力端子として第１出力端子１１と第３出力端子１３とを備えている。スイッチ６は、発振回路３の出力側と第３出力端子１３との間、及び逓倍回路５の出力側と第２出力端子１２との間に設けられている。これにより、発振器１は、第１周波数の第１発振信号を出力させるとともに、スイッチ６により、第１発振信号及び第３発振信号についてさらに出力を行うか否かを切り替えることができる。   In FIG. 2C, the oscillator 1 includes a first output terminal 11 and a third output terminal 13 as output terminals from the oscillation circuit 3. The switch 6 is provided between the output side of the oscillation circuit 3 and the third output terminal 13 and between the output side of the multiplier circuit 5 and the second output terminal 12. Thus, the oscillator 1 can output the first oscillation signal having the first frequency and can switch whether or not to further output the first oscillation signal and the third oscillation signal by the switch 6.

図２Ｄでは、発振器１は、図２Ｃと同様に、発振回路３からの出力端子として第１出力端子１１と第３出力端子１３とを備えている。スイッチ６は、発振回路３の出力側と第３出力端子１３との間、及び逓倍回路５の出力側と第３出力端子１３との間に設けられており、第３出力端子１３に、第１発振信号及び第３発振信号のいずれを出力するか切り替える。これにより、発振器１は、第１周波数の第１発振信号及び第３周波数の第３発振信号を出力させるとともに、第１発振信号及び第３発振信号のそれぞれについてさらに出力を行うか否かを切り替えることができる。   2D, the oscillator 1 includes a first output terminal 11 and a third output terminal 13 as output terminals from the oscillation circuit 3, as in FIG. 2C. The switch 6 is provided between the output side of the oscillation circuit 3 and the third output terminal 13 and between the output side of the multiplier circuit 5 and the third output terminal 13. Switch between outputting one oscillation signal and third oscillation signal. As a result, the oscillator 1 outputs the first oscillation signal having the first frequency and the third oscillation signal having the third frequency, and switches whether to further output each of the first oscillation signal and the third oscillation signal. be able to.

［第２の実施形態の効果］
以上、第２の実施形態によれば、発振器１は、スイッチ６をさらに備えることにより、第１発振信号及び第３発振信号を出力するか否かを切り替えることができる。 [Effects of Second Embodiment]
As described above, according to the second embodiment, the oscillator 1 can further switch whether to output the first oscillation signal and the third oscillation signal by further including the switch 6.

以上、本発明を実施の形態を用いて説明したが、本発明の技術的範囲は上記実施の形態に記載の範囲には限定されない。上記実施の形態に、多様な変更又は改良を加えることが可能であることが当業者に明らかである。そのような変更又は改良を加えた形態も本発明の技術的範囲に含まれ得ることが、特許請求の範囲の記載から明らかである。   As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

１・・・発振器、
２・・・発振素子、
３・・・発振回路、
４・・・分周回路、
５・・・逓倍回路、
６・・・スイッチ 1 ... Oscillator,
2 ... oscillator,
3 ... Oscillator circuit,
4 ... frequency divider,
5 ... multiplication circuit,
6 ... Switch

Claims (3)

第１周波数で発振する発振素子と、
前記発振素子を発振させることにより前記第１周波数の第１発振信号を出力する発振回路と、
前記発振回路から出力された前記第１発振信号の周波数を分周して第２周波数の第２発振信号を出力する分周回路と、
前記分周回路から出力された前記第２発振信号から、前記第２周波数の所定倍数の第３周波数の第３発振信号を抽出して出力する逓倍回路と、
を備える、
発振器。 An oscillation element that oscillates at a first frequency;
An oscillation circuit that outputs the first oscillation signal of the first frequency by causing the oscillation element to oscillate;
A frequency dividing circuit that divides the frequency of the first oscillation signal output from the oscillation circuit and outputs a second oscillation signal of a second frequency;
A multiplier for extracting and outputting a third oscillation signal having a third frequency that is a predetermined multiple of the second frequency from the second oscillation signal output from the frequency divider;
Comprising
Oscillator. 第１周波数で発振する発振素子と、
前記発振素子を発振させることにより前記第１周波数の第１発振信号を出力する発振回路と、
前記発振回路から出力された前記第１発振信号から、前記第１周波数の所定倍数の第４周波数の第４発振信号を抽出して出力する逓倍回路と、
前記逓倍回路から出力された前記第４発振信号の周波数を分周して第３周波数の第３発振信号を出力する分周回路と、
を備える、
発振器。 An oscillation element that oscillates at a first frequency;
An oscillation circuit that outputs the first oscillation signal of the first frequency by causing the oscillation element to oscillate;
A multiplier circuit for extracting and outputting a fourth oscillation signal having a fourth frequency that is a predetermined multiple of the first frequency from the first oscillation signal output from the oscillation circuit;
A frequency dividing circuit that divides the frequency of the fourth oscillation signal output from the multiplication circuit and outputs a third oscillation signal having a third frequency;
Comprising
Oscillator. 前記第１発振信号及び前記第３発振信号の少なくともいずれかを出力するか否かを切り替える出力切替部をさらに備える、
請求項１又は２に記載の発振器。
An output switching unit that switches whether or not to output at least one of the first oscillation signal and the third oscillation signal;
The oscillator according to claim 1 or 2.
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