JP2015185856A - time voltage converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a time voltage converter capable of measuring a measured signal, having a minute pulse width time or period, with high accuracy even if the measuring time is very short.SOLUTION: A time voltage converter outputting the time, when a measured signal VIN changes from a first voltage to a second voltage, while converting into a voltage includes a first charging circuit 11 for charging a first capacitor C1 with a first constant current, when the measured signal reaches the first voltage, a second charging circuit 12 for charging a second capacitor C2 with a second constant current, when the measured signal reaches the second voltage, and a differential voltage detector OP for detecting the differential voltage between the voltage of the first capacitor and the voltage of the second capacitor upon elapsing a predetermined time after the measured signal has reached the second voltage, and outputting a voltage corresponding to the time required for the measured signal to reach the second voltage from the first voltage.

Description

  The present invention relates to a time-voltage converter that converts a pulse width time or period of a digital signal into a voltage value proportional to its length.

  Conventionally, a technique for measuring the pulse width and cycle of a digital signal using a time-voltage converter is known. For example, in the time-voltage converter disclosed in Patent Document 1, charging of the capacitor by the constant current source is started in synchronization with the rising edge of the signal under measurement, and charging is ended in synchronization with the falling edge.

  A delay circuit is inserted to mask a portion of the non-linear region that occurs when the switch for charging / discharging the capacitor is turned off (when charging is started). Thus, by excluding the non-linear region and charging the capacitor only in the period of the linear region, a good time-voltage conversion characteristic can be obtained.

  Moreover, as a similar technique, Patent Document 2 discloses a minute time enlarging apparatus for enlarging and measuring a minute time. The minute time expansion device includes an integration circuit using two operational amplifiers synchronized with the rising and falling edges of the input signal, and makes a difference in the rate of change of the output voltage of the two integration circuits so that the two signals The output of the comparator that receives is inverted. As a result, the pulse width is expanded by the expansion rate α, and the expansion rate α can be obtained from the start voltage, resistance value, and capacitance value of the two integrators.

JP 2004-179951 A JP-A-62-249094

  By the way, measurement of a minute time on the order of several tens ns to several hundreds ns such as a digital signal changing at high speed or a switching time of a semiconductor element cannot be measured or sufficient measurement accuracy cannot be obtained due to time resolution. If the switching waveform is to be sampled, the switching waveform must be sampled at about 10 times, that is, 1 GHz or more in order to measure with high accuracy, which is difficult for a general-purpose device.

In Patent Document 1, after passing a signal under measurement through a delay circuit, charging is started or terminated by a constant current circuit and a capacitor in synchronization with the rising or rising, and the voltage difference between the capacitors is read.
However, when the measurement time is very short, the voltage difference becomes very small and it is difficult to measure with high accuracy. Moreover, in patent document 1, it uses exclusively for the measurement of the pulse width time and period of a digital signal.

  Further, in Patent Document 2, a minute time is enlarged by an enlargement factor α using an integrator using two operational amplifiers, and the minute time is measured by a circuit constant of the integrator. In this technique, the time is calculated based on the point where the output voltages of the two integrators coincide with each other, and the voltage difference is not used. Therefore, since it is necessary to match (cross) the output voltages, there is a problem that it takes a long time to increase the voltage difference in order to improve the measurement accuracy.

  An object of the present invention is to provide a time-voltage converter capable of measuring a signal under measurement having a minute pulse width time or period even with a very short measurement time with high accuracy.

  The present invention utilizes the good matching of the elements in the integrated circuit and produces a good time-voltage converter by building all the circuits in the integrated circuit. That is, the time-voltage converter of the present invention is a time-voltage converter that converts the time when the signal under measurement changes from the first voltage to the second voltage into a voltage and outputs the voltage, and the signal under measurement becomes the first voltage. A first charging circuit that charges the first capacitor with a first constant current when the second signal reaches, and a second charging circuit that charges the second capacitor with a second constant current when the signal under measurement reaches the second voltage And a difference voltage between the voltage of the first capacitor and the voltage of the second capacitor is detected after a predetermined time has elapsed after the signal under measurement reaches the second voltage, and the signal under measurement changes from the first voltage to the second voltage. A differential voltage detector that outputs a voltage corresponding to the time until

  According to the present invention, a signal under measurement having a minute pulse width time or period can be measured with high accuracy even if the measurement time is very short.

It is a circuit diagram which shows the structure of the time-voltage converter of Example 1 of this invention. It is a timing chart for demonstrating operation | movement of the time-voltage converter of Example 1 of this invention. It is a circuit diagram which shows the structure of the time-voltage converter of Example 2 of this invention. It is a circuit diagram which shows the structure of the time-voltage converter of Example 3 of this invention. It is a timing chart for demonstrating operation | movement of the time-voltage converter of Example 3 of this invention. It is a circuit diagram which shows the structure of the time voltage converter of the modification of Example 3 of this invention. It is a timing chart explaining operation | movement of the time voltage converter of the modification of Example 3 of this invention.

  Hereinafter, a time-voltage converter according to an embodiment of the present invention will be described in detail with reference to the drawings.

  1 is a circuit diagram showing a configuration of a time-voltage converter according to a first embodiment of the present invention. This time-voltage converter includes a first charging circuit 11, a second charging circuit 12, and an operational amplifier OP. The operational amplifier OP corresponds to the differential voltage detector of the present invention.

  The first charging circuit 11 includes a first reference power supply E1, a first comparator CMP1, a first counter 21, a first current source I1, a first switching element SW1, and a first capacitor C1. The first comparator CMP1 corresponds to the first voltage comparator of the present invention.

  The first reference power supply E1 generates a first reference voltage Vref1 and outputs it to the non-inverting input terminal of the first comparator CMP1. The first reference voltage Vref1 is, for example, a voltage that is 10% of the high-level voltage of the signal under measurement VIN input from the outside.

  The first comparator CMP1 compares the signal under measurement VIN input from the outside to the inverting input terminal and the first reference voltage Vref1 input from the first reference power source E1 to the non-inverting input terminal, and compares the voltage of the signal under measurement VIN. Outputs an L level from the output terminal when becomes higher than the first reference voltage Vref1.

The first counter 21 is composed of, for example, a k divider (k is a positive integer). The first counter 21 is added as necessary, and starts counting when the voltage of the signal under measurement VIN becomes larger than the first reference voltage Vref1 and the L level is output from the first comparator CMP1.
When the first counter 21 counts a predetermined number, the first counter 21 outputs a signal to that effect to the first switching element SW1 to turn on the first switching element SW1. By adjusting the count value of the first counter 21, the voltage charged in the first capacitor C1 can be adjusted.

  The first current source I1 supplies a direct current to one end of the first switching element SW1. The first capacitor C1 is charged by a direct current supplied from the first current source I1 via the first switching element SW1.

  The first switching element SW1 is made of, for example, a MOSFET. One end of the first switching element SW1 is connected to the first current source I1, the other end is connected to one end of the first capacitor C1, and the control terminal is connected to the output terminal of the first counter 21. The first switching element SW1 is turned on / off according to a signal supplied to the control terminal.

  The first capacitor C1 is charged by a direct current supplied from the first current source I1 via the first switching element SW1. The voltage of the first capacitor C1 is supplied to the inverting input terminal of the operational amplifier OP.

  The second charging circuit 12 includes a second reference power supply E2, a second comparator CMP2, a second counter 22, a second current source I2, a second switching element SW2, and a second capacitor C2. The second comparator CMP2 corresponds to the second voltage comparator of the present invention.

  The second reference power supply E2 generates a second reference voltage Vref2 and supplies it to the non-inverting input terminal of the second comparator CMP2. The second reference voltage Vref2 is, for example, 90% of the voltage at the high level of the signal under measurement VIN input from the outside.

  The second comparator CMP2 compares the signal under measurement VIN supplied from the outside to the inverting input terminal and the second reference voltage Vref2 supplied from the second reference power source E2 to the terminal non-invertedly, and compares the signal under measurement VIN When the voltage becomes higher than the second reference voltage Vref2, the L level is output from the output terminal.

  The second counter 22 is composed of, for example, a k frequency divider. The second counter 22 is added as necessary, and starts counting when the voltage of the signal under measurement VIN becomes larger than the second reference voltage Vref2 and the L level is output from the second comparator CMP2. When the second counter 22 counts a predetermined number, the second counter 22 outputs a signal to that effect to the second switching element SW2 to turn on the second switching element SW2. By adjusting the count value of the second counter 22, the voltage charged in the second capacitor C2 can be adjusted.

  The second current source I2 supplies a direct current to one end of the second switching element SW2. The second capacitor C2 is charged with a direct current supplied from the second current source I2 via the second switching element SW2.

  The second switching element SW2 is made of, for example, a MOSFET. One end of the second switching element SW2 is connected to the second current source I2, the other end is connected to one end of the second capacitor C2, and the control terminal is connected to the output terminal of the second counter 22. The second switching element SW2 is turned on / off according to a signal supplied to the control terminal.

  The second capacitor C2 is charged with a direct current supplied from the second current source I2 via the second switching element SW2. The voltage of the second capacitor C2 is supplied to the non-inverting input terminal of the operational amplifier OP.

  The operational amplifier OP calculates a difference voltage ΔV between the voltage of the first capacitor C1 and the voltage of the second capacitor C2, and changes the difference voltage ΔV from the first reference voltage Vref1 to the second reference voltage Vref2. A voltage corresponding to time is output from the output terminal OUT. At this time, the operational amplifier OP amplifies and outputs the differential voltage ΔV. Thereby, the noise margin of the precision at the time of converting a voltage (difference voltage (DELTA) V) into time can be improved.

In such a configuration, by changing the current value from the first current source I1 and the capacitance value of the first capacitor C1, a charging characteristic of the first capacitor C1, more specifically, a straight line indicating a change in voltage at the time of charging. The inclination can be changed. Similarly, by changing the current value from the second current source I2 and the capacitance value of the first capacitor C1, the charging characteristic of the second capacitor C2, more specifically, the slope of the straight line indicating the change in voltage during charging is changed. Can be made.
Therefore, for example, if the slope of the straight line indicating the charging characteristic of the second capacitor C2 is made smaller than the slope of the straight line indicating the charging characteristic of the first capacitor C1, a large difference voltage ΔV can be obtained. With this configuration, noise resistance can be improved and sensitivity can be improved.

  Moreover, the 1st charging circuit 11 and the 2nd charging circuit 12 can be produced in one integrated circuit. In this case, since the characteristics of both are very close, the characteristics of the pair are improved, and various errors resulting from the difference in characteristics can be eliminated.

  For example, by creating the first charging circuit 11 and the second charging circuit 12 in one integrated circuit, the output error for each input of the first comparator CMP1 and the second comparator CMP2 becomes substantially the same, Since the difference voltage ΔV is calculated in this state, the error is removed from the difference voltage ΔV. Therefore, a time voltage converter that operates accurately can be realized by using two comparators.

  Next, the operation of the time-voltage converter of Example 1 configured as described above will be described with reference to the timing chart shown in FIG. In the first embodiment, a signal under measurement VIN input as a switching waveform from the outside is detected using two threshold values (for example, 10% and 90%) determined by two comparators, and the detected time difference (Δt) ) Is converted into a voltage difference (ΔV), and the switching time is indirectly measured by referring to the voltage difference (ΔV).

Conversion from the time difference (Δt) to the voltage difference (ΔV) is performed as follows. As shown in FIG. 2, when the voltage of the signal under measurement VIN rises and becomes greater than the first reference voltage Vref1 (10%), the output of the first comparator CMP1 is connected to the control terminal of the first switching element SW1 via the first counter 21. Is output. As a result, a current is supplied from the first current source I1 to the first capacitor C1 via the first switching element SW1, and charging is started and the voltage rises as indicated by C1 in FIG.
The charging of the first capacitor C1 is stopped after the time ta ′ has elapsed, for example, after 10 μs has elapsed. In FIG. 2, times td and td ′ are delay times generated at the outputs of the first comparator CMP1 and the second comparator CMP2, respectively, when the signal under measurement VIN rises and falls.

Similarly, when the voltage of the signal under measurement VIN further rises and becomes larger than the second reference voltage Vref2 (90%), the output of the second comparator CMP2 is controlled by the second switching element SW2 via the second counter 22. Supplied to the terminal. As a result, a current is supplied from the second current source I2 to the second capacitor C2 via the second switching element SW2, and charging is started and the voltage rises as indicated by C2 in FIG.
The charging of the second capacitor C2 is stopped after the time tb ′ has elapsed. The stop of charging of the second capacitor C2 may be configured, for example, at the same timing as the stop of charging of the first capacitor C1.

  When charging of the first capacitor C1 and the second capacitor C2 is stopped, the operational amplifier OP calculates a voltage difference between the voltage of the first capacitor C1 and the voltage of the second capacitor C2, and the signal under measurement VIN is the first signal to be measured. The voltage is output from the output terminal OUT as a voltage corresponding to the time changing from the reference voltage Vref1 to the second reference voltage Vref2.

The difference voltage between the voltage of the first capacitor C1 and the voltage of the second capacitor C2 is amplified by the operational amplifier OP. In order to increase the difference voltage, the ratio of the value of the first constant current from the first current source I1 to the value of the second constant current from the second current source I2 is 1: 1 / M (M is 1). It can be set to an integer of the above. Further, the ratio between the capacity of the first capacitor C1 and the capacity of the second capacitor C2 may be set to 1: M.
In this way, by setting the values of the first constant current and the second constant current, or the capacitances of the first capacitor C1 and the second capacitor C2, the second constant is obtained from the slope of the straight line indicating the charging characteristics of the first capacitor C1. Since the slope of the straight line indicating the charging characteristics of the capacitor C2 becomes small, a large difference voltage ΔV can be obtained. As a result, noise resistance can be improved and sensitivity can be improved.

  Now, the current value from the first current source I1 is i1, the current value from the second current source I2 is i2, the capacitance value of the first capacitor C1 is c1, and the capacitance value of the second capacitor C2 is c2.

  When charging of the first capacitor C1 and the second capacitor C2 is started, the voltage V1 ′ of the first capacitor C1 and the voltage V2 ′ of the second capacitor C2 at an arbitrary time t are expressed by the following equations (1) and (2 ) Expression.

  Here, the first comparator CMP1 is inverted and charging of the first capacitor C1 is started by the first constant current i1 from the first current source I1, and after the time Δt, the second comparator CMP2 is inverted and the second current The voltage of the first capacitor C1 and the voltage of the second capacitor C2 after the time T has elapsed since the charging of the second capacitor C2 is started by the second constant current i2 from the source I2 and the first comparator CMP1 is inverted. Consider the case of reading the difference.

  The voltage V1 'of the first capacitor C1 and the voltage V2' of the second capacitor C2 after the time T has elapsed are expressed by the following equations (3) and (4), respectively.

  Here, if i1 = I, i2 = I / m, c1 = C, and c2 = nC, the voltage difference ΔV between the voltage V1 ′ and the voltage V2 ′ is expressed by the following equation (5). The ratios m and n are arbitrary positive numbers.

  As can be seen from the equation (5), the voltage difference ΔV can be increased by increasing the time T and the ratios m and n. Here, if m = n = 1, the following equation (6) is obtained.

  If a delay circuit is provided as shown in Patent Document 1 so as to avoid the non-linear region and perform measurement in the linear region, the measurement accuracy can be further improved.

  Further, in order to increase the time T, higher-order frequency divider circuits can be used as the first counter 21 and the second counter. The time voltage converter described above is effective in all of analog, mixed signal, and digital ICs.

  The second embodiment of the present invention is a more specific embodiment of the first embodiment. FIG. 3 is a circuit diagram illustrating a configuration of the time-voltage converter according to the second embodiment of the present invention. Note that the same portions as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

  In the time voltage converter according to the second embodiment, unlike the time voltage converter according to the first embodiment, two signals under measurement, that is, a signal under measurement VIN1 and a signal under measurement VIN2 are input from the outside.

  The first counter 21 of the first charging circuit 11 includes a filter configured by an inverter having a resistor, a capacitor, and a Schmitt trigger characteristic, and a frequency dividing circuit that divides the output of the filter in synchronization with the clock CLK. ing. The filter removes noise included in the signal from the first comparator CMP1, and supplies the noise to the frequency dividing circuit. The frequency divider circuit divides the signal from the filter and supplies it to the control terminal of the first switching element SW1. The delay time of the signal by the first counter 21 is included in the response delay times td and td 'of the first comparator CMP1.

  The second counter 22 of the second charging circuit 12 includes a filter configured by an inverter having a resistor, a capacitor, and a Schmitt trigger characteristic, and a frequency dividing circuit that divides the output of the filter in synchronization with the clock CLK. ing. The filter removes noise included in the signal from the second comparator CMP2, and supplies the noise to the frequency dividing circuit. The frequency divider circuit divides the signal from the filter and supplies it to the control terminal of the second switching element SW2. The delay time of the signal by the second counter 22 is included in the response delay times td and td 'of the second comparator CMP2.

  The differential amplifier circuit 13 amplifies the voltage difference ΔV between the voltage from the first charging circuit 11 and the voltage from the second charging circuit 12. The differential amplifier circuit 13 is configured by adding four resistors to the operational amplifier OP of the first embodiment, and corresponds to the differential voltage detector of the present invention. In other words, the inverting input terminal of the operational amplifier OP included in the differential amplifier circuit 13 is connected to one end of the first capacitor C1 through the resistor R1, and is connected to the output terminal of the operational amplifier OP through the resistor R3. The non-inverting input terminal of the operational amplifier OP is connected to one end of the second capacitor C2 through the resistor R2, and is grounded through the resistor R4.

  Here, assuming that R1 = R3 and R2 = R4 and the amplification factor of the differential amplifier circuit 13 is R2 / R1, the difference voltage ΔV can be obtained by the following equation (7).

  The operation of the time voltage converter according to the second embodiment is the same as the operation of the time voltage converter according to the first embodiment except that two signals to be measured, ie, a signal under measurement VIN1 and a signal under measurement VIN2, are input from the outside. Therefore, the description thereof is omitted here.

  The time voltage converter according to the second embodiment configured as described above operates in the same manner as the time voltage converter according to the first embodiment, and the same effect can be obtained. Further, since a plurality of signals under measurement can be input from the outside, there is an advantage that the versatility is superior to that of the first embodiment.

  In the time-voltage converter of the second embodiment, the input terminals of the measured signal VIN1 and the measured signal VIN2 may be connected to measure one measured signal as in the first embodiment. .

  The time-voltage converter according to the third embodiment of the present invention includes two charging circuits in the first and second embodiments, and includes N charging circuits (N is an integer of 3 or more). Has been.

FIG. 4 is a circuit diagram showing a configuration of the time-voltage converter according to the third embodiment of the present invention. This time-voltage converter includes N first charging circuits 11 to N-th charging circuit 1 N and a differential amplifier circuit 13. The configuration of each of the N first charging circuits 11 to 1N charging circuits 1N is the same as the configuration of the first charging circuit 11 or the second charging circuit 12 of the time-voltage converter of the first or second embodiment. . The voltages V _{1 to} V _N output from the first charging circuit 11 to the Nth charging circuit 1 N are output to the differential amplifier circuit 13.

  In the present invention, when one of the N first charging circuits 11 to Nth charging circuit 1N is expressed, jth charging circuit 1j (j = 1, 2,..., N) and Represent. In this case, the reference voltage used for comparison with the signal under measurement is indicated as the jth voltage, the constant current for charging is indicated as the jth constant current, and the capacitor to be charged is indicated as the jth capacitor. The charging circuit adjacent to the jth charging circuit 1j (next to the direction in which the suffix increases) is expressed as the j + 1th charging circuit, the reference voltage is the j + 1th voltage, the constant current is the j + 1th constant current, and the capacitor is the j + 1th capacitor. Respectively.

The differential amplifier circuit 13 corresponds to the differential voltage detection unit of the present invention, detects a differential voltage ΔV ₁₂ between the voltage V ₁ from the first charging circuit 11 and the voltage V ₂ from the second charging circuit 12, and outputs it. Output from terminal OUT1. Similarly, a difference voltage ΔV ₂₃ between the voltage V ₂ from the second charging circuit 12 and the voltage V ₃ from the third charging circuit 13 is detected and output from the output terminal OUT2. Detects a difference voltage in the same manner, finally, the (N-1) charging circuit the differential voltage [Delta] V _N-1N detection of the voltage V _N-1 and the voltage V _N from the N charging circuit 1N from 1N-1 And output from the output terminal OUTN-1.

Next, the operation of the time-voltage converter according to the third embodiment of the present invention will be described. FIG. 5 is a timing chart for explaining the operation of the time-voltage converter according to the third embodiment. FIG. 5 shows an example of the operation of the time-voltage converter in the case of having five charging circuits. When the signal under measurement VIN changes as shown in FIG. 5, the first comparator CMP <b> 1 to the fifth comparator CMP <b> 5 trip at time t _{1 to} t ₅ , and supply the voltages V _{1 to} V ₅ to the differential amplifier circuit 13. To do.
As a result, the differential voltage ΔV ₁₂ between the voltage V ₁ and the voltage V ₂ is output to the output terminal OUT ₁ of the differential amplifier circuit 13. Similarly, a differential voltage ΔV ₂₃ s between the voltage V ₂ and the voltage V ₃ is output to the output terminal OUT2 of the differential amplifier circuit 13, and a differential voltage between the voltage V ₃ and the voltage V ₄ is output to the output terminal OUT3. ΔV ₃₄ is output, and a difference voltage ΔV ₄₅ between the voltage V ₄ and the voltage V ₅ is output to the output terminal OUT4.

As described above, according to the time-voltage converter of the third embodiment, it is possible to continuously detect the difference voltage at two adjacent times of the signal under measurement that continuously changes, and thus the time of a plurality of sections of the signal under measurement is determined. Can be measured simultaneously.
Further, the differential amplifier 13 can be combined to detect a difference voltage between arbitrary charging circuits, and a differential amplifier may be added as necessary. That is, the differential amplifier circuit 13 determines the voltage of the jth capacitor after the predetermined time has elapsed after the signal under measurement reaches the j + x voltage (x = 2, 3,..., N) from the jth voltage. A difference voltage from the voltage of the j + x capacitor may be detected and output as a voltage corresponding to the time from the jth to j + x sections of the signal under measurement.

  Further, the signal under measurement may be composed of two or more signals under measurement j. In this case, a jth charging circuit that charges the jth capacitor with the jth constant current when each of the plurality of signals under measurement j reaches the jth voltage (j = 1, 2,..., N). Prepare. The differential amplifier circuit 13 determines the voltage of the jth capacitor after a predetermined time has elapsed since the plurality of signals under measurement j have reached the j + x voltage (x = 2, 3,..., N) from the jth voltage. And the voltage of the j + x capacitor may be detected and output as a voltage corresponding to the time from the jth to j + x intervals of the signal under measurement.

(Modification of Example 3)
Next, a modification of the third embodiment will be described. FIG. 6 is a circuit diagram illustrating a configuration of a time-voltage converter according to a modification of the third embodiment of the present invention. The same parts as those in the third embodiment are denoted by the same reference numerals and the description thereof is omitted.

  In addition, although the example provided with four charging circuits is shown in the modification of Example 3, the number of charging circuits is not limited to four and is arbitrary. The modified time voltage converter is configured by adding a control circuit 14 and a reference voltage source 15 to the configuration of the third embodiment.

  The control circuit 14 sets the reference voltages to be supplied to the first comparator CMP1 to the fourth comparator CMP4 to the voltages Vref1 to Vref4 in a range where the signal under measurement VIN gradually increases, and the first comparator within a range where the signal under measurement VIN decreases gradually. A threshold switching signal is generated so as to set the reference voltage to be applied to the CMP1 to the fourth comparator CMP4 to the voltages Vref5 to Vref8, and is output to the reference voltage source 15.

  The reference voltage source 15 supplies the reference voltages Vref1 to Vref4 or the reference voltages Vref5 to Vref8 to the non-inverting input terminals of the first comparator CMP1 to the fourth comparator CMP4 in response to a threshold switching signal from the control circuit 14.

  Moreover, in order to avoid complication of drawing, although each range of the 1st charging circuit 11-the 4th charging circuit 14 is not illustrated, each charging circuit is comprised as follows.

  That is, the first charging circuit 11 includes a part of the reference voltage source 15, the first comparator CMP1, the first counter 21, a part of the control circuit 14, the first current source I1, the first switching element SW1, and the first capacitor C1. It is composed of The second charging circuit 12 includes a part of the reference voltage source 15, a second comparator CMP2, a second counter 22, a part of the control circuit 14, a second current source I2, a second switching element SW2, and a second capacitor C2. Has been.

  Similarly, the third charging circuit 13 includes a part of the reference voltage source 15, a third comparator CMP3, a third counter 23, a part of the control circuit 14, a third current source I3, a third switching element SW3, and a third capacitor. C3. The fourth charging circuit 14 includes a part of the reference voltage source 15, a fourth comparator CMP4, a fourth counter 24, a part of the control circuit 14, a fourth current source I4, a fourth switching element SW4, and a fourth capacitor C4. Has been.

Next, the operation of the time voltage converter according to the modification of the third embodiment of the present invention will be described. FIG. 7 is a timing chart for explaining the operation of the time-voltage converter according to the modification of the third embodiment.
When the signal under measurement VIN changes as shown in FIG. 7, in the range where the signal under measurement VIN gradually increases, the first comparator CMP1 to the fourth comparator CMP4 trip at times t _{1 to} t ₄ , respectively, and the voltages V _{1 to} V ₄ is supplied to the differential amplifier circuit 13.
As a result, the differential voltage ΔV ₁₂ between the voltage V ₁ and the voltage V ₂ is output to the output terminal OUT ₁ of the differential amplifier circuit 13. Similarly, a differential voltage ΔV ₂₃ between the voltage V ₂ and the voltage V ₃ is output to the output terminal OUT2 of the differential amplifier circuit 13, and a differential voltage ΔV between the voltage V ₃ and the voltage V ₄ is output to the output terminal OUT3. ₃₄ is output.

On the other hand, in a range where the measured signal VIN is gradually reduced, the first comparator CMP1~ fourth comparator CMP4 trips each at time t ₅ ~t _8, supplies a voltage V ₅ ~V ₈ to the differential amplifier circuit 13.
As a result, the differential voltage ΔV ₅₆ between the voltage V ₅ and the voltage V ₆ is output to the output terminal OUT 1 of the differential amplifier circuit 13. Similarly, a differential voltage ΔV ₆₇ between the voltage V ₆ and the voltage V ₇ is output to the output terminal OUT 2 of the differential amplifier circuit 13, and a differential voltage ΔV between the voltage V ₇ and the voltage V ₈ is output to the output terminal OUT 3. ₇₈ is output.

  As described above, according to the modification of the third embodiment, the same operation as that of the third embodiment is performed and the same effect can be obtained. Moreover, since the functions of eight charging circuits can be realized by four charging circuits, cost performance can be improved.

  Further, as in the third embodiment, it is also possible to measure an arbitrary voltage between charging circuit outputs.

11 first charging circuit 12 second charging circuit 1N Nth charging circuit 13 differential amplifier circuit 14 control circuit 15 reference voltage source OP operational amplifiers CMP1 to CMP4 first to fourth comparators E1 to EN first to Nth reference power sources 21 to 2n 1st to Nth counters I1 to IN 1st to Nth current sources SW1 to SWN 1st to Nth switching elements C1 to CN 1st to Nth capacitors R1 to R4 Resistance

Claims (9)

A time-voltage converter that converts a time during which a signal under measurement changes from a first voltage to a second voltage into a voltage and outputs the voltage;
A first charging circuit that charges the first capacitor with a first constant current when the signal under measurement reaches a first voltage;
A second charging circuit that charges the second capacitor with a second constant current when the signal under measurement reaches a second voltage;
A difference voltage between the voltage of the first capacitor and the voltage of the second capacitor is detected after a predetermined time has elapsed since the signal under measurement reaches the second voltage, and the signal under measurement is detected from the first voltage and A differential voltage detector that outputs a voltage corresponding to the time until the second voltage is reached;
A time-voltage converter comprising: The first charging circuit includes:
The first voltage is compared with the signal under measurement as a first reference voltage, and when the signal under measurement reaches the first reference voltage, charging of the first capacitor with the first constant current is started. With a voltage comparator,
The second charging circuit includes:
The second voltage is compared with the signal under measurement as a second reference voltage, and when the signal under measurement reaches the second reference voltage, charging the second capacitor with the second constant current is started. The time-voltage converter according to claim 1, further comprising a voltage comparator.   3. The time voltage according to claim 1, wherein a ratio between the value of the first constant current and the value of the second constant current is 1: 1 / N (N is an integer of 1 or more). converter.   3. The time-voltage converter according to claim 1, wherein a ratio of the capacity of the first capacitor to the capacity of the second capacitor is 1: N (N is an integer of 1 or more). The first charging circuit includes a first counter that starts counting when the signal under measurement reaches a first voltage, and the first charging circuit uses a first constant current to count first when the first counter counts a predetermined number. Charge the capacitor,
The second charging circuit includes a second counter that starts counting when the signal under measurement reaches a second voltage, and when the second counter counts a predetermined number, a second counter current generates a second counter current. The time-voltage converter according to claim 1, wherein the capacitor is charged. A time-voltage converter for converting a time of a plurality of sections constituting a signal under measurement changing from a first voltage to an N-th voltage (N is an integer of 3 or more) into a voltage and outputting the voltage;
A jth charging circuit for charging the jth capacitor with the jth constant current when the signal under measurement reaches the jth voltage (j = 1, 2,..., N);
A j + 1th charging circuit for charging a j + 1th capacitor with a j + 1th constant current when the signal under measurement reaches the j + 1th voltage;
Each time the signal under measurement reaches the (j + 1) th voltage, a difference voltage between the voltage of the (j + 1) th capacitor and the voltage of the (j + 1) th capacitor is detected after a predetermined time has elapsed since reaching the (j + 1) th voltage. A differential voltage detector that outputs a voltage corresponding to the time of a plurality of sections constituting the signal under measurement that changes from a voltage to the Nth voltage;
A time-voltage converter comprising:   The difference voltage detector is configured to detect the voltage of the jth capacitor after the predetermined time has elapsed after the signal under measurement reaches the j + x voltage (x = 2, 3,..., N) from the jth voltage. 7. The time-voltage converter according to claim 6, wherein a difference voltage with respect to the voltage of the j + x capacitor is detected and output as a voltage corresponding to the time from the jth to the j + x section of the signal under measurement. A time voltage converter for converting a time difference from when the first signal under measurement reaches the first voltage to when the second signal under measurement reaches the second voltage, and outputting the voltage;
A first charging circuit that charges the first capacitor with a first constant current when the first signal under measurement reaches a first voltage;
A second charging circuit that charges the second capacitor with a second constant current when the second signal under measurement reaches a second voltage;
After a predetermined time elapses after the second measured signal reaches the second voltage, a differential voltage between the voltage of the first capacitor and the voltage of the second capacitor is detected, and the first measured signal is A differential voltage detector that outputs a voltage corresponding to a time from when the first voltage reaches the second voltage until the second signal under measurement reaches the second voltage;
A time-voltage converter comprising: The measured signal comprises a plurality of measured signals j of two or more,
A jth charging circuit for charging the jth capacitor with a jth constant current when each of the plurality of signals under measurement j reaches the jth voltage (j = 1, 2,..., N);
The differential voltage detector is configured to detect a difference between the j-th capacitor and the j-th capacitor after a predetermined time has elapsed since the plurality of signals under measurement have reached the j + x voltage (x = 2, 3,..., N) from the jth voltage. 7. The time-voltage converter according to claim 6, wherein a difference voltage between the voltage and the voltage of the j + x capacitor is detected and output as a voltage corresponding to the time from the jth to the j + x section of the signal under measurement. .

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