JP2015159471A - Level down circuit and high side short circuit protection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a level down circuit capable of preventing false detection of a low side signal detection circuit due to change in the high side floating potential HS, and to provide a high side short circuit protection circuit.SOLUTION: A level down circuit includes a first series circuit (P type channel MOSFETQ1, resistor R1) connected between a high side power supply voltage VB and a common potential COM, and converting a detection signal detected on the high side into a voltage signal VA with reference to the common potential COM, a reference voltage generation circuit (P type channel MOSFETQ2, resistor R2) generating a reference voltage VREF for canceling variation of the voltage signal VA due to a floating potential HS, and a comparator COMP2 generating a detection signal with reference to the common potential COM, by comparing the voltage signal VA converted by the first series circuit with the reference voltage VREF generated by the reference voltage generation circuit.

Description

  The present invention stops the driving of the high-side semiconductor element by detecting the overcurrent flowing in the high-side semiconductor element by detecting the over-current flowing through the high-side semiconductor element and the level-down circuit that transmits the detection signal detected on the high-voltage high side. And a high-side short-circuit protection circuit.

  Between the main power supply terminals, a high-side (high-voltage) side semiconductor element and a low-side (low-voltage) side semiconductor element are connected in series, and power conversion of a motor drive device or the like that configures a high-side arm and a low-side arm In the device, the semiconductor element on the high side is driven with reference to the floating potential. Therefore, in such a power conversion device, a circuit that operates at a common potential such as a ground potential and a circuit that operates based on a floating potential reference that fluctuates due to switching of the semiconductor element are mixed, and operate on the high side. A level-down circuit is provided that converts a detection signal based on the floating potential detected by the detection circuit into a signal voltage based on the common potential on the low side (see Patent Document 1).

  Referring to FIG. 7, the conventional level-down circuit 20 includes a P-type channel MOSFET Q1, which is a field effect transistor, a resistor R1, a Zener diode ZD1, a comparator COMP1, and a reference voltage Vref1.

  A P-type channel MOSFET Q1 and a level shift resistor R1 are connected in series between the high-side power supply voltage VB and the common potential COM. A power supply voltage VB is connected to the source of the P-type channel MOSFET Q1, and a resistor R1 is connected to the drain of the P-type channel MOSFET Q1. A protective Zener diode ZD1 is connected in parallel to the resistor R1. A connection point A between the P-type channel MOSFET Q1 and the resistor R1 is connected to a non-inverting input terminal of the comparator COMP1 that operates on the basis of the common potential COM. A reference voltage Vref1 is connected to the inverting input terminal of the comparator COMP1. Vcc is a power supply voltage on the low side.

  The output terminal of the high-side detection circuit 10 that operates on the basis of the floating potential HS on the high-side side is connected to the gate of the P-type channel MOSFET Q1 via the filter circuit 11 that also operates on the basis of the floating potential HS. The detection signal output from the high-side detection circuit 10 is at a low level at the time of detection, and the gate of the P-type channel MOSFET Q1 is biased to a negative potential equal to or lower than the threshold with respect to the source (VB). The filter circuit 11 is provided to prevent erroneous detection due to an inrush current, for example, when the high-side detection circuit 10 is a short circuit protection circuit. As a result, the P-type channel MOSFET Q1 is turned on, a current flows through the resistor R1, and a signal voltage VA is generated at the connection point A. The comparator COMP1 compares the signal voltage VA generated at the connection point A with the reference voltage Vref1, and outputs a high level signal when the signal voltage VA exceeds the reference voltage Vref1. Thereby, the detection signal based on the floating potential detected by the high-side detection circuit 10 is converted into a signal voltage based on the common potential COM by the level-down circuit 20 and transmitted to the low-side.

Japanese Patent Laid-Open No. 2001-237381

  However, since the floating potential HS changes rapidly (dV / dt) from the common potential COM on the low side to the power supply voltage VB, the signal on the low side is caused by the parasitic capacitance CP1 between the drain and source of the P-type channel MOSFET Q1. The comparator COMP1, which is a detection circuit, may erroneously detect (dV / dt malfunction). As shown in FIG. 8A, when the floating potential HS fluctuates to a high voltage, a parasitic current flows through the resistor R1 due to the parasitic capacitance CP1 of the P-type channel MOSFET Q1 as shown in FIG. 8B. As a result, as shown in FIG. 8C, the signal voltage VA may exceed the reference voltage Vref1 at the connection point A, and the comparator COMP1 may be erroneously detected. Therefore, in the conventional level-down circuit 20, it is necessary to provide the filter circuit 12 for preventing erroneous detection at the subsequent stage of the comparator COMP1, which is a low-side signal detection circuit. When the filter circuit 12 is provided at the subsequent stage of the comparator COMP1, there is a problem that the delay is increased correspondingly, and the delay becomes fatal in a situation where a detection signal such as a short circuit detection signal needs to be transmitted quickly. there were.

  An object of the present invention is to solve the above-mentioned problems of the prior art in view of the above-mentioned problems, and to reduce the level of the low-side signal detection circuit caused by a change in the floating potential HS on the high-side. To provide a circuit and a high-side short circuit protection circuit.

The level-down circuit of the present invention is a level-down circuit that transmits a detection signal detected on the high side with respect to the floating potential to the low side with respect to the common potential, and a power supply voltage on the high side A first series circuit connected between the common potential and detecting the detection signal detected on the high side to a voltage signal based on the common potential; and the first series circuit caused by the floating potential A reference voltage generating circuit that generates a reference voltage that cancels fluctuations of the voltage signal converted by the series circuit, and the voltage signal converted by the first series circuit and the reference voltage generating circuit And a comparator for generating the detection signal based on the common potential by comparing with a reference voltage.
Furthermore, in the level-down circuit of the present invention, the reference voltage generation circuit is a second series circuit connected in parallel with the first series circuit between a high-side power supply voltage and the common potential. May be.
Furthermore, in the level-down circuit of the present invention, the first series circuit includes a first field transistor that is turned on / off by the detection signal detected on a high side, a first resistor, and the second resistor. The second circuit transistor has substantially the same parasitic capacitance as the first field transistor, the second field transistor maintained in the OFF state, and the second field transistor having the same resistance value as the first resistor. A resistor may be provided.
Further, the high-side short-circuit protection circuit of the present invention detects an overcurrent flowing through the high-side semiconductor element connected between the main power supply voltage and the floating potential, and stops driving the high-side semiconductor element. A high-side short circuit protection circuit that detects the overcurrent and outputs an overcurrent detection signal based on the floating potential; and detects a short circuit based on the overcurrent detection signal. A short-circuit detection circuit that outputs a short-circuit detection signal based on the floating potential; and a level-down circuit that converts the short-circuit detection signal based on the floating potential into the short-circuit detection signal based on a common potential on the low side. And an error signal generation circuit for generating an error signal for stopping the driving of the high-side semiconductor element based on the short-circuit detection signal based on a common potential. To.
Further, in the high-side short-circuit protection circuit according to the present invention, when the error signal is not generated or the driving of the high-side semiconductor element cannot be stopped by the error signal, the overcurrent detection signal is output. A preliminary cutoff circuit for stopping the driving of the high-side semiconductor element may be provided.

  According to the present invention, it is possible to prevent erroneous detection of the signal detection circuit on the low side due to the change in the floating potential on the high side, and reliably transmit the detection signal detected on the high side to the low side. There is an effect that can be.

It is a circuit block diagram which shows the circuit structure of the level down circuit based on this invention. It is a wave form diagram which shows the signal waveform and operation | movement waveform of each part of FIG. It is a wave form diagram which shows the signal waveform and operation | movement waveform of each part of FIG. It is a wave form diagram which shows the signal waveform and operation | movement waveform of each part of FIG. It is a circuit block diagram which shows the circuit structure of the high side short circuit protection detection circuit based on this invention. FIG. 6 is a waveform diagram showing signal waveforms and operation waveforms at various parts in FIG. 5. It is a circuit block diagram which shows the circuit structure of the conventional level down circuit. It is a wave form diagram which shows the signal waveform and operation | movement waveform of each part of FIG.

(First embodiment)
Referring to FIG. 1, the level down circuit 30 of the first embodiment includes a P-type channel MOSFET Q1 and a P-type channel MOSFET Q2, which are field effect transistors, a resistor R1 and a resistor R2, a Zener diode ZD1, and a Zener diode ZD2. And a comparator COMP2. As the P-type channel MOSFET Q1 and the P-type channel MOSFET Q2, those having at least the parasitic capacitances CP1 and CP2 between the respective drains and sources are used. The resistors R1 and R2 have the same resistance value.

  A first series circuit composed of a P-type channel MOSFET Q1 and a level shift resistor R1, and a second series circuit composed of a P-type channel MOSFET Q2 and a level shift resistor R2 are connected to the high-side power supply voltage VB. It is connected in parallel with the common potential COM. A power supply voltage VB is connected to the source of the P-type channel MOSFET Q1, and a resistor R1 is connected to the drain of the P-type channel MOSFET Q1. The power source voltage VB is connected to the source and gate of the P-type channel MOSFET Q2, and the resistor R2 is connected to the drain of the P-type channel MOSFET Q2. Further, a protective Zener diode ZD1 is connected in parallel to the resistor R1, and a protective Zener diode ZD2 is connected in parallel to the resistor R2.

  A connection point A between the P-type channel MOSFET Q1 and the resistor R1 is a connection point between the P-type channel MOSFET Q2 and the resistor R2 at a non-inverting input terminal of the comparator COMP2, which is a low-side signal detection circuit that operates based on the common potential COM. The REF is connected to the inverting input terminal of the comparator COMP2. An offset voltage of about several volts is set in the comparator COMP2, and the comparator COMP2 outputs a high level signal when the voltage signal A at the connection point A exceeds the voltage VREF at the connection point REF by more than the offset voltage. .

  The output terminal of the high-side detection circuit 10 that operates on the basis of the floating potential HS on the high-side side is connected to the gate of the P-type channel MOSFET Q1 via the filter circuit 11 that also operates on the basis of the floating potential HS. The filter circuit 11 is provided to prevent erroneous detection due to an inrush current when the high-side detection circuit 10 is a short-circuit protection circuit, for example, and the output of the filter circuit 11 becomes a short-circuit detection signal. . The detection signal output from the high-side detection circuit 10 is at a low level at the time of detection, and the gate of the P-type channel MOSFET Q1 is biased to a negative potential below the threshold with respect to the source (power supply voltage VB). As a result, the P-type channel MOSFET Q1 is turned on, a current flows through the resistor R1, and a signal voltage VA is generated at the connection point A. That is, the first series circuit functions as a signal transmission circuit that transmits the detection signal based on the floating potential detected on the high side to the low side.

  On the other hand, the P-type channel MOSFET Q2 is always in the OFF state because the source and gate are both connected to the power supply voltage VB. Therefore, the voltage VREF at the connection point REF between the P-type channel MOSFET Q2 and the resistor R2 functions as a reference voltage that does not change depending on the detection signal output from the high-side detection circuit 10. That is, the second series circuit functions as a reference voltage generation circuit that generates a reference voltage.

  The signal voltage VA generated at the connection point A is compared with the voltage VREF at the connection point REF by the comparator COMP2, and when the signal voltage VA exceeds the voltage VREF, a high level signal is output. Thereby, the detection signal based on the floating potential detected by the high-side detection circuit 10 is converted into the detection signal based on the common potential COM by the level-down circuit 30 and transmitted to the low-side.

  As shown in FIG. 2A, when the floating potential HS fluctuates to a high voltage, a parasitic current flows through the resistor R1 due to the parasitic capacitance CP1 of the P-type channel MOSFET Q1 as shown in FIG. 2B. As a result, the signal voltage VA rises at the connection point A as shown in FIG. At this time, a parasitic current also flows through the resistor R2 due to the parasitic capacitance CP2 of the P-type channel MOSFET Q2, and the voltage VREF at the connection point REF also rises as shown in FIG. Here, the parasitic capacitance CP1 of the P-type channel MOSFET Q1 and the parasitic capacitance CP2 of the P-type channel MOSFET Q2 are the same, and the resistance value of the resistor R1 and the resistance value of the resistor R2 are the same. Therefore, as shown in FIGS. 2C and 2D, the voltage waveform of the signal voltage VA generated at the connection point A and the voltage waveform of the voltage VREF generated at the connection point REF are substantially the same waveform, and the floating potential The fluctuation of the signal voltage VA caused by HS is canceled by the voltage VREF. As a result, as shown in FIG. 2E, the difference between the signal voltage VA generated at the connection point A and the voltage VREF generated at the connection point REF is the same as that of the P-type channel MOSFET Q1 because the free potential HS swings to a high voltage. Even if a parasitic current flows through the resistor R1 due to the parasitic capacitance CP1, it becomes substantially 0V, does not exceed the offset voltage set in the comparator COMP2, and dV / by the comparator COMP2 which is a low-side signal detection circuit. It is possible to prevent dt malfunction. In addition, as long as it does not exceed the offset voltage set in the comparator COMP2, the parasitic capacitances CP1 and CP2 of the P-type channel MOSFET Q1 and the P-type channel MOSFET Q2, and the resistances of the resistors R1 and R2, respectively. The values may be slightly different.

  FIG. 3 shows a case where the normal signal is transmitted at the timing when the floating potential HS swings to a high voltage, and FIG. 4 shows a case where the normal signal is transmitted immediately after the floating potential HS swings to a high voltage. It is shown. In any case, the P-type channel MOSFET Q1 is turned on by the normal signal, and the signal voltage VA at the connection point A changes in voltage due to the parasitic capacitance CP1, as shown in FIGS. 3B and 4B. Stand up greatly beyond. Thus, the difference between the signal voltage VA generated at the connection point A and the voltage VREF generated at the connection point REF shown in FIGS. 3C and 4C is as shown in FIGS. ) Exceeds the offset voltage set in the comparator COMP2, is converted into a common potential COM reference detection signal, and is transmitted to the low side.

As described above, according to the first embodiment, the level down circuit 30 transmits the detection signal detected on the high side with the floating potential HS as a reference to the low side with the common potential COM as a reference. The first series is connected between the power supply voltage VB on the high side and the common potential COM, and converts the detection signal detected on the high side into a voltage signal VA with the common potential COM as a reference. A circuit (P-type channel MOSFET Q1, resistor R1), a reference voltage generation circuit (P-type channel MOSFET Q2, resistor R2) that generates a reference voltage VREF that cancels fluctuations in the voltage signal VA caused by the floating potential HS, and a first The common potential COM is determined by comparing the voltage signal VA converted by the series circuit with the reference voltage VREF generated by the reference voltage generation circuit. And a comparator COMP2 for generating a detection signal.
With this configuration, it is possible to prevent erroneous detection of the low-side signal detection circuit (comparator COMP2) due to a change in the floating potential HS on the high side, and the detection signal detected on the high side can be reliably detected on the low side. There is an effect that it can be transmitted to.

Furthermore, according to the first embodiment, the reference voltage generation circuit is a second series circuit connected in parallel with the first series circuit between the high-side power supply voltage VB and the common potential COM. It is configured.
With this configuration, it is possible to easily generate the reference voltage VREF that cancels the fluctuation of the voltage signal VA caused by the floating potential HS under the same conditions as the first series circuit.

Furthermore, according to the first embodiment, the first series circuit includes the first field transistor (P-type channel MOSFET Q1) that is turned on / off by the detection signal detected on the high side, and the resistor R1. The second series circuit has substantially the same parasitic capacitance as that of the first field transistor, and is substantially the same as the resistor R1 and the second field transistor (P-type channel MOSFET Q2) maintained in the off state. And a resistor R2 having a resistance value.
With this configuration, it is possible to generate the reference voltage VREF that cancels the fluctuation of the voltage signal VA caused by the floating potential HS with a simple circuit configuration.

(Second Embodiment)
In the second embodiment, high-side short circuit protection that detects an overcurrent flowing through the high-side (high-voltage) side semiconductor element Q3 in the power conversion device and stops driving the high-side (high-voltage) side semiconductor element Q3. Referring to FIG. 5, the high-side detection circuit 10, the filter circuit 11, the level-down circuit 30 according to the first embodiment, the OR circuit OR1, the protection holding time generation circuit 13, and the pulse A generation circuit 14 and a preliminary cutoff circuit 15 are provided. As the semiconductor element Q3, MOSFET or IGBT (insulated gate bipolar transistor) is used.

  The high side detection circuit 10 is a circuit that detects an overcurrent flowing through the semiconductor element Q3 on the high side (high voltage) side, and includes a comparator COMP3 and an inverting circuit INV1. The inverting input terminal of the comparator COMP3 is connected to the reference voltage Vref2, and the non-inverting input terminal is connected to the drain of the semiconductor element Q3 and the other end of the detection resistor RS having one end connected to the floating potential HS. Thereby, the overcurrent flowing through the semiconductor element Q3 on the high side (high voltage) side is detected by the comparator COMP3, and the comparator COMP3 outputs an overcurrent detection signal.

  The overcurrent detection signal output from the comparator COMP3 is input to the filter circuit 11 through the inverting circuit INV1, and is transmitted to the low side through the filter circuit 11 and the level down circuit 30. The filter circuit 11 is provided to prevent erroneous detection due to inrush current, and the output of the filter circuit 11 becomes a short circuit detection signal. The short circuit detection signal output from the filter circuit 11 is transmitted to the low side, and is input to the protection holding time generation circuit 13 on the low side that operates on the basis of the common potential COM via the OR circuit OR1. When the short-circuit detection signal is input, the protection holding time generation circuit 13 generates a long protection holding time for self-recovery and outputs an error signal that maintains the generated protection holding time high level. The error signal output from the protection holding time generation circuit 13 is output from the external (FO) terminal on the low side and input to the pulse generation circuit 14.

  The pulse generation circuit 14 is a low-side circuit that operates on the basis of the common potential COM, and outputs a set signal and a reset signal for controlling on / off of the semiconductor element Q3 on the high-side (high-voltage) side. The set signal from the pulse generation circuit 14 is input to the set terminal S of the flip-flop FF1 via a level shift circuit (not shown) and the filter circuit 16 that suppresses malfunction due to voltage fluctuation dV / dt of the floating potential HS. FF1 is set. The reset signal from the pulse generation circuit 14 is sent to the reset terminal R of the flip-flop FF1 via a level shift circuit (not shown), a filter circuit 17 that suppresses malfunction due to voltage fluctuation dV / dt of the floating potential HS, and the OR circuit OR3. Input and reset flip-flop FF1.

  A series circuit including a P-type channel MOSFET Q4, a resistor R3, a resistor R4, and an N-type channel MOSFET Q5 is connected between the power supply voltage VB on the high side and the floating potential HS. The gates of the P-type channel MOSFET Q4 and the N-type channel MOSFET Q5 are both connected to the output terminal Q of the flip-flop FF1 via the inverter circuit INV2, and the connection point between the resistor R3 and the resistor R4 is on the high side (high voltage) side. It is connected to the gate of the semiconductor element Q3. Accordingly, when the set signal is output from the pulse generation circuit 14 and the flip-flop FF1 is set, the semiconductor element Q3 on the high side (high voltage) side is turned on, and the reset signal is output from the pulse generation circuit 14 and the flip-flop FF1. Is reset, the semiconductor element Q3 on the high side (high voltage) side is turned off.

  When an error signal is input from the protection holding time creation circuit 13, the pulse generation circuit 14 outputs a reset signal to turn off the high-side (high voltage) side semiconductor element Q 3, and turn off the protection holding time creation circuit 13. The protection retention time generated in is maintained.

  When a short circuit is detected, it is necessary to generate a long protection holding time by the low side protection holding time creation circuit 13 and to output an error signal to the outside from the output (FO) terminal on the low side. is there. The protection holding time creation circuit 13 is not practical to be assembled on the high side with a large element size, and needs to be assembled on the low side with a small element size. Therefore, when a short circuit is detected on the high side, it is necessary to transmit a short circuit detection signal to the low side by using the level down circuit 30.

  If a short circuit is detected on the high side and the semiconductor element Q3 is turned off on the high side, the short circuit detection signal may not be transmitted to the low side. When the semiconductor element Q3 is turned off at the timing when the short circuit detection signal is output from the filter circuit 11 after the overcurrent detection signal is output from the comparator COMP2 and the delay time is 500ns by the filter circuit 11, FIG. As shown, the floating potential HS enters a negative potential due to the influence of the wiring inductance. As a result, the power supply voltage VB on the high side is also lowered by the floating potential HS. As a result, the voltage between the power supply voltage VB on the high side and the common potential COM on the low side decreases, and the signal at the connection point A The voltage VA does not exceed the offset voltage of the comparator COMP2, and the level down signal may not be transmitted.

  Therefore, in the second embodiment as described above, when a short circuit is detected on the high side, a short circuit detection signal is transmitted to the low side, and the semiconductor element Q3 on the high side (high voltage) side is turned off from the low side. It is configured to let you. By using the level-down circuit 30 of the first embodiment, the subsequent filter circuit can be excluded, so that the delay time until the semiconductor element Q3 is turned off on the high side can be reduced. it can.

  In the second embodiment, the pre-break circuit 15 is prepared in case the level down circuit 30 or the low side element is broken and the high side (high voltage) side semiconductor element Q3 cannot be turned off. Is provided. When the overcurrent detection signal from the comparator COMP3 continues for a preset preliminary cutoff time, the preliminary cutoff circuit 15 resets the flip-flop FF1 via the OR circuit OR2, and causes the semiconductor element Q3 on the high side (high voltage) side to be reset. Turn off. The preliminary cutoff time is set in consideration of the delay time (for example, 500 ns) of the filter circuit 11, the delay time for the level down (for example, 100 ns), and the delay time for the level shift (for example, 250 ns). It is set to a time (for example, about 2 μs) that is longer than the time obtained by adding the delay times and shorter than the time during which the semiconductor element Q3 on the high side (high voltage) side does not break down.

As described above, according to the second embodiment, the overcurrent flowing through the high-side semiconductor element Q3 connected between the main power supply voltage and the floating potential HS is detected to drive the semiconductor element Q3. An overcurrent detection circuit (high side detection circuit 10) that detects an overcurrent and outputs an overcurrent detection signal based on the floating potential HS, and an overcurrent detection A short-circuit detection circuit (filter circuit 11) for detecting a short circuit based on the signal and outputting a short-circuit detection signal based on the floating potential HS; and a short-circuit detection signal based on the floating potential HS as a low-side common potential COM A level-down circuit 30 that converts the short-circuit detection signal as a reference, and an error that generates an error signal that stops driving the semiconductor element Q3 based on the short-circuit detection signal that uses the common potential COM And a No. generating circuit (protection retention time generating circuit 13).
With this configuration, when a short circuit is detected on the high side, a short circuit detection signal can be reliably transmitted to the low side.

Further, according to the second embodiment, when the error signal is not generated or the driving of the semiconductor element Q3 cannot be stopped by the error signal, the driving of the semiconductor element Q3 is performed based on the overcurrent detection signal. Is provided with a preliminary cutoff circuit 15 for stopping the operation.
With this configuration, even if the level down circuit 30 or the low-side element is broken, the semiconductor element Q3 can be turned off.

  As mentioned above, although this invention was demonstrated by specific embodiment, the said embodiment is an example and it cannot be overemphasized that it can change and implement in the range which does not deviate from the meaning of this invention.

DESCRIPTION OF SYMBOLS 10 High side detection circuit 11 Filter circuit 12 Filter circuit 13 Protection retention time creation circuit 14 Pulse generation circuit 15 Preliminary cutoff circuit 16 Filter circuit 17 Filter circuit 20 Level down circuit 30 Level down circuit COMP1, COMP2, COMP3 Comparator CP1, CP2 Parasitic capacitance FF1 Flip-flop INV1, INV2 Inversion circuit OR1, OR2 OR circuit Q1, Q2 P-type channel MOSFET
Q3 Semiconductor device Q4 P-type channel MOSFET
Q5 N-type channel MOSFET
R1, R2, R3, R4 Resistance ZD1, ZD2 Zener diode

Claims (5)

A level-down circuit that transmits a detection signal detected on the high side with respect to the floating potential to the low side with respect to the common potential,
A first series circuit connected between a power supply voltage on the high side and the common potential, and converting the detection signal detected on the high side into a voltage signal based on the common potential;
A reference voltage generation circuit that generates a reference voltage for canceling fluctuations of the voltage signal converted by the first series circuit due to the floating potential;
A comparator that generates the detection signal based on the common potential by comparing the voltage signal converted by the first series circuit with the reference voltage generated by the reference voltage generation circuit; A level down circuit characterized by:   2. The reference voltage generation circuit according to claim 1, wherein the reference voltage generation circuit is a second series circuit connected in parallel with the first series circuit between a high-side power supply voltage and the common potential. Level down circuit. The first series circuit includes a first field transistor that is turned on and off by the detection signal detected on a high side, and a first resistor.
The second series circuit has substantially the same parasitic capacitance as that of the first electric field transistor, and has the same resistance value as that of the first resistor, and the second electric field transistor maintained in the off state. A level-down circuit comprising: a second resistor. A high-side short-circuit protection circuit that detects an overcurrent flowing in a high-side semiconductor element connected between a main power supply voltage and a floating potential and stops driving the high-side semiconductor element;
An overcurrent detection circuit that detects the overcurrent and outputs an overcurrent detection signal based on the floating potential;
A short circuit detection circuit that detects a short circuit based on the overcurrent detection signal and outputs a short circuit detection signal based on the floating potential;
A level-down circuit that converts the short-circuit detection signal with the floating potential as a reference into the short-circuit detection signal with a low-side common potential as a reference;
A high-side short-circuit protection circuit, comprising: an error signal generation circuit that generates an error signal for stopping driving of the high-side semiconductor element based on the short-circuit detection signal based on a common potential.   When the error signal is not generated or the driving of the high-side semiconductor element is not stopped by the error signal, the driving of the high-side semiconductor element is stopped based on the overcurrent detection signal. A high-side short-circuit protection circuit comprising a preliminary cutoff circuit.

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