JP2015159323A - Semiconductor laser element and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor laser element and a manufacturing method of the same, which improve power efficiency by improving electrical characteristics to achieve high reliability in a semiconductor laser element which uses a conductive oxide and has a ridge shape.SOLUTION: A semiconductor laser element comprises: a substrate 10; a semiconductor layer in which a first conductivity type semiconductor layer 12, an active layer 14 and a second conductivity type semiconductor layer 16 are sequentially laminated on the substrate; a stripe-shaped ridge 18 formed on a top face of the second conductivity type semiconductor layer; a conductive oxide layer 20 formed on a top face of the ridge; a dielectric layer 24 which is formed on lateral faces of the ridge; and a metal layer 22 formed to cover the conductive oxide layer and the dielectric layer, in which a surface of the conductive oxide layer is exposed from the dielectric layer, and lateral faces of the conductive oxide layer inclines from a normal direction with respect to the top face of the ridge, and an inclination angle of each lateral face of the conductive oxide layer is larger than an inclination angle of each ridge lateral face from the normal direction.

Description

The present invention relates to a semiconductor laser device and a manufacturing method thereof, and more particularly to a semiconductor laser device having a conductive oxide layer and a manufacturing method thereof.

Conventionally, a conductive oxide layer has been widely used as an electrode in a semiconductor light emitting device, particularly a light emitting diode (LED) (for example, Non-Patent Document 1).
In addition, in a semiconductor laser element, since the conductive oxide layer has advantages such as low light absorption and low refractive index, a conductive oxide layer having a refractive index lower than that of the light emitting layer is changed to a ridge. A technique (Patent Document 1) has been proposed in which a layer is formed on a semiconductor layer having a shape and functions as both a conductive electrode and a cladding layer.
Further, a block layer having a stripe-shaped opening is disposed on the stacked body of semiconductor layers, and a conductive oxide layer is formed on the block layer including the inside of the opening, whereby both the conductive electrode and the cladding layer are formed. A technique (Patent Document 2) has been proposed in which a clad layer electrode having a ridge-like protrusion having a function is disposed.

In these semiconductor laser devices, a dielectric layer is usually formed on the side surface of the ridge in order to ensure an effective refractive index distribution in the waveguide region directly under the ridge and the region immediately below both sides of the ridge. .
As a method of forming the dielectric layer on the side surface of the ridge, the dielectric layer is formed from the bottom surface region of the ridge to the region on the electrode, and this dielectric layer is etched using a resist to form the dielectric layer on the side surface of the ridge. There is a method of removing the dielectric layer in contact with the electrode while leaving the dielectric layer.

JP-A-9-74249 JP 2006-41491 A

Chia-Shang CHANG et. al, “InGaN / GaN Light-Emitting Diodes with Rapid Thermal-Annealed Ni / ITO p-Contacts”, Jpn. J. et al. Appl. Phys. Vol. 42 (2003) p. 3324-3327

However, since the conductive oxide raises the voltage due to its high resistivity and the electrical characteristics become insufficient, the element has not yet been put into practical use. These problems are particularly noticeable when the current confinement structure including the ridge structure is used, because the current density increases in a narrow light emitting region.
Further, in the above-described dielectric layer forming method, it is difficult to leave the dielectric layer accurately only on the side surfaces of the ridge.
In particular, in the semiconductor laser element as in Patent Document 1, since the side surfaces of the conductive oxide layer and the semiconductor layer are formed flush with each other, the etching is accurately performed at the interface between the conductive oxide layer and the semiconductor layer. It was difficult to stop well.
Therefore, when there is a region where the dielectric layer is not covered on the side surface of the ridge, there is a problem that appropriate light confinement cannot be performed, and leakage occurs due to the electrode contacting the side surface of the ridge. .
On the other hand, when the dielectric layer is left on the side surface of the conductive oxide layer, there is a problem that the voltage cannot be increased and the performance of the semiconductor laser device cannot be sufficiently exhibited.

The present invention has been made in view of the above problems, and in a semiconductor laser element using a conductive oxide, by improving electrical characteristics, the power efficiency is improved, and a highly reliable semiconductor laser element and its manufacture are provided. It aims to provide a method.

The semiconductor laser device of the present invention is
A substrate,
A semiconductor layer in which a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are sequentially stacked on the substrate;
A striped ridge formed on the upper surface of the second conductive semiconductor layer;
A conductive oxide layer formed on the top surface of the ridge;
A dielectric layer having a refractive index lower than that of the semiconductor layer formed on a side surface of the ridge;
A metal layer formed to cover the conductive oxide layer and the dielectric layer,
A surface of the conductive oxide layer is exposed from the dielectric layer, and a side surface of the conductive oxide layer is inclined with respect to an upper surface of the ridge;
The inclination angle of the side surface of the conductive oxide layer with respect to the normal direction is larger than the inclination angle of the ridge side surface with respect to the normal direction.

Such a semiconductor laser device preferably includes one or more of the following.
The refractive index of the conductive oxide layer is lower than the refractive index of the semiconductor layer.
The height of the conductive oxide layer is d1, the height of the ridge is d2, the width of the upper surface of the conductive oxide layer is a1, the width of the lower surface of the conductive oxide layer is b1, and the upper surface of the ridge Where d2 / d1> (b2-a2) / (b1-a1) where a2 is a2 and the width of the lower surface of the ridge is b2.
Is satisfied.
When the height of the conductive oxide layer is d1, and the width of the upper surface is a1,
d1 is 50 mm or more and satisfies d1 <a1.
The height d2 of the ridge is 6000 mm or less.
The semiconductor laser element is a nitride semiconductor laser element, and the oscillation wavelength of the nitride semiconductor laser element is 440 nm or more.
The conductive oxide layer is ITO.
The active layer contains In, and the second conductivity type semiconductor layer is In _x Al _y Ga _1-x-.
It has a layer made of yN (0 ≦ x, 0 ≦ y, 0 ≦ x + y ≦ 1), and the layer in contact with the conductive oxide layer is GaN.
The second conductivity type semiconductor layer has a layer containing Al, and the thickness of the Al-containing layer is 60
It is less than 00Å.

The method for manufacturing a semiconductor laser device of the present invention includes:
(A) A first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are sequentially stacked on a substrate to form a semiconductor layer, and a mask layer having a predetermined shape is formed on the semiconductor layer. Removing a part of the second conductive semiconductor layer using the mask layer to form a ridge;
(B) forming a second mask layer in a region extending from at least the ridge bottom region to the mask layer on the ridge;
(C) removing a part of the second mask layer on the ridge to expose the mask layer from the second mask layer;
(D) exposing the upper surface of the ridge by removing the mask layer on the ridge;
(E) forming a conductive oxide layer on the top surface of the ridge, the tilt angle of the side surface with respect to the normal direction of the top surface of the ridge being larger than the tilt angle of the side surface of the ridge with respect to the normal direction;
(F) removing the second mask layer;
(G) forming a dielectric layer in at least a region extending from the bottom surface region of the ridge to the conductive oxide layer on the ridge;
(H) removing the dielectric layer from the surface of the conductive oxide layer while leaving the dielectric layer on the side surface of the ridge, and exposing the surface;
(I) comprising a step of forming a metal layer on top of the conductive oxide layer and the dielectric layer left by the step (h),

(A) a step of sequentially laminating a first conductive semiconductor layer, an active layer, a second conductive semiconductor layer, and a conductive oxide layer on a substrate;
(B) forming a mask layer having a predetermined shape on the conductive oxide layer, and patterning the conductive oxide layer whose side surface is inclined using the mask layer;
(C) A part of the second conductive type semiconductor layer is removed using the mask layer and the conductive oxide layer, and the inclination angle of the side surface with respect to the normal direction of the top surface of the ridge is the conductive oxide. Forming a ridge smaller than the angle of inclination of the layer with respect to the normal direction;
(D) forming a dielectric layer on the second conductive semiconductor layer including the ridge while leaving the mask layer;
(E) removing the mask layer to expose the surface of the conductive oxide layer on the ridge;
(F) forming a metal layer on at least the upper surface of the conductive oxide layer and the dielectric layer.

According to the present invention, in a semiconductor laser element using a conductive oxide, it is possible to significantly improve power efficiency by improving electrical characteristics, and to provide a highly reliable semiconductor laser element and a method for manufacturing the same. .

1 is a schematic cross-sectional view for explaining the structure of a semiconductor laser device according to an embodiment of the present invention. It is a partial enlarged view showing an example of a semiconductor laser device according to an embodiment of the present invention. It is a partial enlarged view showing an example of a semiconductor laser device according to an embodiment of the present invention. It is a partially expanded sectional view which shows the state of the electroconductive oxide layer and dielectric material layer of the semiconductor laser element which concerns on one embodiment of this invention. It is a schematic sectional process drawing for demonstrating the manufacturing method of the semiconductor laser element which concerns on one embodiment of this invention. It is a schematic sectional process drawing for demonstrating the manufacturing method of the semiconductor laser element which concerns on one embodiment of this invention. It is a schematic cross-sectional process drawing for demonstrating the manufacturing method of the semiconductor laser element concerning other embodiment of this invention.

Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. However, the embodiment described below exemplifies a semiconductor laser element for embodying the technical idea of the present invention, and the present invention does not specify the semiconductor laser element as follows. Furthermore, in the following description, the same name and symbol indicate the same or the same members, and detailed description thereof will be omitted as appropriate.

(Semiconductor laser element)
The semiconductor laser device 1 of the present invention is formed mainly including a substrate, a semiconductor layer, an electrode made of a conductive oxide layer, and a dielectric film. Such a semiconductor laser device typically has a first conductivity type semiconductor layer 12 (for example, an n-side semiconductor layer) on a substrate 10 as shown in FIG.
The active layer 14 and the second conductivity type semiconductor layer 16 (for example, the p-side semiconductor layer) are sequentially stacked, and the conductive oxide layer 20 is formed on the upper surface of the second conductivity type semiconductor layer 16.
In the semiconductor laser device shown in FIG. 1, a striped ridge 18 is formed on the upper surface of the second conductivity type semiconductor layer 16, and the conductive oxide layer 20 is connected only on the upper surface of the ridge 18. . That is, the conductive oxide layer 20 functions as an ohmic electrode.
Furthermore, a dielectric layer 24 having a refractive index lower than that of the semiconductor layer is formed on the side surface of the ridge 18. Further, the metal layer 22 covers the conductive oxide layer 20 and the dielectric layer 24.
Is formed. FIG. 3 is a partially enlarged view of FIG.

(Conductive oxide layer)
2A and 2B are cross-sectional views of the portion near the ridge perpendicular to the stripe direction.
As shown in FIG. 2A, the side surface of the conductive oxide layer 20 is inclined with respect to the upper surface 28 of the ridge. In other words, the cross-sectional shape of the conductive oxide layer 20 formed on the ridge upper surface 28 is:
It has an upper surface 30 that is a flat portion at the center of the ridge, and an inclined portion 32 whose film thickness decreases from both ends of the upper surface toward the side surface of the ridge. Here, the upper surface 3 of the conductive oxide layer
The width (a1) of 0 is about 1.8 μm to 25.0 μm. The length of the inclined portion 32 means the length from the end of the upper surface 30 to the end of the ridge upper surface. The length of the inclined portion is appropriately adjusted depending on the width (b2) of the lower portion of the ridge and the width (b1) of the upper surface 28 of the ridge.
. A range of 0 μm is preferable. The width of the lower surface of the conductive oxide layer 20 is a2.

The inclined portion 32 of the conductive oxide layer includes the upper surface 30 of the conductive oxide layer and the lower surface 2 of the conductive oxide layer.
8 may be formed so as to be connected to each other, and may be formed by a plurality of surfaces.

In the example shown in FIGS. 2A and 2B, the inclined portion 32 of the conductive oxide layer has an inclined surface extending from the upper surface 30 toward the lower surface 28.
In this way, by forming the corner of the conductive oxide layer 20 to be chamfered, stress concentration at the corner can be alleviated, and the metal layer 22 connected thereto can be peeled off. It can be effectively suppressed. In addition, since the contact area between the metal layer 22 and the conductive oxide layer 20 can be increased, the adhesion between the metal layer 22 and the conductive oxide layer 20 can be further improved. In addition, the volume of the conductive oxide layer 20 can be reduced to reduce the electrical resistivity, and the operating voltage can be lowered in combination with increasing the contact area with the metal layer 22. Power efficiency can be significantly improved.

As shown in FIG. 2A, the angle of the side surface of the conductive oxide layer 20 is suitably smaller than the angle of the side surface of the ridge 18 with respect to the ridge upper surface. In other words, the inclination angle of the side surface of the conductive oxide layer 20 with respect to the normal direction of the top surface of the ridge is suitably larger than the inclination angle of the side surface of the ridge 18 with respect to the normal direction.
Here, in FIG. 2A, the “angle” of the side surface of the conductive oxide layer refers to the angle formed by the top surface 28 of the ridge and the side surface 32 of the conductive oxide layer, and is the angle indicated by θ1. It is.
The “angle” of the side surface of the ridge 18 with respect to the upper surface of the ridge refers to the angle formed by the surface corresponding to the lower surface of the ridge and the side surface of the ridge, and is the angle indicated by θ2.
In FIG. 2B, the “inclination angle” of the side surface 32 of the conductive oxide layer refers to the angle of the side surface 32 of the conductive oxide layer inclined with respect to the normal direction of the upper surface 28 of the ridge.
Indicated by θ1 + θ1 ′ always means a 90 ° relationship. The “inclination angle” of the ridge side surface means an angle of the ridge side surface that is inclined with respect to the normal direction of the upper surface of the ridge, and is represented by θ2 ′. θ2 + θ2 ′ always means a 90 ° relationship.

When the side surface 32 of the ridge 18 and the side surface 34 of the conductive oxide layer 20 are continuously formed at the same angle with respect to the top surface of the ridge, the conductive oxide layer 20 and the second conductive semiconductor layer 24
Therefore, there is no difference in the vertical thickness of the dielectric provided on the side surface of the conductive oxide layer and the side surface of the ridge.
Further, in the case of θ1> θ2 and θ1 ′ <θ2 ′, the width b2 of the refractive index difference becomes too large with respect to the width a2 into which the current is injected, the threshold value is increased, and the efficiency is deteriorated.

As shown in FIG. 2, by setting θ1 <θ2 and θ1 ′> θ2 ′, the dielectric layer formed on the side surface of the ridge is etched more than the dielectric layer formed on the side surface of the conductive oxide layer. This makes it difficult to leave a dielectric layer on the side surface of the ridge. In particular, when a dry etching apparatus such as RIE having anisotropy is used for etching the dielectric layer, the anisotropic etching can surely be performed, so the dielectric layer should be formed with high dimensional accuracy. Can do. Further, by setting θ1 <θ2 and θ1 ′> θ2 ′, the vertical thickness of the dielectric layer on the side surface of the ridge can be made larger than the vertical thickness of the conductive oxide layer, A structure in which the dielectric layer is left on the side surface of the ridge can be formed. That is, the dielectric layer 24 can be accurately arranged only on the side surface of the ridge 18.
Thus, the surface of the conductive oxide layer (that is, the upper surface 30 and the side surface 34) is made to be the dielectric layer 24.
Thus, the surface of the conductive oxide layer can be reliably connected to the metal layer 22. As a result, as described above, adhesion and power efficiency can be improved.

A case where θ1 <θ2 and θ1 ′> θ2 ′ are satisfied is represented by the following relational expression between the conductive oxide layer 20 and the width and height of the ridge.
d2 / d1> (b2-a2) / (b1-a1)
Here, d1 is the height of the conductive oxide layer, and d2 is the height of the ridge 18.
Therefore, it is preferable to set the width and height of the conductive oxide layer and the ridge so as to satisfy this equation.

In particular, it is preferable that d1 <a1 is satisfied when the height d1 of the conductive oxide layer is 50 mm or more. Thereby, when forming the conductive oxide layer, the conductive oxide layer is formed from the top using the mask layer, and the conductive oxide layer is formed on the portion without the mask layer by removing the mask layer. In the case of performing (lift-off), the conductive oxide layer can be formed with high accuracy.

Further, the cleaving property can be improved by forming a conductive oxide layer having a specific thickness and shape at a specific location of the second conductive type semiconductor layer and cleaving to form the resonator end face. confirmed. This is considered because the stress which a conductive oxide layer gives with respect to a semiconductor layer is affecting. In order to improve the cleavage property in this way, the thickness (that is, height d1) of the conductive oxide layer is preferably 0.05 μm or more, and more preferably about 0.1 to 0.4 μm.
Further, when the height d2 of the ridge is 0.6 μm or less, the stress applied to the ridge can be reduced, and thus the cleavage property is further improved. More preferably, the sum of the height d2 of the ridge and the thickness (height d1) of the conductive oxide layer is 2.0 μm or less.

In general, a semiconductor layer contains stress due to a difference in lattice constant of each layer forming the semiconductor layer. In particular, the greater the In content, the greater the stress applied to the semiconductor layer,
There is a phenomenon that a step is generated on the cleavage plane in the layer containing In. The occurrence of such a step causes problems such as an increase in threshold current, a decrease in inclination angle η (slope efficiency) of light emission output above the threshold current, and a large variation.
By applying a stress by forming a conductive oxide layer on the semiconductor layer in such a state,
Moreover, it is considered that the stress applied to the semiconductor layer is relaxed by setting the height of the ridge to 0.6 μm or less. By cleaving in a state where stress applied to the semiconductor layer is relaxed, the ratio of occurrence of a step can be reduced regardless of the composition of the semiconductor layer, that is, even when the semiconductor layer contains In. As a result, it is possible to reduce the increase in threshold value and the decrease or variation in the slope angle η (slope efficiency) of the rise of the light emission output.

The conductive oxide layer 20 preferably functions as a clad layer / electrode. As a result, the conventionally used semiconductor cladding layer can be omitted, and a highly reliable long wavelength semiconductor laser device with reduced cracks can be realized. Further, since the cladding layer is omitted, an increase in the operating voltage of the semiconductor laser element can be suppressed.
In this specification, the clad layer is an active layer (including a well layer and a barrier layer) as described later.
Among the films positioned on the upper side and the lower side of the layer, it refers to a layer that is lower than the refractive index of the well layer and has a thickness of at least 100 nm. These may be a multilayer film, a superlattice structure, or a GRIN structure. Thus, by providing a cladding layer having a small optical refractive index above and below the active layer, it has a function of confining light in the active layer. Without this cladding layer, the threshold current increases several times and sometimes no laser oscillation occurs.

That is, to function as a cladding layer means to substantially confine light, and whether a certain layer functions as a cladding layer can be confirmed by an equivalent refractive index simulation or the like. For example, assuming that the refractive indexes of GaN, AlN, and InN at 500 nm are 2.368, 2.122, and 2.8, the refractive index of each layer is calculated by proportional calculation based on the mixed crystal ratio of the semiconductor that constitutes the layer. Equivalent refractive index simulation is performed. As a result of the simulation, assuming that the maximum intensity of light is 1.0, in the area from the active layer to the specific layer above and below the active layer, above and below those areas where the light intensity is 0.5 or more. A certain layer may be considered as a clad layer (when it becomes 0.5 or more in the middle of the layer, it is considered as a clad layer from there). Therefore, the cladding layer may be a multilayer film. Further, simply, the size of the waveguide can be estimated from the near field pattern of the semiconductor laser element, and the layer at the position matching the size of the waveguide can be determined as the cladding layer.

In order for the conductive oxide layer 20 to function as a cladding layer, the refractive index of the conductive oxide layer is preferably lower than the refractive index of the semiconductor layer. For example, the conductive oxide layer may be zinc (
Zn), indium (In), tin (Sn), gallium (Ga), aluminum (Al)
, Copper (Cu), silver (Ag), nickel (Ni), gold (Au), lanthanum (La), strontium (Sr), fluorine (F) and magnesium (Mg) It can be formed of a layer containing these elements. Specifically, ZnO (refractive index:
About 1.95), In ₂ O ₃ , SnO ₂ , ATO, ITO (complex oxide of In and Sn),
Examples thereof include IZO and MgO. Of these, ITO (refractive index: about 2.0) is preferable.

This conductive oxide layer efficiently absorbs not only visible light, for example, light having a wavelength of 360 nm to 650 nm, for example, a transmittance of 90% or more, 85% or more, 80% or more. It is preferable that light can be transmitted. This
It can be used as an electrode of a semiconductor laser device having an intended wavelength. Furthermore, the conductive oxide layer has, for example, a specific resistance of 1 × 10 ⁻³ Ωcm or less, preferably 1 × 10 ⁻⁴ to 1 × 1.
It is preferably about 0 ⁻⁶ Ωcm. Thereby, it can utilize effectively as an electrode.

The conductive oxide layer 20 is preferably formed apart from the resonator end face. When the conductive oxide layer 20 extends to the end face of the resonator, the current is injected to the end face of the resonator, heat is generated near the end face of the resonator, and heat generation is remarkable particularly in a high output element. C
There is concern about a drop in OD levels. Therefore, it is preferable that the conductive oxide layer 20 be separated from the resonator end face, that is, the conductive oxide layer 20 should not be formed at both ends in the stripe direction of the ridge. More preferably, a material close to the refractive index of the conductive oxide layer is provided in a region where the conductive oxide layer 20 is not formed to reduce the difference in refractive index from the end face side where the conductive oxide layer is not formed. Thereby, it can suppress that FFP shape is disturb | confused.

(substrate)
As the substrate, a sapphire, spinel (MgA1 ₂ O _4), silicon carbide, silicon, Zn
O, GaAs, and a nitride substrate (GaN, AlN, etc.) are preferable. Moreover, the thickness of a board | substrate is 50 micrometers-about 10 mm, for example. Here, the nitride substrate is MOV
PE, MOCVD (metal organic chemical vapor deposition), HVPE (halide vapor deposition) and other vapor phase growth methods, hydrothermal synthesis methods for crystal growth in supercritical fluid, high pressure method, flux method, melting It can be formed by a method or the like. A commercially available product may also be used. For example, the substrate is more preferably a nitride substrate having an off angle of about 0.03 to 10 ° on the first main surface and / or the second main surface. Further, the number of dislocations per unit area may be 1 × 10 ⁷ / cm ² or less.

The substrate may have n-type conductivity or p-type conductivity.
Regarding the plane orientation of the growth surface on which the semiconductor layer is grown, the C plane (0001), the A plane (11-20)
), M plane (1-100) or semipolar plane (11-22), (20-21), (10-1-
Substrates such as 1) and (10-1-2) can be used.

(Semiconductor layer)
The semiconductor layer is configured by a stacked body including the first conductive semiconductor layer 12, the active layer 14, and the second conductive semiconductor layer 16.

The growth method of the semiconductor layer on the substrate is not particularly limited, but MOVPE (metal organic chemical vapor deposition), MOCVD (metal organic chemical vapor deposition), HVPE (hydride vapor deposition),
All methods known as nitride semiconductor growth methods such as MBE (molecular beam epitaxy) can be used. In particular, MOCVD is preferable because it can be grown with good crystallinity under reduced pressure to atmospheric pressure.

The first conductivity type semiconductor layer is not particularly limited, but is a compound semiconductor, further a nitride semiconductor, in particular, the general formula is In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1
) Is preferred. In addition to this, an element in which B is partially substituted as a group III element may be used, or an element in which a part of N is substituted with P or As may be used as a group V element. One of the first conductivity type and the second conductivity type means n-type, and the other means p-type. The n-type semiconductor layer includes an IV such as Si, Ge, Sn, S, O, Ti, Zr, and Cd as n-type impurities.
One or more group elements or group VI elements may be contained. The p-type semiconductor layer contains Mg, Zn, Be, Mn, Ca, Sr, etc. as p-type impurities. The impurities are preferably contained in a concentration range of, for example, about 5 × 10 ¹⁶ / cm ³ to 1 × 10 ²¹ / cm ³ . Note that all of the semiconductor layers constituting the first conductivity type semiconductor layer and the second conductivity type semiconductor layer do not necessarily contain impurities.

The first conductivity type semiconductor layer and / or the second conductivity type semiconductor layer preferably has a light guide layer, and further, an SCH (Separa) having a structure in which these light guide layers sandwich an active layer.
te Confinement Heterostructure) structure is preferable. The light guide layer of the first conductivity type semiconductor layer and the light guide layer of the second conductivity type semiconductor layer may have structures having different compositions and / or film thicknesses.

For example, a first conductive semiconductor layer (hereinafter may be referred to as “n-type semiconductor layer or n-side semiconductor layer”), an active layer, a second conductive semiconductor layer (hereinafter referred to as “p-type semiconductor layer or p-side semiconductor”). The layer may be a single film structure, a multilayer film structure, or a superlattice structure composed of two layers having different composition ratios. These layers may be provided with a composition gradient layer and a concentration gradient layer.

The n-type semiconductor layer may have a structure of two or more layers having different compositions and / or impurity concentrations.
For example, the first n-type semiconductor layer may be In _x Al _y Ga _1-xy N (0 ≦ x <1, 0 ≦ y
≦ 1, 0 ≦ x + y ≦ 1), preferably Al _x Ga _1-x N (
0 ≦ x ≦ 0.5), more preferably Al _x Ga _1-x N (0 <x ≦ 0.3). As specific growth conditions, it is preferable to form the growth temperature in the reactor at 900 ° C. or higher. The first n-type semiconductor layer can function as a cladding layer. A film thickness of about 0.5 to 5 μm is appropriate. As will be described later, when a conductive oxide film having a low refractive index is provided on the n-type semiconductor layer side, the first n-type semiconductor layer can be omitted.
The second n-type semiconductor layer can function as a light guide layer, and In _x Al _y Ga ₁
Can be formed by _{-x-y N (0 ≦ x} <1,0 ≦ y <1,0 ≦ x + y ≦ 1). The film thickness is suitably from 0.1 to 5 μm. The second n-type semiconductor layer can be omitted.
One or more semiconductor layers may be additionally formed between the n-type semiconductor layers.

The active layer may have either a multiple quantum well structure or a single quantum well structure. The well layer has a general formula In _x Al _y Ga _1-xy N containing at least In (0 ≦ x ≦ 1, 0 ≦ y <
1, 0 ≦ x + y ≦ 1). Increasing the In content makes it possible to emit light in the long wave region, and increasing the Al content makes it possible to emit light in the ultraviolet region.
Light emission in a wavelength region of about 650 nm is possible. Luminous efficiency can be improved by forming the active layer with a quantum well structure.

A p-type semiconductor layer is stacked on the active layer. The first p-type semiconductor layer can be formed of Al _x Ga _1-x N (0 ≦ x ≦ 0.5) containing p-type impurities. First p
The type semiconductor layer functions as a p-side electron confinement layer. The film thickness of the first p-type semiconductor layer is not particularly limited, but is, for example, 200 mm or less.
The second p-type semiconductor layer can function as a light guide layer, and In _x Al _y Ga ₁
Can be formed by _{-x-y N (0 ≦ x} <1,0 ≦ y <1,0 ≦ x + y ≦ 1). The film thickness of the second p-type semiconductor layer is also not particularly limited.
0Å.

Al _x G containing a p-type impurity functioning as a cladding layer on the second p-type semiconductor layer
Although a _1-x N (0 ≦ x ≦ 0.5) or a superlattice layer made of GaN and AlGaN can be formed, this layer may be omitted. By omitting this layer, the growth time of the p-side semiconductor layer after the active layer growth can be omitted.

In general, in order to reduce the resistance of the p-side semiconductor layer, the p-side semiconductor layer is preferably stacked at a higher temperature than the n-side semiconductor layer or the active layer. However, when the p-side semiconductor layer is grown at a high temperature, the active layer having a high In mixed crystal ratio may be decomposed. Therefore, by omitting this layer, damage to the active layer caused by growing the p-side semiconductor layer at a high temperature can be reduced. Furthermore, since the number of stacked p-side semiconductor layers having high resistance can be reduced,
The operating voltage can be reduced.

The third p-type semiconductor layer can be formed of Al _x Ga _1-x N (0 ≦ x ≦ 1) containing a p-type impurity. The third p-type semiconductor layer can be formed as a layer in contact with the conductive oxide layer 20 described above. Since the voltage tends to increase when a large amount of Al is contained, 0 ≦
It is preferable to satisfy x ≦ 0.3. Further, x = 0, that is, GaN is preferable because Mg which is a p-type impurity is easily activated and ohmic resistance with the conductive oxide layer is reduced.
These semiconductor layers may be mixed with In.
Further, the first p-type semiconductor layer and the second p-type semiconductor layer can be omitted.
The thickness of each layer is suitably about 3 nm to 300 nm.
One or more semiconductor layers may be additionally formed between p-type semiconductor layers.
By setting the total thickness of the p-side semiconductor layer to 700 nm or less and the thickness of the Al-containing layer to 600 nm or less, the cleaving property can be improved and the level difference on the cleavage plane can be reduced.

In a semiconductor laser device having a relatively long wavelength of 440 nm or more, it is necessary to increase the Al mixed crystal in the p-side and / or n-side cladding layer in order to provide a sufficient refractive index difference. In a semiconductor laser element that oscillates light in the ultraviolet region of 380 nm or less, light absorption can be prevented by forming a layer with a high Al mixed crystal. However, when a layer having a high Al mixed crystal is formed, cracks are likely to occur in the semiconductor layer. Therefore, by omitting the cladding layer, a highly reliable long wavelength semiconductor laser device with reduced cracks can be realized.

(Dielectric layer)
The dielectric layer 24 ensures insulation between the top surface of the p-side semiconductor layer, which is the bottom surface region of the ridge, and the side surface of the ridge, and also ensures a difference in refractive index with respect to the p-side semiconductor layer to control light leakage from the active layer. Has the function to obtain. For this reason, the dielectric layer 24 is suitably formed of a material having a refractive index lower than that of the semiconductor layer. For example, Si, Mg, Al, Hf, Nb, Zr
, Sc, Ta, Ga, Zn, Y, B, Ti and oxides thereof (for example, SiO ₂ , Al
₂ O ₃ , Nb ₂ O ₃ , TiO ₂ , Ta ₂ O, etc.), nitrides (eg, AlN, AlGaN,
BN, etc.) and compounds such as fluoride. Of these, ZrO ₂ and SiO ₂ (refractive index: about 1.45) are preferable.

The dielectric layer may be a single layer or may be used by laminating a plurality of materials having different compositions in order to obtain an appropriate refractive index. The film thickness of the dielectric is not particularly limited and can be adjusted as appropriate depending on the composition of the material, the refractive index, and the like, and is preferably about the same as the conductive oxide layer. Specifically, about 0.1-2.0 micrometers is mentioned.

Further, in such a semiconductor laser element, as shown in FIG. 1, a protective film 25 may be formed on the side surface of the semiconductor layer. The protective film 25 only needs to be made of an insulating material,
Preferably, it is made of a material having a refractive index lower than that of the semiconductor layer.
In the semiconductor laser device shown in FIG. 1, the protective film 25 has a dielectric layer 2 separated from the ridge.
4 is laminated so as to cover the side surface from the upper surface of the semiconductor layer. The dielectric layer 24 and the protective film 25 may be made of the same material or different materials.

(Other configurations)
In the semiconductor laser device of the present invention, for example, an insulating protective film or a protective film made of a nitride film is formed on the front-side end face and / or the rear-side end face that is the resonator end face. Dielectric layer 24
The protective film 25 may be made of an insulating material, and is preferably made of a material having a refractive index lower than that of the semiconductor layer.

(Method for manufacturing semiconductor laser device)
In the method for manufacturing a semiconductor laser device of the present invention, as shown in steps (a) to (i) of FIG. 4, first, in step (a), a semiconductor layer including an active layer is formed on a substrate. Here, the semiconductor layer is formed by laminating a first conductive semiconductor layer 12 (n-side semiconductor layer), an active layer 14 and a second conductive semiconductor layer 16 (p-side semiconductor layer) in this order on a substrate.

Next, a mask layer having a predetermined shape is formed on the semiconductor layer of the wafer in which the semiconductor layers are stacked on the substrate.
One method of forming the mask layer is disclosed below, but the method of forming the mask layer is not limited to this.
First, a mask layer 34 and a resist layer (not shown) are sequentially formed on the semiconductor layer. The resist layer is patterned into a predetermined shape, and further the mask layer is patterned into the same shape using the resist layer as a mask. After patterning the mask layer, the resist layer can be removed to form a mask layer having a predetermined shape. Here, examples of the material for the mask layer include SiO ₂ , SiON, SiN, and the like. This mask layer can be diverted with other known mask materials. The film thickness of the mask layer is not particularly limited. For example,
It is suitable to set it as about 100 nm-1000 nm, and about 200 nm-600 nm are preferable. The mask layer can be formed by a known method such as CVD, sputtering, or vapor deposition.

Subsequently, a ridge is formed on the semiconductor layer. A part of the p-side semiconductor layer on the upper surface of the semiconductor layer is removed from the opening of the mask layer to form a ridge.
The method for removing a part of the p-side semiconductor layer is not particularly limited, and any method of wet etching or dry etching may be used. Specifically, in consideration of the material of the semiconductor layer, it is preferable to select and remove an etchant that has a high selectivity with the mask layer. The size of the ridge substantially corresponds to the size of the mask layer, but the width of the bottom surface side is wide and the stripe width decreases as it approaches the top surface. It may be a shape in which these are combined.

The angle of the side surface of the ridge, that is, θ2 shown in FIG. 4A is preferably 60 ° to 90 °, more preferably 70 ° to 90 °, and still more preferably 80 ° to 90 °.
Here, in order to form the ridge in a state where the mask layer 34 is laminated on the upper surface of the ridge, it is preferable that the side surface of the mask layer 34 has an angle substantially equal to the angle of the ridge. In other words, the inclination angle θ2 ′ of the side surface of the ridge is preferably 0 ° to 30 °.

In step (b), a second mask layer 36 is formed in a region extending from at least the bottom surface region on both sides of the ridge to the mask layer 34 on the top surface of the ridge. The second mask layer 36 is formed not only in the ridge bottom region and the ridge side surface but also in the region where the mask layer 34 is formed on the ridge top surface.
Here, the material of the second mask is not particularly limited, but it is preferable to pattern the resist layer. The film thickness of a 2nd mask layer is not specifically limited, For example, about 0.1 micrometer-3.0 micrometers are mentioned.

In step (c), a second mask pattern is formed. As a pattern forming method, the mask layer is dissolved, partially removed or thinned from the surface of the second mask layer 36 formed in the step (b) by using an appropriate etchant by a wet etching method or a dry etching method. The method of doing etc. is mentioned. Thereby, the mask layer can be exposed. That is, an opening having the same shape as the ridge can be formed at the position where the ridge is formed. As a method for forming the opening in the second mask, a method of performing wet etching, dry etching, or the like by selecting an appropriate etchant using photolithography in consideration of a resist pattern material or the like can be given. For example, nitric acid, hydrofluoric acid, dilute hydrochloric acid, dilute nitric acid, sulfuric acid, hydrochloric acid, acetic acid, hydrogen peroxide and other acids alone or a mixture of two or more, alkaline solutions such as ammonia alone or ammonia and hydrogen peroxide, etc. And a suitable etchant such as various surfactants. In addition, examples of the method for removing the second mask remaining in unnecessary portions include known methods such as immersion, ultrasonic treatment, or a combination thereof. This can also be used to remove other mask layers and the third mask layer.

The opening formed by the second mask layer 36 is preferably narrower than the width (a1) of the top surface of the ridge. Thereby, the conductive oxide layer having the inclined portion on the side surface can be easily formed. Further, the upper surface of the second mask layer 36 is formed so as to be positioned above the upper surface 28 of the ridge. For example, as shown in FIG. 4C, the upper surface of the mask layer 34 above the ridge and the upper surface of the second mask layer 36 can be formed to be substantially flush with each other.

In step (d), the mask layer 34 on the top surface of the ridge is removed. As a method for removing the mask layer 34, it is preferable to use etching such as wet etching. As the method for removing the mask layer 34 here, the above-described method for forming the opening of the second mask layer 36 can also be used. As a result, a recess is formed in the portion where the second mask layer 36 is removed, and the ridge upper surface 28 is exposed on the bottom surface of the recess.

In the step (e), the conductive oxide layer 20 is formed on the ridge upper surface 28 and the second mask layer 36.
Form. Here, the conductive oxide layer 20 is formed on the upper surface of the ridge exposed after the removing step of the step (d). As a method for forming the conductive oxide layer, a known method can be used, but a sputtering method or a vapor deposition method is preferably used. Here, the second mask layer 36
Since the opening is a recess, the conductive oxide layer having the flat upper surface 30 and the inclined portion 32 can be formed by forming the conductive oxide layer. Further, the width of the electrode in contact with the ridge upper surface is substantially the same as the width of the ridge. However, when the ridge width is 7.0 μm or more, the electrode may be formed narrower than the ridge width.

Here, in the step (h) described later, the dielectric layer 24 is left in the side surface of the ridge and the bottom surface region of the ridge, while the dielectric layer 24 is removed in the region in contact with the conductive oxide layer 20. In order to perform well, the side angle (θ1) of the conductive oxide layer 20 is formed to be smaller than the angle (θ2) of the ridge side surface. In other words, the conductive oxide layer 2
The inclination angle (θ1 ′) of the zero side surface is formed to be larger than the inclination angle (θ2 ′) of the ridge side surface.
θ1 is preferably 45 ° to 85 °, and more preferably 60 ° to 80 °. θ1 ′ is preferably 15 ° to 45 °, more preferably 10 ° to 30 °.

In step (f), the second mask layer 36 and the conductive oxide layer 20 thereon are removed to expose the ridge bottom region and the ridge side surface. Here, by removing the second mask layer 36, the conductive oxide layer thereon is simultaneously removed. As a method for removing the second mask layer 36 here, any of the above-described removal methods may be used, but it is preferable to use a lift-off method or wet etching.

In step (g), the dielectric layer 24 extends from the bottom surface region of the ridge to the top surface of the conductive oxide layer.
Form. The dielectric layer 16 can be formed by a method known in the art such as a sputtering method, a vacuum deposition method, a vapor phase growth method, or the like.

In step (h), the dielectric layer 24 is removed from the surface of the conductive oxide layer 20 with the dielectric layer 24 left on the side surfaces of the ridge.
The removal method is not particularly limited, but is preferably an etch back method.
An example of a method of removing the dielectric layer 24 from the surface of the conductive oxide layer 20 while leaving the dielectric layer 24 on the side surface of the ridge and the bottom surface region 40 of the ridge will be described with reference to FIG.
In step (g), the dielectric layer 24 extends from the bottom surface region of the ridge to the top surface of the conductive oxide layer.
Then, a third mask 38 is formed to cover the dielectric layer 24 as shown in step (j) shown in FIG.

Next, in step (k), an appropriate etchant is selected from the surface of the third mask layer 38 by wet etching and etched. At this time, etching is performed so that the upper surface of the third mask layer 38 is positioned slightly higher than the lower surface of the conductive oxide layer 20. As a result, the upper surface of the third mask layer 38 and the dielectric layer 24 slightly lower than that are removed, and the surface of the conductive oxide layer can be exposed without covering the surface of the ridge. In addition, a dielectric layer 24 that can completely cover the bottom surface of the ridge can be formed.

The side surface of the conductive oxide layer 20 formed on the ridge is smaller than the angle of the ridge side surface by the step (e). That is, by setting θ1 <θ2 and θ1 ′> θ2 ′, the dielectric layer formed on the side surface of the ridge is less likely to be etched than the dielectric layer formed on the side surface of the conductive oxide layer. As described above, in a state where θ1 <θ2 and θ1 ′> θ2 ′, etching is performed so that the upper surface of the third mask layer 38 is positioned slightly higher than the lower surface of the conductive oxide layer 20. The body layer 24 can be arranged with high accuracy.

In this manner, the dielectric layer 24 is left on the side surface of the ridge, and the dielectric layer 24 is removed from the surface of the conductive oxide layer 20 in step (i), and the upper surface of the conductive oxide layer 20 is then removed. 30
And the metal layer 22 which coat | covers the inclination part 32 of a side is formed.
The metal layer 22 can be used as a so-called pad electrode, and is made of Ni, Ti, Au, Pt.
, Pd, W, etc., are preferable. Specifically, a film formed in the order of W—Pd—Au or Ni—Ti—Au and Ni—Pd—Au from the conductive oxide layer side can be given. The film thickness of the pad electrode is not particularly limited, but the film thickness of the final layer of Au is preferably about 100 nm or more. The shape of the metal layer 22 is not particularly limited.

In addition, as shown in steps (A) to (F) of FIG. 6, first, in the same manner as described above, in the method of manufacturing another semiconductor laser device, the first conductive type semiconductor is formed on the substrate in the same manner as described above. A layer, an active layer, a second conductivity type semiconductor layer, and a conductive oxide layer are sequentially stacked to form a semiconductor layer 50;
Further, a conductive oxide layer 51 is formed thereon.

In step (B), a mask layer 52 having a predetermined shape is formed on the conductive oxide layer 51.
The mask layer 52 here can be formed in the same manner as described above. This mask layer 5
2 is used to remove the conductive oxide layer 51 exposed from the mask layer 52, thereby patterning the conductive oxide layer 51 whose side surfaces are inclined. For the removal here, it is suitable to use the etching as described above, and anisotropic etching, for example, RIE.
Is preferably used. At this time, a condition that the mask layer 52 can be removed to some extent is selected. Thereby, the surface of the semiconductor layer 50 is reduced in the horizontal direction. As a result, a part of the conductive oxide layer 51 existing immediately below the side surface of the mask layer 52 is removed, and a taper shape is obtained. In other words, the degree of etching in the thickness direction of the conductive oxide layer 51 is changed by a combination of the slight decrease in the horizontal direction of the mask layer due to etching and the anisotropic etching. by this,
The side surface of the conductive oxide layer 51 can be inclined.

In step (C), using the mask layer 52 and the conductive oxide layer 51, a part of the second conductivity type semiconductor layer is removed to form a ridge. Here, the ridge can be formed in substantially the same manner as described above. The removal of the second conductivity type semiconductor layer at this time is suitable for etching under conditions where the etching rates of the semiconductor layer and the conductive oxide layer are different.
Thus, it is possible to control so that a phenomenon such as a horizontal decrease of the mask layer in the step (B) does not occur in the conductive oxide layer. Further, it is preferable to use anisotropic etching. As a result, the change in the degree of etching in the thickness direction of the second conductive oxide layer can be minimized, and the second conductive oxide layer (that is, the ridge)
This side surface can be kept at an angle larger than the angle of the side surface of the conductive oxide layer 51 so as to satisfy the above-described relationship. In other words, the inclination angle of the ridge side surface is determined by the conductive oxide layer 5.
The inclination angle can be smaller than the inclination angle of one side surface.

In the step (D), the dielectric layer 53 is formed on the second conductive type semiconductor layer including the ridge in the same manner as described above while leaving the mask layer 52 remaining.

In step (E), the mask layer 52 is removed. For removal of the mask layer 52 at this time, it is suitable to use a lift-off method. As a result, the dielectric layer 53 is in close contact with the side surface of the ridge having a large angle, while the dielectric layer 53 is not in close contact with the side surface of the conductive oxide layer 51 existing on the ridge and having a small angle. Can be made. Thereby, the surface of the conductive oxide layer 51, that is, both the upper surface and the inclined side surface can be exposed.

In step (F), a metal layer 54 is formed on at least the upper surface of the conductive oxide layer 51 and the dielectric layer 53 in the same manner as described above.

In the method for manufacturing a semiconductor element of the present invention, it is preferable to polish the second main surface of the substrate at any stage, for example, before forming an n-side electrode described later. Any method known in the art can be used as the method for polishing the substrate.

Furthermore, it is preferable to form an n-side electrode on the second main surface of the substrate partially or entirely before and after the formation of the conductive oxide layer described above. The n-side electrode can be formed by, for example, sputtering, CVD, vapor deposition, or the like. For patterning the n-side electrode, it is preferable to use a lift-off method, and after forming the n-side electrode, it is preferable to anneal at about 300 ° C. or higher. Examples of the n-side electrode include a total film thickness of about 1 μm or less. The material of the n-side electrode is not particularly limited. For example, V (film thickness 10 nm) −Pt (film thickness 200) from the substrate side.
nm) -Au (film thickness 300 nm) in this order. Others include Ti (15 nm
) -Pt (200 nm) -Au (300 nm), Ti (10 nm) -Al (500 nm)
, Ti (6 nm) -Pt (100 nm) -Au (300 nm), Ti (6 nm) -Mo (
50 nm) -Pt (100 nm) -Au (210 nm) and the like.

A metallized electrode may be formed on the n-side electrode. For example, the metallized electrode is Ti-P.
t-Au- (Au / Sn), Ti-Pt-Au- (Au / Si), Ti-Pt-Au- (
Au / Ge), Ti—Pt—Au—In, Au—Sn, In, Au—Si, Au—Ge, or the like. The film thickness of the metallized electrode is not particularly limited. When the ohmic characteristics are maintained only with the metallized electrode, the n-side electrode can be omitted.

Optionally, for example, a protective film 25 may be formed on the dielectric layer 24 after the step (h). The protective film 25 can be formed by a method known in the art.

Optionally, a resonator surface is formed in the semiconductor layer. The resonator surface can be etched or cleaved, etc.
It can be formed by a method known in the art. When the resonator surface is formed by cleaving, it is preferable to form a cleaving auxiliary groove in a region separated from the ridge. The distance between the auxiliary grooves is preferably 40 μm or more, and more preferably 80 μm or more.
By forming the auxiliary groove in such a range, it is possible to reduce the level difference of the cleavage surface around the ridge while maintaining the cleavage accuracy at the intended position.

Further, it is preferable to form a protective film on the obtained resonator surface, that is, on the light reflecting side and / or the light emitting surface of the resonator surface at an arbitrary stage. The protective film is SiO ₂ , ZrO ₂ , TiO ₂ , Al ₂
A single layer film or a multilayer film made of O ₃ , Nb ₂ O ₅ , AlN, AlGaN or the like is preferable.
Furthermore, a semiconductor element chip can be obtained by dividing in the resonator direction.
This division can be formed by forming a division auxiliary groove at an arbitrary stage and scribing using the division auxiliary groove.

In the method for manufacturing a semiconductor laser device of the present invention, the side surface and top surface of the conductive oxide layer can be stably exposed from the dielectric layer, and the side surface of the ridge can be covered almost completely with the dielectric layer. . As a result, the formation of the dielectric layer can be controlled with high accuracy, and the manufacturing yield of the semiconductor laser device can be improved.

Examples of the semiconductor laser device of the present invention will be described below, but the present invention is not limited to the following examples.
Example 1
As shown in FIG. 1, the semiconductor laser device of this embodiment is a semiconductor in which an n-side semiconductor layer 12, an active layer 14, and a p-side semiconductor layer 16 are stacked in this order on a GaN substrate 10 having a C plane as a growth surface. A layered ridge 18 is formed on the upper surface of the p-side semiconductor layer 16.
A conductive oxide layer 20 is connected on the ridge 18. In the conductive oxide layer 20, the side surface of the conductive oxide layer is inclined with respect to the top surface of the ridge in a cross-sectional shape perpendicular to the stripe direction of the ridge, and the top surface of the conductive oxide layer The metal layer 22 is formed so as to cover the side surface and the dielectric layer 24. Further, although not shown, a dielectric film made of Al ₂ O ₃ is formed on the resonator surface of the semiconductor layer.

Such a semiconductor laser device can be formed by the following manufacturing method.
(Ridge formation)
First, the GaN substrate 10 is prepared. Next, a semiconductor layer in which the n-side semiconductor layer 12, the active layer 14, and the p-side semiconductor layer 16 are stacked in this order is formed on the substrate 10.
The composition of the well layer of the active layer 14 is In _0.20 Ga _0.80 N, and the oscillation wavelength is 445 nm.
The p-type semiconductor layer 16 is made of 10 nm AlGaN as the first p-type semiconductor layer and the second p-type semiconductor layer.
AlGaN as the p-type semiconductor layer is 0.5 μm, and GaN as the third p-type semiconductor layer is 15 nm.
Laminate.
Thereafter, Si is formed as a mask layer 34 on the almost entire surface of the p-side semiconductor layer 16 by a CVD apparatus.
An O ₂ film is formed with a thickness of 500 nm. Thereafter, the width of the mask layer is patterned to 15.0 μm by etching using a RIE (reactive ion etching) apparatus. Here, the width of the mask layer is a ridge width described later.

Next, as shown in FIG. 4A, a ridge is formed on the upper surface of the stacked semiconductor layers. Specifically, the ridge 18 is formed on the upper surface of the p-side semiconductor layer 16 that is the upper layer of the semiconductor layer. Here, by using the RIE apparatus, the p-side semiconductor layer 16 exposed at the opening of the mask layer is etched, whereby a striped ridge 1 having a width of about 15.0 μm and a height of about 0.45 μm.
8 is formed. The angle θ2 of the side surface of the ridge is 78 °, and the inclination angle θ2 ′ is 12 °.

Thereafter, as shown in FIG. 4B, a second mask layer 36 that covers the upper surface of the mask layer 34 from the ridge bottom region 40 is formed. This second mask layer has a resist layer thickness of 1.2 μm.
m.

Next, as shown in FIG. 4C, the second mask layer 22 is etched until the mask layer 34 is exposed. Specifically, it is formed by etching the second mask layer 22 using an RIE apparatus.

Next, as shown in FIG. 4D, the mask layer 21 exposed in the previous step is removed by wet etching. By this etching, the ridge upper surface 28 is exposed.

(Formation of conductive oxide layer)
Next, as shown in FIG. 4E, a conductive oxide layer 20 is formed on the ridge 18 and the second mask layer 36. Since this conductive oxide layer is formed on the ridge from the opening of the second mask layer, a flat surface is formed on the central portion of the ridge, which is directly below the opening, and inclined on both outer sides. Part 32 is formed. As a material for the conductive oxide layer, ITO is formed using a sputtering apparatus.
Here, the width a1 of the upper surface of the conductive oxide layer is 13.0 μm, and the width b1 of the lower surface is 15
. 0 μm. The thickness d1 of the conductive oxide layer is 400 nm. The angle θ1 of the side surface with respect to the upper surface of the ridge is 63 °, the inclination angle θ1 ′ is 27 °, and θ1 <θ2 and θ1.
The relationship “> θ2” is satisfied.

Next, as shown in FIG. 4F, by removing the second mask layer 36, the conductive oxide layer formed thereon is also removed at the same time. The method for removing the second mask layer is a lift-off method using a stripping solution, and the conductive oxide layer on the second mask layer is also removed simultaneously with the second mask layer. Since the conductive oxide layer 20 is in contact with the semiconductor layer only on the ridge upper surface 28, no current leakage occurs.

(Formation of dielectric layer)
Next, as shown in FIG. 4G, a dielectric layer 24 covering the ridge bottom surface region 40, the ridge side surface, the inclined surface of the conductive oxide layer, and the top surface of the conductive oxide layer is formed. This dielectric layer is
A SiO ₂ film is formed with a film thickness of 200 nm using a sputtering apparatus.

Next, a resist layer is formed as a third mask layer 38 with a thickness of 2.5 μm on the entire surface of the SiO ₂ film. As shown in FIG. 5K, the third mask layer 38 (resist layer) is planarized by etch back using oxygen. As a result, the third mask layer 38 is formed with openings at positions corresponding to the upper surface of the ridge on which the conductive oxide layer is formed and the upper portion of the side surface of the ridge.

Next, as shown in FIG. 5L, the dielectric layer 24 covered on the upper surface of the conductive oxide layer 20 is removed by dry etching. Since the angle θ2 of the side surface of the ridge is formed larger than the angle θ1 of the side surface of the conductive oxide layer, it is possible to etch a necessary portion by dry etching, that is, a dielectric layer covering the side surface of the ridge. As a result, the dielectric layer 24 is formed in a state where the entire side surface of the ridge is covered with the dielectric layer 24 and the upper surface and the side surface of the conductive oxide film 20 are exposed from the dielectric layer 24. can do.

Next, the second protective film 25 is formed on the ridge bottom region 40 in a region spaced about 35 μm from the ridge side surface. The second protective film 25 further covers the side surface of the semiconductor layer.
Thereafter, as shown in FIG. 4I, a metal layer 22 is formed on the conductive oxide layer 20 and the dielectric layer 24 as a p-side pad electrode. Further, the n-side electrode 26 is formed on the back surface of the substrate 10.
A dielectric film made of Al ₂ O ₃ is formed on the front-side resonator surface of the semiconductor layer. A dielectric multilayer film made of ZrO ₂ and SiO ₂ is formed on the rear resonator surface of the semiconductor layer. Thus, a semiconductor laser element can be formed.

As described above, in the semiconductor laser device of Example 1, the inclined portion 32 is provided in the conductive oxide layer in a state where the area of the conductive oxide layer on the side in contact with the semiconductor layer is ensured, so that the electric resistance The rate can be reduced. In addition, a large contact area between the metal layer 22 and the conductive oxide layer 20 can be taken, so that the operating voltage can be lowered and the power efficiency can be remarkably improved.
Further, according to such a manufacturing process, since the dielectric layer 24 can be formed only in a necessary and appropriate place with high accuracy, a semiconductor laser device having stable characteristics can be manufactured.

Example 2
In Example 1, the composition of the well layer of the active layer 14 is In _0.22 Ga _0.78 N, the oscillation wavelength is 510 nm, the ridge width is 5 μm, and the others are the same as in Example 1, and the semiconductor laser device is fabricated. create. The occurrence of cracks can be suppressed even in the long wavelength region.
Other effects are the same as those of the first embodiment.

Example 3
In Example 1, the composition of the second p-type semiconductor layer is changed from AlGaN to GaN. The composition of the well layer of the active layer 14 is In _0.05 Ga _0.95 N, and the oscillation wavelength is 405 n.
m, the ridge width is 1.5 μm, and the others are fabricated in the same manner as in the first embodiment. The same effect as in Example 1 can be obtained.

Example 4
In Example 1, θ1 is set to 76 °, θ2 is set to 84 °, and the semiconductor laser device is manufactured in the same manner as Example 1 except for the above. The same effect as in Example 1 can be obtained.

Example 5
In Example 1, the conductive oxide layer is made of IZO, and the others are formed in the same manner as in Example 1 to produce a semiconductor laser element. The same effect as in the first embodiment can be obtained.

Example 6
In Example 1, the plane orientation of the substrate is the (20-21) plane, and the composition of the second p-type semiconductor layer is changed from AlGaN to GaN. Other than that, a semiconductor laser device is fabricated in the same manner as in the first embodiment. The same effect as in the first embodiment can be obtained.

Example 7
In Example 1, the composition of the second p-type semiconductor layer is changed to a superlattice structure of InGaN and GaN. Further, the composition of the well layer of the active layer 14 is In _0.2 Ga _0.8 N, and the oscillation wavelength is 4
A semiconductor laser is fabricated in the same manner as in Example 1 except that the thickness is 73 nm, the ridge width is 2.5 μm, and the others are the same. The same effect as in Example 1 can be obtained.

Example 8
In Example 1, the plane orientation of the substrate is the (10-1-1) plane, and the composition of the second p-type semiconductor layer is changed from AlGaN to GaN. Other than that, a semiconductor laser device is fabricated in the same manner as in the first embodiment. The same effect as in the first embodiment can be obtained.

Example 9
In Example 1, the plane orientation of the substrate is the (10-1-2) plane, and the composition of the second p-type semiconductor layer is changed from AlGaN to GaN. Other than that, a semiconductor laser device is fabricated in the same manner as in the first embodiment. The same effect as in the first embodiment can be obtained.

Example 10
In Example 1, the plane orientation of the substrate is the (11-22) plane, and the composition of the second p-type semiconductor layer is changed from AlGaN to GaN. Other than that, a semiconductor laser device is fabricated in the same manner as in the first embodiment. The same effect as in the first embodiment can be obtained.

Example 11
The semiconductor laser device of Example 1 is formed by the following manufacturing method.
First, as shown in FIG. 6A, as in the manufacturing method of Example 1, on the GaN substrate 10,
A semiconductor layer 50 in which the n-side semiconductor layer 12, the active layer 14, and the p-side semiconductor layer 16 are stacked in this order is formed.
A conductive oxide layer 51 is formed on the semiconductor layer 50. An ITO film is formed as the conductive oxide layer 51 using a sputtering apparatus. The thickness d1 (see FIG. 2) of the conductive oxide layer 51 is 400 nm.

Next, as shown in FIG. 6B, as in Example 1, a SiO ₂ film having a thickness of 500 nm is formed as a mask layer 52 on almost the entire surface of the conductive oxide layer 51 by a CVD apparatus.
Thereafter, the width of the mask layer 52 is patterned to 15.0 μm by etching using an RIE apparatus.
Using this mask layer 52, the conductive oxide layer 51 is etched. The etching here is performed by, for example, an RIE apparatus using iodine as an etching gas. The side surface of the conductive oxide layer 51 patterned here can be formed into a tapered shape by the action of the above-described reduction of the mask layer 52, anisotropic etching, or the like. That is, the width a1 of the upper surface of the conductive oxide layer 51 is 13.0 μm, the width b1 of the lower surface is 15.0 μm, the angle θ1 of the side surface with respect to the upper surface of the semiconductor layer 50 is 63 °, and the inclination angle θ1 ′ is 27 °. It can be.

As shown in FIG. 6C, a part of the second conductivity type semiconductor layer is removed using the mask layer 52 and the conductive oxide layer 51. This removal can form a stripe-shaped ridge having a width of about 15.0 μm and a height of about 0.45 μm by etching the semiconductor layer 50 using an RIE apparatus. Here, the angle θ2 of the side surface of the ridge is 78 °, the inclination angle θ2 ′ is 12 °, and the relationship of θ1 <θ2 and θ1 ′> θ2 ′ is satisfied.

As shown in FIG. 6D, the semiconductor layer 50 including the ridge while the mask layer 52 remains.
A dielectric layer 53 is formed thereon. The dielectric layer 53 is formed by forming a SiO ₂ film with a thickness of 200 nm using a sputtering apparatus. Accordingly, the ridge bottom surface region, the ridge side surface, the inclined surface of the conductive oxide layer 51, the side surface and the upper surface of the mask layer 52 can be covered.

As shown in FIG. 6E, the mask layer 52 is removed, and the surface of the conductive oxide layer 51 on the ridge is exposed. The removal of the mask layer 52 here is a lift-off method using a stripping solution as in the first embodiment. Simultaneously with the removal of the mask layer 52, not only the upper surface of the conductive oxide layer 51 but also the side surfaces can be separated from the dielectric layer 53, while the side surfaces of the ridge prevent the separation of the dielectric layer 53. Can be kept in close contact with each other.

Thereafter, as shown in FIG. 6F, at least the conductive oxide layer 51 as in Example 1.
A metal layer 54 is formed on the upper surface and the dielectric layer 53 as a p-side pad electrode. An n-side electrode is formed on the back surface of the substrate. A dielectric film made of Al ₂ O ₃ is formed on the front-side resonator surface of the semiconductor layer, and a dielectric multilayer film made of ZrO ₂ and SiO ₂ is formed on the rear-side resonator surface to obtain a semiconductor laser element.
Thus, the semiconductor laser device similar to that of the first embodiment can be manufactured by a method different from the manufacturing method of the first embodiment. In this semiconductor laser element, since the side surface of the conductive oxide layer is inclined with a large area on the side in contact with the semiconductor layer of the conductive oxide layer, the electrical resistivity can be reduced. In addition, the contact area between the metal layer 54 and the conductive oxide layer 51 can be increased, the operating voltage can be lowered, and the power efficiency can be significantly improved.
Furthermore, since the dielectric layer 53 can be formed with high accuracy by such a manufacturing process, a semiconductor laser device having stable characteristics can be manufactured.

The semiconductor laser device of the present invention can be used for all devices such as optical disks, optical communication systems, projectors or printing machines, measuring instruments, and the like.

DESCRIPTION OF SYMBOLS 1 Semiconductor laser element 10 Board | substrate 12 1st conductivity type semiconductor layer 14 Active layer 16 2nd conductivity type semiconductor layer 18 Ridge 20, 51 Conductive oxide layers 22, 54 Metal layers 24, 53 Dielectric layer 30 Upper surface 32 Inclined part 34 , 52 Mask layer 36 Second mask layer 38 Third mask layer 40 Ridge bottom region 50 Semiconductor layer

Claims (11)

A substrate,
A semiconductor layer in which a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are sequentially stacked on the substrate;
A striped ridge formed on the upper surface of the second conductive semiconductor layer;
A conductive oxide layer formed on the top surface of the ridge;
A dielectric layer having a refractive index lower than that of the semiconductor layer formed on a side surface of the ridge;
A metal layer formed to cover the conductive oxide layer and the dielectric layer,
A surface of the conductive oxide layer is exposed from the dielectric layer, and a side surface of the conductive oxide layer is inclined with respect to an upper surface of the ridge;
The semiconductor laser device, wherein an inclination angle of the side surface of the conductive oxide layer with respect to a normal direction is larger than an inclination angle of the ridge side surface with respect to the normal direction. The semiconductor laser device according to claim 1, wherein a refractive index of the conductive oxide layer is lower than a refractive index of the semiconductor layer. The height of the conductive oxide layer is d1, the height of the ridge is d2, the width of the upper surface of the conductive oxide layer is a1, the width of the lower surface of the conductive oxide layer is b1, and the upper surface of the ridge Where d2 / d1> (b2-a2) / (b1-a1) where a2 is a2 and the width of the lower surface of the ridge is b2.
The semiconductor laser device according to claim 1 or 2, wherein: When the height of the conductive oxide layer is d1, and the width of the upper surface is a1,
4. The semiconductor laser device according to claim 1, wherein d <b> 1 is 50 mm or more and d <b> 1 <a <b> 1 is satisfied. The semiconductor laser device according to any one of claims 1 to 4, wherein a height d2 of the ridge is 6000 mm or less. 6. The semiconductor laser device according to claim 1, wherein the semiconductor laser device is a nitride semiconductor laser device, and an oscillation wavelength of the nitride semiconductor laser device is not less than 440 nm. The semiconductor laser device according to claim 1, wherein the conductive oxide layer is made of ITO. The active layer contains In, and the second conductivity type semiconductor layer is In _x Al _y Ga _{1-x-.
The layer of yN} (0 ≦ x, 0 ≦ y, 0 ≦ x + y ≦ 1) is provided, and the layer in contact with the conductive oxide layer is GaN. The semiconductor laser device according to item. The second conductivity type semiconductor layer has a layer containing Al, and the thickness of the Al-containing layer is 60
The semiconductor laser device according to any one of claims 1 to 8, wherein the semiconductor laser element is not more than 00 ?. (A) A first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are sequentially stacked on a substrate to form a semiconductor layer, and a mask layer having a predetermined shape is formed on the semiconductor layer. Removing a part of the second conductive semiconductor layer using the mask layer to form a ridge;
(B) forming a second mask layer in a region extending from at least the ridge bottom region to the mask layer on the ridge;
(C) removing a part of the second mask layer on the ridge to expose the mask layer from the second mask layer;
(D) exposing the upper surface of the ridge by removing the mask layer on the ridge;
(E) forming a conductive oxide layer on the top surface of the ridge, the tilt angle of the side surface with respect to the normal direction of the top surface of the ridge being larger than the tilt angle of the side surface of the ridge with respect to the normal direction;
(F) removing the second mask layer;
(G) forming a dielectric layer in at least a region extending from the bottom surface region of the ridge to the conductive oxide layer on the ridge;
(H) removing the dielectric layer from the surface of the conductive oxide layer while leaving the dielectric layer on the side surface of the ridge, and exposing the surface;
(I) forming a metal layer on the conductive oxide layer and the dielectric layer left in the step (h), and a method for manufacturing a semiconductor laser device, comprising: (A) a step of sequentially laminating a first conductive semiconductor layer, an active layer, a second conductive semiconductor layer, and a conductive oxide layer on a substrate;
(B) forming a mask layer having a predetermined shape on the conductive oxide layer, and patterning the conductive oxide layer whose side surface is inclined using the mask layer;
(C) A part of the second conductive type semiconductor layer is removed using the mask layer and the conductive oxide layer, and the inclination angle of the side surface with respect to the normal direction of the top surface of the ridge is the conductive oxide. Forming a ridge smaller than the angle of inclination of the layer with respect to the normal direction;
(D) forming a dielectric layer on the second conductive semiconductor layer including the ridge while leaving the mask layer;
(E) removing the mask layer to expose the surface of the conductive oxide layer on the ridge;
(F) forming a metal layer on at least the upper surface of the conductive oxide layer and the dielectric layer, and a method for manufacturing a semiconductor laser device.