JP2015122876A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can stably detect a temperature of a semiconductor element.SOLUTION: A semiconductor device comprises: an element substrate on which a semiconductor element is formed; a first substrate bonded to the element substrate from one surface side of the element substrate; a second substrate bonded to the element substrate from the other surface side of the element substrate; a first temperature sensor provided on the first substrate; and a second temperature sensor provided on the second substrate.

Description

  The present invention relates to a semiconductor device provided with a temperature sensor.

  In a power module in which a power semiconductor element is modularized, measures are generally taken against the temperature rise of the module due to heat generated from the power semiconductor element due to high current and high voltage. In many cases, the module employs a heat dissipation structure and a temperature sensor is provided to control the temperature and control the operation according to the temperature.

  Patent Document 1 discloses a configuration in which a heat radiating aluminum plate and a heat sink are attached to the side opposite to the printed board side of a power module soldered to the printed board. In the gap between the power module and the printed board, a temperature detection element is provided on the printed board.

  Patent Document 2 discloses a configuration in which a first temperature sensor is built in a power module provided on a wiring board, and a second temperature sensor is provided on the heat radiation surface side of the power module in contact with a metal surface. ing.

  In Patent Document 3, an IGBT (Insulated Gate Bipolar Transistor) constituting a switching element of a three-phase inverter circuit and a temperature sensor close to the IGBT are provided on a metal case, and a cooling fin is provided on the non-mounting surface of the metal case. A configuration in which is provided is disclosed.

  In Patent Document 4, in a power circuit unit including two semiconductor switching elements, wiring is connected only to temperature measuring elements provided in the semiconductor switching element having a higher temperature, so that the number of temperature measuring terminals is reduced. The configuration described above is disclosed.

  Patent Document 5 discloses a configuration in which an IGBT element including a collector electrode wiring and an emitter electrode wiring is provided between a bus bar and a metal plate arranged on a heat sink in an IGBT module including an inverter. Yes. A temperature sensor is further disposed on the metal plate.

JP 2010-124570 A JP 2010-226782 A JP 2000-083383 A JP 2011-243909 A Japanese Patent No. 4695041

  However, in a conventional semiconductor device provided with a temperature sensor that detects the temperature of a semiconductor element, thermal stress generated at a joint where the semiconductor element is joined to another member is large. Therefore, if the thermal resistance of the heat path from the semiconductor element to the temperature sensor increases due to the occurrence of cracks or material modification at the joint due to thermal stress, the temperature sensor appropriately detects the temperature. I can't do that. In particular, in the power module, since the current and voltage handled by the power semiconductor are large, the thermal stress increases and the thermal resistance of the heat path tends to increase.

  The present invention provides a semiconductor device capable of stably detecting the temperature of a semiconductor element.

  The present invention includes an element substrate on which a semiconductor element is formed, a first substrate bonded to the element substrate from one side of the element substrate, and the element substrate bonded to the other side of the element substrate. The semiconductor device includes a second substrate, a first temperature sensor provided on the first substrate, and a second temperature sensor provided on the second substrate.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device which can detect the temperature of a semiconductor element stably can be provided.

It is sectional drawing which shows the structure of the semiconductor device which concerns on embodiment of this invention, (a) is a figure which shows heat transfer when one junction part generate | occur | produces abnormality, (b) is the other junction part abnormal. Diagram showing heat transfer The circuit diagram showing the circuit composition of the semiconductor device concerning the embodiment of the present invention The top view which shows the structure of one mounting board with which the semiconductor device which concerns on embodiment of this invention is equipped Sectional drawing which shows the 1st cross-sectional structure of the semiconductor device which concerns on embodiment of this invention Sectional drawing which shows the 2nd cross-sectional structure of the semiconductor device which concerns on embodiment of this invention Sectional drawing which shows the structure of the semiconductor device of the comparative example which concerns on embodiment of this invention

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 2 shows a circuit diagram of a circuit included in the configuration example of the semiconductor device 1 according to the present embodiment. Here, the semiconductor device 1 is a power module including a three-phase inverter circuit. The three-phase inverter circuit includes IGBTs 11 to 16 and diodes 21 to 26. A switch circuit in which one IGBT as a freewheeling diode is connected in parallel to one IGBT as a switching element is provided for each of the upper and lower phases of the UVW phase. The switch circuit SU1 including the IGBT 11 and the diode 21 constitutes the U-phase upper phase arm, and the switch circuit SU2 including the IGBT 12 and the diode 22 constitutes the U-phase lower phase arm. The switch circuit SV1 including the IGBT 13 and the diode 23 configures the V-phase upper phase arm, and the switch circuit SV2 including the IGBT 14 and the diode 24 configures the V-phase lower phase arm. The switch circuit SW1 including the IGBT 15 and the diode 25 configures the W-phase upper phase arm, and the switch circuit SW2 including the IGBT 16 and the diode 26 configures the W-phase lower phase arm. For example, the generator motor 2 is driven by the UVW three-phase output of the semiconductor device 1.

  As shown in FIGS. 4 and 5, the semiconductor device 1 is connected to the mounting substrate so that the element substrate 10 on which the semiconductor element is formed is sandwiched between two mounting substrates formed of circuit boards. It has a configuration. The element substrate 10 takes the form of a chip substrate, for example. Here, as an example, the semiconductor element formed on the element substrate 10 is the switch circuit including a pair of IGBTs and diodes. Further, here, on one surface of the element substrate 10, a first electrode is formed in a pad shape, for example, in which a collector electrode of an IGBT drawn out through an insulating structure and a cathode electrode of a diode are connected. Further, on the other surface of the element substrate 10, a second electrode formed by connecting the emitter electrode of the IGBT taken out through the insulating structure and the anode electrode of the diode is formed in a pad shape, for example. The gate electrode of the IGBT is separately drawn out to one surface such as the surface on the emitter electrode side. Of the two mounting substrates, one is a first substrate bonded to one side of the element substrate 10 which is the collector side of the IGBT, and the other is on the other side of the element substrate 10 which is the emitter side of the IGBT. It is the 2nd board | substrate joined. Hereinafter, the first substrate is referred to as a “collector side substrate”, and is illustrated as a collector side substrate BD1 in FIGS. The second substrate is referred to as an “emitter side substrate”, and is shown as an emitter side substrate BD2 in FIGS. As described above, the semiconductor device 1 has a double-sided heat dissipation structure that dissipates heat generated in the element substrate 10 from the substrates disposed on both sides.

  FIG. 3 shows a layout of elements and patterns when the collector-side substrate BD1 is viewed in plan among the two mounting substrates.

  For example, as shown in FIGS. 4 and 5, the collector-side substrate BD <b> 1 has a configuration in which copper plates 52 are laminated on the front and back sides of the insulating resin plate 51. The emitter side substrate BD2 has the same configuration.

  In the collector-side substrate BD1, the copper plate 52 is processed into an electrode or wiring pattern. On the surface on which the three-phase inverter circuit of the collector-side substrate BD1 is mounted, the copper plate 52 is composed of the positive electrode 100, the U-phase electrode 110, the V-phase electrode 130, the W-phase electrode 150, the wiring pattern 32, and the wiring pattern 33. Insulated and separated. The positions of these electrode and wiring patterns are not particularly limited, and each is connected to an external power source by a lead wiring (not shown). Further, a temperature sensor 31 is provided on the collector side substrate BD1. As will be described later, the temperature sensor 31 performs temperature measurement by detecting heat transmitted from the collector-side substrate BD1 to the temperature sensor 31.

  Here, the pattern is such that the positive electrode 100 includes each of the regions 101, 103, and 105 so as to be separated and arranged in a line. The pattern of the positive electrode 100 has a rectangular shape extending in the direction in which the regions 101, 102, and 103 are arranged. Area 101 is an area where an upper-phase switch circuit of the U phase is connected, area 102 is an area 103 where the upper-phase switch circuit of the V-phase is connected, and area 103 is connected to an upper-phase switch circuit of the W-phase Region 105.

  Further, here, the U-phase electrode 110, the V-phase electrode 130, and the W-phase electrode 150 are arranged so as to be insulated and separated in a line. The U-phase electrode 110, the V-phase electrode 130, and the W-phase electrode 150 are arranged in parallel to the direction in which the rectangular pattern of the positive electrode 100 extends. The U-phase electrode 110 is in the region 102 to which the U-phase lower phase switch circuit is connected, the V-phase electrode 130 is in the region 104 to which the V-phase lower phase switch circuit is connected, and the W-phase electrode 150 is in the W-phase. Each has a region 106 to which a lower phase switch circuit is connected. The regions 102, 104, and 106 are also arranged in a line in the direction in which the U-phase electrode 110, the V-phase electrode 130, and the W-phase electrode 150 are arranged.

  The wiring patterns 32 and 33 are arranged in a region between the positive electrode 100 and the arrangement of the U-phase electrode 110, the V-phase electrode 130, and the W-phase electrode 150. The wiring pattern 32 has a connection pad region 32a. The connection pad region 32a is a region to which the temperature sensor (first temperature sensor) 31 is connected. The connection pad region 32a is provided at the center of the collector side substrate BD1. The wiring pattern 32 and the wiring pattern 33 are electrode wirings having different polarities for energizing the temperature sensor 31. FIG. 3 shows a state in which the lower surface electrode of the temperature sensor 31 and the connection pad region 32a are connected by die bonding or soldering, and the upper surface electrode of the temperature sensor 31 and the wiring pattern 33 are connected by a wire 41. Has been.

  FIG. 4 is a cross-sectional view taken along the arrow line when the semiconductor device 1 is cut along the line MM passing through the region 103, the region 104, and the temperature sensor 31 in FIG. FIG. 5 is a cross-sectional view taken along the arrow when the semiconductor device 1 is cut along an NN line passing through the region 101, the region 103, and the region 105 in FIG.

  As shown in FIGS. 4 and 5, the collector-side substrate BD1 and the emitter-side substrate BD2 are disposed to face each other. The element substrate 10 on which each switch circuit of the three-phase inverter circuit is formed is arranged at a position sandwiched between the collector side substrate BD1 and the emitter side substrate BD2. The first electrode taken out on the surface on one side of the element substrate 10 is joined to the collector-side substrate BD1 by the joint portion C1, and the second electrode taken out on the surface on the other side of the element substrate 10. Are joined to the emitter-side substrate BD2 by the joint C2. Here, the joining portion C1 is composed of the soldering portion h1, and the joining portion C2 is a state in which the soldering portion h2, the spacer g, and the soldering portion h3 are sequentially arranged from the element substrate 10 side toward the emitter side substrate C2 side. It is configured. Thus, each of the joint portions C1 and C2 is made of a joining material. Each of the joint portions C1 and C2 may have a different configuration for each joint location, but here, for convenience of illustration, it is assumed that all joint locations shown in FIGS. 4 and 5 have the same configuration.

  As shown in FIG. 4, the copper plate 52 on the collector side substrate BD1 side included in the emitter side substrate BD2 is processed into an electrode or wiring pattern to which the element substrate 10 is bonded via the bonding portion C2. Specifically, the copper plate 52 of the emitter side substrate BD2 has the same wiring as the negative electrode 200, the U phase electrode 210, the V phase electrode 230, the W phase electrode 250, and the wiring patterns 32 and 33 of the collector side substrate BD1. It is processed into a pattern (not shown). The negative electrode 200 is disposed to face the U-phase electrode 110, the V-phase electrode 130, and the W-phase electrode 150 of the collector-side substrate BD1, and forms a common negative electrode for these UVW-phase electrodes. U-phase electrode 210 is opposed to U-phase electrode 110 of collector-side substrate BD1, V-phase electrode 230 is opposed to V-phase electrode 130 of collector-side substrate BD1, and W-phase electrode 150 is W-phase of collector-side substrate BD1. Opposite to the electrode 150, each is arranged. A wiring pattern similar to the wiring patterns 32 and 33 of the collector-side substrate BD1 is arranged in a region between the negative electrode 200 and the arrangement of the U-phase electrode 210, the V-phase electrode 230, and the W-phase electrode 250. And the connection pad area | region 42a is provided similarly to the connection pad area | region 32a of collector side board | substrate BD1. Further, a temperature sensor (second temperature sensor) 41 is provided on the emitter-side substrate BD2 so as to be connected to the connection pad region 42a. As will be described later, the temperature sensor 41 performs temperature measurement by detecting heat transferred from the emitter-side substrate BD2 to the temperature sensor 41.

  The element substrate 10 on which the U-phase upper-phase switch circuit SU1 is formed is connected to the positive electrode 100 of the collector-side substrate BD1 via the junction C1, and the U-side of the emitter-side substrate BD2 via the junction C2. It is connected to the phase electrode 210. The element substrate 10 on which the U-phase lower-phase switch circuit SU2 is formed is connected to the U-phase electrode 110 of the collector-side substrate BD1 via the junction C1, and the emitter-side substrate BD2 via the junction C2. Connected to the negative electrode 200.

  The element substrate 10 on which the V-phase upper-phase switch circuit SV1 is formed is connected to the positive electrode 100 of the collector-side substrate BD1 via the junction C1, and V of the emitter-side substrate BD2 via the junction C2. It is connected to the phase electrode 230. The element substrate 10 on which the V-phase lower-phase switch circuit SV2 is formed is connected to the V-phase electrode 130 of the collector-side substrate BD1 via the junction C1, and the emitter-side substrate BD2 via the junction C2. Connected to the negative electrode 200.

  The element substrate 10 on which the W-phase upper-phase switch circuit SW1 is formed is connected to the positive electrode 100 of the collector-side substrate BD1 through the junction C1, and the W of the emitter-side substrate BD2 through the junction C2. The phase electrode 250 is connected. The element substrate 10 on which the W-phase lower-phase switch circuit SW2 is formed is connected to the W-phase electrode 150 of the collector-side substrate BD1 via the junction C1, and the emitter-side substrate BD2 via the junction C2. Connected to the negative electrode 200.

  The entire semiconductor device 1 is integrated by filling the above-described electrodes with a sealing resin (not shown). Thus, the entire semiconductor device 1 is packaged in a form such as a glass epoxy substrate or a ceramic substrate.

  Next, with reference to FIG. 1, a temperature detection operation in the case where an abnormality occurs in the junction C <b> 1 or C <b> 2 due to thermal stress caused by heat generation of the element substrate 10 in the semiconductor device 1 having the above configuration will be described. Here, for convenience of explanation, the electrode of the collector side substrate BD1 joined by the joint portion C1 is represented by the symbol A, and the electrode of the emitter side substrate BD2 joined by the joint portion C2 is represented by the symbol B.

  As shown in FIG. 1A, the thermal resistance of the junction C1 is caused by a crack or material modification in the junction C1 due to thermal stress caused by heat generation of any one or a plurality of element substrates 10. Suppose an abnormality occurs that increases. At this time, the heat flow generated in the element substrate 10 is blocked or reduced at the joint C1. Therefore, the generated heat is hardly transmitted from the electrode A to the collector side substrate BD1 through the junction C1, but as shown by the arrow T1, it is transmitted from the electrode B to the emitter side substrate BD2 through the junction C2. Cheap. In the emitter-side substrate BD2, the temperature is transmitted to the temperature sensor 41 via an insulator such as the insulating resin plate 51 and a conductor such as the front and back copper plates 52 (including the aforementioned electrodes and connection pad regions 42a). Here, heat transfer to the temperature sensor 41 via the sealing resin between the collector side substrate BD1 and the emitter side substrate BD2 is assumed to be sufficiently smaller than heat transfer through the insulator and the conductor.

  Thereby, when the thermal resistance of the junction C1 is large, the temperature sensor 41 provided on the emitter-side substrate BD2 even if the temperature sensor 31 provided on the collector-side substrate BD1 cannot properly detect the temperature of the element substrate 10. Thus, the temperature detection can be appropriately performed.

  In addition, as shown in FIG. 1B, cracks or material modification occurs in the joint C2 due to thermal stress caused by heat generation of any one or a plurality of element substrates 10, and the joint C2 Assume that an abnormality that increases the thermal resistance occurs. At this time, the heat flow generated in the element substrate 10 is blocked or reduced at the junction C2. Therefore, the generated heat is hardly transmitted from the electrode B to the emitter-side substrate BD2 through the junction C2, but as shown by the arrow T2, it is transmitted from the electrode A to the collector-side substrate BD1 through the junction C1. Cheap. In the collector-side substrate BD1, the temperature is transmitted to the temperature sensor 31 via an insulator such as the insulating resin plate 51 and a conductor such as the front and back copper plates 52 (including the above-described electrodes and connection pad regions 32a). Here, heat transfer to the temperature sensor 31 via the sealing resin between the collector side substrate BD1 and the emitter side substrate BD2 is assumed to be sufficiently smaller than heat transfer through the insulator and the conductor.

  Thereby, when the thermal resistance of the junction C2 is large, the temperature sensor 31 provided on the collector-side substrate BD1 even if the temperature sensor 41 provided on the emitter-side substrate BD2 cannot properly detect the temperature of the element substrate 10. Thus, the temperature detection can be appropriately performed. As described above, according to this embodiment, it is possible to provide a semiconductor device that can stably detect the temperature of a semiconductor element.

  As a comparative example of the semiconductor device 1, FIG. 6 shows a semiconductor device having a configuration in which a temperature sensor is provided only on one substrate on which an element substrate is mounted. Here, the temperature sensor 31 is provided on the collector-side substrate BD1, while the emitter-side substrate BD2 is not provided with a temperature sensor. When an abnormality that increases the thermal resistance occurs at the joint C1, heat is not easily transmitted to the collector-side substrate BD1, and thus the temperature of the element substrate 10 cannot be detected by the temperature sensor 31 appropriately. Further, as such a comparative example, a semiconductor device having a configuration in which the element substrate 10 is mounted on one substrate, in which the emitter-side substrate BD2 and the junction C2 are removed from the configuration of FIG.

  4 and 5, in particular, the IGBT and the diode are formed in the element substrate 10 with a vertical structure in which current flows from one surface side to the other surface side in a direction perpendicular to the substrate surface. Yes. In this case, the element substrate 10 is in a circuit-connected state in which two conductive substrates (collector-side substrate BD1 and emitter-side substrate BD2) sandwiching the element substrate 10 are connected between the conductive portions. Therefore, the element substrate and the two mounting boards are generally joined together with a low thermal resistance, together with the joining parts C1 and C2 including the soldering part. However, the semiconductor device according to the present embodiment does not necessarily have a configuration in which the element substrate and the two mounting substrates are joined by the conductive portions. For example, the element substrate and the two mounting substrates may be bonded via an insulator, such as bonded at least on one side via an adhesive having high thermal conductivity. Therefore, the semiconductor element may be configured in a lateral structure in which a current flows in the element substrate 10 along the substrate surface. The semiconductor element may be another power semiconductor element or an element other than the power semiconductor element.

  4 and 5, the configuration of the joint portions C1 and the configuration of the joint portions C2 are the same. Therefore, when a plurality of element substrates 10 are mounted on the semiconductor device 1, in order to cause an abnormality in which the heat resistance of the element substrate 10 increases the thermal resistance of the joints, It becomes easy to cause abnormality at the same time at the plurality of joints C2. In this case, the temperature sensor 31 cannot perform appropriate temperature detection via a plurality of joints C1 all at once, or the temperature sensor 41 cannot perform appropriate temperature detection via a plurality of joints C2 all at once. Either of these states tends to appear. In consideration of the fact that a failure mode in which the thermal resistance increases at the same time between the joint C1 and the joint C2 having different configurations is unlikely to occur, one of the temperature sensors always appropriately detects the temperature of all the element substrates. It means you can do it. Also, with such a mechanism, the two temperature sensors perform different temperature detection operations. Therefore, using the absolute value and relative value of both temperature sensors, the temperature detected by one temperature sensor is higher than the predetermined temperature and the temperature detected by the other temperature sensor is lower than the predetermined temperature. It is also possible to perform detection.

  As described above, when one of the temperature sensors can always detect the temperature of all the element substrates appropriately, the number of temperature sensors provided on each mounting substrate may be one or less than the number of element substrates. There is no need to provide it. Therefore, when two or more element substrates 10 are mounted in the same package of the semiconductor device 1, the number of sensors and the number of sensor signal lines can be reduced as compared with the case where a temperature sensor is provided for each element substrate. Can do. In addition, the extraction of the sensor signal line out of the package is simplified. Further, it is not necessary to provide a temperature sensor inside the element substrate 10 or to stack a temperature sensor on the element substrate 10, and to reduce the size of the element substrate 10 and the configuration around the element substrate 10. Can do. As described above, a semiconductor device that is reduced in size and cost can be provided.

  For example, assuming that at least two signal lines are required for one temperature sensor, if a six-chip element substrate is mounted on one package and the temperature sensors are arranged on all the chips, at least 12 signal lines are provided. I need it. On the other hand, when one temperature sensor is provided for each mounting board as described in the present embodiment, two signal lines are provided for one temperature sensor as shown by the wiring patterns 32 and 33 in FIG. When used, a total of four signal lines are sufficient for the two mounting boards.

The present embodiment has been described above.
In FIG. 2, the power module of the inverter circuit is taken as an example, but the power module of the converter circuit is also given as a typical example. In FIG. 3, the temperature sensor is arranged at the center of the mounting board, but may be arranged at an arbitrary position, or may be arranged at a position evenly separated from each element board or near a specific element board. In the above example, the temperature sensors are provided on the surface on the side where the two mounting substrates face each other. However, the present invention is not limited thereto, and for each temperature sensor, the surface on the side where the two mounting substrates face each other or the opposite side. It may be provided on any part of the mounting substrate such as in the mounting substrate.

  The present invention is applicable to power modules, semiconductor devices having temperature characteristics, and the like.

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Generator motor 10 Element board | substrate 11, 12, 13, 14, 15, 16 IGBT
21, 22, 23, 24, 25, 26 Diode 31, 41 Temperature sensor 32, 33 Wiring pattern 32a, 42a Connection pad area 51 Insulating resin plate 52 Copper plate 100 Positive electrode 200 Negative electrode 101, 102, 103, 104, 105, 106 Region 110, 210 U phase electrode 130, 230 V phase electrode 150, 250 W phase electrode SU1, SU2, SV1, SV2, SW1, SW2 Switch circuit T1, T2 Arrow A, B Electrode BD1 Collector side substrate BD2 Emitter side substrate C1 , C2 Junction parts h1, h2, h3 Soldering part g Spacer

Claims (1)

An element substrate on which a semiconductor element is formed;
A first substrate bonded to the element substrate from one side of the element substrate;
A second substrate bonded to the element substrate from the other side of the element substrate;
A first temperature sensor provided on the first substrate;
And a second temperature sensor provided on the second substrate.

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