JP2015103769A5 - - Google Patents
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- Publication number
- JP2015103769A5 JP2015103769A5 JP2013245647A JP2013245647A JP2015103769A5 JP 2015103769 A5 JP2015103769 A5 JP 2015103769A5 JP 2013245647 A JP2013245647 A JP 2013245647A JP 2013245647 A JP2013245647 A JP 2013245647A JP 2015103769 A5 JP2015103769 A5 JP 2015103769A5
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- mask
- aperture ratio
- etch rate
- reaction product
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012545 processing Methods 0.000 claims 24
- 239000007795 chemical reaction product Substances 0.000 claims 19
- 230000004907 flux Effects 0.000 claims 18
- 238000000034 method Methods 0.000 claims 18
- 238000010494 dissociation reaction Methods 0.000 claims 15
- 230000005593 dissociations Effects 0.000 claims 15
- 238000011156 evaluation Methods 0.000 claims 15
- 239000007787 solid Substances 0.000 claims 14
- 238000005530 etching Methods 0.000 claims 12
- 238000004088 simulation Methods 0.000 claims 9
- 238000013461 design Methods 0.000 claims 8
- 230000000007 visual effect Effects 0.000 claims 7
- 238000003754 machining Methods 0.000 claims 5
- 230000010365 information processing Effects 0.000 claims 3
- 238000004891 communication Methods 0.000 claims 2
- 238000004364 calculation method Methods 0.000 claims 1
- 150000002500 ions Chemical class 0.000 claims 1
- 230000001681 protective effect Effects 0.000 claims 1
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013245647A JP6173889B2 (ja) | 2013-11-28 | 2013-11-28 | シミュレーション方法、シミュレーションプログラム、加工制御システム、シミュレータ、プロセス設計方法およびマスク設計方法 |
| TW103136187A TWI661323B (zh) | 2013-11-28 | 2014-10-20 | 模擬方法，模擬程式，製程控制系統，模擬器，製程設計方法及光罩設計方法 |
| US14/522,065 US9431310B2 (en) | 2013-11-28 | 2014-10-23 | Simulation method, simulation program, process control system, simulator, process design method, and mask design method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013245647A JP6173889B2 (ja) | 2013-11-28 | 2013-11-28 | シミュレーション方法、シミュレーションプログラム、加工制御システム、シミュレータ、プロセス設計方法およびマスク設計方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2015103769A JP2015103769A (ja) | 2015-06-04 |
| JP2015103769A5 true JP2015103769A5 (OSRAM) | 2016-04-14 |
| JP6173889B2 JP6173889B2 (ja) | 2017-08-02 |
Family
ID=53183798
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013245647A Active JP6173889B2 (ja) | 2013-11-28 | 2013-11-28 | シミュレーション方法、シミュレーションプログラム、加工制御システム、シミュレータ、プロセス設計方法およびマスク設計方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US9431310B2 (OSRAM) |
| JP (1) | JP6173889B2 (OSRAM) |
| TW (1) | TWI661323B (OSRAM) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7802917B2 (en) * | 2005-08-05 | 2010-09-28 | Lam Research Corporation | Method and apparatus for chuck thermal calibration |
| JP6516603B2 (ja) * | 2015-04-30 | 2019-05-22 | 東京エレクトロン株式会社 | エッチング方法及びエッチング装置 |
| US9865471B2 (en) * | 2015-04-30 | 2018-01-09 | Tokyo Electron Limited | Etching method and etching apparatus |
| US10534257B2 (en) * | 2017-05-01 | 2020-01-14 | Lam Research Corporation | Layout pattern proximity correction through edge placement error prediction |
| KR102644214B1 (ko) * | 2018-02-23 | 2024-03-07 | 에이에스엠엘 네델란즈 비.브이. | 컴퓨테이션 리소그래피를 위한 머신 러닝 모델을 트레이닝시키기 위한 방법 |
| US10572697B2 (en) | 2018-04-06 | 2020-02-25 | Lam Research Corporation | Method of etch model calibration using optical scatterometry |
| CN112005347B (zh) | 2018-04-10 | 2025-04-04 | 朗姆研究公司 | 抗蚀剂和蚀刻建模 |
| US11921433B2 (en) | 2018-04-10 | 2024-03-05 | Lam Research Corporation | Optical metrology in machine learning to characterize features |
| JP7190495B2 (ja) | 2018-09-03 | 2022-12-15 | 株式会社Preferred Networks | 推論方法、推論装置、モデルの生成方法及び学習装置 |
| WO2020049974A1 (ja) | 2018-09-03 | 2020-03-12 | 株式会社Ｐｒｅｆｅｒｒｅｄ Ｎｅｔｗｏｒｋｓ | 学習装置、推論装置、学習モデルの生成方法及び推論方法 |
| JP7345382B2 (ja) * | 2018-12-28 | 2023-09-15 | 東京エレクトロン株式会社 | プラズマ処理装置及び制御方法 |
| WO2020154862A1 (en) * | 2019-01-28 | 2020-08-06 | Yangtze Memory Technologies Co., Ltd. | Systems and methods for designing dummy patterns |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6909930B2 (en) * | 2001-07-19 | 2005-06-21 | Hitachi, Ltd. | Method and system for monitoring a semiconductor device manufacturing process |
| US7363099B2 (en) * | 2002-06-07 | 2008-04-22 | Cadence Design Systems, Inc. | Integrated circuit metrology |
| JP3639268B2 (ja) * | 2002-06-14 | 2005-04-20 | 株式会社日立製作所 | エッチング処理方法 |
| JP5050830B2 (ja) * | 2007-12-19 | 2012-10-17 | ソニー株式会社 | ドライエッチング装置および半導体装置の製造方法 |
| JP5440021B2 (ja) * | 2009-08-24 | 2014-03-12 | ソニー株式会社 | 形状シミュレーション装置、形状シミュレーションプログラム、半導体製造装置及び半導体装置の製造方法 |
| JP5732843B2 (ja) * | 2010-12-21 | 2015-06-10 | ソニー株式会社 | シミュレータ、加工装置、ダメージ評価方法、及び、ダメージ評価プログラム |
-
2013
- 2013-11-28 JP JP2013245647A patent/JP6173889B2/ja active Active
-
2014
- 2014-10-20 TW TW103136187A patent/TWI661323B/zh not_active IP Right Cessation
- 2014-10-23 US US14/522,065 patent/US9431310B2/en active Active
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