JP2015095467A - Reverse conducting igbt - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an art to inhibit gate interference in a reverse conducting IGBT.SOLUTION: A reverse conducting IGBT 1 comprises a semiconductor layer 10 which includes: an n-type drift region 14 in contact with a trench gate 30; a p-type body region 15 in contact with the trench gate 30, which is provided on the drift region 14; an n-type emitter region 17 in contact with the trench gate, which is provided on the body region 15; and a p-type intervenient region 18 which is provided on the emitter region 17 and intervenes between the emitter region 17 and an emitter electrode 24. The intervenient region 18 and the emitter region 17 compose a tunnel diode.

Description

  The present invention relates to a reverse conducting IGBT (Reverse Conducting Insulated Gate Bipolar Transistor).

  A reverse conducting IGBT in which a diode structure is integrated in a semiconductor layer in which an IGBT structure is formed has been developed. As shown in FIG. 8, this kind of reverse conducting IGBT is often used for the six transistors Tr1-6 constituting the three-phase inverter, and the diode structure operates as a free wheeling diode (FWD). To do.

  FIG. 9 shows a timing chart of gate signals input to the transistors Tr1-6. The phases of the gate signals of the upper and lower transistors are shifted by about 180 degrees, the phases of the gate signals of the U-phase and V-phase transistors are shifted by about 120 degrees, and the phases of the gate signals of the V-phase and W-phase transistors are approximately It is shifted by 120 degrees.

  For example, at time t1, a current flows through the IGBT structure of the transistors Tr1, Tr3, Tr6. At time t3, current flows through the IGBT structure of the transistors Tr2, Tr3, Tr6. Here, at time t2, which is a transition period from time t1 to time t3, a reflux current flows through the diode structure of the transistor Tr2, and the gate signal of the transistor Tr2 is on. Thus, in the three-phase inverter, there is a mode in which the gate voltage is applied to the corresponding gate when the return current flows through the diode structure.

  When a gate voltage is applied to the gate, the n-type drift region and the n-type emitter region are connected via the channel. Both the n-type emitter region and the p-type body region are connected to a common emitter electrode. For this reason, when a gate-on voltage is applied to the gate, it is difficult to apply a sufficient voltage in the forward direction of the diode structure composed of the p-type body region and the n-type drift region. As shown in FIG. 10, this phenomenon is called gate interference, and the forward voltage of the diode structure varies greatly depending on on / off of the gate signal.

  Patent Document 1 proposes a technique for providing an external circuit configured to detect a return current flowing in a diode structure and block a gate signal in order to prevent such gate interference. Yes.

JP 2008-72848 A

  As in Patent Document 1, in the technique of providing an external circuit, the control becomes complicated and the cost increases. The present specification aims to provide a technique for improving gate interference by devising the internal structure of a reverse conducting IGBT.

  One embodiment of the reverse conducting IGBT disclosed in the present specification includes a semiconductor layer, an insulated gate, and an emitter electrode provided on a surface of the semiconductor layer. The semiconductor layer is provided on the first conductivity type drift region and the drift region in contact with the insulated gate, and is provided on the second conductivity type body region and the body region in contact with the insulated gate. A first conductivity type emitter region in contact with the insulated gate, and a second conductivity type intervening region provided on the emitter region and interposed between the emitter region and the emitter electrode. The intervening region and the emitter region constitute a tunnel diode.

Another embodiment of the reverse conducting IGBT disclosed in the present specification includes a semiconductor layer, an insulated gate, and an emitter electrode provided on the surface of the semiconductor layer. The semiconductor layer is provided on the first conductivity type drift region and the drift region in contact with the insulated gate, and is provided on the second conductivity type body region and the body region in contact with the insulated gate. A first conductivity type emitter region in contact with the insulated gate, and a second conductivity type intervening region provided on the emitter region and interposed between the emitter region and the emitter electrode. The impurity concentration of the intervening region is 1 × 10 ²⁰ cm ⁻³ or more. The impurity concentration of the emitter region is 1 × 10 ²⁰ cm ⁻³ or more. The impurity concentration here can be rephrased as carrier concentration, and the same applies hereinafter.

  In each of the reverse conducting IGBTs of the above embodiment, a diode is formed between the second conductivity type intervening region and the first conductivity type emitter region. Due to the voltage drop of the diode, a forward voltage necessary for the diode structure built in between the body region and the drift region is applied, so that gate interference can be suppressed. Furthermore, in any of the reverse conducting IGBTs of the above embodiment, a diode formed between the intervening region and the emitter region functions as a tunnel diode. For this reason, when the IGBT structure is turned on, a tunnel current flows through the intervening region, so that an increase in the ON voltage of the IGBT structure can be suppressed.

The principal part sectional drawing of the reverse conduction IGBT of an Example is typically shown. The equivalent circuit of reverse conducting IGBT of an Example is shown. The principal part expanded sectional view of the periphery of the intervention area | region of the reverse conduction IGBT of an Example is shown typically. In the reverse conducting IGBT of the embodiment, the IV characteristic of the diode built in between the body region and the drift region is shown. In the reverse conducting IGBT of the embodiment, the profile in the thickness direction of the impurity concentration of the intervening region, the emitter region and the body region is shown. The IV characteristic of reverse conducting IGBT of an Example is shown. It is principal part sectional drawing of the reverse conduction IGBT of a modification. The circuit structure of an inverter circuit is shown. 3 shows a timing chart of gate signals for transistors constituting an inverter circuit. It is a figure explaining the influence of gate interference in the forward voltage and the forward current of the diode structure included in reverse conducting IGBT.

The technical features disclosed in this specification will be summarized below. The items described below have technical usefulness independently.
(Feature 1) The technique disclosed in this specification is embodied in a reverse conducting IGBT in which a diode structure is integrated in a semiconductor layer in which an IGBT structure is formed.
(Characteristic 2) The reverse conducting IGBT disclosed in the present specification is characterized in that it is provided on the emitter region and has an intervening region interposed between the emitter region and the emitter electrode.
(Feature 3) The intervening region and the emitter region may constitute a tunnel diode. In this case, the intervening region is configured such that a tunnel current flows when the intervening region and the emitter region are reversely biased. According to this embodiment, when the IGBT structure is turned on, a tunnel current flows through the intervening region, so that an increase in the ON voltage of the IGBT structure can be suppressed.
(Feature 4) The impurity concentration of the intervening region may be 1 × 10 ²⁰ cm ⁻³ or more. The impurity concentration of the emitter region may be 1 × 10 ²⁰ cm ⁻³ or more. Such a high concentration intervening region and a high concentration emitter region constitute a tunnel diode. In this case, the intervening region is configured such that a tunnel current flows when the intervening region and the emitter region are reversely biased. According to this embodiment, when the IGBT structure is turned on, a tunnel current flows through the intervening region, so that an increase in the ON voltage of the IGBT structure can be suppressed.
(Feature 5) The semiconductor layer of the reverse conducting IGBT disclosed in this specification is provided in the second conductivity type collector region provided in a part under the drift region, and in the other part under the drift region. The cathode region of the first conductivity type may be provided. Here, the layout of the collector region and the cathode region provided under the drift region is not particularly limited. For example, a layout in which collector regions and cathode regions are alternately arranged when a semiconductor layer is observed in a specific cross section may be used.
(Feature 6) In the reverse conducting IGBT disclosed in this specification, when the semiconductor layer is viewed in plan, the range in which the collector region is present is the IGBT range, and the range in which the cathode region is present is the diode range. The intervening region may be provided at least in the diode range. More preferably, the intervening region may be provided also in the IGBT range.

  As shown in FIG. 1, the reverse conducting IGBT 1 includes a semiconductor layer 10 divided into an IGBT range and a diode range, a collector electrode 22 that covers the back surface of the semiconductor layer 10, an emitter electrode 24 that covers the surface of the semiconductor layer 10, and A plurality of trench gates 30 formed in the surface layer portion of the semiconductor layer 10 are provided. In one example, the collector electrode 22 is made of aluminum, and the emitter electrode 24 is made of aluminum. The trench gate 30 includes a trench gate electrode 32 made of polysilicon and a gate insulating film 34 made of silicon oxide covering the trench gate electrode 32. In one example, the plurality of trench gates 30 are arranged in a stripe shape when the surface of the semiconductor layer 10 is viewed in plan.

As shown in FIG. 1, the semiconductor layer 10 is a silicon substrate, and includes a p ⁺ -type collector region 11, an n ⁺ -type cathode region 12, an n ⁺ -type buffer region 13, an n-type drift region 14, p It includes a type body region 15, a p ⁺ type body contact region 16, an n ⁺ type emitter region 17, and a p ⁺ type intervening region 18.

  The collector region 11 is provided in a part of the back layer portion of the semiconductor layer 10. The collector region 11 is provided in a part below the drift region 14 and is disposed in the IGBT range. The collector region 11 has a high impurity concentration and is in ohmic contact with the collector electrode 22. The collector region 11 is formed, for example, by introducing boron into a part of the back layer portion of the semiconductor layer 10 using an ion implantation technique.

  The cathode region 12 is provided in a part of the back layer portion of the semiconductor layer 10. The cathode region 12 is provided in a part below the drift region 14, and is disposed in the diode range. The cathode region 12 has a high impurity concentration and is in ohmic contact with the collector electrode 22. The cathode region 12 is formed, for example, by introducing phosphorus into a part of the back layer portion of the semiconductor layer 10 using an ion implantation technique. In this example, one collector region 11 is arranged corresponding to the plurality of trench gates 30 and one cathode corresponding to the plurality of trench gates 30 so that the IGBT range and the diode range are clearly divided. Area 12 is arranged. This layout is an example, and various layouts can be adopted instead of this example. For example, a layout in which a plurality of cathode regions 12 are distributed with respect to the collector region 11 may be used.

  The buffer region 13 is provided between the collector region 11 and the body region 15, and between the cathode region 12 and the body region 15, and is disposed in both the IGBT range and the diode range. The buffer region 13 is formed, for example, by introducing boron from the advantage of the semiconductor layer 10 using an ion implantation technique.

  The drift region 14 is provided between the buffer region 13 and the body region 15, and is disposed in both the IGBT range and the diode range. The drift region 14 is in contact with the bottom of the trench gate 30. The drift region 14 is a remaining part in which another region is formed in the semiconductor layer 10, and the impurity concentration is constant in the thickness direction.

  The body region 15 is provided on the drift region 14 and is disposed in both the IGBT range and the diode range. Body region 15 is in contact with the side surface of trench gate 30. In other words, the trench gate 30 extends from the surface of the semiconductor layer 10 toward the deep part, penetrates through the body region 15 and reaches the drift region 14. The body region 15 is formed, for example, by introducing boron from the surface of the semiconductor layer 10 using an ion implantation technique.

  The plurality of body contact regions 16 are provided on the body region 15, are disposed in both the IGBT range and the diode range, and are exposed on the surface of the semiconductor layer 10. The impurity concentration of the body contact region 16 is higher than that of the body region 15 and is in ohmic contact with the emitter electrode 24. The body contact region 16 is formed, for example, by introducing boron into a part of the surface layer portion of the semiconductor layer 10 using an ion implantation technique.

  The plurality of emitter regions 17 are provided on the body region 15, are arranged in both the IGBT range and the diode range, and are in contact with the side surface of the trench gate 30. The plurality of emitter regions 17 are formed, for example, by introducing phosphorus from the surface of the semiconductor layer 10 using an ion implantation technique.

  The plurality of intervening regions 18 are provided on the emitter region 17, are disposed in both the IGBT range and the diode range, and are in contact with the side surface of the trench gate 30. The plurality of intervening regions 18 are interposed between the emitter region 17 and the emitter electrode 24. For this reason, the emitter region 17 is separated from the emitter electrode 24 by the intervening region 18 and is not in contact with the emitter electrode 24. The plurality of intervening regions 18 are formed, for example, by introducing boron into a part of the surface layer portion of the semiconductor layer 10 using an ion implantation technique.

  FIG. 2 shows an equivalent circuit of the reverse conducting IGBT 1. The MOS structure includes a drift region 14, a body region 15, an emitter region 17, and a trench gate 30. The diode D <b> 1 is a pn diode configured between the p-type body region 15 and the n-type drift region 14. In the reverse conducting IGBT 1, the diode D1 operates as a free wheel diode. The resistor R1 represents a drift resistor. The diode D <b> 2 is a pn diode configured between the p-type collector region 11 and the n-type buffer region 13. The resistor R2 indicates a cathode resistance. The reverse conducting IGBT 1 is characterized by having a diode D3. The diode D3 is configured between the p-type intervening region 18 and the n-type emitter region 17.

  As described in the background art, when the reverse conducting IGBT 1 is used for a three-phase inverter, there is a mode in which a gate-on voltage is applied to the trench gate 30 when a return current flows through the diode D1.

  For example, in an example in which the intervening region 18 is not provided, when a gate-on voltage is applied to the trench gate 30, a channel is formed on the entire side surface of the trench gate 30. For this reason, the emitter electrode 24 and the drift region 14 are short-circuited through this channel, and gate interference that makes it difficult to apply a sufficient voltage in the forward direction of the diode D1 configured by the body region 15 and the drift region 14 appears strongly.

  On the other hand, in the reverse conducting IGBT 1 of this embodiment, a diode D3 is formed between the intervening region 18 and the emitter region 17, as shown in FIG. For this reason, when an electron current flows through the channel on the side surface of the trench gate 30, it passes through the diode D3. In other words, the channel on the side surface of the trench gate 30 is not directly connected to the emitter electrode 24 but connected to the emitter electrode 24 via the diode D3. For this reason, when an electronic current flows through the diode D3, a forward voltage is applied to the diode D1 built between the body region 15 and the drift region 14 due to a voltage drop of the diode D3. Therefore, in the reverse conducting IGBT 1 of the present embodiment, even when a gate voltage is applied to the trench gate 30, the emitter electrode 24 and the drift region 14 are not short-circuited, and a forward voltage is applied to the diode D1, and the reflux is performed. Current flows well. Thus, in the reverse conducting IGBT 1, gate interference is suppressed.

  FIG. 4 shows the IV characteristics of the diode D1 built between the body region 15 and the drift region 14. As shown in FIG. 4, the IV characteristic of the diode D1 does not depend on whether the gate signal is on or off. For this reason, in the reverse conducting IGBT 1 of the present embodiment, gate interference is suppressed.

Further, as shown in FIG. 5, the reverse conducting IGBT 1 of this embodiment is characterized in that the intervening region 18 has a high impurity concentration and a thin thickness. Specifically, the impurity concentration of the intervening region 18 is 1 × 10 ²⁰ cm ⁻³ or more, preferably 1 to 5 × 10 ²¹ cm ⁻³ . The impurity concentration of the emitter region 17 is 1 × 10 ²⁰ cm ⁻³ or more, preferably in the range of 1 to 5 × 10 ²¹ cm ⁻³ . In this example, the impurity concentration of both the intervening region 18 and the emitter region 17 is about 1 × 10 ²¹ cm ⁻³ . Furthermore, the thickness of the intervening region 18 is smaller than the thickness of the emitter region 17 and is 0.2 μm or less, preferably in the range of 0.05 to 0.1 μm. In this example, the thickness of the intervening region 18 is about 0.05 μm. In this example, the half width in the thickness direction of the impurity concentration of the intervening region 18 is about 0.1 μm. The diode D3 composed of such a high concentration emitter region 17 and the high concentration intervening region 18 functions as a tunnel diode. For this reason, when the IGBT structure is turned on, the diode D3 between the emitter region 17 and the intervening region 18 is reverse-biased, whereby a tunnel current flows through the intervening region 18. For this reason, when the IGBT structure is turned on, the diode D3 between the emitter region 17 and the intervening region 18 substantially disappears, and can be regarded as equivalent to a resistor. Therefore, since the current flowing through the IGBT structure is not inhibited, the on-operation of the IGBT structure is not prevented.

  FIG. 6 shows the IV characteristics of the reverse conducting IGBT 1 of this example. Here, the comparative example is an example in which the intervening region 18 is not provided. As shown in FIG. 6, regarding the IV characteristics of the reverse conducting IGBT 1 of this example, even if the intervening region 18 is provided, an increase in the on-voltage is suppressed.

  In the reverse conducting IGBT 1 of the present embodiment, the intervening region 18 is provided in both the diode range and the IGBT range. For example, even if the intervening region 18 is provided only in the diode range, the reverse conducting IGBT 1 can exhibit an effect of suppressing gate interference. Preferably, the intervening region 18 is provided in both the diode range and the IGBT range. Highly effective in suppressing gate interference.

  In the reverse conducting IGBT 1 of the present embodiment, an example in which a silicon substrate is used as the semiconductor layer 10 is illustrated, but the semiconductor material of the semiconductor layer 10 is not particularly limited. For example, silicon carbide, gallium nitride, aluminum nitride, or diamond may be used as the semiconductor material of the semiconductor layer 10.

Further, as shown in FIG. 7, the insulated gate of the reverse conducting IGBT 1 may be a planar gate 130 having a planar gate electrode 132 made of polysilicon and a gate insulating film 134 made of silicon oxide. Also in this example, a diode is formed between the p ⁺ -type intervening region 18 and the n-type emitter region 17, and the diode built in between the body region 15 and the drift region 14 is forwarded by a voltage drop of this diode. Directional voltage is applied and gate interference is suppressed. In addition, since the diode composed of the high-concentration emitter region 17 and the high-concentration intervening region 18 functions as a tunnel diode, an increase in the on-voltage of the IGBT structure is suppressed.

  Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

10: Semiconductor layer 11: Collector region 12: Cathode region 13: Buffer region 14: Drift region 15: Body region 16: Body contact region 17: Emitter region 18: Intervening region 22: Collector electrode 24: Emitter electrode 30: Trench gate 32 : Trench gate electrode 34: Gate insulating film

Claims (10)

A reverse conducting IGBT,
A semiconductor layer;
An insulated gate;
An emitter electrode provided on the surface of the semiconductor layer,
The semiconductor layer is
A first conductivity type drift region in contact with the insulated gate;
A body region of a second conductivity type provided on the drift region and in contact with the insulated gate;
An emitter region of a first conductivity type provided on the body region and in contact with the insulated gate;
An intervening region of a second conductivity type provided on the emitter region and interposed between the emitter region and the emitter electrode;
A reverse conducting IGBT in which the intervening region and the emitter region constitute a tunnel diode. The semiconductor layer is
A collector region of a second conductivity type provided in a part under the drift region;
The reverse conducting IGBT according to claim 1, further comprising: a first conductivity type cathode region provided in another part under the drift region.   When the semiconductor layer is viewed in plan, the range in which the collector region exists is an IGBT range, and the range in which the cathode region exists is a diode range, the intervening region is provided at least in the diode range. The reverse conducting IGBT according to claim 2.   The reverse conducting IGBT according to claim 3, wherein the intervening region is also provided in the IGBT range.   The reverse conducting IGBT according to any one of claims 1 to 4, wherein the insulating gate includes a trench gate extending from the surface of the semiconductor layer toward a deep portion. A reverse conducting IGBT,
A semiconductor layer;
An insulated gate;
An emitter electrode provided on the surface of the semiconductor layer,
The semiconductor layer is
A first conductivity type drift region in contact with the insulated gate;
A body region of a second conductivity type provided on the drift region and in contact with the insulated gate;
An emitter region of a first conductivity type provided on the body region and in contact with the insulated gate;
An intervening region of a second conductivity type provided on the emitter region and interposed between the emitter region and the emitter electrode;
The impurity concentration of the intervening region is 1 × 10 ²⁰ cm ⁻³ or more,
The reverse conducting IGBT in which the impurity concentration of the emitter region is 1 × 10 ²⁰ cm ⁻³ or more. The semiconductor layer is
A collector region of a second conductivity type provided in a part under the drift region;
The reverse conducting IGBT according to claim 6, further comprising: a first conductivity type cathode region provided in another part under the drift region.   When the semiconductor layer is viewed in plan, the range in which the collector region exists is an IGBT range, and the range in which the cathode region exists is a diode range, the intervening region is provided at least in the diode range. The reverse conducting IGBT according to claim 7.   The reverse conducting IGBT according to claim 8, wherein the intervening region is also provided in the IGBT range.   The reverse conducting IGBT according to any one of claims 6 to 9, wherein the insulating gate includes a trench gate extending from the surface of the semiconductor layer toward a deep portion.

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