JP2015089319A - Power supply device, image forming apparatus including power supply device, and method of controlling operation of power source device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To protect a power source device from occurring voltage abnormality without using a costly Zener diode for protection to reduce cost.SOLUTION: There is provided a power source device including first voltage changing means Tr4 for changing the output voltage of a transformer T2, and second voltage changing means Tr5 and Tr6 for changing the output voltage of the transformer T2. A CPU 20 has voltage monitoring means 201 for determining abnormality of supply voltage; the determination by the voltage monitoring means 201 is performed while the output voltage of the transformer T2 is changed to a voltage at which the second voltage changing means Tr5 and Tr6 are not damaged; and the CPU 20 permits the supply of a power source voltage provided that the voltage monitoring means 201 has determined the absence of abnormality in the supply voltage.

Description

  The present invention relates to a power supply apparatus, an image forming apparatus including the power supply apparatus, and an operation control method for the power supply apparatus.

For example, in a high voltage bias power supply circuit used for toner movement in an electrophotographic apparatus, when a plurality of outputs are made from one transformer, it is already known that a Zener diode is mounted for protecting a volume transistor that controls an output value. It has been.
This protective Zener diode uses a high voltage resistant product and is expensive. However, if this is removed, there is a problem that if the load (photosensitive member, developing roller, transfer roller, etc.) is short-circuited, the transistor will be damaged. . This problem can also occur when the output value is higher than the breakdown voltage of the transistor.

  Further, Patent Document 1 (Japanese Patent Laid-Open No. 2001-92314) discloses that an image forming apparatus detects a leak or a short (short circuit) without using a leak or a short detection circuit when performing normal high-voltage power control. A high voltage power supply is disclosed. That is, in this high-voltage power supply device, when the drive setting value (PWM setting value) of the high voltage transformer determined based on the output feedback value exceeds a predetermined drive limit value set in advance, an abnormality such as a leak or a short circuit occurs. As described above, by stopping the driving of the high-voltage transformer, an abnormality such as a leak or a short circuit is detected at a low cost.

  This conventional high-voltage power supply device is similar to the present invention described below in that a short circuit of a load is detected when high voltage control is performed. However, in this high-voltage power supply device, if the expensive Zener diode for protection is deleted, the problem that the transistor is damaged when the load (photosensitive member, developing roller, transfer roller, etc.) is short-circuited cannot be solved. .

  The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to protect a device from a voltage abnormality occurring in a power supply device without using a high-cost protective Zener diode, thereby reducing the cost. It is to reduce.

  The present invention comprises a transformer, first voltage variable means for changing the output voltage of the transformer, and second voltage variable means for changing the output voltage of the transformer, and an output terminal of the second voltage variable means. A power supply apparatus for supplying a power supply voltage from the power supply apparatus, comprising voltage monitoring means for judging abnormality of the output terminal, wherein the judgment of the voltage monitoring means is based on the fact that the second voltage variable means breaks the output voltage of the transformer. The power supply apparatus is characterized in that the power supply voltage is allowed to be supplied on condition that there is no abnormality in the output terminal of the voltage monitoring means.

  According to the present invention, in a power supply device, the device can be protected from a voltage abnormality that occurs without using an expensive protection Zener diode, and the cost can be reduced.

2 is a diagram schematically illustrating a configuration of an image forming unit of the image forming apparatus. FIG. It is a circuit diagram of the conventional high voltage power supply device. 1 is a circuit diagram of a high-voltage power supply device according to a first embodiment of the present invention. It is a flowchart which shows the operation control procedure of the high voltage power supply device of 1st Embodiment. It is a circuit diagram of the high voltage power supply device of the 2nd Embodiment of this invention. It is a circuit diagram of the high voltage power supply device of the 5th Embodiment of this invention. It is a circuit diagram of the high voltage power supply device of the 6th Embodiment of this invention.

The present invention outputs a high voltage bias output value (output voltage value) below the breakdown voltage of the transistor and monitors its output feedback value to confirm that it is not short-circuited. It is characterized by output.
Hereinafter, each embodiment provided with the said characteristic of this invention is described with reference to drawings.

FIG. 1 is a diagram schematically showing a configuration of an image forming unit of an image forming apparatus equipped with a high-voltage power supply device (corresponding to the power supply device of the present invention) according to an embodiment of the present invention described later.
As shown in FIG. 1, the image forming unit of this image forming apparatus has a configuration in which image forming apparatuses of respective colors are arranged along the primary transfer belt 5 and is called a tandem type. That is, a plurality of image forming units 6BK, 6M, 6C, and 6Y are arranged along the primary transfer belt 5 in order from the upstream side in the traveling direction of the primary transfer belt 5. The plurality of image forming units 6BK, 6M, 6C, and 6Y have the same internal configuration except that the colors of the toner images to be formed are different. The image forming unit 6BK forms a black image, the image forming unit 6M forms a magenta image, the image forming unit 6C forms a cyan image, and the image forming unit 6Y forms a yellow image.
Therefore, in the following description, the image forming unit 6BK will be described in detail, and for the other components of the image forming units 6M, 6C, and 6Y, symbols distinguished by M, C, and Y are displayed in the figure. Therefore, the description is omitted.

The primary transfer belt 5 is a belt wound around a driving roller 7 and a driven roller 15 that are rotationally driven. The drive roller 7 is rotationally driven by a drive motor (not shown), and the drive motor, the drive roller 7, and the driven roller 15 function as drive means for moving the primary transfer belt 5.
The image forming unit 6BK includes a photosensitive drum 8BK as a photosensitive member, a charger 9BK arranged around the photosensitive drum 8BK, an LED head 10BK, a developing device 11BK, a photosensitive cleaner (not shown), and a static eliminator 12BK. Etc. The LED head 10BK is configured to emit light corresponding to the image color formed by each of the image forming units 6BK, 6M, 6C, and 6Y.

  At the time of image formation, the outer peripheral surface of the photosensitive drum 8BK is uniformly charged by the charger 9BK in the dark, and then exposed by the light corresponding to the black image from the LED head 10BK. It is formed. The developing unit 11BK visualizes the electrostatic latent image with black toner, thereby forming a black toner image on the photosensitive drum 8BK. The toner image is transferred to the primary transfer belt 5 by a bias voltage applied to the primary transfer roller 13BK at a position where the photosensitive drum 8BK and the primary transfer belt 5 are in contact with each other. After the transfer of the toner image is completed, unnecessary toner remaining on the outer peripheral surface of the photosensitive drum 8BK is wiped off by the photosensitive cleaner, and then the charge is removed by the charge eliminator 12BK, and waits for the next image formation.

The primary transfer belt 5 moves to the next image forming unit 6M in order to form the next image on the belt. In the image forming unit 6M, a magenta toner image is formed on the photosensitive drum 8M by a process similar to the image forming process in the image forming unit 6BK, and the toner image is formed on the primary transfer belt 5 as a black image. Is transferred in a superimposed manner.
The primary transfer belt 5 further moves to the next image forming units 6C and 6Y, and the cyan toner image formed on the photosensitive drum 8C and the yellow toner formed on the photosensitive drum 8Y are moved by the same operation. The toner image is transferred while being superimposed on the primary transfer belt 5. Thus, a full-color image is formed on the primary transfer belt 5.

The paper 4 is separated and fed from the paper feed tray 1 by the paper feed roller 2 and the separation roller 3, and the primary transfer belt 5 and the paper 4 are in contact with each other by the bias voltage applied to the secondary transfer roller 16. A full-color toner image on the transfer belt 5 is transferred. The paper 4 on which the full-color superimposed image is formed is discharged to the outside of the image forming apparatus after the image is fixed by the fixing device 14.
A charging device (9BK, 9M, 9C, 9Y), a developing device (11BK, 11M, 11C, 11Y), a primary transfer roller (13BK, 13M, 13C, 13Y), and a secondary transfer roller 16 are supplied from a high voltage power source (not shown). A bias voltage is supplied.

As described above, with respect to the image forming apparatus to which the present invention is applied, a method of forming an image for each color on a primary transfer belt, called an intermediate transfer method, and transferring the image to a sheet at a secondary transfer unit is described with reference to FIG. did. However, the application target of the present invention is not limited to this, and it is needless to say that the image forming apparatus may directly form an image for each color on a sheet called a direct transfer system.
Although the color tandem method has been described with reference to FIG. 1, the application target of the present invention is not limited to this, and may be a monochrome image forming apparatus that forms an image of only Bk.

Next, a high-voltage power supply device according to an embodiment of the present invention will be described. Before that, a conventional high-voltage power supply device will be described for comparison.
FIG. 2 is a circuit diagram of a conventional high-voltage power supply device.
As shown in FIG. 2, the conventional high-voltage power supply device includes a transformer T1, a smoothing circuit including a resistor R1 and a capacitor C1, operational amplifiers IC1 to IC3, and a switching transistor Tr1 for driving the transformer T1. And a smoothing circuit including a transformer T1, a diode D1, and a capacitor C4, a resistor R8, and volume transistors Tr2 and Tr3.

  In the circuit of the high-voltage power supply device of FIG. 2, a PWM signal from a PWM (Plus Wide Modulation) module (also referred to as a drive duty signal generator) 22 (1) to 22 (3) is input from a CPU 20 (Central Processing Unit), A bias voltage as a power supply voltage is output from OUT (power supply voltage output terminal; hereinafter simply referred to as an output terminal) 1 and OUT2 to each image forming part (charging device, developing device, primary transfer roller, secondary transfer roller). In the example shown in the figure, there are only two output terminals, but actually, the number of output terminals corresponding to the number of image forming parts is provided.

The PWM signal output from the PWM module 22 (1) of the CPU 20 is smoothed by the resistor R1 and the capacitor C1, and input to the − (minus) terminal of the operational amplifier IC1. The output of the operational amplifier IC1 is connected to the base terminal of the switching transistor Tr1 for driving the transformer T1 through the resistor R5, and the output value (voltage) of the transformer T1 is controlled by controlling the collector-emitter current of the switching transistor Tr1. Value).
The output of the transformer T1 is smoothed by the diode D1 and the capacitor C4, and is output from OUT1 through the resistor R8 and the volume transistor Tr2.

  The voltage value smoothed by the diode D1 and the capacitor C4 is divided by the resistors R9 and R10 and input to the + terminal of the operational amplifier IC1 as a feedback voltage. The operational amplifier IC1 controls the input voltage based on the PWM duty value to the − terminal and the feedback voltage to the + terminal to be the same.

  Similarly, the PWM signal output from the PWM module 22 (2) of the CPU 20 is smoothed by the resistor R2 and the capacitor C2, and input to the negative terminal of the operational amplifier IC2. The output of the operational amplifier IC2 is connected to the base terminal of the volume transistor Tr2 that controls the output value of OUT1 through the resistor R6, and the output value of OUT1 is controlled by controlling the collector-emitter current of the volume transistor Tr2. doing.

The voltage value of OUT1 is divided by resistors R11 and R12 and input to the + terminal of the operational amplifier IC2 as a feedback voltage. The operational amplifier IC2 controls the input voltage based on the PWM duty value to the − terminal and the feedback voltage to the + terminal to be the same.
The Zener diode ZD1 is for protecting the volume transistor Tr2, and is inserted in parallel with the volume transistor Tr2.
Therefore, when OUT1 is short-circuited, current does not flow through the volume transistor Tr2, but flows through the Zener diode ZD1, thereby preventing the volume transistor Tr2 from being damaged.

The PWM signal output from the PWM module 22 (3) of the CPU 20 is smoothed by the resistor R3 and the capacitor C3 and input to the negative terminal of the operational amplifier IC3.
The output of the operational amplifier IC3 is connected to the base terminal of the volume transistor Tr3 that controls the output value of OUT2 through the resistor R7, and the output value of OUT2 is controlled by controlling the collector-emitter current of the volume transistor Tr3. doing.

  The voltage value of OUT2 is divided by resistors R13 and R14 and input to the + terminal of the operational amplifier IC3 as a feedback voltage. The operational amplifier IC3 controls the input voltage based on the PWM duty value to the negative terminal and the feedback voltage to the positive terminal to be the same.

The Zener diode ZD2 is for protecting the volume transistor Tr3, and is inserted in parallel with the volume transistor Tr3.
Therefore, when OUT2 is short-circuited, the current does not flow through the volume transistor Tr3 but flows through the Zener diode ZD2, thereby preventing the volume transistor Tr3 from being damaged.
As described above, the output voltage value of the transformer T1 is set by the duty value of the PWM signal of the PWM module 22 (1), the voltage value of OUT1 is set by the duty value of the PWM signal of the PWM module 22 (2), and the PWM module 22 (3 ), The voltage value of OUT2 is controlled by the duty value of the PWM signal.

The volume transistors Tr2 and Tr3 are required to have a withstand voltage corresponding to the output values of OUT1 and OUT2, and only one stage is shown in FIG. 2, but a plurality of stages are mounted according to the output value and one withstand voltage value. In some cases.
The zener diodes ZD1 and ZD2 for protecting the transistors also need to have a breakdown voltage corresponding to the output values of OUT1 and OUT2. Although only one stage of the Zener diodes ZD1 and ZD2 is shown in FIG. 2, a plurality of stages may be mounted depending on the output value and one withstand voltage value. The Zener diodes ZD1 and ZD2 are expensive, and there is a demand to delete them for cost reduction. However, as already described, if the Zener diodes ZD1 and ZD2 are deleted, there is a risk that the volume transistors Tr2 and Tr3 may be damaged when the OUT1 and OUT2 are short-circuited. Therefore, there is a problem that the conventional configuration cannot be deleted.

(First embodiment)
FIG. 3 is a circuit diagram of the high-voltage power supply device according to the first embodiment of the present invention.
As shown in FIG. 3, the high-voltage power supply of the first embodiment inputs PWM signals from the PWM modules 22 (1) to 22 (3) of the CPU (corresponding to the main control unit of the present invention) 20. A bias voltage, which is a power supply voltage, is output from each of OUT1 and OUT2 to each image forming part (charging device, developing device, primary transfer roller, and secondary transfer roller). In this figure, the number of outputs is two, but actually, the number of outputs corresponding to the number of image forming parts is provided.

The PWM signal output from the PWM module 22 (1) of the CPU 20 (corresponding to the control unit of the first voltage variable means of the present invention) is smoothed by the resistor R15 and the capacitor C5 and input to the negative terminal of the operational amplifier IC4. The
The output of the operational amplifier IC4 is connected to the base terminal of a switching transistor Tr4 (corresponding to the first voltage variable means of the present invention) Tr4 for driving the transformer T2 through the resistor R18, and the collector-emitter current of the switching transistor Tr4. By controlling the output value of the transformer T2.

The output of the transformer T2 is smoothed by the diode D2 and the capacitor C8, and is output from OUT1 through the resistor R21 and the volume transistor (corresponding to the second voltage variable means of the present invention) Tr5.
On the other hand, the voltage value smoothed by the diode D2 and the capacitor C8 is divided by the resistors R22 and R23 and input to the + terminal of the operational amplifier IC4 as a feedback voltage. The operational amplifier IC4 controls the input voltage based on the PWM duty value to the − terminal and the feedback voltage to the + terminal to be the same.

The PWM signal output from the PWM module 22 (2) in the CPU 20 (corresponding to the control unit of the second voltage variable means of the present invention) is smoothed by the resistor R16 and the capacitor C6, and output of OUT1 through the resistor R19. The output value of OUT1 is controlled by controlling the collector-emitter current of the switching transistor Tr4, which is connected to the base terminal of the volume transistor Tr5 that controls the value.
The voltage value of OUT1 is divided by resistors R24 and R25, and an A / D (analog / digital) conversion module 24 (2) (A / D of the present invention) is used as a feedback voltage corresponding to the output feedback value of the present invention. Corresponding to the D converter).

The feedback voltage (analog voltage) input to the A / D conversion module 24 (2) is digitally converted and used to calculate the set value of the PWM module 22 (2). In the calculation, the PWM duty value of the PWM signal of the PWM module 22 (2) is calculated so that OUT1 becomes the target output value (target output value).
Similarly, the PWM signal output from the PWM module 22 (3) of the CPU 20 (corresponding to the control unit of the second voltage variable means of the present invention) is smoothed by the resistor R17 and the capacitor C7, and is output through the resistor R20 to OUT2 Is connected to the base terminal of a volume transistor (corresponding to the second voltage variable means of the present invention) Tr6 for controlling the output value of. The output value of OUT2 is controlled by controlling the collector-emitter current of the volume transistor Tr6.

The voltage value of OUT2 is divided by resistors R26 and R27, and input to the A / D conversion module 24 (3) of the CPU 20 as a feedback voltage. The feedback voltage (analog voltage) input to the A / D conversion module 24 (3) (corresponding to the A / D conversion unit of the present invention) is digitally converted (A / D conversion), and the PWM module 22 (3). This is used to calculate a set value (corresponding to the control unit of the second voltage variable means of the present invention). In the calculation, the PWM duty value of the PWM signal of the PWM module 22 (3) is calculated so that OUT2 becomes the target output value.
In the present embodiment, the PWM modules 22 (1) to 22 (3) and the A / D conversion modules 24 (2) and 24 (3) are built in the CPU 20, respectively, so that component costs can be reduced.

Next, operation control of the high-voltage power supply device for preventing damage to the volume transistors Tr5 and Tr6 will be described.
FIG. 4 is a flowchart showing an operation control procedure of the high-voltage power supply device according to the first embodiment.
First, a PWM duty value for short circuit detection is set in the PWM module 22 (1), and a short circuit detection voltage is output from the transformer T2 (S101). It should be noted that here, even if the experiment or simulation or design calculation is performed in advance and the output terminals (OUT1, OUT2) are abnormal, that is, short-circuited, the volume transistors (Tr5, Tr6) are not damaged. ) Is detected, and the PWM duty value is set in the PWM module 22 (1) to output a short-circuit detection voltage from the transformer T2.

Next, the output feedback values of OUT1 and OUT2 (feedback voltage values obtained by dividing the output voltage) based on the transformer output voltage are digitally converted by the A / D conversion modules 24 (2) and 24 (3) of the CPU 20. The data is taken into the CPU 20 (S102).
Next, the voltage monitoring means 201 of the CPU 20 indicates that the A / D conversion values of the captured feedback voltage values by the A / D conversion modules 24 (2) and 24 (3) are preset target values for detection. It is determined whether it is smaller than a certain short-circuit detection target value. As the short circuit detection target value, a value when the load is normal (not short circuited) is selected in the short circuit detection PWM duty setting value set in step S101.

If it is determined in step S103 that each captured A / D conversion value is smaller than the short circuit detection target value (S103, YES), the process proceeds to step S104, and the PWM output for short circuit detection is stopped (S104). ) Stop the short-circuit detection voltage.
If the PWM output for short circuit detection by the PWM modules 22 (2) and 22 (3) is stopped in step S104, it is next determined whether it is the print target value output timing (S105). That is, it is determined whether it is time to output a voltage used for printing.

  If it is not the print target value output timing (S105, NO), it waits for the print target value output timing, and if it is the same timing (S105, YES), the PWM modules 22 (2), 22 (3) are left as they are. The print target PWM duty value of the PWM signal is set (S106), the voltage for printing is output, and this process is terminated. That is, in the present embodiment, the supply of the power supply voltage from the high-voltage power supply device (corresponding to the power supply device of the present invention) is allowed on the condition that there is no abnormality in the output terminal.

  In step S103, when the voltage monitoring unit 201 determines that each captured A / D conversion value is not smaller than the short-circuit detection target value (S103, NO), this process ends. That is, the PWM output for short circuit detection by the PWM modules 22 (2) and 22 (3) is stopped (S107), and the voltage for short circuit detection is stopped. In this case, it is assumed that the output terminal is short-circuited, supply of the power supply voltage is not permitted, and high voltage output for printing is not performed. In this case, the user is notified of an abnormal state as necessary (serviceman call notification, error notification, etc.).

The timing for executing the processing procedure described above is when the power is turned on, at the start of printing, at the end of printing, and between the sheets being printed, but it is not necessary to carry out each time, and when a predetermined time has elapsed since the previous time, This is carried out when there is a predetermined temperature change or humidity change when printing a predetermined number of printed sheets. In any case, the predetermined value may be arbitrarily determined by the user. In addition, it is also possible to execute this processing procedure at the time of exchanging each image-forming part to check whether a short circuit has occurred.
By executing the processing procedure when the power is turned on, the abnormality of the output end can be checked in parallel with the rise of the fixing temperature, so that no extra time is required for the check.
By executing the processing procedure at the end of printing or between sheets being printed, no extra time is required for printing. That is, user downtime can be reduced.
By executing the above processing procedure, it is possible to prevent the volume transistors (Tr5, Tr6) from being damaged even if the protective Zener diodes (ZD1, ZD2) are deleted.
These points are the same in the embodiments described below.

(Second Embodiment)
FIG. 5 is a circuit diagram of the high-voltage power supply device according to the second embodiment of the present invention.
The second embodiment differs from the first embodiment in that the PWM signal generator 22 is provided outside the CPU 20 (outside the main control unit).
That is, when the CPU 20 and the high-voltage power supply are connected to each other via a harness or the like, the PWM signal output from the CPU 20 that is the configuration of the high-voltage power supply according to the first embodiment shown in FIG. The waveform may become abnormal due to the influence of the impedance, and the high voltage output may also become abnormal. In the present embodiment, in order to prevent this, the PWM signal generator 22 can be provided on the high voltage power source side away from the CPU 20.

  The control procedure in the second embodiment is basically the same as that described with reference to FIG. 4. However, when the PWM duty value is set in steps S101 and S106, a control signal is sent from the CPU 20 to the PWM signal generator 22. It differs in that it is sent and set.

(Third embodiment)
Next, a third embodiment of the present invention will be described.
Although not shown in the third embodiment, the A / D conversion modules 24 (2) and 24 (3) built in the CPU 20 of FIG. 3 shown in the first embodiment are replaced with A / D converters ( This corresponds to the A / D conversion section of the present invention, and is provided outside the CPU 20.
That is, when the distance between the CPU 20 and the high-voltage power supply is separated via a harness or the like, the configuration shown in FIG. The voltage output may also become abnormal.
In the present embodiment, in order to prevent this, an A / D converter can be provided on the high-voltage power supply side. The control flow in this case is basically the same as that described with reference to FIG. 4, but the A / D conversion value fetching in step S102 is to send a digitally converted signal from the A / D converter to the CPU 20. Be changed.

(Fourth embodiment)
Although not shown in the present embodiment, the A / D conversion modules 24 (2) and 24 (3) built in the CPU 20 shown in FIG. 5 shown in the second embodiment are used as A / D converters outside the CPU 20. It is the structure provided in.
That is, in this embodiment, in the second embodiment in which the PWM signal generator 22 (22 (1) to 22 (3)) is provided outside the CPU 20, an A corresponding to the A / D conversion unit of the present invention is further provided. The / D converter is also a combination of the configurations of the third embodiment provided outside the CPU 20.
The control procedure in the fourth embodiment is set by sending a control signal from the CPU 20 to the PWM signal generator 22 when setting the PWM duty value in steps S101 and S106 in the control procedure described in FIG. In the A / D conversion value capture in S102, a digitally converted signal is sent from the A / D converter to the CPU 20.

(Fifth embodiment)
FIG. 6 is a circuit diagram of a high-voltage power supply device according to the fifth embodiment of the present invention.
As shown in FIG. 6, the high voltage power supply of the fifth embodiment inputs PWM signals from the PWM modules 22 (1) to 22 (3) of the CPU 20, and each image forming part (charger, developer, primary A bias voltage is output from OUT1 and OUT2 to the transfer roller and the secondary transfer roller. As already described, the number of outputs (OUT) is also shown in FIG. 6 as two, but in reality, the number of outputs corresponding to the number of image forming parts is required.

The PWM signal output from the PWM module 22 (1) of the CPU 20 is directly connected to the base terminal of the switching transistor Tr4 for driving the transformer T2. By controlling the collector-emitter current of the switching transistor Tr4, the transformer The output value of T2 is controlled.
The transformer output is smoothed by the diode D2 and the capacitor C8, and is output from OUT1 through the resistor R21 and the volume transistor Tr5.
The voltage value smoothed by the diode D2 and the capacitor C8 is divided by the resistors R22 and R23 and input to the A / D conversion module 24 (1) of the CPU 20 as a feedback voltage.

The feedback voltage (analog voltage) input to the A / D conversion module 24 (1) is used for calculation of the set value of the PWM signal that is digitally converted and output from the PWM module 22 (1). In the calculation, the PWM duty value of the PWM signal of the PWM module 22 (1) is calculated so that the output value of the transformer T2 becomes the target output value.
The PWM signal output from the PWM module 22 (2) of the CPU 20 is smoothed by the resistor R16 and the capacitor C6, and is connected to the base terminal of the volume transistor Tr5 that controls the output value of OUT1 through the resistor R19. The output value of OUT1 is controlled by controlling the collector-emitter current of the transistor Tr5.

The voltage value of OUT1 is divided by resistors R24 and R25 and input to the A / D conversion module 24 (2) of the CPU 20 as a feedback voltage.
The feedback voltage (analog voltage) input to the A / D conversion module 24 (2) is digitally converted and used to calculate the set value of the PWM signal output from the PWM module 22 (2). In the calculation, the PWM duty value of the PWM signal output from the PWM module 22 (2) is calculated so that OUT1 becomes a target output value.

The PWM signal output from the PWM module 22 (3) of the CPU 20 is smoothed by the resistor R17 and the capacitor C7, and is connected to the base terminal of the volume transistor Tr6 that controls the output value of OUT2 through the resistor R20. The output value of OUT2 is controlled by controlling the collector-emitter current of the transistor Tr6.
The voltage value of OUT2 is divided by resistors R26 and R27, and input to the A / D conversion module 24 (3) of the CPU 20 as a feedback voltage.

  The feedback voltage (analog voltage) input to the A / D conversion module 24 (3) is digitally converted (A / D converted) and used to calculate the set value of the PWM signal output from the PWM module 22 (3). . In the calculation, the PWM duty value of the PWM module 22 (3) is calculated so that OUT2 becomes the target output value. The control procedure in this case is basically the same as that described in FIG.

(Sixth embodiment)
FIG. 7 is a circuit diagram of the high-voltage power supply device according to the sixth embodiment of the present invention.
The high-voltage power supply of the sixth embodiment is different from the fifth embodiment in that the PWM signal generator 22 (22 (1), 22 (2), 22 (3)) is provided outside the CPU 20.
When the distance between the CPU 20 and the high-voltage power supply is separated via a harness or the like, the configuration shown in FIG. 6 causes the PWM signal output from the CPU 20 to have an abnormal waveform due to the influence of noise or the impedance of the harness, resulting in high voltage output. May also become abnormal.
In this embodiment, in order to prevent this, the PWM generator 22 (22 (1), 22 (2), 22 (3)) can be provided on the high-voltage power supply side.

  The control procedure in this case is basically the same as that described with reference to FIG. 4, but the PWM signal generator 22 (22 (1) to 22 (3)) is set when the PWM duty value is set in steps S101 and S106. This is set by sending a control signal from the CPU 20.

(Seventh embodiment)
The seventh embodiment is a configuration in which the A / D conversion modules 24 (1) to 24 (3) are provided outside the CPU 20 as A / D converters in the fifth embodiment shown in FIG.
The effects and the like are as described in the third embodiment, for example.

(Eighth embodiment)
In the eighth embodiment, the A / D conversion modules 24 (1) to 24 (3) of the sixth embodiment shown in FIG. 7 are provided outside the CPU 20 as A / D converters.
The effects and the like are as described in the third embodiment, for example.

  As described above, according to the present embodiment, the output value of the high bias voltage is output below the breakdown voltage of the transistor, and it is confirmed that there is no short circuit by monitoring the output feedback value, and then output at the desired output value. To do. Therefore, when a plurality of high bias voltages are output from one transformer, the protection Zener diode of the volume transistor that controls the output value can be eliminated, and the transistor can be prevented from being damaged even when the load is short-circuited.

  20 ... CPU, 22 ... PWM signal generator, 22 (1) -22 (3) ... PWM module, 24 (1) -24 (3) ... A / D conversion module, Tr4. ..Switching transistors, Tr5, Tr6... Volume transistors

JP 2001-92314 A

Claims (9)

A transformer, first voltage variable means for changing the output voltage of the transformer, and second voltage variable means for changing the output voltage of the transformer, the power supply voltage being supplied from the output terminal of the second voltage variable means A power supply for supplying,
Voltage monitoring means for determining abnormality of the output end,
The determination of the voltage monitoring unit is performed by setting the output voltage of the transformer to a voltage that does not damage the second voltage variable unit, and the supply of the power supply voltage is performed on the condition that there is no abnormality in the output terminal of the voltage monitoring unit. A power supply device that is allowed. The power supply device according to claim 1,
The power monitoring apparatus according to claim 1, wherein the voltage monitoring unit determines whether the output terminal is abnormal based on an output feedback value of the second voltage variable unit. In the power supply device according to claim 1 or 2,
A main control unit for controlling the power supply device;
A power supply apparatus comprising a control unit for the first and second voltage variable means built in the main control unit. In the power supply device according to claim 1 or 2,
A main control unit for controlling the power supply device;
A power supply apparatus, wherein the control unit of the second voltage varying means is provided outside the main control unit. The power supply device according to claim 3, wherein
The controller of the second voltage variable means controls the second voltage variable means based on the A / D converted output feedback value of the second voltage variable means,
An A / D conversion unit for A / D converting the output feedback value is built in the main control unit. The power supply device according to claim 4,
The controller of the second voltage variable means controls the second voltage variable means based on the A / D converted output feedback value of the second voltage variable means,
An A / D conversion unit for A / D converting the output feedback value is provided outside the main control unit. The power supply device according to any one of claims 1 to 6,
The determination of the voltage monitoring means is performed when the power is turned on, at the start of printing, at the end of printing, between sheets during printing, when a predetermined time has elapsed from the previous time, or when a predetermined number of printed sheets have been printed, or predetermined The power supply apparatus is characterized in that it is implemented when the temperature changes, or when a predetermined humidity changes, or when the imaging part is replaced.   An image forming apparatus comprising the power supply device according to claim 1. A transformer, first voltage variable means for changing the output voltage of the transformer, and second voltage variable means for changing the output voltage of the transformer, the power supply voltage being supplied from the output terminal of the second voltage variable means An operation control method for a power supply device to be supplied,
Changing the output voltage of the transformer to a voltage that does not damage the second voltage variable means;
A step of determining abnormality of the output terminal by voltage monitoring means in a state where the output voltage of the transformer is set to a voltage that does not damage the second voltage variable means, and
An operation control method for a power supply apparatus, wherein supply of a power supply voltage is permitted on condition that there is no abnormality in the output terminal of the voltage monitoring means.

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