JP2015089132A - 最大遷移ハミングコード - Google Patents

最大遷移ハミングコード Download PDF

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Publication number
JP2015089132A
JP2015089132A JP2014220152A JP2014220152A JP2015089132A JP 2015089132 A JP2015089132 A JP 2015089132A JP 2014220152 A JP2014220152 A JP 2014220152A JP 2014220152 A JP2014220152 A JP 2014220152A JP 2015089132 A JP2015089132 A JP 2015089132A
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JP
Japan
Prior art keywords
bits
parity
data
bit
encoded
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Pending
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JP2014220152A
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English (en)
Japanese (ja)
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JP2015089132A5 (cg-RX-API-DMAC7.html
Inventor
カマリ ジャリル
Kamali Jalil
カマリ ジャリル
フ ケン
Ken Hu
フ ケン
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Samsung Display Co Ltd
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Samsung Display Co Ltd
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Application filed by Samsung Display Co Ltd filed Critical Samsung Display Co Ltd
Publication of JP2015089132A publication Critical patent/JP2015089132A/ja
Publication of JP2015089132A5 publication Critical patent/JP2015089132A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/31—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining coding for error detection or correction and efficient use of the spectrum

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
JP2014220152A 2013-10-31 2014-10-29 最大遷移ハミングコード Pending JP2015089132A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201361898415P 2013-10-31 2013-10-31
US61/898,415 2013-10-31
US14/338,109 2014-07-22
US14/338,109 US9658921B2 (en) 2013-10-31 2014-07-22 Maximal transition hamming codes

Publications (2)

Publication Number Publication Date
JP2015089132A true JP2015089132A (ja) 2015-05-07
JP2015089132A5 JP2015089132A5 (cg-RX-API-DMAC7.html) 2017-12-07

Family

ID=51703082

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014220152A Pending JP2015089132A (ja) 2013-10-31 2014-10-29 最大遷移ハミングコード

Country Status (7)

Country Link
US (1) US9658921B2 (cg-RX-API-DMAC7.html)
EP (1) EP2869471A1 (cg-RX-API-DMAC7.html)
JP (1) JP2015089132A (cg-RX-API-DMAC7.html)
KR (1) KR102281107B1 (cg-RX-API-DMAC7.html)
CN (1) CN104601275B (cg-RX-API-DMAC7.html)
AU (1) AU2014227460B2 (cg-RX-API-DMAC7.html)
TW (1) TWI656746B (cg-RX-API-DMAC7.html)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102430173B1 (ko) 2015-11-24 2022-08-05 삼성전자주식회사 디스플레이 장치
JP6971538B2 (ja) * 2016-05-18 2021-11-24 ソニーセミコンダクタソリューションズ株式会社 通信装置、通信方法、プログラム、および、通信システム
KR102608908B1 (ko) * 2016-06-23 2023-12-04 에스케이하이닉스 주식회사 데이터의 오류를 정정하는 방법 및 이를 이용하는 반도체장치
DE102016118269A1 (de) * 2016-09-27 2018-03-29 Endress + Hauser Gmbh + Co. Kg Verfahren und System zum verteilten Speichern von Informationen in einer eine Vielzahl von Feldgeräten aufweisenden Anlage der Prozessautomatisierung
CN107565979B (zh) * 2017-09-26 2020-08-04 武汉虹信通信技术有限责任公司 一种编码方法及编码器
US11695429B2 (en) 2021-07-29 2023-07-04 Samsung Display Co., Ltd. Systems and methods for transition encoding with protected key
US11636057B2 (en) * 2021-07-30 2023-04-25 Qualcomm Incorporated Data re-encoding for energy-efficient data transfer in a computing device
TWI876685B (zh) * 2023-11-20 2025-03-11 敦泰電子股份有限公司 漢明碼編碼排列方法及儲存裝置檢測方法

Citations (3)

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US4680765A (en) * 1985-07-26 1987-07-14 Doland George D Autosync circuit for error correcting block decoders
JPS63234632A (ja) * 1987-03-23 1988-09-29 Nippon Telegr & Teleph Corp <Ntt> 誤り訂正機能を有するバイフエ−ズ符号伝送方法
JP2009510875A (ja) * 2005-09-28 2009-03-12 エイティーアイ・テクノロジーズ，インコーポレイテッド エラー管理用の方法及び装置

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US4596014A (en) * 1984-02-21 1986-06-17 Foster Wheeler Energy Corporation I/O rack addressing error detection for process control
CN1289480A (zh) * 1998-10-01 2001-03-28 皇家菲利浦电子有限公司 游程受限制的数字信息信号的产生
US6920604B2 (en) * 2002-04-08 2005-07-19 Galazar Networks, Inc. Systems and methods for high speed serial encoding and decoding for data and control interfaces
US7467335B2 (en) * 2005-07-01 2008-12-16 Alcatel-Lucent Usa Inc. Method and apparatus for synchronizing data channels using an alternating parity deskew channel
KR20070112953A (ko) 2006-05-24 2007-11-28 삼성전자주식회사 Ｅｃｃ 제어회로, 제어방법 및 반도체 메모리 장치
KR101518507B1 (ko) 2007-07-19 2015-05-11 한국전자통신연구원 영상신호 송수신 장치 및 방법
KR100942702B1 (ko) 2007-08-30 2010-02-17 한국전자통신연구원 심볼 오류정정이 가능한 주파수 선택적 기저대역을사용하는 변복조 방법 및 그 장치
ES2407505T3 (es) * 2007-10-30 2013-06-12 Sony Corporation Aparato y método de procesamiento de datos
US20090271686A1 (en) * 2008-04-28 2009-10-29 Qualcomm Incorporated Communication signal decoding with iterative cooperation between turbo and reed-solomon decoding

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4680765A (en) * 1985-07-26 1987-07-14 Doland George D Autosync circuit for error correcting block decoders
JPS63234632A (ja) * 1987-03-23 1988-09-29 Nippon Telegr & Teleph Corp <Ntt> 誤り訂正機能を有するバイフエ−ズ符号伝送方法
JP2009510875A (ja) * 2005-09-28 2009-03-12 エイティーアイ・テクノロジーズ，インコーポレイテッド エラー管理用の方法及び装置

Non-Patent Citations (1)

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Title
C. M. M. FONSECA: "Runlength limited error control codes: design, realisation and practical evaluation", PROJECT DISSERTATION, SCHOOL OF ELECTRONIC ENGINEERING SCIENCE, UNIVERSITY OF WALES, BANGOR, JPN6018042408, January 1991 (1991-01-01), pages 9 - 25, ISSN: 0004146223 *

Also Published As

Publication number Publication date
TW201524136A (zh) 2015-06-16
US20150121164A1 (en) 2015-04-30
EP2869471A1 (en) 2015-05-06
KR20150050429A (ko) 2015-05-08
AU2014227460A1 (en) 2015-05-14
US9658921B2 (en) 2017-05-23
CN104601275B (zh) 2020-04-21
AU2014227460B2 (en) 2018-09-20
CN104601275A (zh) 2015-05-06
KR102281107B1 (ko) 2021-07-23
TWI656746B (zh) 2019-04-11

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