JP2015056677A - Diplexer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To miniaturize a diplexer without increasing an insertion loss, and improve an isolation characteristic of the diplexer.SOLUTION: A diplexer 1 includes: a stack including a plurality of dielectric layers stacked up; a first terminal 2, a second terminal 3 and a common terminal 4 arranged in an outer peripheral part of the stack; a first filter 5 and a second filter 6 disposed inside the stack; and a coupling element C9. The first filter 5 is disposed between the common terminal 4 and the first terminal 2 to selectively pass a first signal of a frequency in a first frequency band. The second filter 6 is disposed between the common terminal 4 and the second terminal 3 to selectively pass a second signal. The coupling element C9 develops capacitive coupling between the first filter 5 and the second filter 6.

Description

  The present invention relates to a diplexer using a laminated body having a plurality of laminated dielectric layers.

  In recent years, miniaturized wireless communication devices typified by mobile phones and smartphones have been required to be miniaturized, but in addition to the original communication function, Bluetooth (registered trademark) standard communication and wireless LAN (local area network) There are an increasing number of devices having other communication functions such as communication.

  In order to process a plurality of received signals having different frequency bands with a single wireless communication device, means for separating the received signals received by the antenna from each other is required. A diplexer is known as a means for separating two received signals having different frequency bands.

  In recent years, miniaturization and space saving of wireless communication devices have been demanded from the market, and miniaturization of diplexers used in the communication devices has also been demanded.

  As a diplexer suitable for miniaturization, as shown in Patent Documents 1 to 3, a diplexer using a laminated body having a plurality of laminated dielectric layers is known. The diplexer includes a first terminal, a second terminal, and a common terminal provided on the outer peripheral portion of the laminated body, and first and second filters provided in the laminated body. The first filter is provided between the common terminal and the first terminal. The second filter is provided between the common terminal and the second terminal. The first filter passes a first signal having a frequency within the first frequency band. The second filter passes a second signal having a frequency in the second frequency band that is a frequency band higher than the first frequency band. The first filter is, for example, a low pass filter or a band pass filter. The second filter is, for example, a high pass filter or a band pass filter.

JP 2006-93996 A JP 2006-2111273 A JP 2007-251106 A

  In a diplexer using a laminated body, particularly when trying to reduce the size, the first filter and the second filter approach each other, and electromagnetic coupling occurs between the first filter and the second filter. There is a problem in that the isolation characteristic between the first terminal and the second terminal tends to deteriorate.

  In Patent Document 2, the first inductor circuit and the second inductor circuit are arranged on both sides of the stacking direction of the multilayer body with respect to the capacitor unit to suppress interference between the first inductor circuit and the second inductor circuit. The technology to do is described. However, in this technique, when the diplexer is reduced in size, the first and second inductor circuits approach the capacitor unit, and the magnetic field generated by the first and second inductor circuits is hindered by the capacitor unit. . As a result, there is a problem that the Q value of the first and second inductor circuits is lowered and the insertion loss of the diplexer is increased.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a diplexer that can be miniaturized without increasing insertion loss and can improve isolation characteristics.

  A diplexer according to the present invention includes a laminated body including a plurality of laminated dielectric layers, a first terminal, a second terminal, and a common terminal disposed on an outer peripheral portion of the laminated body, and a first terminal provided in the laminated body. 1 filter and a second filter. The first filter is provided between the common terminal and the first terminal, and has a first signal having a frequency within the first frequency band and a second frequency band higher than the first frequency band. The first signal of the second signals having a frequency within the frequency band of is selectively passed. The second filter is provided between the common terminal and the second terminal, and selectively passes the second signal of the first signal and the second signal. The diplexer further includes a coupling element that causes capacitive coupling between the first filter and the second filter.

  In the diplexer of the present invention, the first filter may include a first conductor layer, and the second filter may include a second conductor layer. The first conductor layer and the second conductor layer are arranged at different positions in the stacking direction of the plurality of dielectric layers and are not in contact with each other. The first conductor layer includes a first capacitor component, and the second conductor layer includes a second capacitor component. The first capacitor component and the second capacitor component are opposed via at least one dielectric layer of the dielectric layers. There is no conductor layer between the first capacitor component and the second capacitor component. In this case, the coupling element is a capacitor constituted by a first capacitor component, a second capacitor component, and at least one dielectric layer. The first conductor layer may be directly connected to the first terminal, and the second conductor layer may be directly connected to the second terminal.

  In the diplexer of the present invention, the capacitance of the coupling element is generated between the first filter and the second filter in addition to the stray inductance and stray capacitance. The resonance frequency of resonance by these becomes lower than the resonance frequency of resonance by only the stray inductance and the stray capacitance, and approaches the second frequency band. Thus, according to the present invention, it is possible to downsize the diplexer without increasing the insertion loss and to improve the isolation characteristics of the diplexer.

It is a circuit diagram which shows the structure of the diplexer which concerns on one embodiment of this invention. 1 is a perspective view of a diplexer according to an embodiment of the present invention. It is a perspective view of the diplexer concerning one embodiment of the present invention seen from the lower side. It is explanatory drawing which shows the lower surface of the 1st thru | or 5th dielectric material layer in the laminated body of the diplexer which concerns on one embodiment of this invention. It is explanatory drawing which shows the lower surface of the 6th layer thru | or 10th dielectric layer in the laminated body of the diplexer which concerns on one embodiment of this invention. It is explanatory drawing which shows the lower surface of the 11th thru | or 15th dielectric material layer in the laminated body of the diplexer which concerns on one embodiment of this invention. It is explanatory drawing which shows the modification of the coupling element in the diplexer which concerns on one embodiment of this invention. It is a characteristic view which shows the characteristic of the diplexer of a comparative example. It is a characteristic view which shows the characteristic of the diplexer which concerns on one embodiment of this invention. It is a characteristic view which shows the characteristic of the diplexer of a comparative example. It is a characteristic view which shows the characteristic of the diplexer which concerns on one embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. First, a circuit configuration of a diplexer according to an embodiment of the present invention will be described with reference to FIG. The diplexer 1 according to the present embodiment includes a first signal having a frequency within the first frequency band and a second signal having a frequency within the second frequency band that is a higher frequency band than the first frequency band. Are separated from each other. The first frequency band is, for example, a 2.4 GHz band used in IEEE802.11b and IEEE802.11g. The second frequency band is, for example, a 5 GHz band used in IEEE 802.11a.

  The diplexer 1 includes a first terminal 2, a second terminal 3, a common terminal 4, a first filter 5, a second filter 6, and a coupling element C9. A first signal and a second signal are input to the common terminal 4. The first filter 5 is provided between the common terminal 4 and the first terminal 2 and selectively passes the first signal of the first signal and the second signal. The first filter 5 is, for example, a low pass filter or a band pass filter. The second filter 6 is provided between the common terminal 4 and the second terminal 3 and selectively passes the second signal of the first signal and the second signal. The second filter 6 is, for example, a high pass filter or a band pass filter. The first terminal 2 outputs a first signal. The second terminal 3 outputs a second signal. The coupling element C9 causes capacitive coupling between the first filter 5 and the second filter 6.

  In FIG. 1, the first filter 5 is a low-pass filter, the second filter 6 is a band-pass filter, and the coupling element C <b> 9 is provided between the first terminal 2 and the second terminal 3. An example of a capacitor is shown. Hereinafter, this example will be described in detail. The first filter 5 includes two inductors L1 and L2 and two capacitors C1 and C2. One end of the inductor L1 is connected to the common terminal 4. One end of the inductor L2 and one end of each of the capacitors C1 and C2 are connected to the other end of the inductor L1. The other end of the inductor L2 and the other end of the capacitor C1 are connected to the first terminal 2. The other end of the capacitor C2 is connected to the ground.

  The second filter 6 includes two inductors L3 and L4 and six capacitors C3, C4, C5, C6, C7, and C8. One end of each of the capacitors C3 and C5 is connected to the common terminal 4. One end of the inductor L3 and one end of the capacitor C4 are connected to the other end of the capacitor C3. The other end of the inductor L3 is connected to the ground. One end of the capacitor C6 is connected to the other end of the capacitor C5. The other end of the capacitor C6 is connected to the other end of the capacitor C4. One end of the inductor L4 and one end of the capacitor C7 are connected to the other ends of the capacitors C4 and C6. The other end of the inductor L4, the other end of the capacitor C7, and one end of the capacitor C8 are connected to the second terminal 3. The other end of the capacitor C8 is connected to the ground.

  In the diplexer 1 according to the present embodiment, the first filter 5 selectively passes the first signal out of the first signal and the second signal input to the common terminal 4 and passes through the first signal. Output from terminal 2. The second filter 6 selectively passes the second signal of the first signal and the second signal input to the common terminal 4 and outputs the second signal from the second terminal 3.

  Next, an outline of the structure of the diplexer 1 will be described with reference to FIGS. 2 and 3. FIG. 2 is a perspective view of the diplexer 1. FIG. 3 is a perspective view of the diplexer 1 as viewed from below. The diplexer 1 includes a laminate 10 for integrating the components of the diplexer 1. As will be described in detail later, the multilayer body 10 includes a plurality of dielectric layers and a plurality of conductor layers that are stacked. The first filter 5, the second filter 6, and the coupling element C <b> 9 are provided in the stacked body 10.

  The laminated body 10 has a rectangular parallelepiped shape having an outer peripheral portion. The outer peripheral part of the laminated body 10 includes an upper surface 10A, a bottom surface 10B, and four side surfaces 10C to 10F. The top surface 10A and the bottom surface 10B face opposite sides, the side surfaces 10C and 10D also face opposite sides, and the side surfaces 10E and 10F also face opposite sides. The side surfaces 10C to 10F are perpendicular to the top surface 10A and the bottom surface 10B. In the multilayer body 10, the direction perpendicular to the top surface 10A and the bottom surface 10B is the stacking direction of the plurality of dielectric layers and the plurality of conductor layers. 2 and 3, this stacking direction is indicated by an arrow with a symbol T attached thereto.

  The diplexer 1 includes a ground terminal 8 in addition to the first terminal 2, the second terminal 3, and the common terminal 4. The first terminal 2, the second terminal 3, the common terminal 4, and the ground terminal 8 are disposed on the outer peripheral portion of the multilayer body 10. The first terminal 2 and the second terminal 3 are arranged from the upper surface 10A to the bottom surface 10B via the side surface 10C. The first terminal 2 and the second terminal 3 are arranged in a direction parallel to the ridge line between the upper surface 10A and the side surface 10C. The common terminal 4 and the ground terminal 8 are arranged from the upper surface 10A to the bottom surface 10B via the side surface 10D. The ground terminal 8 is connected to the ground.

  Next, the stacked body 10 will be described in detail with reference to FIGS. 4 to 6. The stacked body 10 has 15 stacked dielectric layers. Hereinafter, these 15 dielectric layers are referred to as the first to fifteenth dielectric layers in order from the bottom. 4A to 4E respectively show the lower surfaces of the first to fifth dielectric layers. In FIG. 5, (a) to (e) show the lower surfaces of the sixth to tenth dielectric layers, respectively. 6A to 6E respectively show the lower surfaces of the eleventh to fifteenth dielectric layers.

  Four conductor layers 112, 113, 114, and 118 are formed on the lower surface of the first dielectric layer 11 shown in FIG. A first terminal 2, a second terminal 3, a common terminal 4, and a ground terminal 8 are connected to the conductor layers 112, 113, 114, and 118, respectively.

  On the lower surface of the second dielectric layer 12 shown in FIG. 4B, a conductor layer 12C8 that constitutes a part of the capacitor C8 and a conductor layer 121 are formed. The conductor layer 121 includes a capacitor component 12C1 that forms part of the capacitor C1 and a capacitor component 12C2 that forms part of the capacitor C2. The dielectric layer 12 has a through hole 12T1 connected to the conductor layer 121 and a through hole 12T2 connected to the conductor layer 12C8.

  On the lower surface of the third dielectric layer 13 shown in FIG. 4C, a conductor layer 13C1 constituting another part of the capacitor C1 and a conductor layer 13G are formed. The conductor layer 13C1 faces the capacitor component 12C1 with the dielectric layer 12 in between. The capacitor C1 is constituted by a capacitor component 12C1, a conductor layer 13C1, and a dielectric layer 12. The conductor layer 13G is opposed to the capacitor constituting portion 12C2 and the conductor layer 12C8 with the dielectric layer 12 in between. Capacitor C2 is configured by capacitor component 12C2, conductor layer 13G, and dielectric layer 12. The capacitor C8 is composed of the conductor layer 12C8, the conductor layer 13G, and the dielectric layer 12. Further, the dielectric layer 13 is connected to the through hole 13T1 connected to the through hole 12T1, the through hole 13T2 connected to the through hole 12T2, the through hole 13T3 connected to the conductor layer 13C1, and the conductor layer 13G. Through-holes 13T4 are formed.

  In the fourth dielectric layer 14 shown in FIG. 4D, through holes 14T1, 14T2, 14T3, and 14T4 connected to the through holes 13T1, 13T2, 13T3, and 13T4, respectively, are formed.

  Conductor layers 15G and 151 are formed on the lower surface of the fifth dielectric layer 15 shown in FIG. The conductor layer 15G is directly connected to the ground terminal 8. The conductor layer 151 is directly connected to the second terminal 3. The conductor layer 151 includes an inductor constituting portion 15L4 that constitutes a part of the inductor L4, and a branch portion 15C. The branch portion 15C is a direction in which the first terminal 2 and the second terminal 3 are arranged from a portion in the vicinity of the second terminal 3 in the inductor constituent portion 15L4, that is, a direction parallel to the ridge line between the upper surface 10A and the side surface 10C. Furthermore, it extends to the vicinity of the first terminal 2. The branch portion 15C includes a second capacitor constituting portion 15C9 located in the vicinity of the tip thereof. The second capacitor component 15C9 will be described in detail later. A through hole 14T2 is connected to the conductor layer 151. A through hole 14T4 is connected to the conductor layer 15G. The dielectric layer 15 includes a through hole 15T1 connected to the through hole 14T1, a through hole 15T2 connected to the vicinity of the tip of the inductor component 15L4, and a through hole 15T3 connected to the through hole 14T3. Is formed.

  On the lower surface of the sixth dielectric layer 16 shown in FIG. 5A, a conductor layer 161 constituting a part of the inductor L2 and a conductor layer 16L4 constituting another part of the inductor L4 are formed. Has been. The conductor layer 161 is directly connected to the first terminal 2. The conductor layer 161 includes a first capacitor component 16C9 located in the vicinity of the first terminal 2. The first capacitor component 16C9 will be described in detail later. A through hole 15T3 is connected to the conductor layer 161. Also, a through hole 15T2 is connected to a portion near one end of the conductor layer 16L4. The dielectric layer 16 is connected to the through hole 16T1 connected to the through hole 15T1, the through hole 16T2 connected to the vicinity of the tip of the conductor layer 161, and the vicinity of the other end of the conductor layer 16L4. Through holes 16T3 are formed.

  Here, the first capacitor component 16C9 shown in FIG. 5A and the second capacitor component 15C9 shown in FIG. 4E will be described in detail. The first capacitor component 16C9 and the second capacitor component 15C9 are in positions that overlap when viewed from the stacking direction T of the plurality of dielectric layers of the stacked body 10. That is, the first capacitor component 16C9 and the second capacitor component 15C9 are opposed to each other via at least one dielectric layer of the plurality of dielectric layers. In the present embodiment, in particular, the first capacitor component 16C9 and the second capacitor component 15C9 are opposed to each other with the dielectric layer 15 in between. There is no conductor layer between the first capacitor component 16C9 and the second capacitor component 15C9. The first capacitor component 16C9, the second capacitor component 15C9, and the dielectric layer 15 therebetween constitute a capacitor that is the coupling element C9.

  The conductor layer 161 including the first capacitor component 16C9 corresponds to the first conductor layer in the present invention. The conductor layer 151 including the second capacitor component 15C9 corresponds to the second conductor layer in the present invention. The conductor layer 161 and the conductor layer 151 are arranged at different positions in the stacking direction T and are not in contact with each other.

  On the lower surface of the seventh dielectric layer 17 shown in FIG. 5B, a conductor layer 17L2 constituting another part of the inductor L2 and a conductor layer 17L4 constituting another part of the inductor L4. And are formed. A through hole 16T2 is connected to the vicinity of one end of the conductor layer 17L2. A through hole 16T3 is connected to the vicinity of one end of the conductor layer 17L4. The dielectric layer 17 is connected to the through hole 17T1 connected to the through hole 16T1, the through hole 17T2 connected to the vicinity of the other end of the conductor layer 17L2, and the vicinity of the other end of the conductor layer 17L4. Through-holes 17T3 are formed. The inductor L4 includes an inductor component 15L4, conductor layers 16L4 and 17L4, and through holes 15T2 and 16T3.

  On the lower surface of the eighth dielectric layer 18 shown in FIG. 5C, a conductor layer 18L2 constituting still another part of the inductor L2 and a conductor layer 18L3 constituting part of the inductor L3 are provided. Is formed. A through hole 17T2 is connected to the vicinity of one end of the conductor layer 18L2. The conductor layer 18L3 is directly connected to the ground terminal 8. The dielectric layer 18 has a through hole 18T1 connected to a portion near the other end of the conductor layer 18L2 and connected to the through hole 17T1, and a through hole 18T2 connected to a portion near the tip of the conductor layer 18L3. And a through hole 18T3 connected to the through hole 17T3. The inductor L2 is composed of conductor layers 161, 17L2, and 18L2 and through holes 16T2 and 17T2.

  A conductor layer 19L3 constituting another part of the inductor L3 is formed on the lower surface of the ninth dielectric layer 19 shown in FIG. 5 (d). A through hole 18T2 is connected to the vicinity of one end of the conductor layer 19L3. The dielectric layer 19 includes a through hole 19T1 connected to the through hole 18T1, a through hole 19T2 connected to the vicinity of the other end of the conductor layer 19L3, and a through hole 19T3 connected to the through hole 18T3. Is formed.

  On the lower surface of the tenth dielectric layer 20 shown in FIG. 5E, a conductor layer 20L1 constituting a part of the inductor L1 and a conductor layer 20L3 constituting another part of the inductor L3 are provided. Is formed. A through hole 19T1 is connected to the vicinity of one end of the conductor layer 20L1. A through hole 19T2 is connected to the vicinity of one end of the conductor layer 20L3. The dielectric layer 20 is connected to the through hole 20T1 connected to the vicinity of the other end of the conductor layer 20L1, the through hole 20T2 connected to the vicinity of the other end of the conductor layer 20L3, and the through hole 19T3. The through-hole 20T3 thus formed is formed. The inductor L3 is composed of conductor layers 18L3, 19L3, 20L3 and through holes 18T2, 19T2.

  On the lower surface of the eleventh dielectric layer 21 shown in FIG. 6A, a conductor layer 21L1 constituting another part of the inductor L1 is formed. A through hole 20T1 is connected to the vicinity of one end of the conductor layer 21L1. The dielectric layer 21 includes a through hole 21T1 connected to the vicinity of the other end of the conductor layer 21L1, a through hole 21T2 connected to the through hole 20T2, and a through hole 21T3 connected to the through hole 20T3. Is formed.

  On the lower surface of the twelfth dielectric layer 22 shown in FIG. 6B, a conductor layer 22L1 constituting still another part of the inductor L1 is formed. A through hole 21T1 is connected to the vicinity of one end of the conductor layer 22L1. The dielectric layer 22 includes a through hole 22T1 connected to the vicinity of the other end of the conductor layer 22L1, a through hole 22T2 connected to the through hole 21T2, and a through hole 22T3 connected to the through hole 21T3. Is formed.

  On the lower surface of the thirteenth dielectric layer 23 shown in FIG. 6 (c), a conductor layer 23L1 constituting still another part of the inductor L1 and a conductor layer 231 are formed. A through hole 22T1 is connected to the vicinity of one end of the conductor layer 23L1. The conductor layer 231 includes a capacitor component 23C3 that forms part of the capacitor C3 and a capacitor component 23C4 that forms part of the capacitor C4. A through hole 22T2 is connected to the conductor layer 231. The dielectric layer 23 has a through hole 23T1 connected to the vicinity of the other end of the conductor layer 23L1, and a through hole 23T3 connected to the through hole 22T3. The inductor L1 is composed of conductor layers 20L1, 21L1, 22L1, 23L1 and through holes 20T1, 21T1, 22T1.

  Conductor layers 241 and 242 are formed on the lower surface of the fourteenth dielectric layer 24 shown in FIG. The conductor layer 241 faces the capacitor component 23C3 with the dielectric layer 23 interposed therebetween. The capacitor C3 is configured by a capacitor component 23C3, a conductor layer 241 and a dielectric layer 23. A through hole 23T3 is connected to the conductor layer 242. The conductor layer 242 faces the capacitor component 23C4 with the dielectric layer 23 interposed therebetween. The capacitor C4 includes a capacitor component 23C4, a conductor layer 242, and a dielectric layer 23. The dielectric layer 24 has a through hole 24T1 connected to the conductor layer 241 and connected to the through hole 23T1. The capacitor C4 includes a capacitor component 23C4, a conductor layer 242, and a dielectric layer 24.

  Conductor layers 251 and 254 and a conductor layer 25C7 constituting a part of the capacitor C7 are formed on the lower surface of the fifteenth dielectric layer 25 shown in FIG. 6 (e). The conductor layer 251 includes a capacitor component 25C5 that constitutes a part of the capacitor C5 and a capacitor component 25C6 that constitutes a part of the capacitor C6. The capacitor component 25C5 faces the conductor layer 241 with the dielectric layer 24 in between. The capacitor C5 is configured by the conductor layer 241, the capacitor component 25 C 5, and the dielectric layer 24. The capacitor component 25C6 faces the conductor layer 242 with the dielectric layer 24 in between. The capacitor C6 is constituted by a conductor layer 242, a capacitor constituting unit 25C6, and a dielectric layer 24. The conductor layer 25C7 is directly connected to the second terminal 3. The conductor layer 25C7 faces the conductor layer 242 with the dielectric layer 24 in between. The capacitor C7 is composed of conductor layers 242, 25C7 and a dielectric layer 24. The conductor layer 254 is directly connected to the common terminal 4. The through hole 24T1 is connected to the conductor layer 254.

  The first to fifteenth dielectric layers 11 to 25 are stacked in order from the bottom with the respective lower surfaces facing downward, and the stacked body 10 including the first and second filters 5 and 6 is formed. Composed. Then, terminals 2, 3, 4, and 8 are formed on the outer peripheral portion of the laminate 10, and the diplexer 1 shown in FIGS. 1 and 2 is completed.

  FIG. 7 is an explanatory diagram showing a modification of the coupling element C9 in the diplexer 1 according to the present embodiment. 7A shows the lower surface of the fifth dielectric layer 15, and FIG. 7B shows the lower surface of the sixth dielectric layer 16. In this modification, as shown in FIG. 7A, the conductor layer 151 has a branch portion 15C shorter than the branch portion 15C shown in FIG. The branch portion 15C includes a second capacitor constituting portion 15C9 located in the vicinity of the tip thereof.

  In the modification, as shown in FIG. 7B, the conductor layer 161 includes an inductor component 16L2 that constitutes a part of the inductor L2, and a branch portion 16C. The branch portion 16C is a direction in which the first terminal 2 and the second terminal 3 are arranged from a portion in the vicinity of the first terminal 2 in the inductor constituting portion 16L2, that is, a direction parallel to a ridge line between the upper surface 10A and the side surface 10C. Furthermore, it extends to the vicinity of the second capacitor component 15C9. The branch portion 16C includes a first capacitor constituting portion 16C9 located in the vicinity of the tip thereof.

  In the modification shown in FIG. 7, the first capacitor component 16C9 and the second capacitor component 15C9 are in positions that overlap when viewed from the stacking direction T. That is, the first capacitor component 16C9 and the second capacitor component 15C9 are opposed to each other with the dielectric layer 15 in between. There is no conductor layer between the first capacitor component 16C9 and the second capacitor component 15C9. The first capacitor component 16C9, the second capacitor component 15C9, and the dielectric layer 15 therebetween constitute a capacitor that is the coupling element C9.

  Note that the conductor layer 151 does not have the branch portion 15C, and the coupling element C9 is configured such that a part of the branch portion 16C of the conductor layer 161 overlaps a part of the conductor layer 151 when viewed from the stacking direction T. A capacitor may be formed.

  Next, effects of the diplexer 1 according to the present embodiment will be described while comparing with the diplexer of the comparative example. In the diplexer of the comparative example, when viewed from the stacking direction T, the conductor layers 151 and 161 do not have a portion overlapping each other. That is, the diplexer of the comparative example does not include the coupling element C9. Other configurations of the diplexer of the comparative example are the same as those of the diplexer 1 according to the present embodiment.

  In the diplexer of the comparative example, when trying to reduce the size in particular, the first filter 5 and the second filter 6 approach each other, and electromagnetic coupling occurs between the first filter 5 and the second filter 6. The isolation characteristic between the first terminal 2 and the second terminal 3 tends to deteriorate. The deterioration of the isolation characteristic occurs more significantly in the second frequency band than in the first frequency band. The fact that electromagnetic coupling occurs between the first filter 5 and the second filter 6 means that stray inductance and stray capacitance occur between the first filter 5 and the second filter 6. When this stray inductance and stray capacitance occur, they cause parallel resonance. In general, the resonance frequency of the parallel resonance due to the stray inductance and the stray capacitance is higher than the second frequency band.

  In the diplexer 1 according to the present embodiment, a capacitance of the coupling element C9 is generated between the first filter 5 and the second filter 6 in addition to the stray inductance and stray capacitance. The resonance frequency of the parallel resonance due to the stray inductance, the stray capacitance, and the capacitance of the coupling element C9 is lower than the resonance frequency of the parallel resonance due to the stray inductance and the stray capacitance alone, and approaches the second frequency band. Thereby, according to this Embodiment, the isolation characteristic between the 1st terminal 2 and the 2nd terminal 3 in a 2nd frequency band and its vicinity improves compared with a comparative example.

  If a ground layer is provided between the first filter 5 and the second filter 6 in order to cut off the electromagnetic coupling between the first filter 5 and the second filter 6, the diplexer 1 is particularly provided. When the size is reduced, the magnetic field generated by the inductor is hindered by the ground layer. As a result, the Q value of the inductor is lowered, and the insertion loss of the diplexer 1 is increased.

  On the other hand, in the present embodiment, the electromagnetic coupling between the first filter 5 and the second filter 6 is not blocked by the ground layer, but using this coupling and the coupling element C9, The isolation characteristic between the first terminal 2 and the second terminal 3 is improved. Therefore, according to the present embodiment, even if the diplexer 1 is downsized, the insertion loss of the diplexer 1 due to the magnetic field generated by the inductor being hindered by the ground layer does not occur.

  From the above, according to the present embodiment, the diplexer 1 can be reduced in size without increasing the insertion loss, and the isolation characteristics of the diplexer 1 can be improved.

  Hereinafter, the results of the first and second experiments comparing the characteristics of the diplexer of the comparative example and the diplexer 1 according to the present embodiment will be described. In the first experiment, for each of the diplexer of the comparative example and the diplexer 1 according to the present embodiment, the input end of the first filter 5 (end on the common terminal 4 side) and the input end of the second filter 6 (common) The isolation characteristic between the first terminal 2 and the second terminal 3 was measured in a state where the terminal 4 side end) was cut off. The results are shown in FIGS. FIG. 8 shows the isolation characteristics of the diplexer of the comparative example, and FIG. 9 shows the isolation characteristics of the diplexer 1 according to the present embodiment. 8 and 9, the horizontal axis represents frequency and the vertical axis represents attenuation.

  8 and 9, it can be seen that the diplexer 1 according to the present embodiment has improved isolation characteristics particularly in the second frequency band (5 GHz band) and in the vicinity thereof as compared with the diplexer of the comparative example. .

  In the second experiment, with respect to each of the diplexer of the comparative example and the diplexer 1 according to the present embodiment, in the state where the input end of the first filter 5 and the input end of the second filter 6 are connected, the following four Characteristics were measured. The four characteristics are the reflection attenuation characteristic of the common terminal 4, the pass attenuation characteristic between the common terminal 4 and the first terminal 2, the pass attenuation characteristic between the common terminal 4 and the second terminal 3, and the first This is an isolation characteristic between the terminal 2 and the second terminal 3. The result of the second experiment is shown in FIG. 10 and FIG. FIG. 10 shows four characteristics in the diplexer of the comparative example, and FIG. 11 shows four characteristics in the diplexer 1 according to the present embodiment. 10 and 11, the horizontal axis represents frequency, and the vertical axis represents attenuation.

  In FIG. 10, the curve labeled 31 indicates the return attenuation characteristic of the common terminal 4, the curve labeled 32 indicates the pass attenuation characteristic between the common terminal 4 and the first terminal 2, and is labeled 33. The curved line indicates the passing attenuation characteristic between the common terminal 4 and the second terminal 3, and the curved line denoted by reference numeral 34 indicates the isolation characteristic between the first terminal 2 and the second terminal 3.

  In FIG. 11, the curve denoted by reference numeral 41 indicates the reflection attenuation characteristic of the common terminal 4, and the curve denoted by reference numeral 42 indicates the pass attenuation characteristic between the common terminal 4 and the first terminal 2, and is denoted by reference numeral 43. The curved line indicates the passing attenuation characteristic between the common terminal 4 and the second terminal 3, and the curved line denoted by reference numeral 44 indicates the isolation characteristic between the first terminal 2 and the second terminal 3.

  10 and 11, it can be seen that the diplexer 1 according to the present embodiment has improved isolation characteristics particularly in the second frequency band (5 GHz band) and in the vicinity thereof as compared with the diplexer of the comparative example. . Further, it can be seen from FIG. 11 that the diplexer 1 according to the present embodiment is excellent in characteristics other than the isolation characteristics.

  In addition, this invention is not limited to the said embodiment, A various change is possible. For example, the first conductor layer including the first capacitor component is not limited to the conductor layer directly connected to the first terminal 2 but is not directly connected to the first terminal 2. The conductor layer which comprises the filter 5 may be sufficient. Similarly, the second conductor layer including the second capacitor component is not limited to the conductor layer directly connected to the second terminal 3, but is not directly connected to the second terminal 3. It may be a conductor layer constituting the filter 6.

  DESCRIPTION OF SYMBOLS 1 ... Diplexer, 2 ... 1st terminal, 3 ... 2nd terminal, 4 ... Common terminal, 5 ... 1st filter, 6 ... 2nd filter, C9 ... Coupling element, 10 ... Laminated body.

Claims (3)

A laminate including a plurality of laminated dielectric layers;
A first terminal, a second terminal and a common terminal disposed on the outer periphery of the laminate;
A diplexer comprising a first filter and a second filter provided in the laminate,
The first filter is provided between the common terminal and the first terminal, and has a first signal having a frequency within a first frequency band and a frequency band higher than the first frequency band. Selectively passing the first signal out of the second signal having a frequency within the second frequency band of
The second filter is provided between the common terminal and the second terminal, and selectively passes the second signal of the first signal and the second signal,
The diplexer further comprises a coupling element for generating capacitive coupling between the first filter and the second filter. The first filter includes a first conductor layer;
The second filter includes a second conductor layer;
The first conductor layer and the second conductor layer are disposed at different positions in the stacking direction of the plurality of dielectric layers, do not contact each other,
The first conductor layer includes a first capacitor component;
The second conductor layer includes a second capacitor component;
The first capacitor component and the second capacitor component are opposed via at least one dielectric layer of the plurality of dielectric layers,
There is no conductor layer between the first capacitor component and the second capacitor component,
2. The diplexer according to claim 1, wherein the coupling element is a capacitor configured by the first capacitor component, the second capacitor component, and the at least one dielectric layer.   The diplexer according to claim 2, wherein the first conductor layer is directly connected to the first terminal, and the second conductor layer is directly connected to the second terminal.

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