JP2015056512A - Photoelectric conversion device, method of manufacturing the same, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photoelectric conversion device that allows preventing an impurity from precipitating on a pn junction interface even if substrate temperature at the time of deposition is lowered or the composition ratio of each composition element at the time of deposition changes from a setting value, to provide a method of manufacturing the same, and to provide an electronic apparatus.SOLUTION: A method of manufacturing a photoelectric conversion device, which forms a photoelectric conversion portion 20 connected to a circuit element on a substrate 1 on which a circuit portion having the circuit element 10 is formed, includes the steps of: forming, above the substrate, a lower electrode 8 in a region where the photoelectric conversion portion is formed; forming an n-type semiconductor film 21 electrically connected to the lower electrode; forming a p-type semiconductor film 22 having a chalcopyrite structure that is pn-joined with the n-type semiconductor film; and forming an upper electrode 23 electrically connected to the p-type semiconductor film. An impurity 22D is formed on a surface of the p-type semiconductor film 22 but not on a pn junction interface.

Description

  The present invention relates to a photoelectric conversion device, a manufacturing method thereof, an electronic device, and the like.

Conventionally, p-type semiconductor thin films having a chalcopyrite structure, particularly CIS thin films such as CIS films (for example, CuInSe ₂ ) and CIGS films (for example, CuInGaSe ₂ ), are high over a wide wavelength range from visible light to near infrared light. Since it has photosensitivity, application to a photodetection element is desired. It has been proposed to apply a PVD (Physical Vapor Deposition) process divided into three stages to form a CIS-based thin film on an array substrate (FIG. 5 of Patent Document 1 and FIG. 7 of Patent Document 2).

WO2008 / 093834 JP 2011-003878 A

The reason for adopting the PVD process divided into three stages for forming the CIS-based thin film on the array substrate is to realize a low temperature process. This is because, unlike the case of manufacturing a solar cell, a circuit portion is mounted on a substrate for light detection, and the heat resistance of the circuit portion, particularly metal wiring, becomes a problem.
However, if the CIS-based thin film is formed on the array substrate at a low substrate temperature, the component elements are difficult to diffuse to each other. Therefore, a selenium compound such as CuSe is deposited. When this selenium compound is deposited at the pn junction interface, there arises a problem that the photosensitivity is lowered and the leakage current is increased.

Further, even when film formation is performed at a substrate temperature at which each component element easily diffuses, for example, the composition ratio Cu: In: Se = 1: 1: 2 of the component elements when CuInSe ₂ or CuInGaSe ₂ is formed is strictly. If it cannot be adjusted to selenium, the selenium compound (CuSe) is precipitated at the pn junction interface due to excess Cu and Se.

  Some aspects of the present invention suppress the precipitation of impurities at the pn junction interface even when the substrate temperature during film formation is lowered or the composition ratio of each component element during film formation deviates from the set value. It is an object to provide a photoelectric conversion device, a manufacturing method thereof, and an electronic device.

(1) One aspect of the present invention is
A method of manufacturing a photoelectric conversion device, wherein a photoelectric conversion unit connected to the circuit element is formed on a substrate on which a circuit unit having a circuit element is formed,
Forming a lower electrode in a region where the photoelectric conversion part is formed on the substrate;
Forming an n-type semiconductor film conducting to the lower electrode;
Forming a p-type semiconductor film having a chalcopyrite structure that is pn-junction to the n-type semiconductor film;
Forming an upper electrode conducting to the p-type semiconductor film;
The present invention relates to a method of manufacturing a photoelectric conversion device having

  In one embodiment of the present invention, a p-type semiconductor film having a chalcopyrite structure including an IB (1B) group element, a IIIB (3B) group element, and a VIB (6B) group element, and an n-type semiconductor A pn junction is formed with the film. In forming the pn junction, after forming an n-type semiconductor film, a p-type semiconductor film to be pn-junctioned with the n-type semiconductor film is formed. Therefore, even when an impurity such as a compound of an IB (1B) group element and a VIB (6B) group element (such as a selenium compound) is deposited when the p-type semiconductor film is formed, the impurity is not present in the p-type semiconductor film. It precipitates on the surface and is suppressed from precipitating at the pn junction interface. That is, while the manufacturing method according to one embodiment of the present invention allows impurities to precipitate mainly at the pn junction interface, the photoelectric conversion device manufactured by this manufacturing method suppresses a decrease in photosensitivity and an increase in leakage current. it can.

  (2) In one aspect of the present invention, the step of forming the p-type semiconductor film includes the step of forming a precursor of the p-type semiconductor film on the n-type semiconductor film, and the step of forming the precursor. Annealing the substrate in an atmosphere containing a VIB (6B) group element.

  The p-type semiconductor film can be formed, for example, by annealing a p-type semiconductor film precursor formed on the substrate by sputtering in an atmosphere containing a VIB (6B) group element. This annealing step is selenium annealing if the VIB (6B) group element is, for example, selenium (Se), and if the IB (6B) group element is, for example, sulfur (S), it is sulfidation annealing, and the precursor is selenized or A p-type semiconductor film is formed by sulfuration. In addition, the p-type semiconductor film may be formed by applying the PVD process disclosed in Patent Documents 1 and 2.

(3) In one aspect of the invention, the p-type semiconductor film _may be a _{CuIn X Ga 1-X Se 2} (0 ≦ X ≦ 1).

  The selenium-based thin film (CIS film or CIGS film) represented by this general formula is suitable for a photoelectric conversion device because it has high photosensitivity over a wide wavelength range from visible light to near infrared light. In particular, in order to increase light absorption with respect to near-infrared light, the value of X in the above general formula may be brought close to 1 to reduce the Ga ratio.

  (4) In one embodiment of the present invention, the annealing step can be performed at 520 ° C. or lower.

  When the p-type semiconductor film is a selenium-based thin film (CIS film or CIGS film), CuSe is precipitated as impurities. Since the melting point of CuSe is 523 ° C., the impurities cannot be melted at 520 ° C. or less even if the impurities can be melted if the annealing temperature is equal to or higher than the melting point. Even if the annealing process is performed under such conditions, CuSe, which is an impurity, is not deposited on the pn junction interface, but is formed on the surface of the p-type semiconductor film. An increase in current can be suppressed.

  (5) In one aspect of the present invention, the annealing step can be performed at a temperature lower than the heat resistant temperature of the metal wiring layer formed in the circuit portion.

  In the manufacturing method according to one embodiment of the present invention, impurities are allowed to be precipitated due to annealing at a relatively low temperature, so that the degree of freedom in selecting a metal wiring material having a heat resistant temperature higher than the annealing temperature is widened. It is done.

  (6) One embodiment of the present invention may further include a step of removing impurities deposited on the surface of the p-type semiconductor film after forming the p-type semiconductor film.

  Since impurities are mainly deposited on the surface of the p-type semiconductor, the impurities can be removed by, for example, light etching the surface after the formation of the p-type semiconductor film. Note that it is not necessary to completely remove impurities. Since the impurity which is a compound of the IB (1B) group element and the VIB (6B) group element has conductivity, even if an impurity is interposed between the p-type semiconductor film and the upper electrode, the conductivity is not hindered. Because. Impurities may be removed for the purpose of planarizing the surface of the p-type semiconductor film.

  (7) In one aspect of the present invention, the photoelectric conversion unit is formed in a region that does not overlap the circuit unit when viewed from the thickness direction of the substrate, and the substrate and the lower electrode are incident on the substrate. It can be formed of a material transparent to the wavelength of light.

  In the photoelectric conversion device manufactured by the method according to one embodiment of the present invention, light incident from the back surface side of the substrate on which the photoelectric conversion portion is formed on the front surface side is converted into an electrical signal. This is because the p-type semiconductor film functions as a light absorption layer, so that when light is incident from the surface of the substrate, it is absorbed by the p-type semiconductor film and does not reach the pn junction interface. In order to allow light incident from the back surface of the substrate to reach the pn junction interface, the substrate and the lower electrode are formed of a material transparent to the wavelength of the incident light.

(8) Another aspect of the present invention is:
A substrate transparent to the wavelength of the incident light;
A circuit portion including circuit elements formed on the substrate;
A photoelectric conversion unit provided on a region of the substrate that does not overlap the circuit unit when viewed from the thickness direction of the substrate;
Have
The photoelectric converter is
A lower electrode transparent to the wavelength;
An n-type semiconductor film conducting to the lower electrode;
A p-type semiconductor film having a chalcopyrite structure that is pn-junction to the n-type semiconductor film;
An upper electrode conducting to the p-type semiconductor film;
The present invention relates to a photoelectric conversion device including:

  The photoelectric conversion device according to another aspect of the present invention converts light incident from the back side of the substrate on which the photoelectric conversion unit is formed on the front side into an electrical signal. The light incident from the back surface of the substrate enters the photoelectric conversion unit through the substrate transparent to the wavelength of the incident light. At this time, since the photoelectric conversion unit is provided in a region that does not overlap with the circuit unit when viewed from the thickness direction of the substrate, even if the photoelectric conversion unit is shielded from light by the circuit unit, light incident on the photoelectric conversion unit is not adversely affected. Light incident on the photoelectric conversion unit is formed of a material transparent to the wavelength of the incident light, passes through the lower electrode, and reaches the pn junction interface via the n-type semiconductor film functioning as a buffer layer. Since the photoelectric conversion device according to one embodiment of the present invention is manufactured by the manufacturing method according to one embodiment of the present invention and impurities are prevented from being precipitated at the pn junction interface, the photosensitivity is reduced and the leakage current is increased. Can be suppressed.

  (9) Still another aspect of the present invention defines an electronic device including the above-described photoelectric conversion device.

  As described above, the electronic apparatus includes a photoelectric conversion device that can suppress a decrease in photosensitivity and an increase in leakage current, so that a high-quality image can be realized.

1A is a schematic wiring diagram of an image sensor as a photoelectric conversion device, and FIG. 1B is an equivalent circuit diagram of a photosensor as a photoelectric conversion element. It is a schematic plan view of the image sensor which shows arrangement | positioning of the photosensor as a photoelectric conversion element. FIG. 3 is a schematic cross-sectional view of the photosensor taken along line A-A ′ of FIG. 2 in the first embodiment. 4A to 4E are schematic cross-sectional views showing the photosensor manufacturing process according to the second embodiment before the annealing process. FIG. 5A to FIG. 5D are schematic cross-sectional views illustrating the photosensor manufacturing process according to the second embodiment that is performed after the annealing process. 6 is a cross-sectional view of a photosensor manufactured by the manufacturing method of Embodiment 2. FIG. It is sectional drawing of the photosensor which is a comparative example. FIG. 8A is a schematic perspective view showing a biometric authentication device as an electronic device, and FIG. 8B is a schematic cross-sectional view of the biometric authentication device as an electronic device. It is a schematic sectional drawing which shows the modification of a biometrics apparatus.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, the scale of each layer and each member is different from the actual scale so that each layer and each member can be recognized.

  Further, in the following forms, for example, when described as “on the substrate”, when arranged so as to be in contact with the substrate, or when disposed on the substrate via another component, Alternatively, a case where a part of the substrate is disposed on the substrate and a part of the substrate is disposed through another component is illustrated.

(Embodiment 1)
<Photoelectric conversion device>
First, an image sensor as a photoelectric conversion device of Embodiment 1 will be described with reference to FIGS.

  FIG. 1A is a schematic wiring diagram showing an electrical configuration of an image sensor as a photoelectric conversion device, and FIG. 1B is an equivalent circuit diagram of a photosensor as a photoelectric conversion element. 2 is a schematic partial plan view showing the arrangement of the photosensors in the image sensor, and FIG. 3 is a schematic cross-sectional view showing the structure of the photosensors taken along the line A-A ′ of FIG.

  As shown in FIG. 1A, an image sensor 100 as a photoelectric conversion device of the present embodiment includes a plurality of scanning lines 3a extending in a crossing manner in the element region F and a plurality of data lines 6. Have. The image sensor 100 includes a scanning line circuit 102 to which a plurality of scanning lines 3a are electrically connected, and a data line circuit 101 to which a plurality of data lines 6 are electrically connected.

  The image sensor 100 is provided corresponding to the vicinity of the intersection of the scanning line 3a and the data line 6, and each of the plurality of pixels arranged in a matrix in the element region F has a photosensor 50 as a photoelectric conversion element. have. Note that the scanning line circuits 102 may be provided on both sides of the element region F. In this way, one scanning line 3a can be driven from both sides. Alternatively, the odd-numbered scanning lines 3 a may be driven by one scanning line circuit 102, and the even-numbered scanning lines 3 a may be driven by the other scanning line circuit 102.

  As shown in FIG. 1B, a photosensor 50 as a photoelectric conversion element includes a thin film transistor (TFT) 10 as a switching element, a photodiode 20 as a photoelectric conversion unit, and a storage capacitor 30. Has been. The gate electrode of the TFT 10 is connected to the scanning line 3 a, and the source electrode of the TFT 10 is connected to the data line 6. One end of the photodiode 20 as a photoelectric conversion unit is connected to the drain electrode of the TFT 10, and the other end is connected to a constant potential line 12 provided in parallel with the data line 6. One electrode of the storage capacitor 30 is connected to the drain electrode of the TFT 10, and the other electrode is connected to a constant potential line 3b provided in parallel with the scanning line 3a.

  As shown in FIG. 2, the photosensor 50 as a photoelectric conversion element is provided in a region that is divided in a plane by the scanning line 3 a and the data line 6. More specifically, the lower electrode 8 of the photodiode 20 is arranged in a region that is planarly divided by the scanning line 3 a and the data line 6. Most of the lower electrode 8 is used as a sensor region 20 a of the photodiode 20, while the other part is used as a contact region 20 b between the lower electrode 8 and the TFT 10. In FIG. 2, the TFT 10 is disposed on the back side of the source line 6. In FIG. 2, the storage capacitor 30 is not shown.

As shown in FIG. 3, a photosensor 50 as a photoelectric conversion element is formed on a glass substrate 1 that is transparent with respect to the wavelength of incident light. A base insulating film 1a made of silicon oxide (SiO ₂ ) is formed on the substrate 1 so as to cover the surface of the substrate 1, and a light shielding film 1b is formed on the base insulating film 1a at a position facing the formation region of the TFT 10. Is formed. On an insulating film 1c such as SiO2 formed so as to cover the light shielding film 1b, a polycrystalline silicon semiconductor film 2 having a film thickness of, for example, about 50 nm is formed in an island shape. Further, the gate insulating film 3 is formed of an insulating material such as SiO _{2 having a} thickness of about 100 nm so as to cover the semiconductor film 2. The gate insulating film 3 covers the semiconductor film 2 and also the insulating film 1c.

  On the gate insulating film 3, a gate electrode 3g is formed at a position facing the channel forming region 2c of the semiconductor film 2. The gate electrode 3g is electrically connected to the scanning line 3a shown in FIG. 2, and is formed using a refractory metal material such as molybdenum (Mo) having a thickness of about 500 nm, for example.

A first interlayer insulating film 4 is formed of SiO ₂ having a thickness of about 800 nm so as to cover the gate electrode 3 g and the gate insulating film 3. Contact holes 4 a and 4 b are formed in the gate insulating film 3 and the first interlayer insulating film 4 covering the drain region 2 d and the source region 2 s of the semiconductor film 2.

  A conductive film made of a refractory metal material such as Mo having a thickness of about 500 nm is formed to fill the contact holes 4a and 4b and cover the first interlayer insulating film 4, and patterning the conductive film The drain electrode 5d, the source electrode 5s, and the data line 6 (not shown in FIG. 4) are formed.

  The source electrode 5s is connected to the source region 2s of the semiconductor film 2 through the contact hole 4a, and further connected to the data line 6 (not shown in FIG. 4). The drain electrode 5d is connected to the drain region 2d of the semiconductor film 2 through the contact hole 4b.

A second interlayer insulating film 7a and a planarizing film 7b are formed to cover the drain electrode 5d, the source electrode 5s, the data line 6, and the first interlayer insulating film 4. The second interlayer insulating film 7a is formed using, for example, silicon nitride (Si ₃ N ₄ ) having a thickness of about 800 nm, and the planarizing film 7b is formed using silicon oxide (SiO ₂ ).

  On the patterned flattening film 7b, the lower electrode 8 of the photodiode 20 as a photoelectric conversion part is formed. The lower electrode 8 is connected to the drain electrode 5d through a contact hole 7c formed in the planarizing film 7b. The lower electrode 8 is made of a transparent conductive film that is transparent with respect to an incident wavelength, such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide).

  On the lower electrode 8, a buffer layer 21 that is an n-type semiconductor film is formed in an island shape. The buffer layer 21 is formed of a cadmium sulfide (CdS) film having a thickness of about 50 nm. Instead of CdS, it may be formed of zinc oxide (ZnO), zinc sulfide (ZnS), or the like.

On the buffer layer 21, a p-type semiconductor film 22 having a chalcopyrite structure made of a CIS film or a CIGS film having a thickness of about 1 μm is formed. A third interlayer insulating film 11 is formed so as to cover the lower electrode 8 and the semiconductor film 22 having a chalcopyrite structure. The third interlayer insulating film 11 is formed using Si ₃ N ₄ having a thickness of about 500 nm.

  An upper electrode 23 is formed on the third interlayer insulating film 11 so as to be connected to the p-type semiconductor film 22 having a chalcopyrite structure. Since the upper electrodes 23 of all the photodiodes 20 are commonly connected to the constant potential line 12 as shown in FIG. 1B, the upper electrode 23 can be a solid electrode formed on the entire surface of the substrate 1. . In the present embodiment, the upper electrode 23 is made of the same ITO as the lower electrode 8, but the upper electrode 23 may be opaque to the wavelength of incident light.

  The lower (transparent) electrode 8, the n-type semiconductor film 21 serving as a buffer layer, the p-type semiconductor film 22 having a chalcopyrite structure, and the upper electrode 23 constitute a photodiode 20 as a photoelectric conversion unit. Yes.

  In the present embodiment, the circuit portion provided on the substrate 1 refers to the scanning line 3a, the data line 6, the constant potential lines 3b and 12 and their wirings shown in FIGS. The TFT 10 and the storage capacitor 30 which are connected circuit elements are included. The data line circuit 101 to which the data line 6 is connected and the scanning line circuit 102 to which the scanning line 3a is connected can be separately attached to the substrate 1 as an integrated circuit.

  According to the image sensor 100 as such a photoelectric conversion device, as shown in FIG. 4 with respect to the photodiode 20 in a state where a reverse bias is applied to the photodiode 20 as the photoelectric conversion unit by the constant potential lines 3b and 12. Light enters the substrate 1 from the back side. As a result, a photocurrent flows through the photodiode 20 having a pn junction between the buffer layer 21, which is an n-type semiconductor, and the p-type semiconductor film 22, and charges corresponding thereto are accumulated in the storage capacitor 30.

  Further, by turning on (selecting) the plurality of TFTs 10 by each of the plurality of scanning lines 3a, signals corresponding to the charges accumulated in the storage capacitors 30 included in the respective photosensors 50 are sequentially output to the data lines 6. The Accordingly, the intensity of light received by each photosensor 50 in the element region F can be detected.

  In the photodiode 20 as the photoelectric conversion unit of the present embodiment, the impurities precipitated at the pn junction interface between the buffer layer 21 that is an n-type semiconductor and the p-type semiconductor film 22 are suppressed, so that the photosensitivity decreases. And increase in leakage current can be suppressed. Although this point is clear also from the said structure, it explains in full detail after demonstrating the manufacturing method shown below.

(Embodiment 2)
<Method for Manufacturing Photoelectric Conversion Device>
In the manufacturing method shown in FIGS. 4A to 4E and FIGS. 5A to 5D, the substrate 1 on which the planarizing film 7b shown in FIG. 4 is formed is prepared, and the substrate 1 is subjected to photoelectric conversion. 3 shows a method of forming a photodiode 20 as a part. Since the formation process up to the planarizing film 7b can be performed in the same manner as a normal method for manufacturing a semiconductor device, description thereof is omitted.

  As shown in FIG. 4A, the lower electrode 8 is formed of, for example, ITO on the planarizing film 7b. The lower electrode 8 is patterned and formed in the sensor region 20a of the photodiode 20 shown in FIG. 4 through a photolithography process and an etching process.

  After the n-type conductive layer 9 is formed of, for example, a ZnO film so as to cover the lower electrode 8 as shown in FIG. 4B, the n-type semiconductor is covered so as to cover the n-type conductive layer 9 as shown in FIG. The buffer layer 21 that is a film is formed of a CdS film by, for example, a CBD (Chemical Bath Deposition) method. Note that the n-type conductive layer 9 not shown in FIG. 4 is provided to reduce leakage, but is not essential.

  As shown in FIG. 4D, a Cu—Ga alloy film 22A and an In film 22B are formed on the buffer layer 21 by sputtering or the like. The Cu—Ga alloy film 22A and the In film 22B are precursor films as precursors that become the p-type semiconductor film 22 having a chalcopyrite structure by subsequent selenization annealing. The total film thickness of the precursor film is about 500 nm.

FIG. 4E shows a selenization annealing process. After the step of FIG. 4D is completed, the substrate 1 is subjected to selenization annealing, so that the Cu—Ga alloy film 22A and the In film 22B, which are precursor films, are p-type semiconductor films (CIGS films) having a chalcopyrite structure. ) 22. The selenization annealing is annealing at a temperature of preferably 520 ° C. or less, for example, about 500 ° C. in an atmosphere containing hydrogen selenide (H ₂ Se) gas. The temperature of 500 ° C. is lower than the heat resistance temperature of the refractory metal Mo which is a material for forming the metal wiring layers 3g, 5d, 5s, 6 used in the present embodiment.

Here, when, for example, CuInSe ₂ or CuInGaSe ₂ is formed as the p-type semiconductor film 22 having a chalcopyrite structure, the composition ratio of component elements Cu: In: Se = 1: 1: 2 needs to be strictly adjusted. is there. Otherwise, the selenium compound (CuSe) 22D is precipitated by excess Cu and Se. Since the melting point of CuSe is 523 ° C., it is not melted at an annealing temperature of 520 ° C. or less. However, in this embodiment, the selenium compound 22D is not deposited on the pn junction interface, but is deposited only on the surface of the p-type semiconductor film 22 as shown in FIG.

  As described above, in the manufacturing method according to the second embodiment, the p-type semiconductor film 22 is formed after the n-type semiconductor film 21 is formed. As a result, the photodiode 20 according to the first embodiment shown in FIG. 4 has a structure in which the p-type semiconductor film 22 is joined to the n-type semiconductor film 21 located on the side close to the substrate 1, and the pn junction interface is formed. The precipitated selenium compound 22D can be suppressed. Thereby, in the photodiode 20 shown in FIG. 4, it is possible to suppress a decrease in photosensitivity and an increase in leakage current.

  FIG. 5A shows an additional step of removing the selenium compound 22D on the p-type semiconductor film 22 shown in FIG. The selenium compound 22D can be removed by, for example, light etching. The selenium compound 22D need not be completely removed. This is because, since the selenium compound 22D has conductivity, even if it is interposed between the p-type semiconductor film 22 and the upper electrode 23, the conductivity is not inhibited. For the purpose of planarizing the surface of the p-type semiconductor film 22, the selenium compound 22D may be removed.

After that, the n-type conductive layer 9, the n-type semiconductor film 21 and the p-type semiconductor film 22 on the lower electrode 8 are patterned by a photolithography process (see FIG. 5B), and the third interlayer insulation is formed so as to cover them. The film 11 is formed of Si ₃ N ₄ to form an opening 11a (see FIG. 5B). Finally, the upper electrode 23 connected to the p-type semiconductor film 22 through the opening 11a is formed (see FIG. 5D), whereby the photodiode 20 is completed.

  FIG. 6 shows the photodiode 20 manufactured by the manufacturing method of the second embodiment, and the place where the above-described selenium compound 22D is likely to be deposited is the position between the p-type semiconductor film 22 and the upper electrode 23 indicated by symbol A in FIG. It is an interface. On the other hand, FIG. 7 shows the structure of a comparative example in which an n-type gold conductor film 21 is laminated on a p-type semiconductor film 22. In FIG. 7, the place where the selenium compound 22 </ b> D is likely to precipitate is the interface between the p-type semiconductor film 22 and the n-type semiconductor film 21, which is indicated by a symbol B in FIG. 7. Accordingly, in the comparative example of FIG. 7, the selenium compound deposited at the interface between the p-type semiconductor film 22 and the n-type semiconductor film 21 causes a decrease in photosensitivity and an increase in leakage current.

(Embodiment 3)
<Biometric authentication device>
Next, a biometric authentication device as an electronic apparatus according to the present embodiment will be described with reference to FIG. FIG. 8A is a schematic perspective view showing a biometric authentication device, and FIG. 8B is a schematic cross-sectional view.

  As shown in FIGS. 8A and 8B, the biometric authentication device 500 as an electronic apparatus according to the present embodiment detects (images) a vein pattern of a finger and registers a vein pattern for each individual registered in advance. By comparing with the biometric authentication device 500, the individual holding the finger is identified and authenticated.

  Specifically, a subject receiving unit 502 having a groove for placing a held finger at a predetermined location, an imaging unit 504 to which the image sensor 100 as the photoelectric conversion device of the embodiment is attached, and a subject receiving unit And a microlens array 503 disposed between the imaging unit 504 and the imaging unit 504.

  The subject receiver 502 includes a plurality of light sources 501 arranged on both sides along the groove. The light source 501 uses, for example, a light emitting diode (LED) or an EL element that emits near-infrared light other than visible light in order to capture a vein pattern without being affected by external light.

  The vein pattern in the finger is illuminated by the light source 501, and the image light is condensed toward the image sensor 100 by the microlens 503 a provided in the microlens array 503. The microlens 503a may be provided corresponding to each photosensor 50 of the image sensor 100, or may be provided so as to be paired with a plurality of photosensors 50.

  Note that an optical compensator for correcting luminance unevenness of illumination light from the plurality of light sources 501 may be provided between the subject receiving unit 502 incorporating the light source 501 and the microlens array 503. According to such a biometric authentication apparatus 500, the image sensor 100 that receives near-infrared light and can accurately output the illuminated vein pattern as a video pattern is provided. It can be authenticated.

  Note that the present invention is not limited to the above-described embodiment, and various modifications and improvements can be added to the above-described embodiment. A modification will be described below.

(Modification 1)
In the image sensor 100 of the above embodiment, the electrical configuration of the photosensor 50 and its connection are not limited to this. For example, the electrical output from the photodiode 20 may be connected to the gate electrode 3g of the TFT 10 to detect light reception as a change in voltage or current between the source electrode 5s and the drain electrode 5d.

(Modification 2)
In the image sensor 100 of the above embodiment, the VIB (6B) group element included in the semiconductor film 22 having the chalcopyrite structure is selenium (Se), but is not necessarily limited to Se. For example, the VIB (6B) group element may be sulfur (S), and the semiconductor film 22 having a chalcopyrite structure may be a CIS film. Further, the VIB (6B) group element contained in the semiconductor film 22 having a chalcopyrite structure may be two elements of Se and S.

(Modification 3)
In the manufacturing method of the photoelectric conversion device of the above embodiment, the precursor film is the Cu—Ga alloy film 21A and the In film 21B, but is not limited thereto. For example, a Cu film may be formed instead of the Cu—Ga alloy film. In this case, the semiconductor film having a chalcopyrite structure is a CIS film. Further, the Cu—Ga alloy film or the Cu film may be formed after the In film is formed by changing the film formation order. Further, the Cu—Ga alloy film and the In film may be stacked in any number by increasing the number of stacked layers. Further, instead of a laminated film, a Cu—In—Ga alloy film or a Cu—In alloy film may be formed.

(Modification 4)
The electronic device on which the image sensor 100 of the above embodiment is mounted is not limited to the biometric authentication device 500. For example, the present invention can be applied to a solid-state imaging device that images a fingerprint or an iris of an eyeball. Further, as shown in FIG. 9, the biometric authentication device 510 can include a microlens array 503 and a light emitting device 512 between the subject receiving unit 502 and the imaging unit 504. The light emitting device 512 includes a plurality of light emitting elements (for example, an organic EL) 512a. Accordingly, it is not necessary to provide the light source 501 shown in FIG. In the structure of FIG. 9, the imaging unit 504 may be provided with a light shielding unit 504 a that prevents light from directly entering the photodiode 20 from the light emitting element (e.g., organic EL) 512 a.

  DESCRIPTION OF SYMBOLS 1 Substrate, 5d, 5s, 6 Metal wiring, 8 Lower electrode, 10 Circuit element (TFT), 20 Photoelectric conversion part (photosensor) 21 n-type semiconductor film, 22 p-type semiconductor film, 22A, 22B, 22C p-type semiconductor Film precursor, 22D impurity (selenium compound), 23 upper electrode, 100 photoelectric conversion device (image sensor), 101 data line circuit, 102 scanning line circuit, 500, 510 electronic device (biometric authentication device), 501 light source, 502 Subject receiving unit, 503 micro lens array, 503a micro lens, 504 imaging unit, 512 light emitting device, F element region

Claims (9)

A method of manufacturing a photoelectric conversion device, wherein a photoelectric conversion unit connected to the circuit element is formed on a substrate on which a circuit unit having a circuit element is formed,
Forming a lower electrode in a region where the photoelectric conversion part is formed on the substrate;
Forming an n-type semiconductor film conducting to the lower electrode;
Forming a p-type semiconductor film having a chalcopyrite structure that is pn-junction to the n-type semiconductor film;
Forming an upper electrode conducting to the p-type semiconductor film;
A process for producing a photoelectric conversion device, comprising: The step of forming the p-type semiconductor film includes
Forming a precursor of the p-type semiconductor film on the n-type semiconductor film;
Annealing the substrate on which the precursor is formed in an atmosphere containing a VIB (6B) group element;
The manufacturing method of the photoelectric conversion apparatus of Claim 1 characterized by the above-mentioned. The p-type semiconductor _{film, CuIn X Ga 1-X Se} 2 (0 ≦ X ≦ 1) manufacturing method of a photoelectric conversion device according to claim 1 or 2, characterized in that a.   The said annealing process is performed at 520 degrees C or less, The manufacturing method of the photoelectric conversion apparatus of Claim 3 characterized by the above-mentioned.   5. The method of manufacturing a photoelectric conversion device according to claim 1, wherein the annealing step is performed at a temperature equal to or lower than a heat resistant temperature of a metal wiring layer formed in the circuit portion.   6. The method of manufacturing a photoelectric conversion device according to claim 1, further comprising a step of removing impurities deposited on a surface of the p-type semiconductor film after forming the p-type semiconductor film. Method.   The photoelectric conversion unit is formed in a region that does not overlap the circuit unit when viewed from the thickness direction of the substrate, and the substrate and the lower electrode are made of a material that is transparent to the wavelength of light incident on the substrate. The method for manufacturing a photoelectric conversion device according to claim 1, wherein the photoelectric conversion device is formed. A substrate transparent to the wavelength of light incident from the back surface;
A circuit portion including circuit elements formed on the substrate;
A photoelectric conversion unit provided on a surface side of the substrate and not overlapping with the circuit unit when viewed from the thickness direction of the substrate;
Have
The photoelectric converter is
A lower electrode transparent to the wavelength;
An n-type semiconductor film conducting to the lower electrode;
A p-type semiconductor film having a chalcopyrite structure that is pn-junction to the n-type semiconductor film;
An upper electrode conducting to the p-type semiconductor film;
A photoelectric conversion device comprising:   An electronic apparatus comprising the photoelectric conversion device according to claim 8.

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