JP2015053530A - Multilayer ceramic capacitor and method for manufacturing the same - Google Patents

Multilayer ceramic capacitor and method for manufacturing the same Download PDF

Info

Publication number
JP2015053530A
JP2015053530A JP2014252934A JP2014252934A JP2015053530A JP 2015053530 A JP2015053530 A JP 2015053530A JP 2014252934 A JP2014252934 A JP 2014252934A JP 2014252934 A JP2014252934 A JP 2014252934A JP 2015053530 A JP2015053530 A JP 2015053530A
Authority
JP
Japan
Prior art keywords
particles
core
dielectric layer
multilayer ceramic
ceramic capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2014252934A
Other languages
Japanese (ja)
Other versions
JP5857116B2 (en
Inventor
浩一郎 森田
Koichiro Morita
浩一郎 森田
水野 洋一
Yoichi Mizuno
洋一 水野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP2014252934A priority Critical patent/JP5857116B2/en
Publication of JP2015053530A publication Critical patent/JP2015053530A/en
Application granted granted Critical
Publication of JP5857116B2 publication Critical patent/JP5857116B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide: a multilayer ceramic capacitor high in dielectric constant and having favorable temperature characteristics, even when a ceramic dielectric layer is reduced in thickness; and a method for manufacturing such the multilayer ceramic capacitor.SOLUTION: The multilayer ceramic capacitor is obtained by alternately laminating a ceramic dielectric layer and a conductor layer. The ceramic dielectric layer is baked so that core-shell particles having a core-shell structure and uniform solid-solution particles in which solid solubilization progresses uniformly are mixed therein. An area ratio of the core-shell particles to the total of sintered body particles constituting the ceramic dielectric layer is 5-15%, and an average particle size of the total sintered body particles combining the core-shell particles and the uniform solid-solution particles is 0.3-0.5 μm.

Description

本発明は、セラミック誘電体層と導体層とを交互に積層してなる積層セラミックコンデンサ及びその製造方法に関する。   The present invention relates to a multilayer ceramic capacitor formed by alternately laminating ceramic dielectric layers and conductor layers, and a method for manufacturing the same.

携帯電話などのデジタル電子機器の小型化及び薄型化に伴い、電子回路基板等に面実装される積層セラミックコンデンサ(MLCC:Multi-Layer ceramic capacitor)の小型化及び大容量化が進んでいる。積層セラミックコンデンサは、誘電体であるセラミック誘電体層と、内部電極である導体層の各層が交互に積層された構造を有している。   As digital electronic devices such as mobile phones become smaller and thinner, multilayer ceramic capacitors (MLCCs) that are surface-mounted on electronic circuit boards and the like are becoming smaller and larger in capacity. The multilayer ceramic capacitor has a structure in which ceramic dielectric layers as dielectrics and conductor layers as internal electrodes are alternately laminated.

一般にコンデンサのサイズを小さくすれば、誘電体に対向する内部電極の面積が小さくなるため静電容量が減る関係にある。そのため、チップサイズの小型化に向けてコンデンサの静電容量を確保するには、誘電体及び内部電極の層を薄くし、かつ、それらを多層に積層させる高密度積層化技術が不可欠である。   In general, when the size of the capacitor is reduced, the area of the internal electrode facing the dielectric is reduced, so that the capacitance is reduced. For this reason, in order to secure the capacitance of the capacitor toward the reduction in chip size, a high-density stacking technique in which the dielectric and internal electrode layers are thinned and stacked in multiple layers is indispensable.

ところで、従来、温度特性が良好とされる誘電体セラミックスとして、焼結体結晶粒子がコアシェル構造を有するものが知られている。例えば、チタン酸バリウム(BaTiO)である主成分に希土類元素等を含む副成分を添加してグレイン成長を抑制しながら焼成することで、誘電率の温度変化が少ないコアシェル構造の誘電体セラミックスが得られている(例えば特許文献1参照)。 By the way, conventionally, as a dielectric ceramic having good temperature characteristics, a sintered ceramic crystal particle having a core-shell structure is known. For example, by adding a secondary component containing a rare earth element or the like to the main component of barium titanate (BaTiO 3 ) and firing while suppressing grain growth, a dielectric ceramic having a core-shell structure with little change in temperature of dielectric constant can be obtained. (See, for example, Patent Document 1).

従来、コアシェル構造の誘電体セラミックスにおいては、コア部の外殻に比較的誘電率が低い副成分が固溶してシェル部が形成されるため、高い誘電率を得るのが困難であるとの課題があった。また、粒成長を抑制しながらコアシェル構造が形成されるため、比較的小さなグレイン径のサイズ効果によっても誘電率が抑制されてしまう。   Conventionally, in dielectric ceramics having a core-shell structure, it is difficult to obtain a high dielectric constant because a shell part is formed by dissolving a secondary component having a relatively low dielectric constant in the outer shell of the core part. There was a problem. In addition, since the core-shell structure is formed while suppressing grain growth, the dielectric constant is also suppressed by the size effect of a relatively small grain diameter.

その一方で、コアシェル構造を有する粒子と、粒子構造が均一の粒子(本願ではこれを「均一固溶粒子」という。)とを混在させることで、小型化及び大容量化の要求に応えるようにした積層セラミックコンデンサが提案されている(例えば特許文献2参照)。ここで、粒子構造が均一とは、セラミックスの焼成過程において、コア内部への副成分の固溶拡散が進行してもはやコアシェル構造が失われた状態をいう。   On the other hand, by mixing particles having a core-shell structure and particles having a uniform particle structure (in the present application, this is referred to as “homogeneous solid solution particles”), so as to meet the demands for miniaturization and large capacity. A multilayer ceramic capacitor has been proposed (see, for example, Patent Document 2). Here, the uniform particle structure means a state in which the core-shell structure is no longer lost due to the progress of solid solution diffusion of subcomponents into the core during the ceramic firing process.

例えば特許文献2の積層セラミックコンデンサでは、誘電体層の任意の断面においてコアシェル構造を有する粒子と均一系粒子との面積比が2:8〜4:6の範囲で混在するようにその焼成温度及び焼成時間が選択される。これにより、比誘電率が4500以上、JIS規格Dを満足する温度特性が得られている。   For example, in the multilayer ceramic capacitor disclosed in Patent Document 2, the firing temperature and the area ratio of particles having a core-shell structure and uniform particles in an arbitrary cross section of the dielectric layer are mixed in the range of 2: 8 to 4: 6. A firing time is selected. Thereby, a temperature characteristic satisfying JIS standard D with a relative dielectric constant of 4500 or more is obtained.

特開2004−345927号公報JP 2004-345927 A 特開2001−15374号公報JP 2001-15374 A

近年ではよりハイエンド仕様の製品向けとして、更に大容量(例えば誘電体層の厚さが2μm以下、比誘電率が5000以上)であって、更に良好な温度特性(例えばEIA規格X5R相当)を有する積層セラミックコンデンサが求められている。   In recent years, for higher-end products, it has a larger capacity (for example, a dielectric layer thickness of 2 μm or less and a relative dielectric constant of 5000 or more), and has better temperature characteristics (for example, EIA standard X5R equivalent). There is a need for multilayer ceramic capacitors.

誘電体層にコアシェル粒子と均一系粒子とが混在する従来の積層セラミックコンデンサにおいては、誘電体層の厚さが薄いほど容量の温度変化特性(TCC:temperature coefficient of capacitance)が悪化する傾向にある。例えば特許文献2に開示される条件では、誘電体層の厚さを4.0μmから3.0μmに薄層化した場合にTCC(20℃〜85℃)が約5%ポイント悪化しており、既にX5R規格を満足するものではない。   In a conventional multilayer ceramic capacitor in which core-shell particles and homogeneous particles are mixed in the dielectric layer, the temperature coefficient of capacitance (TCC) tends to deteriorate as the thickness of the dielectric layer decreases. . For example, under the conditions disclosed in Patent Document 2, when the thickness of the dielectric layer is reduced from 4.0 μm to 3.0 μm, TCC (20 ° C. to 85 ° C.) is deteriorated by about 5% point, The X5R standard is not already satisfied.

本発明は、かかる課題を解決するためになされたものであり、セラミック誘電体層の厚さを例えば2μm以下に薄層化した場合でも、高い誘電率でかつ良好な温度特性を有する積層セラミックコンデンサを提供すること、またそのような積層セラミックコンデンサを製造する方法を提供することを目的とする。   The present invention has been made to solve such a problem, and even when the thickness of the ceramic dielectric layer is reduced to, for example, 2 μm or less, the multilayer ceramic capacitor has a high dielectric constant and good temperature characteristics. And a method of manufacturing such a multilayer ceramic capacitor.

上述した課題を解決するため、本発明による積層セラミックコンデンサは、セラミック誘電体層と導体層とを交互に積層してなる積層セラミックコンデンサであって、前記セラミック誘電体層がコアシェル構造を有するコアシェル粒子と、均一に固溶が進行した均一固溶粒子とを含む焼結体粒子からなり、前記導体層が交差する位置で切り出した前記誘電体層の層断面をTEM(透過型電子顕微鏡)により観察したときに、前記TEMの視野における焼結体粒子全体に対して占める前記コアシェル粒子の面積比率が5〜15%であり、前記コアシェル粒子と前記均一固溶粒子とをあわせた焼結体粒子全体の平均粒径が0.3〜0.5μmである。   In order to solve the above-described problems, a multilayer ceramic capacitor according to the present invention is a multilayer ceramic capacitor in which ceramic dielectric layers and conductor layers are alternately stacked, and the ceramic dielectric layer has core-shell particles having a core-shell structure. And a cross section of the dielectric layer cut out at a position where the conductor layer intersects with a TEM (transmission electron microscope). The area ratio of the core-shell particles occupying the entire sintered particles in the field of view of the TEM is 5 to 15%, and the entire sintered particles combining the core-shell particles and the uniform solid solution particles The average particle size is 0.3 to 0.5 μm.

前記積層セラミックコンデンサは、焼成後の前記導体層間における前記セラミック誘電体層の厚さが2.0μm以下であることが好ましく、前記セラミック誘電体層の厚さが1.2μm以下であることが更に好ましい。   In the multilayer ceramic capacitor, the thickness of the ceramic dielectric layer between the conductor layers after firing is preferably 2.0 μm or less, and the thickness of the ceramic dielectric layer is further 1.2 μm or less. preferable.

また、本発明による積層セラミックコンデンサの製造方法は、セラミック誘電体層と導体層とを交互に積層してなる積層セラミックコンデンサの製造方法であって、相対的に小径の粒子からなる第一粒径の主成分粉末と、相対的に大径の粒子からなる第二粒径の主成分粉末とを所定の配合比で混合するステップと、前記第一粒径及び第二粒径の主成分粉末に対し、固溶副成分粉末を添加して誘電体原料粉末を調製するステップと、前記誘電体原料粉末を塗工してグリーンシートを作製するステップと、前記グリーンシート上に導電ペーストを配置して、左右2極の電極に対応する電極パターンをそれぞれ形成するステップと、前記グリーンシートを前記左右2極の電極パターンが交互となるように積層するステップと、前記セラミック誘電体層を構成する焼結体粒子全体に対して占めるコアシェル粒子の面積比率が5〜15%であり、かつ、前記コアシェル粒子と均一固溶粒子とをあわせた焼結体粒子全体の平均粒径が0.3〜0.5μmとなるように、前記グリーンシートの積層体を焼成するステップとを含む。   In addition, the method for manufacturing a multilayer ceramic capacitor according to the present invention is a method for manufacturing a multilayer ceramic capacitor in which ceramic dielectric layers and conductor layers are alternately stacked, and the first particle size is composed of relatively small-diameter particles. The main component powder of the second particle size and the second particle size main component powder composed of relatively large particles at a predetermined blending ratio; and the first particle size and the second particle size of the main component powder On the other hand, adding a solid solution subcomponent powder to prepare a dielectric raw material powder, applying the dielectric raw material powder to produce a green sheet, and disposing a conductive paste on the green sheet Forming electrode patterns corresponding to left and right bipolar electrodes, laminating the green sheet so that the left and right bipolar electrode patterns alternate, and the ceramic dielectric The area ratio of the core-shell particles occupying the entire sintered body particles constituting 5 to 15%, and the average particle diameter of the entire sintered body particles including the core-shell particles and the uniform solid solution particles is 0 Firing the green sheet laminate to a thickness of 3 to 0.5 μm.

前記積層セラミックコンデンサの製造方法は、前記第一粒径の主成分粉末の粒径に対する前記第二粒径の主成分粉末の粒径比が1.1〜1.2倍に調整され、前記第一粒径及び第二粒径の主成分粉末の前記所定の配合比(第一粒径の主成分粉末:第二粒径の主成分粉末)が体積比で8:2〜3:7の範囲内であることが好ましい。   In the method for manufacturing the multilayer ceramic capacitor, a particle size ratio of the main particle powder of the second particle size to a particle size of the main component powder of the first particle size is adjusted to 1.1 to 1.2 times, The predetermined blending ratio of the main component powder having one particle size and the second particle size (main particle powder having the first particle size: main component powder having the second particle size) is in the range of 8: 2 to 3: 7 by volume ratio. It is preferable to be within.

本発明によれば、セラミック誘電体層の厚さを2.0μm以下に薄層化する場合であっても、誘電体層の比誘電率を5000以上とし、同時に例えばEIA規格X5Rに適合する安定した静電容量温度特性を有する積層セラミックコンデンサを提供することがきできる。したがって、小型化した積層セラミックコンデンサにおける大容量化と良好な温度特性とを両立させることができる。   According to the present invention, even when the thickness of the ceramic dielectric layer is reduced to 2.0 μm or less, the relative permittivity of the dielectric layer is set to 5000 or more, and at the same time, for example, a stable compliance with EIA standard X5R It is possible to provide a multilayer ceramic capacitor having a capacitance temperature characteristic. Therefore, it is possible to achieve both high capacity and good temperature characteristics in a miniaturized multilayer ceramic capacitor.

図1は、積層セラミックコンデンサの概略構造を示す縦断面図である。FIG. 1 is a longitudinal sectional view showing a schematic structure of a multilayer ceramic capacitor. 図2は、顕微鏡で観察される誘電体断面の拡大画像を模式的に示す図である。FIG. 2 is a diagram schematically showing an enlarged image of a dielectric cross section observed with a microscope.

以下、本発明の実施形態として、セラミック誘電体層と導体層とを交互に積層してなる積層セラミックコンデンサを説明する。図1は、本発明の一つの実施形態による積層セラミックコンデンサ1の概略構造を示す縦断面図である。積層セラミックコンデンサ1は、規格で定められたチップ寸法及び形状(例えば1.0mm×0.5mm×0.5mmの直方体)を有する焼結体10と、焼結体10の両側に形成される左右一対の外部電極20、20とを有して構成される。焼結体10は、セラミック誘電体層としての誘電体層12と、コンデンサの内部電極を構成する導体層としての内部電極層13とが交互に多数積層されてなり、それらの最外層としてカバー層15が形成される。誘電体層12及びカバー層15は例えばBaTiOを主成分とするセラミックスからなり、内部電極層13は例えばNi及び/又はAgを含む導電体金属を主成分として焼成される。 Hereinafter, as an embodiment of the present invention, a multilayer ceramic capacitor in which ceramic dielectric layers and conductor layers are alternately stacked will be described. FIG. 1 is a longitudinal sectional view showing a schematic structure of a multilayer ceramic capacitor 1 according to one embodiment of the present invention. The multilayer ceramic capacitor 1 includes a sintered body 10 having a chip size and a shape (for example, a rectangular parallelepiped of 1.0 mm × 0.5 mm × 0.5 mm) defined by a standard, and left and right formed on both sides of the sintered body 10. A pair of external electrodes 20 and 20 is provided. The sintered body 10 is formed by laminating a large number of dielectric layers 12 as ceramic dielectric layers and internal electrode layers 13 as conductor layers constituting internal electrodes of a capacitor, and a cover layer as an outermost layer thereof. 15 is formed. The dielectric layer 12 and the cover layer 15 are made of, for example, ceramics mainly composed of BaTiO 3 , and the internal electrode layer 13 is fired mainly composed of a conductive metal containing Ni and / or Ag, for example.

誘電体層12は、コアシェル構造を有するコアシェル粒子と、均一に固溶が進行した均一固溶粒子とが混在して焼成される。ここで、「コアシェル構造」とは、焼結体10を焼成する過程において、粒子結晶の中心部分(コア部)に主成分を残し、その外殻部分(シェル部)に副成分が固溶した状態で焼成された結晶粒子構造をいう。「均一固溶粒子」とは、コア内部への副成分の固溶拡散が進行して結晶粒子構造が均一化したものをいう。   The dielectric layer 12 is fired with a mixture of core-shell particles having a core-shell structure and uniform solid solution particles in which solid solution has progressed uniformly. Here, the “core-shell structure” means that in the process of firing the sintered body 10, the main component remains in the central part (core part) of the particle crystal, and the subcomponents are dissolved in the outer shell part (shell part). The crystal grain structure fired in a state. “Uniform solid solution particles” refers to particles in which the structure of the crystal particles is made uniform by the progress of solid solution diffusion of subcomponents into the core.

本発明の実施形態による積層セラミックコンデンサ1においては、誘電体層12を断面観察したときに、焼結体粒子全体の面積に対してコアシェル粒子が占める面積比率が5〜15%である。そして、誘電体層12の平均グレイン径、すなわちコアシェル粒子と均一固溶粒子とをあわせた焼結体粒子全体の平均粒径が0.3〜0.5μmであることが好ましい。また、焼成後の内部電極層13間の誘電体層12の厚さが2.0μm以下であることが好ましい。更には誘電体層12の厚さが1.2μm以下であることがより好ましい。   In the multilayer ceramic capacitor 1 according to the embodiment of the present invention, when the dielectric layer 12 is observed in cross section, the area ratio of the core-shell particles to the total area of the sintered particles is 5 to 15%. And it is preferable that the average grain diameter of the dielectric material layer 12, ie, the average particle diameter of the whole sintered compact particle | grains which match | combined the core-shell particle and the uniform solid solution particle | grain, is 0.3-0.5 micrometer. The thickness of the dielectric layer 12 between the internal electrode layers 13 after firing is preferably 2.0 μm or less. Furthermore, the thickness of the dielectric layer 12 is more preferably 1.2 μm or less.

積層セラミックコンデンサ1は、誘電体層12及び内部電極層13の積層数が百〜数百の高密度多層構造を有している。焼結体10の最外層部分に形成されるカバー層15は、誘電体層12及び内部電極層13を外部からの湿気やコンタミ等の汚染から保護し、それらの経時的な劣化を防ぐために設けられる。   The multilayer ceramic capacitor 1 has a high-density multilayer structure in which the number of stacked dielectric layers 12 and internal electrode layers 13 is one hundred to several hundred. The cover layer 15 formed on the outermost layer portion of the sintered body 10 is provided to protect the dielectric layer 12 and the internal electrode layer 13 from contamination such as moisture and contamination from the outside, and to prevent their deterioration over time. It is done.

積層セラミックコンデンサ1は、例えば次のような工程を経て製造される。まず、例えばTiO及びBaOなどのセラミックス原料を秤量、混合して仮り焼きし、主成分原料を準備する。そして、準備した主成分原料を相対的に小径の粒子(これを「小径粒子」という。)からなる第一粒径の主成分粉末と、相対的に大径の粒子(これを「大径粒子」という。)からなる第二粒径の主成分粉末とに粉砕する。例えば、粒径が0.30μmと0.33μmの大小異なる粒径サイズの主成分粉末を調製することができる。主成分粉末の粒径サイズを、粒径分布に基づく平均粒径(例えばメジアン径d50)で管理することができる。小径粒子(第一粒径の主成分粉末)の粒径に対し、大径粒子(第二粒径の主成分粉末)の粒径比が、1.1〜1.2倍に調整されることが好ましい。 The multilayer ceramic capacitor 1 is manufactured through the following processes, for example. First, for example, ceramic raw materials such as TiO 2 and BaO 3 are weighed, mixed and calcined to prepare main component raw materials. Then, the prepared main component material is composed of a first main component powder having relatively small diameter (this is referred to as “small particle”) and a relatively large particle (hereinafter referred to as “large particle”). To a main component powder having a second particle size. For example, main component powders having particle sizes of 0.30 μm and 0.33 μm and different particle sizes can be prepared. The particle size of the main component powder can be managed by an average particle size (for example, median diameter d50) based on the particle size distribution. The particle size ratio of the large particle (second particle size main component powder) is adjusted to 1.1 to 1.2 times the particle size of the small particle (first particle size main component powder). Is preferred.

また、大径粒子(第二粒径の主成分粉末)の正方晶性(c/a比)は、小径粒子(第一粒径の主成分粉末)のそれよりも高い値であることが好ましい。一例を挙げれば、c/a比が1.0100の主成分原料を粉砕して大径粒子を調製し、c/a比が1.0094の主成分原料を粉砕して小径粒子を得ることができる。焼成によりc/a比が低い小径粒子は大部分が均一化する一方で、c/a比が高い大径粒子の一部には固溶進行途中のコアシェル構造が残存する。なお、結晶の正方晶性(c/a比)は、X線回折法を用いた測定が可能である。   Further, the tetragonality (c / a ratio) of the large-diameter particles (main particle powder of the second particle diameter) is preferably higher than that of the small-diameter particles (main particle powder of the first particle diameter). . For example, a main component material having a c / a ratio of 1.0100 is pulverized to prepare large-sized particles, and a main component material having a c / a ratio of 1.0094 is pulverized to obtain small-sized particles. it can. While most of the small-diameter particles having a low c / a ratio are made uniform by firing, a core-shell structure in the middle of the solid solution remains in a part of the large-diameter particles having a high c / a ratio. Note that the tetragonality (c / a ratio) of the crystal can be measured using an X-ray diffraction method.

したがって、誘電体の主成分粉末における小径粒子と大径粒子の配合比を適宜調整することで、コアシェル粒子と均一固溶粒子とが混在する割合又はコアシェル粒子の残存比率(面積比率)をある程度所望の範囲内に制御することが可能となる。   Therefore, by appropriately adjusting the blending ratio of the small-diameter particles and large-diameter particles in the main component powder of the dielectric, the ratio of the core-shell particles and homogeneous solid solution particles or the remaining ratio (area ratio) of the core-shell particles is desired to some extent. It becomes possible to control within the range.

次に、小径粒子(第一粒径の主成分粉末)と、大径粒子(第二粒径の主成分粉末)とを所定の配合比で混合する。小径粒子:大径粒子の配合比は、体積比で8:2〜3:7の範囲内であることが好ましい。   Next, the small-diameter particles (main component powder having the first particle size) and the large-diameter particles (main component powder having the second particle size) are mixed at a predetermined blending ratio. The mixing ratio of small diameter particles: large diameter particles is preferably in the range of 8: 2 to 3: 7 by volume ratio.

小径粒子及び大径粒子の主成分粉末に対し、シェル部を構成するための副成分として所定分量の固溶副成分粉末を添加して湿式混合し誘電体原料粉末を調製する。添加される副成分粉末は、例えば金属酸化物及び/又は金属有機錯体から組成され、実施例で示すようにHo、Dyなどの希土類及び/又はMg、Mnなどの元素を使用することができる。   A predetermined amount of solid solution subcomponent powder is added to the main component powder of the small particle and large particle as a subcomponent for constituting the shell portion, and wet mixing is performed to prepare a dielectric material powder. The subcomponent powder to be added is composed of, for example, a metal oxide and / or a metal organic complex, and as shown in the examples, rare earth such as Ho and Dy and / or elements such as Mg and Mn can be used.

湿式混合した誘電体原料粉末を乾燥させた後、有機バインダを混合させて、例えばドクターブレード法により厚さ2μm以下の帯状のグリーンシートに塗工して乾燥させる。そして、そのグリーンシート上に導電ペーストを配置して、左右2極の内部電極に対応する内部電極層12の電極パターンをそれぞれ形成する。電極パターンの形成は、例えばグリーンシート上に導電ペーストをスクリーン印刷することにより行うことができる。   After the wet-mixed dielectric raw material powder is dried, an organic binder is mixed, applied to a strip-shaped green sheet having a thickness of 2 μm or less, for example, by a doctor blade method, and dried. Then, conductive paste is disposed on the green sheet to form electrode patterns of the internal electrode layer 12 corresponding to the left and right internal electrodes. The electrode pattern can be formed, for example, by screen printing a conductive paste on a green sheet.

グリーンシートを左右2極の電極パターンが交互となるように積層し、積層したグリーンシートの上下にカバー層15となるカバーシートを圧着させる。そして、積層したグリーンシートを所定チップ寸法(例えば1.0mm×0.5mm)の積層体にカットし、積層体の両端面を内部電極層13の電極パターンが露出した状態にする。続いて、外部電極20、20となる導電ペーストを各積層体の両端面に塗布して乾燥させる。なお、スパッタリング法によって、積層体の両端面に外部電極20、20を厚膜蒸着してもよい。これらの工程を経て、積層セラミックコンデンサ1の成型体が得られる。   The green sheets are laminated so that the left and right electrode patterns are alternately arranged, and the cover sheets to be the cover layers 15 are pressure-bonded to the upper and lower sides of the laminated green sheets. Then, the laminated green sheet is cut into a laminated body having a predetermined chip size (for example, 1.0 mm × 0.5 mm), and the electrode patterns of the internal electrode layer 13 are exposed on both end faces of the laminated body. Subsequently, a conductive paste to be the external electrodes 20 and 20 is applied to both end surfaces of each laminate and dried. In addition, you may vapor-deposit the external electrodes 20 and 20 on the both end surfaces of a laminated body by sputtering method. Through these steps, a molded body of the multilayer ceramic capacitor 1 is obtained.

このようにして得られたコンデンサの成型体を、約350℃のN雰囲気中で脱バインダした後に、N、H、HOの還元性混合ガス(酸素分圧が約1.0×10−11MPa)雰囲気中において例えば1150℃から1250℃に昇温させ、例えば10分から2時間その温度を保持して焼成を行う。そして降温して焼結体を得た後、N雰囲気において例えば800℃から1050℃に昇温して、例えば30分から2時間その温度を保持して再酸化処理を行う。これにより、誘電体層12が所定の平均粒径を有し、かつ、コアシェル粒子と均一固溶粒子とが所定の割合で混在する積層セラミックコンデンサ1が得られる。 The capacitor molded body thus obtained was debindered in an N 2 atmosphere at about 350 ° C., and then a reducing mixed gas of N 2 , H 2 and H 2 O (with an oxygen partial pressure of about 1.0). × 10 -11 MPa) was heated to 1250 ° C. from the example 1150 ° C. in an atmosphere, and baked retains its temperature for example 10 minutes to 2 hours. After the temperature is lowered to obtain a sintered body, the temperature is raised from, for example, 800 ° C. to 1050 ° C. in an N 2 atmosphere, and the re-oxidation treatment is performed while maintaining the temperature for, for example, 30 minutes to 2 hours. Thereby, the multilayer ceramic capacitor 1 in which the dielectric layer 12 has a predetermined average particle diameter and the core-shell particles and the uniform solid solution particles are mixed at a predetermined ratio is obtained.

焼結体粒子全体の上述した好ましい平均粒径(0.3〜0.5μm)は、焼成工程における昇温速度等の焼成条件によってある程度制御が可能である。また、焼結体粒子全体に対して占めるコアシェル粒子の上述した好ましい面積比率(5〜15%)は、焼成工程における保持時間等の条件の他にも主成分粉末の小径粒子と大径粒子の配合比、添加される副成分の種類、それらの組成比などを適宜調整して制御することができる。   The above-mentioned preferable average particle diameter (0.3 to 0.5 μm) of the entire sintered body particles can be controlled to some extent by the firing conditions such as the temperature rising rate in the firing step. Moreover, the above-mentioned preferable area ratio (5 to 15%) of the core-shell particles occupying with respect to the entire sintered particles is not limited to the conditions such as the holding time in the firing step, but the small-sized particles and large-sized particles of the main component powder. The blending ratio, the types of added subcomponents, the composition ratio thereof, and the like can be appropriately adjusted and controlled.

積層セラミックコンデンサ1の製造方法に関する他の実施形態としては、外部電極と誘電体とを別の工程で焼成させてもよい。例えば誘電体を積層した積層体を焼成した後に、その両端部に導電ペーストを焼き付けて外部電極20、20を形成してもよい。   As another embodiment relating to the method of manufacturing the multilayer ceramic capacitor 1, the external electrode and the dielectric may be fired in separate steps. For example, the external electrodes 20 and 20 may be formed by firing a laminated body in which dielectrics are laminated and then baking a conductive paste on both ends thereof.

次に、本発明に係る積層セラミックコンデンサ(MLCC)の実施例を説明する。表1に示す各条件(Group I〜VI:条件No.1〜28)で、少なくとも10個以上のMLCCを作製してそれぞれ評価を行った。作製したMLCCのチップ寸法は、何れも1.0mm×0.5mm×0.5mm(1005サイズ)である。   Next, examples of the multilayer ceramic capacitor (MLCC) according to the present invention will be described. Under each condition shown in Table 1 (Groups I to VI: Condition Nos. 1 to 28), at least 10 MLCCs were produced and evaluated. The chip dimensions of the produced MLCC are all 1.0 mm × 0.5 mm × 0.5 mm (1005 size).

<MLCCの作成>
(1)誘電体原料粉末の調製
MLCCの誘電体層を焼成する主成分の出発原料として、BaTiO粉末を使用した(ここで、チタン酸バリウムを「BT」と略称する。)。BTを粉砕し、それぞれのメジアン径d50が0.33μm、0.30μm及び0.25μmである3種類の各粒径サイズのBT粉末を準備した。表1に示されるように、BT粉末について大小異なる粒径サイズの組(Group I〜VI)を定め、各条件に従ってそれぞれのグループ毎に小径及び大径粒子の配合比を変えて主成分粉末を混合した。
<Create MLCC>
(1) Preparation of Dielectric Material Powder BaTiO 3 powder was used as a starting material of the main component for firing the dielectric layer of MLCC (here, barium titanate is abbreviated as “BT”). The BT was pulverized to prepare three types of BT powders having respective particle sizes of median diameter d50 of 0.33 μm, 0.30 μm, and 0.25 μm. As shown in Table 1, a set of particle sizes having different sizes (Groups I to VI) is determined for the BT powder, and the main component powder is changed by changing the blending ratio of the small and large particles for each group according to each condition. Mixed.

BT粉末(主成分粉末)に添加する固溶副成分として、Ho、Dy、Gd、MgCO、MnCO、V、及びLiとBとを含む酸化物ガラス粉末を使用した。主成分であるBaTiOが100molに対して、Hoが0.2mol、Dyが0.2mol、Gdが0.05mol、MgCOが0.5mol、MnCOが0.2mol、Vが0.1mol、LiとBとを含む酸化物ガラス粉末が1.0molの組成比となるように、各副成分の添加分量を調整した。 Oxidation containing Ho 2 O 3 , Dy 2 O 3 , Gd 2 O 3 , MgCO 3 , MnCO 3 , V 2 O 5 , and Li and B as solid solution subcomponents added to the BT powder (main component powder) A physical glass powder was used. The main component BaTiO 3 is 100 mol, Ho 2 O 3 is 0.2 mol, Dy 2 O 3 is 0.2 mol, Gd 2 O 3 is 0.05 mol, MgCO 3 is 0.5 mol, and MnCO 3 is 0. .2 mol, V 2 O 5 was 0.1 mol, and the added amount of each subcomponent was adjusted so that the oxide glass powder containing Li and B had a composition ratio of 1.0 mol.

表1に示されるように、Group I及びIVのMLCCでは、小径粒子に対する大径粒子の粒径比を1.1倍(=0.33/0.30)に調整した。Group II及びVのMLCCでは、小径粒子に対する大径粒子の粒径比を1.2倍(=0.30/0.25)に調整した。Group III及びVIのMLCCでは、小径粒子に対する大径粒子の粒径比を1.32倍(=0.33/0.25)に調整した。   As shown in Table 1, in Group I and IV MLCCs, the particle size ratio of large particles to small particles was adjusted to 1.1 times (= 0.33 / 0.30). In Group II and V MLCCs, the particle size ratio of large particles to small particles was adjusted to 1.2 times (= 0.30 / 0.25). In Group III and VI MLCCs, the particle size ratio of large particles to small particles was adjusted to 1.32 times (= 0.33 / 0.25).

(2)MLCC成型体の作製
大小異なる粒径のBT主成分粉末に固溶副成分粉末を添加して得た誘電体原料粉末をポリビニルアセタール樹脂及び有機溶剤を含む有機バインダで湿式混合し、ドクターブレード法により1.5μm及び1.0μmの2種類の厚さのグリーンシートを作成した。そして、これらグリーンシート上にNi導電ペーストをスクリーン印刷することで、左右2極の内部電極に対応する電極パターンを形成した。
(2) Production of MLCC molded body A dielectric raw material powder obtained by adding a solid solution subcomponent powder to a BT main component powder having a particle size different in size is wet-mixed with an organic binder containing a polyvinyl acetal resin and an organic solvent. Green sheets having two thicknesses of 1.5 μm and 1.0 μm were prepared by the blade method. Then, Ni conductive paste was screen-printed on these green sheets to form electrode patterns corresponding to the left and right internal electrodes.

左右の電極パターンが交互の配置となるように合計101枚のグリーンシートを積層した。すなわち、MLCCの層数nは100である。積層したグリーンシートをプレス後、所定のチップサイズ(1.0mm×0.5mm)にカットした。そして、電極パターンが露出した積層体の両端面にNi導電ペーストを塗布して、左右の外部電極20、20を形成した。   A total of 101 green sheets were laminated so that the left and right electrode patterns were arranged alternately. That is, the number n of MLCC layers is 100. The laminated green sheets were pressed and then cut into a predetermined chip size (1.0 mm × 0.5 mm). Then, Ni conductive paste was applied to both end faces of the laminate from which the electrode pattern was exposed, and left and right external electrodes 20 and 20 were formed.

(3)MLCC成型体の焼成
こうして得たMLCCの成型体をN雰囲気中で脱バインダし、その後、N、H、HOの還元性混合ガス(酸素分圧が約1.0×10−11MPa)雰囲気中において1250℃に昇温させた。表1には焼成工程における昇温速度の各条件が示される。1250℃での保持時間を2時間に設定して、MLCCの焼結体10を得た。焼結体10をアニール後、外部電極20、20の表面にはNi−Snめっき処理を施した。
(3) Firing of MLCC molded body The MLCC molded body thus obtained was debindered in an N 2 atmosphere, and then a reducing mixed gas of N 2 , H 2 , and H 2 O (with an oxygen partial pressure of about 1.0). The temperature was raised to 1250 ° C. in an atmosphere of × 10 −11 MPa. Table 1 shows the conditions of the temperature increase rate in the firing step. The holding time at 1250 ° C. was set to 2 hours to obtain MLCC sintered body 10. After the sintered body 10 was annealed, the surfaces of the external electrodes 20 and 20 were subjected to Ni—Sn plating treatment.

<評価方法>
(1)コアシェル粒子の面積比率
コアシェル粒子と均一固溶粒子とが混在するセラミック誘電体層において、焼結体粒子全体に対しコアシェル粒子が残存している割合を観察断面の面積比率により測定した。
<Evaluation method>
(1) Area ratio of core-shell particles In the ceramic dielectric layer in which core-shell particles and homogeneous solid solution particles coexist, the ratio of the core-shell particles remaining to the entire sintered particles was measured by the area ratio of the observed cross section.

具体的には、MLCCから内部電極が交差する層断面を切り出し、Arイオンミリング法にて150nmの厚みまでそれを薄片化させて誘電体層試料を得て、TEM(透過型電子顕微鏡)により100個以上の焼結体粒子が観察できる15μm×15μmの視野を複数選択する。そして少なくとも20箇所以上の視野から、コアシェル粒子の面積(断面積)の総和が誘電体層の焼結体粒子全体の総断面積に対して占める割合を画像解析により算出する。このとき、TEMの視野外に一部が見切れている粒子であっても面積の測定において考慮した。   Specifically, a cross section of the layer where the internal electrodes intersect is cut out from the MLCC, and the dielectric layer sample is obtained by exfoliating it to a thickness of 150 nm by an Ar ion milling method, and 100 using a TEM (transmission electron microscope). A plurality of fields of 15 μm × 15 μm in which one or more sintered particles can be observed are selected. And the ratio which the sum total of the area (cross-sectional area) of a core-shell particle occupies with respect to the total cross-sectional area of the whole sintered body particle | grains of a dielectric material layer is computed by image analysis from a visual field of at least 20 places. At this time, even in the case of particles that are partially out of view of the TEM, the area was taken into consideration.

図2は、誘電体断面の拡大画像を模式的に示す図である。画像解析おいては、コアシェル構造が観察される粒子を占めるピクセルを選択し、選択したピクセルの個数をカウントすることでコアシェル粒子が占める面積を算出した。他方、コアシェル構造が観察されない均一固溶粒子を占めるピクセルも同様に選択し、そのピクセル数をカウントすることで均一固溶粒子が占める面積を算出した。コアシェル粒子及び均一固溶粒子の面積の和を焼結体粒子全体の面積とし、これに対するコアシェル粒子の面積比率を百分率で評価した。   FIG. 2 is a diagram schematically showing an enlarged image of a dielectric cross section. In the image analysis, a pixel occupying a particle in which the core-shell structure is observed was selected, and the area occupied by the core-shell particle was calculated by counting the number of the selected pixel. On the other hand, pixels occupying uniform solid solution particles in which the core-shell structure is not observed were selected in the same manner, and the area occupied by the uniform solid solution particles was calculated by counting the number of pixels. The sum of the areas of the core-shell particles and the uniform solid-solution particles was defined as the total area of the sintered body particles, and the area ratio of the core-shell particles to this was evaluated as a percentage.

TEMの画像解析において、コアシェル粒子及び均一固溶粒子の何れでもない箇所に該当するピクセルは、誘電体中のポア(空孔)又は空隙、若しくは不純物が析出した二次相と考えられ、これらのピクセルについては面積の算出から除外した。   In the TEM image analysis, the pixel corresponding to the portion that is neither the core-shell particle nor the homogeneous solid solution particle is considered to be a pore (hole) or void in the dielectric, or a secondary phase in which impurities are precipitated. Pixels were excluded from area calculations.

(2)焼結体粒子の平均粒径
MLCCの側面を研磨し内部電極が交差する層断面を露出させた後、TEMによりその断面の誘電体層部分を撮影した画像に基づいて焼結体粒子の粒径を測定した。撮影したTEM画像から100個以上の焼結体粒子が観察できる15μm×15μmの任意の視野を少なくとも20箇所以上選択した。図2に示すように、1つの焼結体粒子で積層方向及びそれに直交する方向における最大の粒界幅D1、D2を測定し、それらを加算して2で割った値をその粒子の粒子径D(=(D1+D2)/2)とした。各焼結体粒子の粒子径を20箇所以上の視野を撮影したTEM画像から測定し、それらの算術平均を焼結体粒子の平均粒径として評価した。
(2) Average particle diameter of sintered particles After the side surface of MLCC is polished to expose the layer cross section where the internal electrodes intersect, the sintered particle is based on an image obtained by photographing the dielectric layer portion of the cross section with TEM. The particle size of was measured. At least 20 or more arbitrary visual fields of 15 μm × 15 μm capable of observing 100 or more sintered particles were selected from the photographed TEM images. As shown in FIG. 2, the maximum grain boundary widths D1 and D2 in the stacking direction and the direction perpendicular to the laminating direction are measured with one sintered body particle, and the value obtained by adding them and dividing by 2 is the particle diameter of the particle. D (= (D1 + D2) / 2). The particle diameter of each sintered body particle was measured from a TEM image obtained by photographing 20 or more fields of view, and the arithmetic average thereof was evaluated as the average particle diameter of the sintered body particles.

(3)比誘電率
MLCCの静電容量Cmの測定値から、下記の式(1)を用いて比誘電率εを求めた。本発明の実施例では、比誘電率の基準を5000と設定しそれ以上のものを適合と評価した。
(3) Relative permittivity From the measured value of the capacitance Cm of MLCC, the relative permittivity ε was determined using the following formula (1). In the examples of the present invention, the relative dielectric constant standard was set to 5000, and more than that was evaluated as conforming.

Cm=ε×ε×n×S/t ・・・式(1)
ここで、εは真空の誘電率であり、n、S、tは、それぞれ、誘電体層の層数、内部電極層の面積、誘電体層の層厚である。
Cm = ε × ε 0 × n × S / t (1)
Here, ε 0 is the dielectric constant of vacuum, and n, S, and t are the number of dielectric layers, the area of the internal electrode layers, and the thickness of the dielectric layers, respectively.

インピーダンスアナライザを用いて静電容量Cmを測定し、電圧印加条件を、1kHz、1.0Vrmsとした。実施例で用いたMLCCの誘電体層の層数nは100である。内部電極層の面積はMLCCにおける電極パターンの設計値から推定される有効電極面積とした。誘電体層の層厚は作製したMLCCの層断面のTEM画像から求めた。   The capacitance Cm was measured using an impedance analyzer, and the voltage application conditions were 1 kHz and 1.0 Vrms. The number n of dielectric layers of the MLCC used in the examples is 100. The area of the internal electrode layer was the effective electrode area estimated from the design value of the electrode pattern in MLCC. The layer thickness of the dielectric layer was determined from a TEM image of the layer cross section of the produced MLCC.

(4)温度特性
MLCCの静電容量温度変化特性(TCC)がEIA規格X5Rの要求(静電容量の変化率が−55〜+85℃の温度範囲にて±15%以内)を満足するか否かにより温度特性を評価した。表1には、各条件で作製したMLCCについて、25℃の容量C25℃を基準に温度範囲−55〜85℃における最大の容量変化ΔC(=Cmin−C25℃)から算出したTCC(=ΔC/C25℃)が百分率で示される。
(4) Temperature characteristics Whether the MLCC capacitance temperature change characteristic (TCC) satisfies the requirements of EIA standard X5R (capacitance change rate is within ± 15% in the temperature range of −55 to + 85 ° C.) Thus, the temperature characteristics were evaluated. Table 1 shows the TCC (= C min −C 25 ° C. ) calculated from the maximum capacity change ΔC (= C min −C 25 ° C. ) in the temperature range of −55 to 85 ° C. with respect to the capacity C 25 ° C. of 25 ° C. = ΔC / C 25 ° C. ) as a percentage.

<評価結果>
表1を参照して、各条件で作製したMLCCについての特性結果を説明する。
<Evaluation results>
With reference to Table 1, the characteristic result about MLCC produced on each condition is demonstrated.

Figure 2015053530
Figure 2015053530

Group I及びIV(条件No.1〜6、No.15〜20)のMLCCでは、粒径が0.30μmの小径粒子と、粒径が0.33μmの大径粒子のBT粉末が用いられ、各条件に示すそれぞれの配合比でセラミック誘電体層を焼成することにより、コアシェル粒子の残存比率を各条件で変化させた。表1に示されるように、Group IとIVとでは焼成後の誘電体層の層厚が異なり、すなわちGroup Iでは誘電体層の層厚が1.2μm、Group IVでは0.8μmである。   In MLCCs of Group I and IV (Conditions Nos. 1-6, Nos. 15-20), BT powder having a small particle size of 0.30 μm and a large particle size of 0.33 μm is used, The residual ratio of the core-shell particles was changed under each condition by firing the ceramic dielectric layer at each compounding ratio indicated in each condition. As shown in Table 1, the layer thickness of the dielectric layer after firing differs between Group I and IV, that is, the layer thickness of the dielectric layer is 1.2 μm in Group I and 0.8 μm in Group IV.

これらGroup I及びIVのMLCCにおいて、小径粒子に対する大径粒子の配合比が小さくコアシェル粒子が比較的少ないMLCC(面積比率が2%の条件No.1、15)では、温度特性を示すTCCが−15%よりも悪化した。逆に、コアシェル粒子が多く残存するMLCC(面積比率が17%の条件No.6、20)では、比誘電率が規定の5000よりも低かった。   In these MLCCs of Group I and IV, in the MLCC (conditions No. 1 and 15 where the area ratio is 2%) in which the blending ratio of the large-sized particles to the small-sized particles is small and the core-shell particles are relatively small, It was worse than 15%. On the contrary, in MLCC (conditions No. 6 and 20 where the area ratio is 17%) in which many core-shell particles remain, the relative dielectric constant was lower than the prescribed 5000.

一方、条件No.2〜5、16〜19のMLCCでは、5000以上の高い比誘電率とともにTCCが±15%以内の温度特性を達成した。良好な特性結果が得られたこれらの誘電体におけるコアシェル粒子の面積比率は5〜15%であった。   On the other hand, the MLCCs under conditions No. 2 to 5 and 16 to 19 achieved temperature characteristics with a high relative dielectric constant of 5000 or more and TCC within ± 15%. The area ratio of the core-shell particles in these dielectrics with good property results was 5-15%.

Group II及びV(条件No.7〜10、No.21〜24)のMLCCでは、粒径が0.25μmの小径粒子と、粒径が0.30μmの大径粒子のBT原料粉末が用いられ、これら小径粒子及び大径粒子の配合比を7:3とした。小径粒子及び大径粒子の配合比を一定にしたことで、これらの条件では焼成後のコアシェル粒子の面積比率が何れも5%となった。   In MLCCs of Group II and V (Condition Nos. 7-10, Nos. 21-24), BT raw material powders having small diameter particles of 0.25 μm and large diameter particles of 0.30 μm are used. The mixing ratio of these small diameter particles and large diameter particles was 7: 3. By making the blend ratio of the small particles and the large particles constant, the area ratio of the core-shell particles after firing was 5% under these conditions.

Group II及びVのMLCCを用いて、焼成の昇温速度を1800〜600℃/hまで段階的に変化させて、その焼成条件の違いによる特性への影響を調べた。結果として、昇温速度が1500〜900℃/hでは5000以上の比誘電率が得られ、かつ、±15%以内の安定したTCCが達成されている(条件No.8、9、22、23)。また、これらの条件での焼結体粒子の平均粒径は0.3〜0.5μmであった。   Using Group II and V MLCCs, the temperature increase rate of firing was changed stepwise from 1800 to 600 ° C./h, and the influence on the characteristics due to the difference in firing conditions was investigated. As a result, a relative dielectric constant of 5000 or more was obtained at a temperature rising rate of 1500 to 900 ° C./h, and a stable TCC within ± 15% was achieved (Condition Nos. 8, 9, 22, 23). ). Moreover, the average particle diameter of the sintered compact particle on these conditions was 0.3-0.5 micrometer.

定性的には昇温速度が遅いほど、すなわち焼成時間が長いほど粒成長が促進されるといえる。また、Group II及びVの結果から、昇温速度が遅いほど、すなわち焼結体粒子の平均粒径が大きくなるほど温度特性が良好となる傾向があることが判る。   Qualitatively, it can be said that the slower the rate of temperature rise, that is, the longer the firing time, the more the grain growth is promoted. Further, from the results of Group II and V, it can be seen that the temperature characteristics tend to be better as the rate of temperature increase is slower, that is, as the average particle size of the sintered body particles is larger.

Group III及びVI(条件No.11〜14、No.25〜28)のMLCCでは、粒径が0.25μmの小径粒子と、粒径が0.33μmの大径粒子のBT原料粉末を用いた。また、これら小径粒子及び大径粒子の配合比を一定の3:5としたことで、これらの条件では何れも焼成後のコアシェル粒子の面積比率が比較的高い15%となった。   In Group III and VI (Condition Nos. 11-14, Nos. 25-28), BT raw material powders having a small particle size of 0.25 μm and a large particle size of 0.33 μm were used. . Moreover, by setting the blending ratio of these small diameter particles and large diameter particles to a constant 3: 5, under these conditions, the area ratio of the core-shell particles after firing was relatively high at 15%.

Group III及びVIのMLCCにおいても、焼成の昇温速度を2000〜600℃/hの範囲で段階的に変化させて、その焼成条件の違いによる特性への影響を調べた。これらの条件のうち条件No.12、13、26、27(昇温速度が1800〜900℃/h)のMLCCで、5000以上の比誘電率、かつ±15%以内のTCCが達成された。また、特性が良好と評価された条件における焼結体粒子の平均粒径は0.3〜0.5μmであった。   Also in Group III and VI MLCCs, the temperature increase rate of the calcination was changed stepwise in the range of 2000 to 600 ° C./h, and the influence on the characteristics due to the difference in the calcination conditions was examined. Among these conditions, an MLCC under conditions No. 12, 13, 26, and 27 (temperature increase rate: 1800 to 900 ° C./h) achieved a relative dielectric constant of 5000 or more and a TCC within ± 15%. Moreover, the average particle diameter of the sintered compact particle on the conditions with which the characteristic was evaluated favorable was 0.3-0.5 micrometer.

1 積層セラミックコンデンサ
10 焼結体
12 誘電体層(セラミック誘電体層)
13 内部電極層(導体層)
15 カバー層
20 外部電極
DESCRIPTION OF SYMBOLS 1 Multilayer ceramic capacitor 10 Sintered body 12 Dielectric layer (ceramic dielectric layer)
13 Internal electrode layer (conductor layer)
15 Cover layer 20 External electrode

Claims (3)

セラミック誘電体層と導体層とを交互に積層してなる積層セラミックコンデンサであって、
前記セラミック誘電体層がコアシェル構造を有するコアシェル粒子と、均一に固溶が進行した均一固溶粒子とを含む焼結体粒子からなり、
前記導体層が交差する位置で切り出した前記誘電体層の層断面をTEM(透過型電子顕微鏡)により観察したときに、前記TEMの視野における焼結体粒子全体に対して占める前記コアシェル粒子の面積比率が5〜15%であり、
前記コアシェル粒子と前記均一固溶粒子とをあわせた焼結体粒子全体の平均粒径が0.3〜0.5μmである積層セラミックコンデンサ。
A multilayer ceramic capacitor in which ceramic dielectric layers and conductor layers are alternately laminated,
The ceramic dielectric layer is composed of sintered particles including core-shell particles having a core-shell structure and uniform solid solution particles in which solid solution has progressed uniformly,
When the cross section of the dielectric layer cut out at a position where the conductor layers intersect is observed with a TEM (transmission electron microscope), the area of the core-shell particles occupying the entire sintered particles in the field of view of the TEM The ratio is 5-15%,
A multilayer ceramic capacitor having an average particle size of 0.3 to 0.5 μm as a whole of the sintered particles obtained by combining the core-shell particles and the uniform solid solution particles.
焼成後の前記導体層間における前記セラミック誘電体層の厚さが2.0μm以下である請求項1に記載の積層セラミックコンデンサ。   The multilayer ceramic capacitor according to claim 1, wherein the thickness of the ceramic dielectric layer between the conductor layers after firing is 2.0 μm or less. 前記セラミック誘電体層の厚さが1.2μm以下である請求項2に記載の積層セラミックコンデンサ。   The multilayer ceramic capacitor according to claim 2, wherein a thickness of the ceramic dielectric layer is 1.2 μm or less.
JP2014252934A 2014-12-15 2014-12-15 Multilayer ceramic capacitor and manufacturing method thereof Active JP5857116B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2014252934A JP5857116B2 (en) 2014-12-15 2014-12-15 Multilayer ceramic capacitor and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014252934A JP5857116B2 (en) 2014-12-15 2014-12-15 Multilayer ceramic capacitor and manufacturing method thereof

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2012214391A Division JP5668037B2 (en) 2012-09-27 2012-09-27 Multilayer ceramic capacitor and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JP2015053530A true JP2015053530A (en) 2015-03-19
JP5857116B2 JP5857116B2 (en) 2016-02-10

Family

ID=52702268

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014252934A Active JP5857116B2 (en) 2014-12-15 2014-12-15 Multilayer ceramic capacitor and manufacturing method thereof

Country Status (1)

Country Link
JP (1) JP5857116B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190111331A (en) * 2018-03-22 2019-10-02 주식회사 베이스 Manufacturing method of dielectric composition for multilayer ceramic condenser
KR20240038160A (en) 2021-09-28 2024-03-22 가부시키가이샤 무라타 세이사쿠쇼 Multilayer Ceramic Condenser
KR20240042221A (en) 2021-09-28 2024-04-01 가부시키가이샤 무라타 세이사쿠쇼 Multilayer Ceramic Condenser

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002080276A (en) * 2000-06-30 2002-03-19 Taiyo Yuden Co Ltd Dielectric ceramic composition and ceramic capacitor
JP2005243890A (en) * 2004-02-26 2005-09-08 Matsushita Electric Ind Co Ltd Laminated ceramic capacitor and manufacturing method thereof
JP2006041371A (en) * 2004-07-29 2006-02-09 Kyocera Corp Laminated ceramic capacitor, and manufacturing method thereof
JP2008297179A (en) * 2007-06-01 2008-12-11 Kyocera Corp Dielectric porcelain and multilayer ceramic capacitor
JP2011184279A (en) * 2010-03-11 2011-09-22 Murata Mfg Co Ltd Dielectric ceramic and laminated ceramic capacitor
WO2011162371A1 (en) * 2010-06-25 2011-12-29 京セラ株式会社 Capacitor
JP2012166976A (en) * 2011-02-14 2012-09-06 Tdk Corp Dielectric ceramic composition and ceramic electronic component

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002080276A (en) * 2000-06-30 2002-03-19 Taiyo Yuden Co Ltd Dielectric ceramic composition and ceramic capacitor
JP2005243890A (en) * 2004-02-26 2005-09-08 Matsushita Electric Ind Co Ltd Laminated ceramic capacitor and manufacturing method thereof
JP2006041371A (en) * 2004-07-29 2006-02-09 Kyocera Corp Laminated ceramic capacitor, and manufacturing method thereof
JP2008297179A (en) * 2007-06-01 2008-12-11 Kyocera Corp Dielectric porcelain and multilayer ceramic capacitor
JP2011184279A (en) * 2010-03-11 2011-09-22 Murata Mfg Co Ltd Dielectric ceramic and laminated ceramic capacitor
WO2011162371A1 (en) * 2010-06-25 2011-12-29 京セラ株式会社 Capacitor
JP2012166976A (en) * 2011-02-14 2012-09-06 Tdk Corp Dielectric ceramic composition and ceramic electronic component

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190111331A (en) * 2018-03-22 2019-10-02 주식회사 베이스 Manufacturing method of dielectric composition for multilayer ceramic condenser
KR102032349B1 (en) 2018-03-22 2019-10-16 주식회사 베이스 Manufacturing method of dielectric composition for multilayer ceramic condenser
KR20240038160A (en) 2021-09-28 2024-03-22 가부시키가이샤 무라타 세이사쿠쇼 Multilayer Ceramic Condenser
KR20240042221A (en) 2021-09-28 2024-04-01 가부시키가이샤 무라타 세이사쿠쇼 Multilayer Ceramic Condenser

Also Published As

Publication number Publication date
JP5857116B2 (en) 2016-02-10

Similar Documents

Publication Publication Date Title
JP5668037B2 (en) Multilayer ceramic capacitor and manufacturing method thereof
KR101752196B1 (en) Multilayer ceramic capacitor
KR101730813B1 (en) Multilayer ceramic capacitor
KR101729284B1 (en) Multilayer ceramic capacitor and method for producing multilayer ceramic capacitor
US10008327B2 (en) Multilayer ceramic capacitor
JP5655036B2 (en) Dielectric ceramics, dielectric ceramic manufacturing method and multilayer ceramic capacitor
WO2013145423A1 (en) Laminated ceramic capacitor and method for producing same
JP5655039B2 (en) Dielectric ceramics, multilayer ceramic capacitors and methods for producing them
JP5804064B2 (en) Manufacturing method of multilayer ceramic capacitor
JP2009007209A (en) Dielectric porcelain and laminated ceramic capacitor using it
JP6329236B2 (en) Dielectric material for multilayer ceramic capacitor and multilayer ceramic capacitor
JP2012169620A (en) Multilayer ceramic electronic component and method for manufacturing the same
JP2014162679A (en) Dielectric ceramic composition, and electronic part
WO2014010273A1 (en) Laminate ceramic capacitor and method for producing same
JP5857116B2 (en) Multilayer ceramic capacitor and manufacturing method thereof
WO2014010376A1 (en) Laminate ceramic capacitor and method for producing same
KR20130124068A (en) Multilayered electronic elements and method for preparing the same
JP2006041392A (en) Multilayer ceramic capacitor
JP6940398B2 (en) Capacitor
JP2010212503A (en) Laminated ceramic capacitor
JP5159682B2 (en) Multilayer ceramic capacitor
JP2005302977A (en) Multilayer ceramic capacitor
JP2020150035A (en) Multilayer ceramic capacitor
JP2010199268A (en) Laminated ceramic capacitor
JP2010232258A (en) Laminated ceramic capacitor

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20150217

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20150320

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20151127

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20151208

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20151214

R150 Certificate of patent or registration of utility model

Ref document number: 5857116

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250