JP2015053512A - Multilayer ceramic capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer ceramic capacitor which achieves less displacement of an inner electrode, satisfactory property, an excellent mounting stability, no occurrence of fatal defects such that the inner electrode may be exposed to a side surface of a ceramic element body, and high reliability.SOLUTION: In a multilayer ceramic capacitor 50 having a structure in which an outer electrode 5 is disposed on a ceramic element body 10 including an inner electrode 2 so as to be conducted with the inner electrode 2, a thickness t1 of a width direction end portion 2ax which is an end portion in a direction orthogonal to a direction where the inner electrode is extended to a first end surface and a second end surface is set to be thicker than a thickness t2 of a width direction central region 2ay. A coverage of the inner electrode on the width direction end portion, which is a ratio at which the inner electrode covers a dielectric layer is set to be higher than a coverage of the inner electrode in the central region in the width direction.

Description

  The present invention relates to a multilayer ceramic capacitor, and more particularly, to a multilayer ceramic capacitor having a structure in which an external electrode is provided in a ceramic body having an internal electrode so as to be electrically connected to the internal electrode.

  One typical ceramic electronic component is, for example, a multilayer ceramic capacitor as disclosed in Patent Document 1.

  As shown in FIG. 6, this multilayer ceramic capacitor has a pair of ceramic laminates (ceramic bodies) 110 in which a plurality of internal electrodes 102 (102a, 102b) are laminated via a ceramic layer 101 which is a dielectric layer. The end surface 103 (103a, 103b) has a structure in which a pair of external electrodes 104 (104a, 104b) are disposed so as to be electrically connected to the internal electrode 102 (102a, 102b).

  The external electrodes 104 (104a, 104b) are formed so as to wrap around the main surface and side surfaces from the end surface 103 of the ceramic body 110 formed by baking a conductive paste containing Cu powder as a conductive component, for example. The sintered metal layer 105 (105a, 105b) and the plating layer 106 (106a, 106b) formed so as to cover the surface thereof.

  The plating layer 106 (106a, 106b) is formed on the Ni plating layer 107 (107a, 107b) and the Ni plating layer 107 (107a, 107b) formed on the surface of the sintered metal layer 105 (105a, 105b). And an Sn plating layer 108 (108a, 108b) formed thereon.

By the way, in the case of the multilayer ceramic capacitor having the above-described configuration, it is between the width direction end portion which is a direction orthogonal to the drawing direction of the internal electrode and the side surface of the ceramic body (that is, in the width direction of the internal electrode). On both sides, there is a region where no internal electrode exists, and a step is formed between the region where the internal electrode does not exist and the region where the internal electrode exists.
Due to this step, the internal electrodes are displaced in the laminating process and the crimping process.

By the way, a multilayer ceramic capacitor is often manufactured through a process in which a mother ceramic green sheet is laminated to form a mother multilayer body, and the formed mother multilayer body is crimped and divided into individual elements. And when manufacturing a multilayer ceramic capacitor by such a method, if the displacement of the internal electrodes as described above occurs in the stacking process or the crimping process, the internal electrodes adjacent to each other in the stacking direction contributing to the capacity formation are mutually connected. There are problems that the area of the overlapping effective area is reduced, a rectangular parallelepiped ceramic body cannot be obtained, and the mounting stability of the multilayer ceramic capacitor is impaired.
In some cases, a fatal problem that the internal electrode is exposed on the side surface of the ceramic body may occur.

JP 2006-213946 A

  The present invention solves the above-described problems, and there is little misalignment of the internal electrode, good characteristics, excellent mounting stability, and a fatal situation where the internal electrode is exposed on the side surface of the ceramic body. An object of the present invention is to provide a highly reliable monolithic ceramic capacitor that does not cause a problem.

In order to solve the above problems, the multilayer ceramic capacitor of the present invention is
A ceramic body comprising a dielectric layer made of a dielectric ceramic, and a plurality of internal electrodes stacked via the dielectric layer and positioned at a plurality of interfaces between the dielectric layers, A second main surface opposite to the first main surface, a first end surface orthogonal to the first main surface, a second end surface opposite to the first end surface, and the first The dielectric has a rectangular parallelepiped shape including a first side surface orthogonal to an end surface and a second side surface facing the first side surface, and a direction from the first main surface toward the second main surface is the dielectric. A ceramic body in which the layers and the internal electrodes are stacked and the plurality of internal electrodes are alternately drawn to the first end face and the second end face;
A multilayer ceramic capacitor comprising a pair of external electrodes disposed on the ceramic body so as to be electrically connected to the internal electrodes drawn out to the first end surface and the second end surface;
The internal electrode is formed such that the thickness of the end in the width direction, which is the end in the direction perpendicular to the lead-out direction to the first end surface and the second end surface, is greater than the thickness of the central region in the width direction. It is characterized by

  Moreover, in the multilayer ceramic capacitor of the present invention, a covering ratio that is a ratio of the internal electrode covering the dielectric layer at the end in the width direction of the internal electrode is a central region in the width direction of the internal electrode. It is preferable that it is comprised so that it may become higher than the said coverage.

Cracks may occur in the ceramic body due to the piezoelectric effect of the ceramic material constituting the dielectric layer, and the starting points of such cracks are often concentrated at the ends in the width direction of the internal electrodes.
On the other hand, by making the coverage of the internal electrode at the widthwise end of the internal electrode higher than the coverage at the center region in the width direction of the internal electrode, the ceramic material in the vicinity of the widthwise end of the internal electrode It is possible to alleviate stress concentration due to the piezoelectric phenomenon and suppress the generation of cracks.

  The outermost dielectric layer positioned outside the outermost internal electrode of the plurality of internal electrodes has a thickness of a region facing the widthwise end of the internal electrode, the width direction of the internal electrode It is preferable to be configured to be thinner than the thickness of the region facing the central region.

  With the above structure, in the laminate formed from the dielectric layer excluding the outermost dielectric layer and the internal electrode, the thickness of the region (central portion) corresponding to the central region in the width direction of the internal electrode is Where the thickness of the region corresponding to the end portion in the width direction of the internal electrode (both ends) is thinner, the thickness of the region facing the end portion in the width direction of the internal electrode is thin, and the region facing the central region in the width direction of the internal electrode. It is possible to form a ceramic body that is excellent in flatness of the main surface as a whole by supplementing the outermost dielectric layer with a thick region. As a result, the position of the internal electrode is small, the characteristics are good, the mounting stability is excellent, and there is no fatal problem that the internal electrode is exposed on the side of the ceramic body. It becomes possible to provide a monolithic ceramic capacitor having a high height.

  In the multilayer ceramic capacitor of the present invention, the internal electrode has a thickness at the end in the width direction that is an end in a direction orthogonal to the lead-out direction to the first end surface and the second end surface, than the thickness of the central region in the width direction. In the manufacturing process, for example, by applying a conductive paste to a ceramic green sheet, a paste pattern (internal electrode pattern) is formed so that the thickness of the end in the width direction is increased. When the ceramic green sheets are stacked, the end in the width direction of the thick (raised) internal electrode pattern bites into the adjacent ceramic green sheets, and functions to suppress and prevent misalignment.

  As a result, in the case of a multilayer ceramic capacitor having an internal electrode formed so that the thickness of the width direction end is thicker than the thickness of the central region in the width direction, the positional deviation of the internal electrode (internal electrode pattern) in the manufacturing process A highly reliable monolithic ceramic capacitor that has low resistance, good characteristics, excellent mounting stability, and does not cause fatal problems such as internal electrodes exposed on the sides of the ceramic body. Is possible.

It is a front sectional view showing the composition of the multilayer ceramic capacitor concerning one embodiment of the present invention. 1 is a perspective view showing an external configuration of a multilayer ceramic capacitor according to an embodiment of the present invention. It is a figure which shows the structure of the multilayer ceramic capacitor concerning one Embodiment of this invention, Comprising: It is the sectional view on the AA line of FIG. It is a figure for demonstrating the structure of the multilayer ceramic capacitor concerning one Embodiment of this invention, Comprising: It is side surface sectional drawing of a ceramic element | base_body. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a side cross-sectional view illustrating a configuration of a multilayer ceramic capacitor according to an embodiment of the present invention, illustrating a multilayer body excluding an outermost dielectric layer of a ceramic body. It is front sectional drawing which shows the structure of the external electrode of the conventional multilayer ceramic capacitor.

  Embodiments of the present invention will be described below to describe the features of the present invention in more detail.

  FIG. 1 is a front sectional view showing a configuration of a multilayer ceramic capacitor 50 according to one embodiment (Embodiment 1) of the present invention, and FIG. 2 is a perspective view showing an external configuration of the multilayer ceramic capacitor 50.

As shown in FIGS. 1 and 2, the multilayer ceramic capacitor 50 includes a dielectric layer 1 made of a dielectric ceramic and a plurality of internal electrodes 2 (2a, 2b) disposed at a plurality of interfaces between the dielectric layers 1. And a pair of external electrodes 5 (5a, 5b) disposed on the outer surface of the ceramic body 10 so as to be electrically connected to the internal electrodes 2 (2a, 2b). Yes.
An auxiliary electrode 6 (6a, 6b) is disposed between the internal electrode 2 (2a, 2b) and a first main surface 11a and a second main surface 11b of the ceramic body 10, which will be described later. ing. The auxiliary electrode 6 (6a, 6b) is electrically connected to an external electrode having the same potential as the adjacent internal electrode 2 (2a, 2b). However, it may not be electrically connected to the external electrode.
The auxiliary electrode 6 (6a, 6b) may be provided only on the first main surface 11a side, or may be provided only on the second main surface 11b side.
Further, a plurality of auxiliary electrodes 6 (6a, 6b) may be provided.
It is also possible to adopt a configuration in which the auxiliary electrode 6 (6a, 6b) is not provided.

The dielectric layer 1 constituting the ceramic body 10 is formed of a BaTiO ₃ based ceramic dielectric. Incidentally, with respect Ti100 moles of BaTiO _3, Dy 1.0 mol part, Mg is added to a 1.3 molar parts, and further added Mn.
The dielectric layer 1 is not limited to a BaTiO ₃ -based ceramic dielectric but may be formed of other ceramic dielectrics such as a CaZrO ₃ -based material.
The internal electrode 2 is a metal layer mainly composed of a base metal such as Ni or Cu.

  The ceramic body 10 has a rectangular parallelepiped shape, and includes a first main surface 11a, a second main surface 11b facing the first main surface 11a, and a first main surface 11a orthogonal to the first main surface 11a. An end surface 21a, a second end surface 21b facing the first end surface 21a, a first side surface 31a orthogonal to the first end surface 21a, and a second side surface 31b facing the first side surface 31a are provided. .

  When the direction connecting the first main surface 11a and the second main surface 11b is the height direction, the height direction is the stacking direction of the dielectric layer 1 and the internal electrodes 2 (2a, 2b). .

  A plurality of internal electrodes 2 (2a, 2b) are alternately drawn out on the first end face 21a and the second end face 21b, the internal electrode 2a is drawn out on the first end face 21a, and the second end face The internal electrode 2b is drawn out to 21b.

  In the multilayer ceramic capacitor 50 according to this embodiment, the external electrode 5 (5a, 5b) has a structure including the sintered metal layer 12 (12a, 12b) and the plating layer 32 (32a, 32b). ing.

  In the multilayer ceramic capacitor 50, the boundary between the auxiliary electrode 6 (6a, 6b) and the outer ceramic layer (that is, the ceramic layer on the first main surface 11a and the second main surface 11b side). Is provided with 69% or more of a boundary layer containing Mg and Mn. The auxiliary electrode 6 (6a, 6b) has a continuity of 60% or more. Furthermore, segregated materials containing Si are present in 39% or more of the defect portions, which are regions where continuity is interrupted. The molar ratio Mn / Mg of the Mn content to the Mg content in the boundary layer is not particularly limited, but is particularly preferably in the range of Mn / Mg = 0.005 to 0.7.

  The presence of the boundary layer of the auxiliary electrode 6 (6a, 6b) was confirmed as follows. First, the multilayer ceramic capacitor was polished by a polishing machine in such a manner that the surface defined by the length direction and the thickness direction was exposed. At this time, after polishing to a depth of about ½ in the width direction of the multilayer ceramic capacitor, sagging of the internal electrode due to the polishing was removed.

  Then, on the polished end face polished as described above, a straight line substantially perpendicular to the internal electrode 2 is drawn (assumed) at the central position in the length direction of the multilayer ceramic capacitor. And the area | region (boundary layer) where the boundary part of the auxiliary electrode 6 (6a, 6b) and the said straight line orthogonally crossed was observed by magnification 10,000 times using the electron microscope. And in this embodiment, the presence of the boundary layer of the auxiliary electrode 6 (6a, 6b) was confirmed by setting the width of the observation visual field to 10 μm and performing observation with FE-WDX.

The thickness of the internal electrode 2 (2a, 2b) was determined as follows.
First, the polishing end face was divided into three equal parts in the thickness direction, and was divided into three regions: an upper region, an intermediate region, and a lower region. And in each area | region, except the outermost internal electrode 2, the thickness of the internal electrode 2 of the position orthogonal to said straight line was measured at random 5 layers each, and the average value was calculated | required. The thickness of the internal electrode was measured using a scanning electron microscope. However, parts that could not be measured due to a lack of internal electrodes were excluded from the measurement target.

  In addition, the thickness of the dielectric layer 1 is measured by randomly measuring five layers of the dielectric layer 1 at positions orthogonal to the straight line in each of the three regions, the upper region, the middle region, and the lower region. The average value was obtained. The thickness of the dielectric layer was measured using a scanning electron microscope.

  However, the outermost dielectric layer positioned outside the outermost internal electrode 2 located on the outermost side in the stacking direction, and two or more dielectric layers connected to each other due to the lack of the internal electrode are observed. Parts that could not be measured due to reasons such as

  The sintered metal layer 12 (12a, 12b) is a baked electrode (thick film electrode) formed by applying and baking a conductive paste containing Cu powder or Ni powder as a conductive component on the ceramic body 10. The constituent material of the sintered metal layer 12 (12a, 12b) is not limited to the above-described Cu or Ni, and other metal materials can also be used.

The sintered metal layer 12 (12a, 12b) is formed from the first end surface 21a and the second end surface 21b of the ceramic body 10 and the first and second main surfaces 11a, 11b of the ceramic body 10 and It is formed so as to go around the first and second side surfaces 31a and 31b.
The thickness of the sintered metal layer 12 is usually desirably in the range of 0.5 μm to 10 μm.
However, the thickness of the sintered metal layer 12 is not limited to the above range, and may be other thicknesses.

  The plating layer 32 (32a, 32b) is formed so as to cover the entire sintered metal layer 12 (12a, 12b).

  In this embodiment, the plating layer 32 (32a, 32b) includes the Ni plating layer 33 (33a, 33b) formed on the sintered metal layer 12 (12a, 12b) and the Ni plating layer 33 (33a, 33b). 33b) a plating layer having a two-layer structure including the Sn plating layer 34 (34a, 34b) formed thereon.

  FIG. 3 is a view showing the multilayer ceramic capacitor of this embodiment with the auxiliary electrode omitted. As shown in FIG. 3, in the multilayer ceramic capacitor of this embodiment, the direction orthogonal to the lead-out direction of the internal electrode 2 to the first end surface 21a and the second end surface 21b (see FIG. 2) of the ceramic body 10 is shown. The thickness t1 of the width direction end portion 2ax of the internal electrode 2 that is the end portion of the inner electrode 2 is configured to be thicker than the thickness t2 of the width direction central region 2ay. In the multilayer ceramic capacitor of this embodiment, both end portions in the width direction of the internal electrode 2 have the same configuration.

The thickness t1 of the end portion 2ax in the width direction of the internal electrode 2 is preferably 1% or more (that is, t1 / t2 ≧ 1.01) as compared with the thickness t2 of the center region 2ay in the width direction.
When t1 / t2 is less than 1.01, the effect of suppressing the displacement of the internal electrode 2 becomes insufficient, which is not preferable.

  Moreover, it is preferable that the thickness t1 of the width direction edge part 2ax of the internal electrode 2 is 0.77 micrometer or more. If the thickness t1 of the width direction end portion 2ax is less than 0.77 μm, the internal electrodes are not stacked, which is not preferable.

  The thickness of the internal electrode 2 is, for example, from the first or second end face 21a, 21b side so that the surface defined by the width direction and the thickness direction of the ceramic body 10 becomes the exposed surface of the internal electrode 2. It can be measured by polishing the ceramic body 10 and observing the internal electrode 2 exposed in the cross section.

As described above, by making the thickness t1 of the width direction end portion 2ax larger than the thickness t2 of the width direction central region 2ay, for example, in the manufacturing process, the conductive paste is applied to the ceramic green sheet, and the width direction end portion When laminating ceramic green sheets with internal electrode patterns formed so that the thickness of the internal electrode becomes thicker, the widthwise ends of the thick internal electrodes (paste pattern) bite into adjacent ceramic green sheets to suppress misalignment Fulfills the function of preventing.
As a result, it is possible to obtain a highly reliable multilayer ceramic capacitor in which the internal electrodes are not displaced.

  In the multilayer ceramic capacitor of the present invention, not only the thickness of the end portion in the width direction of the internal electrode is increased, but also the thickness of the end portion on the opposite side of the end portion of the internal electrode to the end face of the ceramic body is also provided. Further, by making the thickness larger than the thickness of the central region of the internal electrode, it is possible to further reliably suppress and prevent the displacement of the internal electrode.

  Moreover, in the multilayer ceramic capacitor of this embodiment, the coverage ratio, which is the ratio of the internal electrode 2 covering the dielectric layer 1 at the width direction end 2ax, is the central region of the internal electrode 2 in the width direction. It is comprised so that it may become higher than the coverage in 2ay.

  The coverage, which is the ratio of the internal electrode 2 covering the dielectric layer 1, is preferably higher than the coverage in the width direction central region 2ay at the width direction end portion 2ax and 80% or more. .

  By adopting such a configuration, it is possible to alleviate stress concentration due to the piezoelectric phenomenon of the ceramic material in the vicinity of the end in the width direction of the internal electrode 2 and to suppress the generation of cracks.

  FIG. 4 is a view showing the multilayer ceramic capacitor of this embodiment with the auxiliary electrode omitted. As shown in FIG. 4, in the multilayer ceramic capacitor of this embodiment, the outermost dielectric layer 1 a located outside the outermost internal electrode 2 among the plurality of internal electrodes 2 is the end in the width direction of the internal electrode 2. The thickness t3 of the region 1ax facing the portion 2ax is configured to be thinner than the thickness t4 of the region 1ay facing the central region 2ay in the width direction of the internal electrode 2. By having such a configuration including the outermost dielectric layer 1a, the following effects can be obtained.

  For example, as shown in FIG. 5, when the thickness of the outermost dielectric layer 1a is uniform, the thickness t1 of the width direction end portion 2ax of the internal electrode 2 is thicker than the thickness t2 of the width direction central region 2ay. The ceramic body 10 is thicker at both ends corresponding to the widthwise end 2ax of the internal electrode 2, and is thinner at the center corresponding to the widthwise central region 2ay of the internal electrode 2. As shown in FIG. 4, the thickness t4 of the central portion 1ay of the outermost dielectric layer 1a is made thicker than the thickness t3 of the thickness 1ax at both ends, as shown in FIG. As shown in FIG. 4, the ceramic body 10 having excellent flatness of the principal surfaces 11a and 11b (see FIG. 3) can be formed.

  The first and second main surfaces 11a and 11b of the ceramic body 10 become mounting surfaces facing the substrate when mounted on, for example, a circuit board. For example, the corners of the ceramic body 10 that are likely to generate cracks. Although the crack generated in the part also progresses to the center of the main surface 11a or 11b, since the outermost dielectric layer 1a is thick, the arrival and progress of the crack can be suppressed.

  Therefore, by adopting the above configuration, there is a fatal problem that the positional displacement of the internal electrode 2 is small, the characteristics are good, the mounting stability is excellent, and the internal electrode is exposed on the side surface of the ceramic body. It is possible to provide a highly reliable multilayer ceramic capacitor that does not occur.

In this embodiment, as the multilayer ceramic capacitor 50,
(A) Multi-layer ceramic capacitor having dimensions including an external electrode: length (L): 1.0 mm, width (W): 0.5 mm, height (T): 0.5 mm;
(B) Multi-layer ceramic capacitors having dimensions including the external electrode, the length (L): 0.6 mm, the width (W): 0.3 mm, and the height (T): 0.3 mm;
(C) A monolithic ceramic capacitor having dimensions including the external electrode of length (L): 0.4 mm, width (W): 0.2 mm, and height (T): 0.2 mm was produced.

  However, the present invention is not limited to the monolithic ceramic capacitor having the dimensions as described above, and can be applied to monolithic ceramic capacitors having different dimensions.

Next, a method for manufacturing the multilayer ceramic capacitor 50 will be described.
First, a ceramic raw material slurry in which a binder and a solvent are mixed and dispersed in a dielectric ceramic powder mainly composed of BaTiO ₃ or CaZrO ₃ is thinly stretched on a resin film such as a PET film and formed into a sheet shape. A ceramic green sheet is prepared.

  Then, a conductive paste is printed on the ceramic green sheet using a method such as screen printing or gravure printing to form an internal electrode pattern.

  At this time, the internal electrode pattern is performed by, for example, gravure printing or screen printing. When the internal electrode pattern is formed by gravure printing, the depth of the gravure printing plate on which the pattern corresponding to the internal electrode is formed is deepened in the region corresponding to the end portion in the internal electrode width direction. The thickness of the end portion in the width direction of the electrode pattern can be increased.

  In the case of screen printing, the thickness of the end portion in the width direction of the internal electrode pattern can be increased by roughening the mesh of the screen plate.

Then, a predetermined number of ceramic green sheets on which internal electrode patterns are formed and ceramic green sheets on which internal electrode patterns are not formed (ceramic green sheets that serve as outermost dielectric layers) are stacked in a predetermined order.
As described above, since the thickness of the end portion in the width direction of the internal electrode is increased, the end portion in the width direction having a large inner thickness is first crushed and solidified during lamination. Therefore, it is difficult to cause a phenomenon such as a positional shift of the internal electrodes and a stacking collapse, and it is possible to perform accurate lamination.

And the obtained laminated block is pressed and each ceramic green sheet is crimped | bonded. In pressing the laminated block, for example, the laminated block is sandwiched between resin films and pressed by a method such as isostatic pressing.
The ceramic green sheet serving as the outermost dielectric layer flows and deforms in this pressing process, and the thickness of the region facing the widthwise end of the internal electrode pattern is the center in the width direction of the internal electrode pattern. The shape is smaller than the thickness of the region facing the region.

  Thereafter, the pressed laminated pressure-bonded body is divided into rectangular parallelepiped-shaped chips (pieces) using a method such as pressing and cutting, and barrel polishing is performed.

  The barrel-polished chip (the piece that becomes the ceramic body 10 (FIG. 1) after firing) is heated to a predetermined temperature to remove the binder, and then fired at, for example, 900 to 1000 ° C. to obtain a rectangular parallelepiped. A shaped ceramic body is obtained.

  Then, the other end face side of the ceramic body is held, and one end face of the ceramic body is immersed in a conductive paste layer formed by applying a conductive paste containing Cu powder or Ni powder on the surface plate. Thus, the conductive paste is applied to one end surface of the ceramic body and dried.

  Next, a conductive paste is applied and dried on the other end face of the ceramic body in the same manner.

  Then, a sintered metal layer is formed by baking the conductive paste at one end and the other end of the ceramic body applied as described above.

Thereafter, Ni plating and Sn plating are performed in this order on the sintered metal layer to form a Ni plating layer and a Sn plating layer.
Thereby, the multilayer ceramic capacitor 50 according to the embodiment of the present invention having the structure as shown in FIGS. 1 and 2 is obtained.
The coverage of the internal electrode can be determined by separating the dielectric layer, imaging with SEM, performing binarization, distinguishing the internal electrode from the dielectric layer, and measuring the area. . The outermost dielectric layer is polished to the center in the length direction so that the surface defined by the width direction and the thickness direction is exposed. It can be measured by observing.

<Test>
In order to confirm the effect of the present invention, the dimensions including the external electrode, produced by the method described above, are as follows: length (L): 0.6 mm, width (W): 0.3 mm, height (T): 0. About 3mm multilayer ceramic capacitor
(A) The ratio (t1 / t2) of the thickness t1 of the widthwise end of the internal electrode to the thickness t2 of the widthwise central region of the width t1 of the widthwise end,
(B) While examining the coverage, which is the ratio of the internal electrode covering the dielectric layer, at the widthwise end of the internal electrode,
(C) Internal electrode misalignment (stacking misalignment), and
(D) The presence or absence of cracks based on the piezoelectric phenomenon was examined. The results are shown in Table 1.

  In addition, in each sample of sample numbers 1 to 3 in Table 1, it was confirmed that the coverage of the end portion in the width direction of the internal electrode was higher than the coverage of the central region in the width direction.

  As for the positional deviation of the internal electrode, when the distance G from the first and second side surfaces 31a, 31b of the ceramic body 10 in FIG. 3 to the end in the width direction of the internal electrode exceeds 20 μm, The evaluation of the positional deviation in Table 1 was evaluated as good (◯) assuming that no positional deviation occurred.

  In addition, regarding the generation of cracks based on the piezoelectric phenomenon, when a voltage (64 V) is applied to the sample and no crack is observed at the end in the width direction of the ceramic body, it is assumed that no cracks are generated due to the piezoelectric phenomenon. The column of presence / absence of cracks due to the piezoelectric phenomenon in Table 1 is “None”.

  As shown in Table 1, for each sample in Table 1 where the thickness t1 of the end portion in the width direction of the internal electrode satisfies the requirement of the present invention that the thickness t2 of the central region in the width direction is larger, the positional deviation of the internal electrode is It was confirmed that good results were obtained.

  In addition, no crack based on the piezoelectric phenomenon was observed for each sample in which the coverage of the end portion in the width direction of the internal electrode was higher than the coverage of the central region in the width direction.

  Although not particularly shown in Table 1, it has been confirmed that when the thickness t1 of the end portion in the width direction of the internal electrode is thinner than the thickness t2 of the central region in the width direction, the position shift of the internal electrode occurs.

  In addition, it has been confirmed that the effect of suppressing the occurrence of cracks based on the piezoelectric phenomenon is reduced for a sample in which the coverage of the end portion in the width direction of the internal electrode is lower than the coverage of the central region in the width direction.

  In addition, this invention is not limited to the said embodiment, A various application and deformation | transformation are possible within the scope of the invention.

DESCRIPTION OF SYMBOLS 1 Dielectric layer 1a Outermost dielectric layer 1ax The area | region facing the width direction edge part of the internal electrode of the outermost dielectric layer 1ay The area | region 2 (2a, 2a, 2b) Internal electrode 2ax Internal electrode widthwise end 2ay Internal electrode widthwise central region 5 (5a, 5b) External electrode 6 (6a, 6b) Auxiliary electrode 10 Ceramic body 11a First main surface of ceramic body 11b Second main surface 12 of ceramic body 12 (12a, 12b) Sintered metal layer 21a First end surface of ceramic body 21b Second end surface of ceramic body 31a First side surface 31b of ceramic body 31b Ceramic body Second side surface 32 (32a, 32b) Plating layer 33 (33a, 33b) Ni plating layer 34 (34a, 34b) Sn plating layer 50 Multilayer ceramic capacitor G Distance from the side surface of the ceramic body to the end in the width direction of the internal electrode L Length of the multilayer ceramic capacitor T Height of the multilayer ceramic capacitor W Width of the multilayer ceramic capacitor t1 Thickness of the width direction end of the internal electrode t2 Thickness of the central region in the width direction

Claims (3)

A ceramic body comprising a dielectric layer made of a dielectric ceramic, and a plurality of internal electrodes stacked via the dielectric layer and positioned at a plurality of interfaces between the dielectric layers, A second main surface opposite to the first main surface, a first end surface orthogonal to the first main surface, a second end surface opposite to the first end surface, and the first The dielectric has a rectangular parallelepiped shape including a first side surface orthogonal to an end surface and a second side surface facing the first side surface, and a direction from the first main surface toward the second main surface is the dielectric. A ceramic body in which the layers and the internal electrodes are stacked and the plurality of internal electrodes are alternately drawn to the first end face and the second end face;
A multilayer ceramic capacitor comprising a pair of external electrodes disposed on the ceramic body so as to be electrically connected to the internal electrodes drawn out to the first end surface and the second end surface;
The internal electrode is formed such that the thickness of the end in the width direction, which is the end in the direction perpendicular to the lead-out direction to the first end surface and the second end surface, is greater than the thickness of the central region in the width direction. A multilayer ceramic capacitor characterized by   The coverage, which is the ratio of the internal electrode covering the dielectric layer at the end in the width direction of the internal electrode, is configured to be higher than the coverage in the central region in the width direction of the internal electrode. The multilayer ceramic capacitor according to claim 1, wherein the multilayer ceramic capacitor is provided.   The outermost dielectric layer located outside the outermost internal electrode among the plurality of internal electrodes has a thickness of a region facing the widthwise end of the internal electrode, and the widthwise central region of the internal electrode The multilayer ceramic capacitor according to claim 1, wherein the multilayer ceramic capacitor is configured to be thinner than a thickness of a region opposed to the capacitor.

Images