JP2015047021A - Dead-time compensation apparatus of power conversion apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To compensate an output voltage error caused by dead time or ON voltage drop in PWM modulation.SOLUTION: An output voltage of a PWM inverter or an input voltage of a PWM converter is detected by a voltage detection circuit. The voltage detection circuit using an A/D converter for performing ▵Σ modulation integrates bit data converted by the A/D converter, converts the integrated value into a digital value at timing synchronized with a PWM gate signal generating carrier and calculates a reference wave component of the detection voltage. The voltage detection circuit calculates a difference between the reference wave component and a voltage command of the PWM inverter (or the PWM converter) and outputs an addition value of the difference and the voltage command to a PWM modulation part.

Description

  The present invention relates to a dead time compensator for a power converter, and more particularly to a dead time compensator for compensating an output voltage error by using an A / D converter that inputs a detected voltage and performs ΔΣ modulation.

  In an inverter that converts DC power into AC power by controlling a switching element such as an IGBT, a dead time is provided to prevent a short circuit between the upper and lower arms of the inverter. In this inverter control, an error occurs between the output voltage command and the actually output voltage due to dead time, voltage drop of the switching element, and the like. This voltage error causes distortion in the output current waveform and adversely affects control performance such as torque ripple when the motor is driven.

  Many methods for compensating for this voltage error (hereinafter referred to as dead time compensation) have been proposed. For example, a method of superimposing a square wave or a trapezoidal wave voltage on a voltage command according to the polarity of the output current as in Patent Document 1, or an error voltage component as disturbance as in Non-Patent Document and using a disturbance observer There is a method for estimating the error voltage and compensating for the voltage command.

JP2001-145368

              Ito et al., “Analysis of Error Compensation Method for Inverter Output Voltage Using Disturbance Observer in Vector Control”, Electron Theory D, vol. 128. No. 8． pp. 1005-1012 (2008)

  FIG. 4 is a circuit diagram of an inverter dead time compensator described in Patent Document 1, in which a current detected by CT is input to a comparator and a compensation amount calculator. The comparator multiplies the pulse signal output according to the magnitude and polarity of the current and the compensation amount calculator by the compensation amount according to the frequency set by the frequency setter, and then compensates via the integrator. The voltage is added to the PWM voltage command value and output to the PWM pulse calculator.

  In the method of Patent Document 1, the compensation amount is switched in accordance with the polarity of the current. However, when the current frequency is low, the slope of the current is small and the time near zero becomes long, and the polarity determination is performed. It becomes difficult to switch the compensation amount. Further, since the ON voltage drop of the switching element varies with temperature and the variation of the ON voltage drop due to the element is large, it is difficult to remove the voltage error component.

FIG. 5 is a block diagram of a compensation method using a disturbance observer described in non-patent literature.
The disturbance observer estimates the disturbance by obtaining the difference between the voltage command and the actual motor terminal voltage. The estimated disturbance is added to the voltage command as a disturbance compensation voltage Vcomp (Vdcomp, Vqcomp) to compensate the dead time error voltage. In the method of this non-patent document, the voltage error is estimated by an observer and compensation is performed, so that compensation is performed according to the polarity of the current. It is possible to cope with fluctuations of about a voltage error.

  However, since the observer's calculation for estimating the voltage error needs to be calculated faster than the current control period, a function having high-speed calculation capability is required. In addition, since the motor constant is used, it cannot be applied to a motor whose constant is unknown, and may become unstable when the motor constant fluctuates greatly.

  An object of the present invention is to provide a dead time compensator for a power converter that can easily compensate for an output voltage error due to a dead time and an on-voltage drop without switching currents or performing complicated calculations at high speed. It is in.

Claim 1 of the present invention is to turn on / off a switching element of a power conversion device by a PWM gate signal, and compensates an error voltage due to dead time in a PWM modulator.
Bit data converted by the A / D converter using an A / D converter that detects an input voltage or an output voltage of the power converter by a voltage detection circuit and performs ΔΣ modulation on the voltage detection circuit. And the integrated value is converted into a digital value at a timing synchronized with the carrier for generating the PWM gate signal and output as a fundamental wave component from the voltage detection circuit.
A difference between the voltage command of the power conversion device and the calculated fundamental wave component is calculated, and an addition value of the difference and the voltage command is output to the PWM modulation unit as an error voltage compensation value. .

According to a second aspect of the present invention, the voltage detecting circuit converts the input analog voltage signal into bit data based on the clock signal by the ΔΣ modulator, and integrates the converted bit data;
An integrated change amount calculation unit that takes in the integrated integrated value at a timing synchronized with the carrier and calculates the change amount of the integrated value;
An integration number calculation unit that counts the integration value in the integrator and takes the count value at a timing synchronized with the carrier to calculate the integration number;
A division unit for dividing the amount of change of the integrated value by the number of integrations;
It is characterized by comprising.

  According to a third aspect of the present invention, the voltage command of the power converter is delayed by a sampler, a difference between the delayed voltage command and the fundamental wave component is calculated, and an added value of the difference and the voltage command is calculated as an error voltage compensation value. Is output to the PWM modulation section.

  As described above, according to the present invention, the detection voltage is ΔΣ modulated to calculate the fundamental wave component, and the difference between the fundamental wave component and the voltage command is added to the voltage command to output the dead time and the ON voltage drop. This is a voltage error compensation signal. Thus, it is possible to easily compensate for an output voltage error due to a dead time and an on-voltage drop without using a current switching or a high-speed and complicated calculation as in the prior art.

The block diagram of the dead time compensation apparatus which shows embodiment of this invention. The block diagram of the voltage detection part of this invention. The block diagram of the voltage detection circuit of this invention. The block diagram of the conventional dead time compensation apparatus. The block diagram of the conventional dead time compensation apparatus. In the waveform diagram of the experimental results, (a) is the case of the present invention, and (b) is the case of excluding the dead time compensation of the present invention.

  FIG. 1 is a configuration diagram of a dead time compensator showing an embodiment of the present invention, wherein 1 is a DC power supply unit, 2 is a main circuit unit of an inverter composed of switching elements, 3 is a PWM modulation unit, and an input voltage command, A PWM gate signal is generated based on the DC voltage vdc and the carrier cry, and is output to the main circuit unit 2, and the DC voltage is converted into a three-phase AC voltage of U, V, and W in the main circuit unit 2. 10 is a voltage detection unit according to the present invention, 20 is a control unit, and this control unit 20 represents only the dead time compensation portion.

  FIG. 2 is a schematic configuration of the voltage detection unit 10 and includes a resistance voltage dividing circuit 11 and a voltage detection circuit 12. The voltage detection unit 10 inputs voltages vu, vv, vw obtained by directly dividing the inverter output voltages u, v, w by resistors R1, R2 to the AD converter 13. The data converted into discrete values by the AD converter 13 is sent to the control unit as a fundamental wave component.

FIG. 3 is a configuration diagram of the voltage detection circuit 12 and shows the U phase as a representative. The AD converter 13 is ΔΣ modulated by using a ΔΣ modulator 13a. For this purpose, the 1-bit 1 _- bit clock signal clk _- v is applied to the ΔΣ modulator 13a via the isolation circuit 13c, and the input analog voltage vu is converted to 1-bit data Sm _- v in the ΔΣ modulator 13a. It is converted and output through the insulating circuit 13b. Since the insulation circuits 13b and 13c are 1-bit data, they can be easily insulated by a photocoupler or the like.

  The 1-bit data Sm after insulation that has passed through the insulation circuit 13b is accumulated based on the clock clk by the accumulator 14 such as an FPGA, and the accumulated value ΣSm is calculated by the interrupt timing intc synchronized with the carrier cry by the carrier generator. Input to the unit 15. Note that the interrupt timing intc in FIG. 3 is a half of the carrier period.

The integrated change amount calculation unit 15 includes an integral value change amount calculation unit 15a and an integral value change amount calculation unit 15b. The change amount calculation unit 15a calculates the change amount, ΔV = ΣSm (n) −ΣSm (n−1), from the current integrated value ΣSm (n) and the previous integrated value ΣSm (n−1).
In the change amount calculation unit 15b, the sum of the current change amount ΔV (n) and the previous change amount ΔV (n-1), ΔV (n) + ΔV (n-1) is obtained and a division unit. 18 is output. This ΔV (n) + ΔV (n−1) corresponds to the amount of change for one carrier cycle.

  On the other hand, the clock clk is input to the counting unit 16 to count the clock, and the count value N (n) is input to the integration number calculating unit 17 at the interrupt timing intc. The integration number calculation unit 17 includes an integration number change amount calculation unit 17a and an integration number change amount integration unit 17b. In the change amount calculation unit 17a, the difference in the number of integrations between the current count value N (n) and the previous count value N (n-1), ΔN (n) = N (n) −N (n−1) Ask for.

In the change amount integration unit 17b, a sum of the current integration number ΔN (n) and the previous integration number ΔN (n-1), ΔN (n) + ΔN (n-1) is obtained and a division unit. 18 is output. This ΔN (n) + ΔN (n−1) corresponds to the amount of change for one carrier cycle.
The division unit 18 divides the change amount ΔV (n) + ΔV (n−1) of the integrated value by the number of integrations ΔN (n) + ΔN (n−1) to thereby obtain the fundamental wave component of the PWM voltage. Get.

Although a case where the interrupt timing intc in Figures 3 and 1/2 of the carrier period, a voltage detection value _{s - vu, s - vv,} s - in the case of using the dead time compensation is a vw, updating of the voltage command It is desirable to make it the same or faster than the cycle.

Next, dead time compensation will be described with reference to FIG. Voltage command value to the control unit _{^{20 v * - u, v *}} - v, v * - w is inputted, the voltage command value is delayed through the sampler _{^{21 v * - u - z,}} v * - v - z, v ^* _- w _- z and, the fundamental wave component of the detected voltage by the voltage detection unit _{10 s - vu, s - vv} , s - take the difference between the vw, dead time compensation amount △ _vu, △ v _- v, △ v _- w is calculated. The dead time compensation amount a voltage command value _{^{v * - u, v * -}} v, v * - value obtained by adding the w is inputted to the gate signal generation unit as the dead time compensation value.

  In the gate signal generation unit, a gate signal for on / off control of the switching element of the inverter is generated from the voltage command value compensated for the dead time and the detected DC voltage vdc. Note that there are PWM output periods and detection delays in voltage detection. In order to calculate an accurate voltage error component, it is necessary to correct this time delay. Therefore, the voltage command is delayed by the sampler 21 provided in the control unit 20 to match the voltage detection timing.

In the above description, the on / off control of the switching elements constituting the main circuit unit 2 of the inverter is described. However, in the present invention, the same applies to the PWM converter that converts AC power into DC power in the power converter. Can be applied. When the PWM converter is applied, the inverter output voltages vn _- u, vn _- v, vn _- w shown in FIG. 1 become the converter input voltages.
In the embodiment, a three-phase inverter is described. However, it is needless to say that the present invention can be applied to a single-phase or multi-phase PWM inverter and a PWM converter.

  6A and 6B show waveform diagrams of the experimental results. FIG. 6A shows the case of the present invention, and FIG. 6B shows the result when the dead time compensation amount is not added to the voltage command in FIG. is there. As apparent from FIG. 6, the error between the voltage command CH2 and the detected voltage value CH1 is relatively large in FIG. 6B, whereas the voltage command in FIG. 6A to which the present invention is applied. The error between CH2 and voltage detection value CH1 is small. The output current indicated by CH6 is distorted in the vicinity of 0A in FIG. 6B, whereas in FIG. 6A, the distortion of the output current CH6 in the vicinity of 0A is also reduced. You can see that

DESCRIPTION OF SYMBOLS 1 ... DC power supply part 2 ... Main circuit part 3 ... PWM modulation part 10 ... Voltage detection part 11 ... Resistance voltage dividing circuit 12 ... Voltage detection circuit 13 ... A / D converter 14 ... Integration part 15 ... Integrated change amount calculation part 16 ... Counting unit 17 ... Integration number calculation unit 18 ... Dividing unit 20 ... Control unit 21 ... Sampler

Claims (3)

In which the switching element of the power conversion device is controlled to be turned on / off by the PWM gate signal, and the error voltage due to the dead time is compensated by the PWM modulator,
Bit data converted by the A / D converter using an A / D converter that detects an input voltage or an output voltage of the power converter by a voltage detection circuit and performs ΔΣ modulation on the voltage detection circuit. And the integrated value is converted into a digital value at a timing synchronized with the carrier for generating the PWM gate signal and output as a fundamental wave component from the voltage detection circuit.
A power converter that calculates a difference between the voltage command of the power converter and the calculated fundamental wave component, and outputs an added value of the difference and the voltage command as an error voltage compensation value to the PWM modulator. Dead time compensation device. The voltage detection circuit includes:
An integrator for converting the input analog voltage signal into bit data based on the clock signal by the ΔΣ modulator, and integrating the converted bit data;
An integrated change amount calculation unit that takes in the integrated integrated value at a timing synchronized with the carrier and calculates the change amount of the integrated value;
An integration number calculation unit that counts the integration value in the integrator and takes the count value at a timing synchronized with the carrier to calculate the integration number;
A division unit for dividing the amount of change of the integrated value by the number of integrations;
2. The dead time compensation device for a power conversion device according to claim 1, wherein The voltage command of the power converter is delayed by a sampler, a difference between the delayed voltage command and the fundamental wave component is calculated, and an added value of the difference and the voltage command is output to the PWM modulation unit as an error voltage compensation value. The dead time compensator for a power converter according to claim 1 or 2.

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