JP2015041070A - Ring optical modulator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve wavelength control efficiency for resonance wavelength without degrading modulation efficiency in a case of using a doped silicon layer or a silicide layer as a heater.SOLUTION: A ring optical modulator includes: a ring waveguide 1 including a ring waveguide core 1A that is a rib section of a silicon layer and including a p-doped area and an n-doped area; a bus waveguide 2; an inner circumference electrode line 3 provided along an inner circumference of the ring waveguide core 1A, and including an inner doped-silicon area or an inner silicide area that is provided in a slab section inward of the rib section; an outer circumference electrode line 4 provided along an outer circumference of the ring waveguide core 1A, and including an outer doped-silicon area or an outer silicide area that is provided in a slab section outward of the rib section; a modulation drive circuit 5; and a heater drive circuit 6. The modulation drive circuit 5 and the heater drive circuit 6 are connected to each of the inner circumference electrode line 3 and the outer circumference electrode line 4 so as to supply a modulation electric signal to the inner circumference electrode line 3 and the outer circumference electrode line 4 and so as to flow a heater current circumferentially, respectively.

Description

  The present invention relates to a ring optical modulator.

In recent years, a silicon optical integrated device formed on a silicon substrate that is inexpensive and can be integrated on a large scale has attracted attention.
Silicon (Si) is a transparent medium for 1.3 μm band and 1.55 μm band optical signals used in optical communications, and forms a low-loss and small silicon wire waveguide using advanced process technology. Is possible. Various optical elements based on such a technique have been proposed and verified so far, and are considered to be used for, for example, an optical communication system or a high-speed interconnect in a server.

As an optical modulator integrated in such a silicon optical integrated device, a small-sized and low power consumption ring optical modulator is suitable.
In addition, in order to control the resonance wavelength of the ring optical modulator, for example, a metal thin film provided with an insulating film sandwiched above the ring waveguide core is used as a heater, or doped n-type. Some use a silicon layer as a heater.

JP2013-037281A JP2012-198465A

Hui Yu et.al., “Compact Thermally Tunable Silicon Racetrack Modulators Based on an Asymmetric Waveguide”, IEEE photonics technology letters, vol.25, no.2, pp.159-162, 2013 Guoliang Li et.al., “25Gb / s 1V-driving CMOS ring modulator with integrated thermal tuning”, Optics Express, vol.19, no.21, pp.20435-20443, 2011

However, when a doped silicon layer doped n-type is used as a heater, there are the following problems.
First, if a doped silicon layer is provided independently at a position apart from the outside of the ring waveguide core, the distance from the ring waveguide core is increased, and there is no heat between the ring waveguide core and the doped silicon layer. A portion having low conductivity (for example, SiO ₂ ) is interposed. For this reason, heat is not efficiently transmitted from the doped silicon layer as a heater to the ring waveguide core, and the wavelength control efficiency of the resonance wavelength is not good.

  On the other hand, if a part of the ring waveguide core in the circumferential direction is used as the heater region instead of being used as the modulation region, the wavelength control efficiency of the resonance wavelength is improved, but the modulation efficiency is lowered. In other words, the slab part of the silicon layer constituting the ring waveguide core is separated from the modulation region without doping for use as a modulation region for a part of the ring waveguide core in the circumferential direction, and the n-type When doped into a doped silicon region (doped silicon layer) and used as a heater, the wavelength control efficiency of the resonance wavelength is improved, but the modulation efficiency is lowered.

Here, the problem is described when the n-type doped silicon layer is used as a heater. However, the present invention is not limited to this, and the p-type doped silicon layer or a silicide layer made of a metal compound is used. There is a similar problem when using as a heater.
Therefore, when using a doped silicon layer doped in n-type or p-type or a silicide layer made of a metal compound as a heater, it is desired to improve the wavelength control efficiency of the resonance wavelength without reducing the modulation efficiency.

  The ring optical modulator includes a ring waveguide including a ring waveguide core which is a rib portion of a silicon layer and has a p-type doping region and an n-type doping region, and a bus waveguide optically connected to the ring waveguide. And an inner doped silicon region or an inner silicide region provided along the inner periphery of the ring waveguide core and provided in the inner slab portion with respect to the rib portion of the silicon layer, and functions as a modulation electrode and a heater line An inner electrode line and an outer doped silicon region or an outer silicide region provided on the outer slab portion with respect to the rib portion of the silicon layer, provided along the outer periphery of the ring waveguide core; Peripheral electrode line that functions as a modulation driving circuit that supplies a modulated electric signal, and a heater driving circuit that supplies a heater current for controlling the resonance wavelength The modulation driving circuit and the heater driving circuit are connected to the inner peripheral electrode line and the outer peripheral electrode line, supply a modulated electric signal to the inner peripheral electrode line and the outer peripheral electrode line, and supply a heater current along the peripheral direction. It is a requirement to flow.

  Therefore, according to the present ring light modulator, when a doped silicon layer doped in n-type or p-type or a silicide layer made of a metal compound is used as a heater, the wavelength of the resonance wavelength can be reduced without reducing the modulation efficiency. There is an advantage that the control efficiency can be improved.

1 is a schematic plan view showing a configuration of a ring light modulator according to a first embodiment. It is a schematic diagram which shows the structure of the ring optical modulator concerning 1st Embodiment, Comprising: It is sectional drawing which follows the AA 'line of FIG. It is a schematic diagram which shows the structure of the ring optical modulator concerning 1st Embodiment, Comprising: It is sectional drawing which follows the BB 'line | wire of FIG. It is a figure which shows the transmission spectrum characteristic of the ring optical modulator concerning 1st Embodiment. It is a figure which shows the equivalent circuit of the ring optical modulator concerning 1st Embodiment. (A) is a figure which shows the relationship between the potential difference Von of ON state of each pn junction part C1-C5 of the ring optical modulator concerning 1st Embodiment, the potential difference Voff of OFF state, and the heater voltage Vh, (B ) Is an average heat generation amount _{Ph (ave)} obtained by averaging Joule heat generated in each line resistance R of the inner and outer electrode lines of the ring optical modulator according to the first embodiment in the ON state and the OFF state. It is a figure which shows the relationship between the heater voltage Vh. It is a schematic diagram for demonstrating the structure of the drive circuit of the ring optical modulator concerning 1st Embodiment. FIGS. 8A and 8B show the simulation results of the heater operation efficiency when a heater current is passed through the inner and outer electrode lines of the ring light modulator according to the first embodiment. 8A shows the temperature distribution calculation result, and FIG. 8B shows the heater power dependence of the shift amount of the resonance peak wavelength. It is a typical sectional view showing the composition of the ring light modulator concerning the 1st modification of a 1st embodiment. It is a typical sectional view showing the composition of the ring light modulator concerning the 2nd modification of a 1st embodiment. It is a figure which shows the structure (an equivalent circuit is included) of the ring optical modulator concerning the 3rd modification of 1st Embodiment. (A) is a figure which shows the relationship between the potential difference Von of ON state of each pn junction part C1-C5 of the ring optical modulator concerning the 3rd modification of 1st Embodiment, the potential difference Voff of OFF state, and the heater voltage Vh. (B) is an average of Joule heat generated in each line resistance R of the inner and outer electrode lines of the ring light modulator according to the third modification of the first embodiment in the ON state and the OFF state. It is a figure which shows the relationship between the digitized average calorific value _{Ph (ave)} and the heater voltage Vh. It is a figure which shows the equivalent circuit of the ring optical modulator concerning the 4th modification of 1st Embodiment. It is a figure which shows the relationship between the potential difference Voff of OFF state of each pn junction part C1-C5 of the ring optical modulator concerning the 4th modification of 1st Embodiment, and the heater voltage Vh. It is a figure which shows the equivalent circuit of the ring optical modulator concerning the 5th modification of 1st Embodiment. It is a typical top view which shows the structure of the ring optical modulator concerning 2nd Embodiment. It is a schematic diagram which shows the structure of the ring optical modulator concerning 2nd Embodiment, Comprising: It is sectional drawing which follows the AA 'line of FIG. It is a schematic diagram which shows the structure of the ring optical modulator concerning 2nd Embodiment, Comprising: It is sectional drawing which follows the BB 'line | wire of FIG.

Hereinafter, a ring optical modulator according to an embodiment of the present invention will be described with reference to the drawings.
[First Embodiment]
First, the ring optical modulator according to the first embodiment will be described with reference to FIGS.
The ring optical modulator according to the present embodiment is an optical modulator using a ring optical resonator, and is doped with an n-type or p-type doped silicon layer or a metal compound in order to control the resonance wavelength. A ring light modulator with a wavelength control mechanism using the silicide layer as a heater. Since such a ring optical modulator is a small and low power consumption optical modulator, it is suitable for integration in a silicon optical integrated device. The ring optical modulator is also referred to as a ring resonator type optical modulator or a silicon (Si) ring optical modulator.

As shown in FIG. 1, the present ring optical modulator includes a ring waveguide 1, a bus waveguide 2, an inner peripheral electrode line 3, an outer peripheral electrode line 4, and a modulation driving circuit 5 for supplying a modulated electric signal. And a heater drive circuit 6 for supplying a heater current for controlling the resonance wavelength.
Here, as shown in FIGS. 2 and 3, the ring waveguide 1 is a ring waveguide core 1A (optical waveguide) that is a rib portion 7A of the silicon layer 7 and has a p-type doping region 7AX and an n-type doping region 7AY. Core; silicon waveguide core). The ring waveguide core 1A is a circumferential waveguide core. The ring waveguide 1 is a circumferential optical waveguide.

The bus waveguide 2 is optically connected to the ring waveguide 1. That is, the bus waveguide 2 is provided close to the ring waveguide 1. The bus waveguide 2 is also referred to as a main waveguide.
In addition, since what provided the bus waveguide 2 in the vicinity of the ring waveguide 1 in this way functions as an optical resonator, it is also called a ring optical resonator.
Here, the ring waveguide core 1 </ b> A has a p-type doping region 7 </ b> AX and an n-type doping region 7 </ b> AY capable of current injection or voltage application. Then, the p-type doping region 7AX and the n-type doping region 7AY are in contact with each other at an intermediate position of the ring waveguide core 1A to form a pn junction 7AZ, and by supplying a modulated electric signal to the pn junction 7AZ, By changing the refractive index of the ring waveguide core 1A, the light input from one side of the bus waveguide 2 is modulated and output as a modulated optical signal from the other side of the bus waveguide 2. . 2 and 3, the depletion layer formed in the vicinity of the pn junction 7AZ is shown with a pattern.

  As shown in FIG. 1, the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are provided along the inner periphery and the outer periphery of the ring waveguide core 1A, respectively, and function as modulation electrodes and heater lines. That is, the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are provided along the inner periphery and the outer periphery of the ring waveguide core 1A, respectively, and a modulated electric signal is supplied and a heater current flows along the circumferential direction. . The inner peripheral electrode line 3 is also referred to as an inner electrode line. The outer peripheral electrode line 4 is also referred to as an outer electrode line.

  Here, the inner peripheral electrode line 3 is provided along the inner periphery of the ring waveguide core 1A, and as shown in FIGS. 2 and 3, the inner slab portion with respect to the rib portion 7A of the silicon layer 7 A doped silicon region 7BX or a silicide region 7BY provided in 7B. In the present embodiment, the inner peripheral electrode line 3 has an inner silicide region 7BY in a region to which a metal electrode terminal 8 described later is connected, and an inner doped silicon region other than a region to which a metal electrode terminal 8 described later is connected. 7BX. Here, the doped silicon region 7BX is a region obtained by doping a part of the slab portion 7B inside the silicon layer 7 into one of p-type and n-type (here, p-type), and is also referred to as a doped silicon layer. The silicide region 7BY is a region in which a part of the slab portion 7B inside the silicon layer 7 is made of a metal compound (for example, NiSi), and is also referred to as a silicide layer.

  Further, as shown in FIG. 1, the outer peripheral electrode line 4 is provided along the outer periphery of the ring waveguide core 1A, and as shown in FIGS. 2 and 3, the outer peripheral electrode line 4 is located outside the rib portion 7A of the silicon layer 7. A doped silicon region 7CX or a silicide region 7CY provided in the slab portion 7C. In the present embodiment, in the outer peripheral electrode line 4, a region to which a metal electrode terminal 8 described later is connected is an outer silicide region 7CY, and a region other than a region to which a metal electrode terminal 8 described later is connected is an outer doped silicon region 7CX. It is. The doped silicon region 7CX is a region obtained by doping a part of the slab portion 7C outside the silicon layer 7 into the other of the p-type and n-type (here, n-type), and is also referred to as a doped silicon layer. The silicide region 7CY is a region in which a part of the slab portion 7C outside the silicon layer 7 is made of a metal compound, and is also called a silicide layer.

The modulation driving circuit 5 and the heater driving circuit 6 are connected to the inner peripheral electrode line 3 and the outer peripheral electrode line 4 as shown in FIG. And a heater current is allowed to flow along the circumferential direction.
In the present embodiment, metal electrode terminals 8 (83X, 83Y, 84X, 84Y) connected to both end portions 3X, 3Y, 4X, 4Y of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are provided. Since the modulation drive circuit 5 and the heater drive circuit 6 are connected to the metal electrode terminal 8, the metal electrode terminal 8 is also called a metal electrode terminal for circuit connection. Further, the modulation driving circuit 5 and the heater driving circuit 6 are connected to the inner peripheral electrode line 3 and the outer peripheral electrode line 4 through the metal electrode terminal 8. Then, the modulation drive circuit 5 supplies a positive modulated electric signal to one end 4X of the outer peripheral electrode line 4, and negative modulated electric signal to the other end 3Y of the inner peripheral electrode line 3 opposite to the one end 4X of the outer peripheral electrode line 4. A signal is supplied. The heater drive circuit 6 applies a positive heater voltage to the other end 4 </ b> Y of the outer peripheral electrode line 4 and applies a negative heater voltage to the one end 3 </ b> X of the inner peripheral electrode line 3.

  However, the present invention is not limited to this, and the modulation driving circuit 5 supplies a positive modulation electric signal to one of the first end portions of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and is opposite to the first end portion. A negative modulation electric signal is supplied to the other second end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and the heater drive circuit 6 has one first end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4. A positive heater voltage is applied to the third end on the opposite side of the part, and a negative heater voltage is applied to the fourth end on the opposite side of the other second end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 You should do it.

  Incidentally, a ring optical modulator using a ring optical resonator has a plurality of resonance peak wavelengths determined by its circumferential length and the equivalent refractive index of the waveguide, and exhibits a transmission spectrum characteristic as shown in FIG. 4, for example. FIG. 4 shows some of the plurality of resonance peak wavelengths in the transmission spectrum characteristics. The resonance peak wavelength is also simply referred to as the resonance wavelength. The transmission spectrum characteristic is also referred to as a transmission spectrum response.

In light modulation, the equivalent refractive index of the ring optical waveguide 1 is changed by current injection or voltage application, and the resonance peak wavelength in the transmission spectrum characteristic is shifted.
For example, when a reverse bias voltage is applied, the depletion layer width increases at the pn junction 7AZ provided in the ring waveguide core 1A of the ring optical waveguide 1, the carrier density in the ring waveguide core 1A decreases, and the refractive index increases. Since it increases, the resonance peak wavelength shifts to the longer wavelength side. On the contrary, when a forward bias voltage is applied, free carriers are injected into the pn junction 7AZ and the refractive index in the ring waveguide core 1A is lowered, so that the resonance peak wavelength is shifted to the short wavelength side.

  In FIG. 4, transmission spectrum characteristics that change when a modulation voltage is applied are shown by solid lines A and B. That is, when no voltage is applied, for example, the transmission spectrum characteristic when 0 V is applied is indicated by a solid line A, and a reverse bias voltage (n-side potential> is applied to the pn junction 7AZ provided in the ring optical waveguide 1 of the ring optical modulator. The solid line B indicates the transmission spectrum characteristic when a potential of p side is applied, for example, when −3 V is applied.

By the way, a ring optical modulator using a ring optical resonator has a steep transmission spectral characteristic near the resonance peak wavelength. Therefore, if the input signal light wavelength is matched with the resonance peak wavelength in advance, a slight refraction will occur. Optical modulation with a high modulation amplitude can be realized by changing the rate.
For this reason, in the ring optical modulator, it is preferable to match the resonance peak wavelength with the input signal light wavelength in order to realize high-efficiency optical modulation.

However, it is difficult to adjust the resonance peak wavelength of the ring optical resonator constituting the ring optical modulator to a predetermined absolute wavelength due to factors such as dimensional variation during manufacture and substrate temperature change during operation.
For this reason, a wavelength control mechanism for controlling the resonance wavelength is provided in the ring optical modulator, and the resonance wavelength is controlled so that the resonance wavelength matches the signal light wavelength.

Here, the refractive index of silicon (Si) constituting the ring waveguide core of the ring optical waveguide has a relatively high temperature coefficient (for example, about 5.2 × 10 ⁻⁵ K ⁻¹ ). When the core temperature changes, the equivalent refractive index of the waveguide sensed by the signal light changes, and thereby the resonance wavelength varies.
For this reason, a heater is provided as a wavelength control mechanism for controlling the resonance wavelength of the ring optical modulator, and by changing the temperature of the ring waveguide core 1A, the equivalent refractive index of the ring optical waveguide 1 is changed, and the ring light It is possible to control the resonant wavelength of the modulator.

For example, it is conceivable to provide another layer of metal (Ti, Pt) thin film heater on the upper surface of the SiO ₂ film (insulating film) that covers the ring waveguide core that is the rib portion of the silicon layer. It is also conceivable to provide, as a heater, a doped silicon layer in which a silicon layer on the same plane as the silicon layer on which the ring waveguide core is formed is doped n-type or p-type or a silicide layer using this as a metal compound. Regardless of which heater is used, a control current is supplied to the heater, and the temperature of the ring waveguide core made of silicon is changed by Joule heat generated by the heater, so that the current injection amount or voltage application amount to the heater is adjusted. Thus, the resonance wavelength of the ring light modulator can be controlled.

Among these, a heater using a doped silicon layer or a silicide layer can be formed by a process common to a ring waveguide core formed in the silicon layer, a channel portion connecting the ring waveguide core and the modulation electrode, or the like. This is advantageous because no additional process steps are required as in the case of providing a metal thin film heater.
However, when a doped silicon layer or a silicide layer is used for the heater, if these are provided independently at positions apart from the outside of the ring waveguide core, the distance from the ring waveguide core is increased, and the ring waveguide A portion having a low thermal conductivity (for example, SiO ₂ ) is interposed between the core and the core. For this reason, heat is not efficiently transmitted to the ring waveguide core, and the wavelength control efficiency of the resonance wavelength is not good.

  On the other hand, a doped silicon layer or a silicide layer is used for the heater, and a doped silicon layer or silicide layer that is a heater heating element and a ring waveguide core made of silicon are formed into a silicon layer (or doped silicon layer) having high thermal conductivity. In this case, heat is efficiently transmitted to the ring waveguide core, and the temperature control efficiency, and hence the wavelength control efficiency of the resonance wavelength, is improved. That is, it is possible to control the resonance wavelength of the ring light modulator with a necessary change width with smaller heater power consumption.

  However, in this case, the slab of the silicon layer constituting the ring waveguide core is separated from the modulation region without doping for use as a modulation region for a part of the ring waveguide core in the circumferential direction. When a doped silicon region or a silicide region is provided in the part and used as a heater, the wavelength control efficiency of the resonance wavelength is improved, but the modulation efficiency is lowered. In other words, heat is easily transmitted efficiently to the ring waveguide core, and the wavelength control efficiency of the resonance wavelength is improved. However, a part of the ring waveguide core in the circumferential direction is used as a heater, and that part is high-speed. Since it does not act as a phase modulator that causes light modulation, the modulation efficiency (light modulation efficiency, amplitude voltage or power consumption efficiency necessary to obtain a required degree of light modulation) decreases.

Thus, in the ring optical modulator with a wavelength control mechanism, it is difficult to achieve both high wavelength control efficiency in the heater and high modulation efficiency in the optical modulator.
Therefore, as shown in FIGS. 2 and 3, in the present embodiment, as described above, the slab portions 7B and 7C on the inner side and the outer side with respect to the rib portion 7A of the silicon layer 7 constituting the ring waveguide core 1A are provided. The doped silicon regions 7BX and 7CX or the silicide regions 7BY and 7CY are used as heaters (heater lines; heater lines for wavelength control) as a wavelength control mechanism applied to the ring optical modulator, and the ring conduction of the ring optical modulator. It is used as a modulation electrode for supplying a modulated electric signal to the waveguide core 1A.

  That is, the doped silicon regions 7BX and 7CX or the silicide regions 7BY and 7CY provided on the inner and outer slab portions 7B and 7C with respect to the rib portion 7A of the silicon layer 7 constituting the ring waveguide core 1A are modulated with the heater. By using the inner electrode line 3 and the outer electrode line 4 also serving as electrodes, the wavelength control efficiency of the resonance wavelength is improved without lowering the modulation efficiency.

The inner peripheral electrode line 3 and the outer peripheral electrode line 4 are also referred to as heater lines / modulation electrodes. The inner peripheral electrode line 3 is also referred to as an inner peripheral heater line / modulation electrode. The outer peripheral electrode line 4 is also referred to as an outer peripheral heater line / modulation electrode. In addition, when a modulation voltage is applied as a modulation electric signal, the modulation electrode is also referred to as a voltage application electrode.
More specifically, an SOI substrate (BOX (buried oxide) layer (SiO ₂ layer) 9 and a silicon (SOI; silicon on insulator) layer 7) formed on a silicon substrate is used, and an SOI layer ( The silicon layer 7 is partially n-type or p-type doped, etched and patterned, so that the ring waveguide core 1A, the inner peripheral electrode line 3, the outer peripheral electrode line 4, and the channel portion for connecting them. 12 is formed. The bus waveguide core is also formed by etching and patterning the SOI layer 7. The periphery of these is covered with a SiO ₂ film 10 (silicon oxide film; oxide film; overclad oxide film) that functions as a clad.

Here, the ring waveguide core 1A, the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and the channel portion 12 connecting these are formed as follows.
That is, the SOI layer 7 is etched to form, for example, a ring-shaped rib portion 7A having a width of about 500 nm and a height of about 250 nm, and slab portions 7B and 7C having a thickness of about 50 nm, for example.
Then, over the entire circumference of the ring-shaped rib portion 7A, a region on one side of the rib portion 7A (herein, the inner region) is doped with p-type impurities at a low concentration to form a p-type doping region 7AX (p ⁻ -type doping region; p ^- -Si region) is formed, n-type doped region 7AY the n-type impurity in the outer region) and lightly doped (n is the other side of the region (here ^- -type doping region; n ^- -Si region) is formed The As a result, a rib portion 7A including a pn junction 7AZ in which the p-type doping region 7AX and the n-type doping region 7AY are joined is formed, and this becomes the ring waveguide core 1A. That is, the ring waveguide core 1A having the p-type doping region 7AX and the n-type doping region 7AY, which is the rib portion 7A of the silicon layer 7, is formed.

Further, along the portion excluding the portion where the bus waveguide core of the ring-shaped rib portion 7A is close, the end region (for example, about 2000 nm in width) of the inner slab portion 7B with respect to the rib portion 7A, A p-type impurity region 7BX (p ⁺ -type doping region; p ⁺ -Si region) is formed by highly doping p-type impurities in a region other than a region to which a metal electrode terminal 8 described later is connected. A region to which the terminal 8 is connected is silicided with a metal compound (for example, NiSi) to form a silicide region 7BY, which becomes the inner peripheral electrode line 3 (for example, a width of about 2000 nm). That is, it includes an inner doped silicon region 7BX or an inner silicide region 7BY provided along the inner periphery of the ring waveguide core 1A and provided in the inner slab portion 7B with respect to the rib portion 7A of the silicon layer 7, And the inner peripheral electrode line 3 which functions as a heater line is formed. The reason why the region to which the metal electrode terminal 8 described later is connected is the silicide region 7BY is to reduce the contact resistance with the metal electrode terminal 8 described later, that is, the contact resistance between the metal and the semiconductor layer.

Further, along the portion excluding the portion where the bus waveguide core of the ring-shaped rib portion 7A is close, of the end region (for example, about 3000 nm in width) of the outer slab portion 7C with respect to the rib portion 7A, An n-type doping region 7CX (n ⁺ -type doping region; n ⁺ -Si region) is formed by heavily doping an n-type impurity in a region other than a region to which a metal electrode terminal 8 described later is connected. A region to which the terminal 8 is connected is silicided with a metal compound (for example, NiSi) to form a silicide region 7CY, which becomes the outer peripheral electrode line 4 (for example, a width of about 3000 nm). That is, it includes an outer doped silicon region 7CX or an outer silicide region 7CY provided along the outer periphery of the ring waveguide core 1A and provided on the outer slab portion 7C with respect to the rib portion 7A of the silicon layer 7, An outer peripheral electrode line 4 that functions as a heater line is formed. The reason why the region to which the metal electrode terminal 8 described later is connected is the silicide region 7CY is to reduce the contact resistance with the metal electrode terminal 8 described later, that is, the contact resistance between the metal and the semiconductor layer.

Further, a p-type doping region (p ⁻ -type doping region; p) is formed by doping a region (for example, about 250 nm in width) between the rib portion 7A and the end region of the inner slab portion 7B at a low concentration of p-type impurities. ^- is -Si region) is formed, and a channel portion 12 (the inner channel portions 12X) for connecting the ring waveguide core 1A and the inner circumferential electrode line 3.
Further, a region (for example, about 250 nm in width) between the rib portion 7A and the end region of the slab portion 7C outside thereof is doped with an n-type impurity at a low concentration to form an n-type doping region (n ⁻ -type doping region; n ^- is -Si region) is formed, and a channel portion 12 (the outer channel portion 12Y) for connecting the ring waveguide core 1A and the peripheral electrode line 4.

Thus, the inner peripheral electrode line 3 and the outer peripheral electrode line 4 may be separated from the ring waveguide core 1A to such an extent that the optical field of the signal light propagating in the ring waveguide core 1A is not applied. For example, it can be arranged close to 1A up to about 250 nm.
As described above, the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are the doped silicon regions 7BX and 7CX or the silicide regions 7BY and 7CY formed in the same SOI layer 7 as the ring waveguide core 1A, respectively. That is, the ring waveguide core 1A is a channel portion made of doped silicon regions 7BX and 7CX or silicide regions 7BY and 7CY formed on the same SOI layer 7 as the ring waveguide core 1A acting as a heater and Si having high thermal conductivity. Thermally connected via 12XY. For this reason, the heat (Joule heat) generated in the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is efficiently transmitted to the ring waveguide core 1A, and the temperature of the ring waveguide core 1A can be increased with less heater power. It is.

In particular, in this embodiment, as shown in FIG. 1, the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are provided over the same central angle. That is, the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are provided over the same central angle on both sides of the ring waveguide core 1A along the circumferential direction of the ring waveguide core 1A.
The inner electrode line 3 and the outer electrode line 4 preferably have uniform resistance over the entire length (total line length). That is, the inner electrode line 3 and the outer electrode line 4 have uniform electric resistance (heater resistance; line resistance) per unit rotation angle along the circumferential direction of the ring waveguide core 1A. Is preferred. As described above, by making the line resistances of the inner electrode line 3 and the outer electrode line 4 uniform (however, the line resistance may be different between the inner electrode line 3 and the outer electrode line 4), the ring light Uniform heater heat generation is obtained over the entire circumference of the modulator, and high wavelength control efficiency is obtained. In addition, if there is a large distribution in the line resistance in the inner electrode line 3 and the outer electrode line 4, there is a possibility that local heat generation and temperature increase may occur in a portion where the line resistance is high, and as a result, the wavelength control efficiency deteriorates. At the same time, the reliability of the ring optical modulator may be adversely affected, and thus this configuration is preferable.

  Further, it is more preferable that the inner electrode line 3 and the outer electrode line 4 have the same resistance. That is, it is more preferable that the inner electrode line 3 and the outer electrode line 4 have the same electric resistance (heater resistance) per unit rotation angle. As described above, the inner electrode line 3 and the outer electrode line 4 have uniform resistance over the entire length, and the inner electrode line 3 and the outer electrode line 4 have the same resistance. Is more preferable. As a result, the voltage applied to the pn junction 7AZ provided in the ring waveguide core 1A of the ring optical modulator is made uniform over the entire circumference, and high modulation efficiency and high operating speed can be realized.

  In the present embodiment, as described above, the metal electrode terminals 83X, 83Y, 84X, and 84Y connected to the both end portions 3X, 3Y, 4X, and 4Y of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are provided. The modulation driving circuit 5 and the heater driving circuit 6 (external driving circuit) are connected to the inner peripheral electrode line 3 and the outer peripheral electrode line 4 through metal electrode terminals 83X, 83Y, 84X, and 84Y. That is, the external drive circuits 5 and 6 are connected to both end portions 3X, 3Y, 4X, and 4Y of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 via the metal electrode terminals 83X, 83Y, 84X, and 84Y. Yes. Then, the modulation drive circuit 5 supplies a positive modulated electric signal to one end 4X of the outer peripheral electrode line 4, and negative modulated electric signal to the other end 3Y of the inner peripheral electrode line 3 opposite to the one end 4X of the outer peripheral electrode line 4. A signal is supplied. The heater drive circuit 6 applies a positive heater voltage to the other end 4 </ b> Y of the outer peripheral electrode line 4 and applies a negative heater voltage to the one end 3 </ b> X of the inner peripheral electrode line 3. Thereby, a modulated electric signal is supplied to the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and a heater current is caused to flow along the circumferential direction.

Specifically, four via holes are provided in the SiO ₂ film 10 covering the silicon layer 7 so as to be connected to both end portions 3X, 3Y, 4X, 4Y of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, respectively. Each of the four via holes is provided with metal electrode terminals such as Al and Cu, that is, four metal electrode terminals 83X, 83Y, 84X, and 84Y (see FIG. 3). In addition, the part formed in the via hole of metal electrode terminal 83X, 83Y, 84X, 84Y is called a via, and the part (separate layer part) on the insulating film connected to this is also called a metal electrode or a pad. Thus, in the present embodiment, the region above the inner peripheral electrode line 3 and the outer peripheral electrode line 4 other than the portion where the four metal electrode terminals 83X, 83Y, 84X, and 84Y are provided is the SiO ₂ film 10. It is covered and no metal electrode is provided (see FIG. 2). That is, the doped silicon regions 7BX, 7CX or silicide regions 7BY provided in the inner and outer slab portions 7B, 7C of the silicon layer 7 other than the portions where the four metal electrode terminals 83X, 83Y, 84X, 84Y are provided. The region above 7CY is covered with the SiO ₂ film 10 and no metal electrode is provided. With the above configuration, the doped silicon regions 7BX, 7CX or the slab portions 7B, 7C on the inner side and the outer side of the silicon layer 7 other than the portion where the four metal electrode terminals 83X, 83Y, 84X, 84Y are provided The ring waveguide is efficiently generated under the condition where the surroundings are thermally insulated by the SiO ₂ film 10 having low thermal conductivity without the heat generated by the heater generated in the silicide regions 7BY and 7CY being dissipated through the metal electrode having high thermal conductivity. The temperature of the core 1A can be changed, and the efficiency of wavelength control is increased.

  Further, at the time of modulation driving, a modulation electric signal is supplied to the metal electrode terminals 83Y and 84X on one side of the inner circumference electrode line 3 and the outer circumference electrode line 4 (here, a modulation voltage is applied), and the metal electrode terminals 83X and 83X on the opposite side are supplied. A heater voltage (wavelength control voltage) is applied to 84Y. In the inner peripheral electrode line 3 and the outer peripheral electrode line 4, the metal electrode terminal 8 that supplies the modulated electric signal is on the opposite side (that is, the metal electrode terminal 8 that applies the heater voltage is on the opposite side), and the modulated electric signal ( Here, a high frequency modulation signal (RF modulation signal) is input between the inner peripheral electrode line 3 and the outer peripheral electrode line 4 from the opposite side. Here, the modulated electrical signals supplied to the inner electrode line 3 and the outer electrode line 4 are differential signals having the same phase and opposite amplitude. Here, a positive modulation electric signal (+ Vs⇔0) is supplied to one end 4X of the outer peripheral electrode line 4, and a negative modulation electric signal (−Vs⇔0) is supplied to the other end 3Y of the inner peripheral electrode line 3. . The heater voltage is also applied to the metal electrode terminals 8 of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 with a reverse amplitude. Here, a positive heater voltage (+ Vh) is applied to the other end 4 </ b> Y of the outer peripheral electrode line 4, and a negative heater voltage (−Vh) is applied to the one end 3 </ b> X of the inner peripheral electrode line 3. Vs is a modulation voltage that reciprocates VsＶ0 V at a modulation speed, and Vh is a DC heater voltage.

  In this way, the four metal electrode terminals 83X, 83Y, 84X, and 84Y connected to the both end portions 3X, 3Y, 4X, and 4Y of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, respectively, + Vs, − Potentials Vh, -Vs, and Vh are given. Thereby, in each of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, the heater current and the modulation current propagate while feeling the line resistance in the circumferential direction. That is, the potential difference between the inner peripheral electrode line 3 and the outer peripheral electrode line 4 enables charge input / output to / from the ring waveguide core 1A, and a peripheral potential difference is added to each of the inner peripheral electrode line 3 and the outer peripheral electrode line 4. Thus, the heater current (control current) flows along the circumferential direction in each of the inner peripheral electrode line 3 and the outer peripheral electrode line 4.

Here, FIG. 5 shows an equivalent circuit model of the present ring optical modulator, that is, an equivalent circuit model related to the inner peripheral electrode line 3, the outer peripheral electrode line 4, and the pn junction 7AZ provided in the ring waveguide core 1A. .
In FIG. 5, the resistance (line resistance per unit rotation angle) of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is normalized by the unit rotation angle and expressed as R, and the inner peripheral electrode line 3 and the outer peripheral electrode line 4. Are respectively Rin and Rout. In FIG. 5, the capacitance (pn junction capacitance per unit rotation angle) of the pn junction 7AZ provided in the ring waveguide core 1A is also normalized by the unit rotation angle and expressed as C, and the ring waveguide core The capacities of the pn junctions 7AZ for the respective circumferential portions of 1A are C1, C2, C3, C4, and C5 (C1 = C2 = C3 = C4 = C5), respectively.

Here, the resistance of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is designed to be uniform per unit rotation angle. That is, the inner peripheral electrode line 3 uses Rin as the resistance of each part corresponding to the unit rotation angle in the direction along the circumferential direction of the ring waveguide core 1A. In the outer peripheral electrode line 4, the resistance of each part corresponding to the unit rotation angle in the direction along the circumferential direction of the ring waveguide core 1A is Rout. In addition, the inner electrode line 3 and the outer electrode line 4 are designed to have the same resistance (Rin = Rout = R). Specifically, for the ring waveguide core 1A having a radius of about 8 μm, the inner peripheral electrode line 3 (p ⁺ Si layer; doping concentration: about 5 × 10 ¹⁹ cm ⁻³ ; width: about 2000 nm) and the outer peripheral electrode line 4 (n ⁺ Si layer; doping concentration about 5 × 10 ¹⁹ cm ⁻³ ; width about 3000 nm), R = Rin = Rout = 13 [Ω / deg] is obtained.

Then, differential signals of + Vs⇔0 and -Vs⇔0 are applied to one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3, respectively. On the other hand, heater voltages (DC heater voltage) of + Vh and −Vh are applied to the other end 4Y of the outer peripheral electrode line 4 and the one end 3X of the inner peripheral electrode line 3 in accordance with the required wavelength control amount.
In this case, C1-C5 in the equivalent circuit shown in FIG. 5, that is, the ON-OFF potential difference Vc1-Vc5 applied to each pn junction (capacitor) are all equal to Vs (Vc1 = Vc2 = Vc3 = Vc4 = Vc5 = Vs).

Here, the heater voltage (wavelength control voltage) Vh was changed to calculate the ON state potential and the OFF state potential of each pn junction C1-C5. As shown in FIG. The potential difference in the ON state and the potential difference in the OFF state of the junction C1-C5 were Von and Voff, respectively. Here, the potential difference Von in the ON state of each pn junction C1-C5 is the pn when + Vs and -Vs are given to one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3, respectively. This is a potential difference applied to the junction C1-C5. Further, the potential difference Voff in the OFF state of each pn junction C1-C5 is the pn junction when 0V and 0V are applied to one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3, respectively. This is a potential difference applied to C1-C5. The ON-OFF potential differences Vc1 to Vc5 applied to the pn junctions C1 to C5 are all the same value and the amplitude of Vs is given regardless of the value of Vh. In FIG. 6A, Von <Voff indicates that a reverse bias voltage is applied to each pn junction C1-C5. In FIG. 6A, Vs / 2 is a heater voltage Vh that gives the minimum average heat generation amount _{Ph (ave)} as shown in FIG. 6B.

Thus, according to the present ring optical modulator, a constant voltage amplitude of Vs is given over the entire circumferential direction of the pn junction 7AZ provided in the ring waveguide core 1A, and the refractive index change is uniform over the entire circumference. Therefore, good modulation characteristics can be obtained.
In addition, a heater current flows in the circumferential direction in the inner circumferential electrode line 3 and the outer circumferential electrode line 4 in accordance with the heater voltage Vh. Then, Joule heat is generated in each line resistance R of the inner peripheral electrode line 3 and the outer peripheral electrode line 4. That is, uniform Joule heat is generated by the line resistance Rin of the inner peripheral electrode line 3, and Joule heat is generated by the line resistance Rout of the outer peripheral electrode line 4. Thereby, the temperature of the entire circumferential direction of the ring waveguide core 1A can be uniformly controlled.

Here, Joule heat generated in each line resistance R of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is turned on (on the one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3 to + Vs, respectively. one end 4X of given state) and the -Vs OFF state (peripheral electrode line 4, an inner periphery electrode line 3 at the other end 3Y, respectively, 0V, average heating value _{P h} averaged state) gave 0V _(Ave) is 1 / 32R * ((Vh−Vs) ² + Vh ² ). As shown in FIG. 6B, this average heat generation amount _{Ph (ave)} becomes the minimum value Vs ² / 64R when Vh = Vs / 2, and the heat generation amount increases as Vh increases. Here, Vs is about 1.0V. Here, in the above equation for obtaining the average heat generation amount, the coefficient of R is 1/32 because the line resistance of the inner electrode line 3 and the outer electrode line 4 is divided into four in the equivalent circuit model. In the case of N division, it can be generalized in the form of 1 / (2 × N ² ).

Therefore, if the heater voltage Vh is controlled in the range of Vs / 2 <Vh <∞, the uniform heat generation can be continuously adjusted to an arbitrary value over the entire circumference of the ring waveguide core 1A. It is possible to arbitrarily control the resonance peak wavelength.
In the control range of the heater voltage Vh, the potential difference applied to each pn junction C1-C5 is always a negative value, and the reverse bias operation for each pn junction C1-C5 is maintained. However, the modulation bias varies with Vh.

As described above, the present ring optical modulator uses the inner peripheral electrode line 3 and the outer peripheral electrode line 4 that serve both as a heater and a modulation electrode. However, like the conventional ring optical modulator, the ring optical waveguide 1A is provided in the ring waveguide core 1A. It is possible to uniformly apply electrical modulation to the provided pn junction 7AZ.
By the way, in order to drive the ring optical modulator configured as described above, as an external drive circuit, as shown in FIG. 7, one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3 are A low output impedance RF modulation driver 5 (for example, modulation rate 25 Gbps, 1 Vpp output) is connected, and a high output impedance DC current driver 6 is connected to the other end 4Y of the outer peripheral electrode line 4 and one end 3X of the inner peripheral electrode line 3. Just do it. In this way, the RF modulation driver 5 and the DC current driver 6 may be connected in reverse to each other by the inner peripheral electrode line 3 and the outer peripheral electrode line 4. The potentials applied from the RF modulation driver 5 and the DC current driver 6 to both end portions 3X, 3Y, 4X, and 4Y of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 have a positive and negative differential configuration, respectively. Just do it. Further, the output impedance of the DC DC driver 6 may be made larger than the output impedance of the RF modulation driver 5. The RF modulation driver 5 is also referred to as a high frequency modulation driver, a high frequency driver circuit for driving a modulator, or a modulation drive circuit. The DC current driver 6 is also referred to as a direct current driver, a direct current driver circuit for supplying a control current, or a heater drive circuit.

  For example, the RF modulation driver 5 connected to the one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3 may be configured so as to have separate voltage polarities. Alternatively, a positive (+) and a negative (−) output may be connected to one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3 using a common differential driver. In any configuration, the distance from the driver 5 to the one end 4X of the outer peripheral electrode line 4 and the distance from the driver 5 to the other end 3Y of the inner peripheral electrode line 3 are applied to the ring light modulator as equal length wiring. Preferably, the modulated electrical signal (RF signal) is synchronized.

Further, for example, the DC current driver 6 connected to the other end 4Y of the outer peripheral electrode line 4 and the one end 3X of the inner peripheral electrode line 3 may be one in which individual voltage polarities are inverted, or a differential driver. May be used.
By adopting such a drive configuration, a high-frequency modulated electrical signal (modulation signal) output from the RF modulation driver 5 is a DC current driver connected to the opposite ends of the inner electrode line 3 and the outer electrode line 4. Since the impedance of 6 is high, it does not propagate to that side, and charges can be efficiently taken in and out of each pn junction C1-C5 to inject signal energy. On the other hand, the heater current output from the DC current driver 6 propagates through each of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 to generate Joule heat, and is then terminated by the RF modulation driver 5.

Here, FIGS. 8A and 8B show the simulation results of the heater operation efficiency when a heater current is passed through the inner electrode line 3 and the outer electrode line 4 of the ring optical modulator. Yes.
FIG. 8A shows a temperature distribution calculation result. As shown in FIG. 8A, the ring waveguide core 1A (7A) is generated by Joule heat generated in the inner peripheral electrode line 3 and the outer peripheral electrode line 4. And it turns out that the temperature of the slab parts 7B and 7C is rising locally.

FIG. 8B shows the heater power dependency of the shift amount of the resonance peak wavelength. As shown in FIG. 8B, the wavelength control efficiency is about 0.27 nm / mW. It can be seen that the power required to shift the FSR (10.8 nm) of the ring optical resonator constituting the power is about 39 mW, and a highly efficient wavelength control characteristic is obtained.
Therefore, according to the ring light modulator according to the present embodiment, when using a doped silicon layer doped in n-type or p-type or a silicide layer made of a metal compound as a heater, without reducing the modulation efficiency, There is an advantage that the wavelength control efficiency of the resonance wavelength can be improved.

  In the above-described embodiment, the inner peripheral electrode line 3 is configured such that the region to which the metal electrode terminal 8 is connected is the inner silicide region 7BY, and the region other than the region to which the metal electrode terminal 8 is connected is the inner doped silicon region 7BX. In the outer peripheral electrode line 4, the region to which the metal electrode terminal 8 is connected is the outer silicide region 7CY, and the region other than the region to which the metal electrode terminal 8 is connected is the outer doped silicon region 7CX. However, the present invention is not limited to this (see FIGS. 2 and 3).

  For example, the inner peripheral electrode line 3 is an inner silicide region provided over the entire length or an inner doped silicon region provided over the entire length, and the outer peripheral electrode line 4 is formed over the outer silicide region provided over the entire length or the entire length. The provided outer doped silicon region may be used. It should be noted that the inner electrode line 3 and the outer electrode line 4 are doped with a doped silicon region and a silicide depending on the line resistance necessary in consideration of the amount of heat generation necessary for resonance wavelength control and the band limitation to a high-frequency modulated electric signal. Any one of the regions may be used. For example, the line resistance can be reduced by using a silicide region as compared with the case of using a doped silicon region. As will be described later, the line resistance can be further reduced by providing a metal layer or metal electrode on the silicide region. In addition, the necessary line resistance may be obtained depending on the doping amount, thickness, width, doping material, metal material used for silicidation, or the length or width of the region where the metal layer or metal electrode is provided. good.

  For example, as shown in FIG. 9, the inner peripheral electrode line 3 is assumed to be an inner silicide region 7D provided over the entire length, and an inner metal layer 13X provided over the entire length on the inner silicide region 7D. The outer peripheral electrode line 4 may be an outer silicide region 7E provided over the entire length, and an outer metal layer 13Y provided over the entire length on the outer silicide region 7E. This is referred to as a first modification.

  That is, the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are connected to the silicide regions 7BY and 7CY or the doped silicon regions 7BX and 7CX provided in the slab portion 7B of the silicon layer 7 having the rib portion 7A constituting the ring waveguide core 1A. Instead, the silicide regions 7D and 7E provided via the slab portion 7B of the silicon layer 7 having the rib portions 7A constituting the ring waveguide core 1A, and the metal in contact with the silicide regions 7D and 7E The layers 13X and 13Y may be provided.

By configuring in this way, the line resistance of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 can be greatly reduced.
Specifically, as shown in FIG. 9, the region where the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are provided is the same as the rib portion 7A constituting the ring waveguide core 1A without etching the silicon layer 7. Thickness (for example, about 250 nm) and silicided to form, for example, thick NiSi layers 7D, 7E (silicide layer), and further, on top of that, AlNi having the same width as the thick NiSi layers 7D, 7E, for example, 500 nm in thickness Layers 13X and 13Y (wiring layer; electrode layer; metal layer) may be formed. Here, the Al layer is used, but the present invention is not limited to this. For example, a metal material (such as tungsten or copper) that can be used as wiring may be used. In this case, the slab portions 7B and 7C of the silicon layer 7 are only the channel portions 12 (12X and 12Y). Here, the inner channel portion 12X is a p-type doping region (p ⁺ -type doping region; p ⁺ -Si region) in which the slab portion 7B of the silicon layer 7 is heavily doped with p-type impurities. The outer channel portion 12Y is an n-type doping region (n ⁺ -type doping region; n ⁺ -Si region) in which the slab portion 7C of the silicon layer 7 is heavily doped with n-type impurities. As in the above-described embodiment, the inner channel portion 12X is a p-type doping region (p ⁻ type doping region; p ⁻ −Si region) in which the slab portion 7B of the silicon layer 7 is doped with p-type impurities at a low concentration. The outer channel portion 12Y may be an n-type doping region (n ⁻ type doping region; n ⁻ −Si region) in which the slab portion 7C of the silicon layer 7 is doped with an n-type impurity at a low concentration. The slab portions 7B and 7C of the silicon layer 7 are also referred to as silicon (Si) slab layers. Thus, by inserting the low resistance Al layers 13X and 13Y in parallel with the NiSi layers 7D and 7E, the line resistance of the inner electrode line 3 and the outer electrode line 4 can be greatly reduced. Become. That is, the line resistance per unit rotation angle can be greatly reduced.

For example, when the inner peripheral electrode line 3 (NiSi layer + Al layer; width about 2000 nm) and the outer peripheral electrode waveguide 4 (NiSi layer + Al layer; width about 3000 nm) are formed on the ring waveguide core 1A having a radius of about 8 μm. R = Rin = Rout = 0.003 [Ω / deg] is obtained. This is a value that can reduce the line resistance between both ends to 1Ω or less even when the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are formed over a rotation angle of 270 °. Thereby, efficient wavelength control can be enabled while relaxing the band limitation to the high frequency signal due to the resistance of the inner peripheral electrode line 3 and the outer peripheral electrode line 4. In addition, in the first modification, the periphery of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is surrounded by a SiO ₂ film having a high thermal resistance, and the dissipation of heater heat generation to the periphery is suppressed, The cross-sectional areas of the metal layers 13X and 13Y can be set relatively small. For this reason, since it is easy to suppress thermal diffusion in the circumferential direction through the metal electrode, it is possible to obtain relatively high wavelength control efficiency.

  Further, for example, as shown in FIG. 10, the inner peripheral electrode line 3 is an inner silicide region 7D provided over the entire length, and the outer peripheral electrode line 4 is an outer silicide region 7E provided over the entire length. An inner metal electrode 14X and an outer metal electrode 14Y provided over the entire length are provided on the electrode line 3 and the outer electrode line 4, respectively, and the modulation driving circuit 5 and the heater driving circuit 6 are provided with the inner metal electrode 14X and the outer metal. It is good also as what is connected to each both ends of electrode 14Y. This is referred to as a second modification.

  That is, instead of providing the metal connection terminals 83X, 83Y, 84X, and 84Y at both ends 3X, 3Y, 4X, and 4Y of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, the inner peripheral electrode line 3 and the outer peripheral electrode On the line 4, an inner peripheral metal electrode 14 </ b> X and an outer peripheral metal electrode 14 </ b> Y provided over the entire length may be provided. In this case, the metal electrodes 14X and 14Y are provided on the entire upper surfaces of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, respectively.

Specifically, as shown in FIG. 10, the region where the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are provided is the same as the rib portion 7A constituting the ring waveguide core 1A without etching the silicon layer 7. Thickness (for example, about 250 nm) is silicided to form, for example, thick NiSi layers 7D and 7E (silicide layers), and metal electrodes 14X and 14Y made of, for example, Al, Cu or the like may be formed thereon. Then, an extraction wiring (extraction electrode; made of a metal such as Al or Cu) connected to a pad for connecting the modulation driving circuit 5 and the heater driving circuit 6 may be connected to both ends of the metal electrodes 14X and 14Y. . In this case, the slab portions 7B and 7C of the silicon layer 7 are only the channel portions 12 (12X and 12Y). Here, the inner channel portion 12X is a p-type doping region (p ⁻ type doping region; p ⁻ −Si region) in which the slab portion 7B of the silicon layer 7 is doped with a p-type impurity at a low concentration, and the outer channel portion 12Y is The slab portion 7C of the silicon layer 7 may be an n-type doping region (n ⁻ -type doping region; n ⁻ -Si region) in which an n-type impurity is lightly doped. As in the first modification described above, the inner channel portion 12X includes a p-type doping region (p ⁺ -type doping region; p ⁺ -Si region) in which the slab portion 7B of the silicon layer 7 is heavily doped with p-type impurities. The outer channel portion 12Y may be an n-type doping region (n ⁺ -type doping region; n ⁺ -Si region) in which the slab portion 7C of the silicon layer 7 is heavily doped with n-type impurities. The slab portions 7B and 7C on both sides of the rib portion 7A need only have such a width that the signal light propagating through the ring waveguide core 1A does not reach the NiSi layers 7D and 7E, for example, about 250 nm. . Since the NiSi layers 7D and 7E are layers for contact with the metal electrodes 14X and 14Y, they are also referred to as NiSi contact layers.

Thus, by providing the metal electrodes 14X and 14Y over the entire length of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, the line resistance of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is lowered, and the RC time constant of the modulation electrode Is suitable for high-speed operation of the ring optical modulator. On the other hand, in the structure in which the metal connection terminals 83X, 83Y, 84X, and 84Y are provided at both end portions 3X, 3Y, 4X, and 4Y of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 as in the above-described embodiment, With the exception of the metal connection terminals 83X, 83Y, 84X, and 84Y, the inner electrode line 3 and the outer electrode line 4 are not connected to the metal electrode having a small thermal resistance, and the periphery of the inner electrode line 3 and the outer electrode line 4 The whole is covered with SiO ₂ having a low thermal conductivity. For this reason, Joule heat generated in the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is difficult to transfer to the surroundings, and it is possible to efficiently heat the ring waveguide core 1A with a small heater current and raise the temperature. .

  In the above-described embodiment, the positive modulation electric signal (+ Vs⇔0) is supplied to the one end 4X of the outer peripheral electrode line 4, and the negative modulation electric signal (−Vs⇔0) to the other end 3Y of the inner peripheral electrode line 3. ), A positive heater voltage (+ Vh) is applied to the other end 4Y of the outer peripheral electrode line 4, and a negative heater voltage (−Vh) is applied to the one end 3X of the inner peripheral electrode line 3. However, the present invention is not limited to this.

  For example, as shown in FIG. 11, a positive modulated electric signal (modulated voltage here) is supplied to one end 4X of the outer peripheral electrode line 4 and a positive heater voltage is applied (+ Vs + Vh⇔ + Vh). Is connected to one end 3X of the inner peripheral electrode line 3, and a negative modulation electric signal (here, modulation voltage) is connected to the other end 3Y of the inner peripheral electrode line 3. A negative heater voltage may be applied (−Vs−Vh⇔−Vh) while being supplied. That is, the modulation drive circuit 5 and the heater drive circuit 6 supply a positive modulation electric signal to the one end 4X of the outer peripheral electrode line 4 and apply a positive heater voltage, and a negative voltage is applied to the other end 3Y of the inner peripheral electrode line 3. The terminal resistor 15 may be connected to the other end 4Y of the outer peripheral electrode line 4 and the other end 3X of the inner peripheral electrode line 3 by supplying a modulated electric signal and applying a negative heater voltage. This is referred to as a third modification.

  The modulation driving circuit 5 and the heater driving circuit 6 are not limited to this, and supply a positive modulation electric signal to one of the first end portions of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 and are positive. A heater voltage is applied, a negative modulated electric signal is applied to the other second end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 on the opposite side of the first end, and a negative heater voltage is applied, The third end opposite to the first end of one of the peripheral electrode line 3 and the outer peripheral electrode line 4 and the fourth end opposite to the other second end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 It is sufficient to connect the terminating resistor 15 to each.

As described above, the modulated electric signal and the heater voltage (wavelength control voltage) may be applied to the same end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and the termination resistor 15 may be provided at the opposite end.
Specifically, as shown in FIG. 11, for example, differential modulation waveforms (+ Vs⇔0) from the modulation drive circuit 5 are applied to the end portions 4X and 3Y on the opposite sides of the inner peripheral electrode line 3 and the outer peripheral electrode line 4. , −Vs⇔0) and differential heater voltages (+ Vh, −Vh) from the heater drive circuit 6 may be combined by the bias tee 16 and applied. However, the present invention is not limited to this, and the modulation electric signal and the heater voltage may be supplied from the modulation driving circuit 5 and the heater driving circuit 6. As a result, a potential of + Vs + Vh⇔ + Vh is applied to one end 4X of the outer peripheral electrode line 4, and −Vs−Vh⇔−Vh is applied to the other end 3Y of the inner peripheral electrode line 3. On the other hand, the other end 4Y of the outer peripheral electrode line 4 and one end 3X of the inner peripheral electrode line 3 may be connected to the GND potential via the termination resistor 15 and terminated.

Here, the heater voltage (wavelength control voltage) Vh was changed to calculate the ON state potential and the OFF state potential of each pn junction C1-C5. As shown in FIG. The potential difference in the ON state and the potential difference in the OFF state of the junction C1-C5 were Von and Voff, respectively. Here, the potential difference Von in the ON state of each pn junction C1-C5 is obtained when + Vs + Vh and -Vs-Vh are given to one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3, respectively. This is a potential difference applied to each pn junction C1-C5. Further, the potential difference Voff in the OFF state of each pn junction C1-C5 is the pn junction when + Vh and -Vh are applied to one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3, respectively. This is a potential difference applied to the part C1-C5. The ON-OFF potential differences Vc1 to Vc5 applied to the pn junctions C1 to C5 are all the same value and the amplitude of Vs is given regardless of the value of Vh. This is a calculation result when the terminal resistor 15 is not inserted (R = 0Ω). In FIG. 12A, Von <Voff indicates that a reverse bias voltage is applied to each pn junction C1-C5. In FIG. 12A, −Vs / 2 is a heater voltage Vh that gives the minimum average heat generation amount _{Ph (ave)} as shown in FIG.

Also in this case, since the drive voltage is applied to the inner peripheral electrode line 3 and the outer peripheral electrode line 4 from opposite ends 4X and 3Y, the entire region in the circumferential direction of the pn junction 7AZ provided in the ring waveguide core 1A A constant voltage amplitude of Vs is given over the entire range, a uniform refractive index change can be realized over the entire circumference, and good modulation characteristics can be obtained.
In addition, a heater current flows in the circumferential direction in the inner circumferential electrode line 3 and the outer circumferential electrode line 4 in accordance with the heater voltage Vh. Then, Joule heat is generated in each line resistance R of the inner peripheral electrode line 3 and the outer peripheral electrode line 4. That is, uniform Joule heat is generated by the line resistance Rin of the inner peripheral electrode line 3, and Joule heat is generated by the line resistance Rout of the outer peripheral electrode line 4. Thereby, the temperature of the entire circumferential direction of the ring waveguide core 1A can be uniformly controlled.

Here, Joule heat generated in each line resistance R of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is turned on (+ Vs + Vh to the one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3, respectively. , −Vs−Vh) and OFF state (state in which + Vh and −Vh are applied to one end 4X of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3 respectively). The quantity _{Ph (ave)} is 1 / 32R * ((Vh−Vs) ² + Vh ² ). As shown in FIG. 12B, this average heat generation amount _{Ph (ave)} becomes the minimum value Vs ² / 64R when Vh = −Vs / 2, and the heat generation amount increases as Vh increases. Here, Vs is about 1.0V.

Therefore, if the heater voltage Vh is controlled in the range of −Vs / 2 <Vh <∞, the uniform heat generation can be continuously adjusted to an arbitrary value over the entire circumference of the ring waveguide core 1A, and the ring light modulation is performed. It is possible to arbitrarily control the resonance peak wavelength of the device.
However, in the case of the configuration of the third modified example, as shown in FIG. 12A, when the voltage applied to each pn junction C1-C5 is viewed, the modulation signal is OFF under the minimum heat generation condition Vh = −Vs / 2. As a potential difference Voff at the time, + Vs / 2 is given. Here, when Vs = 1.0V, a forward voltage of 1.0 / 2 = 0.5V is applied to each pn junction C1-C5, and approaches the built-in voltage of the pn junction. As a result, free carriers are injected into the pn junction 7AZ formed in the silicon layer 7 and the modulation speed may be limited. In general, the response speed of the refractive index change generated at the pn junction 7AZ formed in the silicon layer 7 is higher in the carrier extraction operation by applying the reverse voltage than in the carrier injection operation by applying the forward voltage. . Thus, there is a region where the pn junction 7AZ is operated with a forward bias near the lower limit of the heater driving condition, and there is a possibility that the modulation characteristic is deteriorated. Considering such points, it is preferable to configure as in the above-described embodiment.

  In the case of the configuration of the third modification, in order to reliably apply the modulated electric signal to the pn junction 7AZ, the drive circuits 5 and 6 of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are not connected. A terminal resistor 15 having a somewhat high resistance value is provided at the end. If the impedance of the termination resistor 15 is high (for example, R >> 50Ω), the high-frequency signal that is a modulated electric signal does not propagate to the termination resistor 15 side, but is efficiently applied to the pn junction 7AZ. However, since the heater current flowing along the inner peripheral electrode line 3 and the outer peripheral electrode line 4 also flows in the termination resistor 15, a great amount of power is consumed when the heater current flows through the termination resistor 15. There is also a risk of degrading efficiency. Considering such points, it is preferable to configure as in the above-described embodiment.

In addition, although this 3rd modification is demonstrated as a modification of the above-mentioned embodiment here, the structure of this 3rd modification is applied to the thing of the above-mentioned 1st modification or a 2nd modification. It is also possible to do.
For example, as shown in FIG. 13, a positive modulation electric signal (+ VsＶ0) is supplied to one end 4X of the outer peripheral electrode line 4, and a negative modulation electric signal (−Vs) is supplied to one end 3X of the inner peripheral electrode line 3. ⇔0) is supplied, a positive heater voltage (+ Vh) is applied to the other end 4Y of the outer peripheral electrode line 4, and a negative heater voltage (−Vh) is applied to the other end 3Y of the inner peripheral electrode line 3. Anyway. That is, the modulation drive circuit 5 supplies a positive modulated electric signal to one end 4X of the outer peripheral electrode line 4, and a negative modulated electric signal to one end 3X of the inner peripheral electrode line 3 on the same side as the one end 4X of the outer peripheral electrode line 4. The heater drive circuit 6 may apply a positive heater voltage to the other end 4Y of the outer peripheral electrode line 4 and apply a negative heater voltage to the other end 3Y of the inner peripheral electrode line 3. This is referred to as a fourth modification.

  However, the present invention is not limited to this, and the modulation drive circuit 5 supplies a positive modulation electric signal to one first end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and is on the same side as the first end. A negative modulation electric signal is supplied to the other second end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and the heater drive circuit 6 has one first end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4. A positive heater voltage is applied to the third end on the opposite side of the part, and a negative heater voltage is applied to the fourth end on the opposite side of the other second end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 You should do it.

In this way, the modulated electric signal is applied to the end portions 4X and 3X on the same side of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and the heater voltage (wavelength control voltage) is applied to the opposite end portions 4Y and 3Y. You may do it.
By the way, the heater voltage applied to each pn junction C1-C5 acts as a bias voltage applied to each pn junction C1-C5 during modulation. Further, the heater voltage applied to the ends of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 drops due to the resistance of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 before reaching the pn junctions C1-C5. Occurs. And when the heater voltage is applied to the end portions on the same side of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 as in the configuration of the fourth modified example, it depends on the resistance of the inner peripheral electrode line 3 and the outer peripheral electrode line 4. Since the voltage drop is not canceled out by the inner peripheral electrode line 3 and the outer peripheral electrode line 4, the heater voltage applied to each pn junction C1-C5 is distributed.

  FIG. 14 shows the relationship between the bias voltage applied to each pn junction C1-C5, that is, the potential difference Voff in the OFF state of each pn junction C1-C5, and the heater voltage (wavelength control voltage) Vh. Yes. Here, the potential difference Voff in the OFF state of each of the pn junctions C1 to C5 is obtained when + Vh and −Vh are applied to the other end 4Y of the outer peripheral electrode line 4 and the other end 3Y of the inner peripheral electrode line 3, respectively. This is a potential difference applied to the pn junction C1-C5.

  As shown in FIG. 14, the pn junction C5 closest to the side where the modulated electric signal is supplied to the inner peripheral electrode line 3 and the outer peripheral electrode line 4, that is, the heater voltage of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is A bias voltage is not always applied to the pn junction C5 farthest from the applied side. On the other hand, the pn junction C1 farthest from the side to which the modulated electric signals of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are supplied, that is, the side to which the heater voltage of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 is applied. A large bias voltage is applied to the pn junction C1 closest to the value of the heater voltage Vh.

  As described above, when the heater voltage is applied to the end portions on the same side of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 as in the configuration of the fourth modified example, the bias voltage is set at each pn junction C1-C5. Unevenness occurs, and uniform modulation efficiency and operation speed cannot be obtained over the entire circumference of the ring waveguide core 1A, which may deteriorate the performance of the ring optical modulator. Considering such points, it is preferable to configure as in the above-described embodiment. That is, in the configuration of the above-described embodiment, the bias voltages (corresponding to Voff in FIG. 6A) applied to the pn junctions C1 to C5 are all the same, and are uniform over the entire circumference of the ring waveguide core 1A. Modulation efficiency and operation speed (operation characteristics) are obtained, which is preferable.

In addition, although this 4th modification is demonstrated as a modification of the above-mentioned embodiment here, the structure of this 4th modification is applied to the thing of the above-mentioned 1st modification or a 2nd modification. It is also possible to do.
Further, for example, as shown in FIG. 15, a positive modulation electric signal (+ Vs） 0) is supplied to one end 4X of the outer peripheral electrode line 4, the other end 3Y of the inner peripheral electrode line 3 is grounded, and the outer peripheral electrode line 4 A positive heater voltage (+ Vh) may be applied to the other end 4 </ b> Y, and a negative heater voltage (−Vh) may be applied to the one end 3 </ b> X of the inner peripheral electrode line 3. That is, the modulation drive circuit 5 supplies a positive modulation electric signal to the one end 4X of the outer peripheral electrode line 4, grounds the other end 3Y of the inner peripheral electrode line 3 opposite to the one end 4X of the outer peripheral electrode line 4, and the heater The drive circuit 6 may apply a positive heater voltage to the other end 4 </ b> Y of the outer peripheral electrode line 4 and apply a negative heater voltage to the one end 3 </ b> X of the inner peripheral electrode line 3. This is referred to as a fifth modification.

  However, the present invention is not limited to this, and the modulation driving circuit 5 supplies a positive modulation electric signal to one of the first end portions of the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and is opposite to the first end portion. The other second ends of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 are grounded, and the heater drive circuit 6 is connected to the second end of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 on the opposite side of the other second end. A negative heater voltage may be applied to the three end portions, and a positive heater voltage may be applied to the fourth end portion on the opposite side of the first end portion of the inner peripheral electrode line 3 and the outer peripheral electrode line 4. .

As described above, a single drive configuration in which a modulated electric signal is applied to one of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 and the other is grounded may be employed.
Even in this case, each pn junction C1-C5 can be operated with a uniform bias voltage in the reverse bias region. Moreover, uniform heat generation is obtained in the inner peripheral electrode line 3 and the outer peripheral electrode line 4, and wavelength controllability equivalent to that in the above-described embodiment is obtained.

  However, in the case of single drive, particularly when the resistance Rout of the outer peripheral electrode line 4 and the junction capacitance of each pn junction C1-C5 are large, the attenuation of the modulated electric signal in the process of propagating through the outer peripheral electrode line 4 becomes large. . Accordingly, there is a possibility that a sufficiently large drive voltage amplitude is not applied to the pn junction at the pn junction C1 farthest from the end of the outer peripheral electrode line 4 on the side where the modulated electric signal is input. For this reason, a uniform modulation operation does not occur over the entire circumference of the ring waveguide core 1A, and the operation efficiency of the ring optical modulator may be deteriorated. Considering such points, it is preferable to configure as in the above-described embodiment. That is, in the configuration of the above-described embodiment, even when the modulation signal is attenuated by each line resistance or junction capacitance by using the differential signal, the modulation is uniform over the entire circumference of the ring waveguide core 1A. Since a voltage is applied, an efficient modulation operation that effectively utilizes the entire circumference of the ring waveguide core 1A becomes possible, which is preferable.

In addition, although this 5th modification is demonstrated as a modification of the above-mentioned embodiment here, the structure of this 5th modification is applied to the thing of the above-mentioned 1st modification or a 2nd modification. It is also possible to do.
[Second Embodiment]
First, a ring optical modulator according to the second embodiment will be described with reference to FIGS.

The ring optical modulator according to the present embodiment is different from that of the first embodiment described above in that a monitor waveguide 20 is provided, and the inner peripheral electrode line 3 and the outer peripheral electrode as shown in FIG. The difference is that each of the lines 4 is divided into a plurality (two in this case).
That is, the ring light modulator may not include the monitor waveguide as in the first embodiment described above, or may include the monitor waveguide 20 as in the present embodiment. In the ring light modulator, each of the inner peripheral electrode line 3 and the outer peripheral electrode line 4 may be a single electrode line as in the first embodiment, or the inner peripheral electrode as in the present embodiment. The line 3 and the outer peripheral electrode line 4 may be a plurality of electrode lines 30A, 30B, 40A, and 40B (segments).

  In the present embodiment, the monitor waveguide 20 is optically connected to the ring waveguide 1. Here, apart from the bus waveguide 2, the monitor waveguide 20 is provided in the vicinity of the ring waveguide 1 on the opposite side of the bus waveguide 2 across the ring waveguide 1. The monitor waveguide 20 is for extracting light having a wavelength component resonated by a ring optical resonator constituting the ring optical modulator. Here, the light coupled to the monitor waveguide 20 (monitor light) has a spectral shape in which the optical response in the bus waveguide 2 (see, for example, FIG. 4) is inverted and the transmittance near the resonance peak wavelength increases in a peak shape. Show. By detecting this monitor light intensity, it is possible to grasp the relationship between the signal light wavelength and the resonance peak wavelength at another port independent of the port from which the modulated signal light is output.

  Further, in the present embodiment, the inner and outer circumferences of the ring waveguide core 1A are arranged in a region (the left and right regions in FIG. 16) where the bus waveguide 2 and the monitor waveguide 20 around the ring waveguide 1 are not close to each other. Are provided independently with two inner peripheral electrode lines 30A and 30B and two outer peripheral electrode lines 40A and 40B. That is, as the inner circumference electrode line 3 and the outer circumference electrode line 4, the first inner circumference electrode line 30A and the first outer circumference electrode line 40A provided along the inner circumference and the outer circumference of the first region of the ring waveguide core 1A, respectively. And a second inner peripheral electrode line 30B and a second outer peripheral electrode line 40B provided along each of the inner periphery and the outer periphery of the second region of the ring waveguide core 1A.

  Here, the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A are provided over the same central angle (the same ring central angle). Further, the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B are provided over the same central angle. Further, the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A, and the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B are opposed to each other across the ring center of the ring waveguide core 1A. Is provided. However, the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A, and the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B may have different central angles and lengths. As in the case of the first embodiment described above, the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A have a uniform resistance over their entire length, that is, per unit rotation angle. It is preferable that the resistance is uniform, and the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A have the same resistance, that is, the resistance per unit rotation angle is the same. Is more preferable. Similarly, it is preferable that the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B have uniform resistance over the entire length, that is, the resistance per unit rotation angle is uniform, More preferably, the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B have the same resistance, that is, the same resistance per unit rotation angle.

Here, in the present embodiment, as shown in FIGS. 17 and 18, the first and second inner peripheral electrode lines 30A and 30B are inner silicide regions (for example, NiSi) 7BY provided over the entire length, The second outer peripheral electrode lines 40A and 40B are outer silicide regions (for example, NiSi) 7CY provided over the entire length. Thereby, the resistance per unit rotation angle can be reduced as compared with the case where the doped silicon region is used. For example, NiSi ^{layer, p} + Si ^layer, as compared with the ⁿ + Si layer, since it has a high electrical conductivity, by using NiSi layer 7BY, the ^{7CY, p} + Si ^{layer, n} + Si layer The resistance per unit rotation angle can be reduced as compared with the case of using. Specifically, for the ring waveguide core 1A having a radius of about 8 μm, the first and second inner peripheral electrode lines 30A and 30B (NiSi layers; thickness of about 50 nm; width of about 2000 nm), and first and first When two outer peripheral electrode lines 40A and 40B (NiSi layer; thickness of about 50 nm; width of about 3000 nm) are formed, R = Rin = Rout = 0.34 [Ω / deg] is obtained.

  Here, the first and second inner peripheral electrode lines 30A, 30B are the inner silicide regions 7BY provided over the entire length, and the first and second outer peripheral electrode lines 40A, 40B are the outer silicide provided over the entire length. Although the case where the region 7CY is set is described as an example, the present invention is not limited to this. For example, as in the case of the first embodiment described above, the region where the metal electrode terminal 8 is connected is the inner silicide region and the metal electrode terminal 8 is connected to the first and second inner peripheral electrode lines 30A and 30B. It is assumed that the region other than the region to be formed is the inner doped silicon region, the second and second outer peripheral electrode lines 40A and 40B are the regions where the metal electrode terminal 8 is connected are the outer silicide regions, and the metal electrode terminal 8 is The region other than the region to be connected may be an outer doped silicon region. Further, as in the above-described modification of the first embodiment, the first and second inner peripheral electrode lines 30A and 30B are formed as inner silicide regions provided over the entire length or inner doped silicon regions provided over the entire length. The first and second outer peripheral electrode lines 40A and 40B may be an outer silicide region provided over the entire length, or an outer doped silicon region provided over the entire length.

  In the present embodiment, as in the case of the first embodiment described above, metal electrode terminals are provided on both end portions 30AX, 30AY, 40AX, and 40AY of the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A. 8 (830AX, 830AY, 840AX, 840AY) are connected to the modulation drive circuit 5 and the heater drive circuit 6 as external drive circuits. Then, the modulation drive circuit 5 supplies a positive modulation electric signal to one end 40AX of the first outer peripheral electrode line 40A, and the other end of the first inner peripheral electrode line 30A on the opposite side of the one end 40AX of the first outer peripheral electrode line 40A. A negative modulation electric signal is supplied to 30AY. The heater drive circuit 6 applies a positive heater voltage to the other end 40AY of the first outer peripheral electrode line 40A, and applies a negative heater voltage to the one end 30AX of the first inner peripheral electrode line 30A. . Thereby, a modulated electric signal is supplied to the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A, and a heater current is caused to flow along the circumferential direction.

  However, the present invention is not limited to this, and the modulation driving circuit 5 supplies a positive modulation electric signal to the first end of one of the first inner peripheral electrode line 30A and the first outer electrode line 40A, and the first end A negative modulation electric signal is supplied to the other second end portion of the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A on the opposite side of the portion, and the heater drive circuit 6 includes the first inner peripheral electrode line 30A and the first inner peripheral electrode line 30A A positive heater voltage is applied to the third end opposite to the first end of one of the first outer peripheral electrode lines 40A, and the other second end of the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A. What is necessary is just to make it apply a negative heater voltage to the 4th edge part on the opposite side of a part.

  Similarly, as in the case of the first embodiment described above, the metal electrode terminal 8 (830BX, 830BX,) is provided on both end portions 30BX, 30BY, 40BX, 40BY of the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B. 830BY, 840BX, and 840BY) are connected to the modulation drive circuit 5 and the heater drive circuit 6 as external drive circuits. Then, the modulation drive circuit 5 supplies a positive modulation electrical signal to one end 40BX of the second outer peripheral electrode line 40B, and the other end of the second inner peripheral electrode line 30B on the opposite side of the one end 40BX of the second outer peripheral electrode line 40B. A negative modulation electric signal is supplied to 30BY. The heater drive circuit 6 applies a positive heater voltage to the other end 40BY of the second outer peripheral electrode line 40B, and applies a negative heater voltage to the one end 30BX of the second inner peripheral electrode line 30B. . Thus, a modulated electric signal is supplied to the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B, and a heater current is caused to flow along the circumferential direction.

  However, the present invention is not limited to this, and the modulation drive circuit 5 supplies a positive modulation electrical signal to one first end of the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B, and the first end A negative modulation electrical signal is supplied to the other second end of the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B on the opposite side of the part, and the heater drive circuit 6 includes the second inner peripheral electrode line 30B and the second inner peripheral electrode line 30B. A positive heater voltage is applied to the third end opposite to the first end of one of the second outer peripheral electrode lines 40B, and the other second end of the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B. What is necessary is just to make it apply a negative heater voltage to the 4th edge part on the opposite side of a part.

  In this case, a separate modulation drive circuit 5 and a separate heater are respectively provided for the first inner peripheral electrode line 30A and the first outer peripheral electrode line 40A, and the second inner peripheral electrode line 30B and the second outer peripheral electrode line 40B. The drive circuit 6 may be connected, or the first inner peripheral electrode line 30A and the second inner peripheral electrode line 30B, the first outer peripheral electrode line 40A and the second outer peripheral electrode line 40B are treated as one piece, respectively, Similarly to the first embodiment, the modulation driving circuit 5 and the heater driving circuit 6 may be connected. Here, when each of the first inner peripheral electrode line 30A and the second inner peripheral electrode line 30B, and the first outer peripheral electrode line 40A and the second outer peripheral electrode line 40B are handled as one body, one of the first inner peripheral electrode lines 30A. The end portion and one end portion of the second inner peripheral electrode line 30B are connected to a low resistance by a surface wiring made of metal such as Al or Cu, for example, and one end portion of the first outer peripheral electrode line 40A and the second end portion are connected to the second end electrode line 30B. One end of the outer peripheral electrode line 40B is connected to a low resistance by a surface wiring made of metal such as Al, Cu, for example, the other end of the first and second inner peripheral electrode lines 30A, 30B, and Similar to the first embodiment, a modulation driving circuit 5 (for example, an RF modulation driver) and a heater driving circuit 6 (for example, a DC current driver) are provided at the other ends of the first and second outer peripheral electrode lines 40A and 40B. Just connect.

Other details are the same as those in the first embodiment.
Therefore, according to the ring optical modulator according to the present embodiment, the n-type or p-type doped silicon layer or the metal compound silicide layer is used as a heater, as in the first embodiment. When used, there is an advantage that the wavelength control efficiency of the resonance wavelength can be improved without lowering the modulation efficiency.

In addition, in this embodiment, although demonstrated as a modification of the above-mentioned 1st Embodiment, it is not restricted to this, For example, the 1st modification of the above-mentioned 1st Embodiment-a 5th modification Can also be applied to the present embodiment.
[Others]
In addition, this invention is not limited to the structure described in each embodiment and each modification mentioned above, A various deformation | transformation is possible in the range which does not deviate from the meaning of this invention.

Hereinafter, additional notes will be disclosed regarding the above-described embodiments and modifications.
(Appendix 1)
A ring waveguide including a ring waveguide core that is a rib portion of the silicon layer and has a p-type doping region and an n-type doping region;
A bus waveguide optically connected to the ring waveguide;
Provided along the inner periphery of the ring waveguide core, including an inner doped silicon region or an inner silicide region provided in an inner slab portion with respect to the rib portion of the silicon layer, and functions as a modulation electrode and a heater line An inner circumference electrode line,
An outer doped silicon region or an outer silicide region provided along an outer periphery of the ring waveguide core and provided in an outer slab portion with respect to the rib portion of the silicon layer, and functions as a modulation electrode and a heater line A peripheral electrode line;
A modulation drive circuit for supplying a modulated electrical signal;
A heater drive circuit for supplying a heater current for controlling the resonance wavelength,
The modulation driving circuit and the heater driving circuit are connected to the inner peripheral electrode line and the outer peripheral electrode line, and supply a modulated electric signal to the inner peripheral electrode line and the outer peripheral electrode line and along the circumferential direction. A ring light modulator characterized by flowing a heater current.

(Appendix 2)
Metal electrode terminals connected to both ends of each of the inner peripheral electrode line and the outer peripheral electrode line,
The ring light modulator according to appendix 1, wherein the modulation driving circuit and the heater driving circuit are connected to the inner peripheral electrode line and the outer peripheral electrode line via the metal electrode terminal.

(Appendix 3)
In the inner peripheral electrode line, a region to which the metal electrode terminal is connected is the inner silicide region, and a region other than a region to which the metal electrode terminal is connected is the inner doped silicon region,
In the outer peripheral electrode line, the region to which the metal electrode terminal is connected is the outer silicide region, and the region other than the region to which the metal electrode terminal is connected is the outer doped silicon region. The ring optical modulator according to 2.

(Appendix 4)
The inner peripheral electrode line is the inner silicide region provided over the entire length, and the inner metal layer provided over the entire length on the inner silicide region,
3. The ring light modulator according to appendix 2, wherein the outer peripheral electrode line is the outer silicide region provided over the entire length and the outer metal layer provided over the entire length on the outer silicide region.

(Appendix 5)
The inner peripheral electrode line is the inner silicide region provided over the entire length,
The outer peripheral electrode line is the outer silicide region provided over the entire length,
On the inner peripheral electrode line and the outer peripheral electrode line, respectively, an inner peripheral metal electrode and an outer peripheral metal electrode provided over the entire length,
The ring light modulator according to appendix 1, wherein the modulation driving circuit and the heater driving circuit are connected to both ends of the inner peripheral metal electrode and the outer peripheral metal electrode, respectively.

(Appendix 6)
The inner electrode line and the outer electrode line are provided over the same central angle,
The ring optical modulator according to any one of appendices 1 to 5, wherein the inner peripheral electrode line and the outer peripheral electrode line each have a uniform resistance over the entire length thereof.
(Appendix 7)
The ring optical modulator according to appendix 6, wherein the inner electrode line and the outer electrode line have the same resistance.

(Appendix 8)
The modulation driving circuit supplies a positive modulation electric signal to a first end of one of the inner peripheral electrode line and the outer peripheral electrode line, and the inner peripheral electrode line and the outer periphery on the opposite side of the first end. Supplying a negative modulated electrical signal to the other second end of the electrode line;
The heater driving circuit applies a positive heater voltage to a third end opposite to the first end of one of the inner peripheral electrode line and the outer peripheral electrode line, and the inner peripheral electrode line and the outer peripheral electrode The ring light modulator according to any one of appendices 1 to 7, wherein a negative heater voltage is applied to a fourth end portion on the opposite side of the other second end portion of the line.

(Appendix 9)
The modulation driving circuit and the heater driving circuit supply a positive modulation electric signal to one first end portion of the inner peripheral electrode line and the outer peripheral electrode line and apply a positive heater voltage, and the first end Supplying a negative modulation electric signal to the other second end of the inner peripheral electrode line and the outer peripheral electrode line on the opposite side of the part, and applying a negative heater voltage,
A third end opposite to the first end of one of the inner peripheral electrode line and the outer peripheral electrode line, and a third end opposite to the second end of the other of the inner peripheral electrode line and the outer peripheral electrode line. 8. The ring optical modulator according to any one of appendices 1 to 7, wherein a termination resistor is connected to each of the four ends.

(Appendix 10)
The modulation driving circuit supplies a positive modulation electric signal to a first end portion of one of the inner peripheral electrode line and the outer peripheral electrode line, and the inner peripheral electrode line and the outer periphery on the same side as the first end portion. Supplying a negative modulated electrical signal to the other second end of the electrode line;
The heater driving circuit applies a positive heater voltage to a third end opposite to the first end of one of the inner peripheral electrode line and the outer peripheral electrode line, and the inner peripheral electrode line and the outer peripheral electrode The ring light modulator according to any one of appendices 1 to 7, wherein a negative heater voltage is applied to a fourth end portion on the opposite side of the other second end portion of the line.

(Appendix 11)
The modulation drive circuit supplies a positive modulation electrical signal to a first end of one of the inner peripheral electrode line and the outer peripheral electrode line,
The other second end of the inner electrode line and the outer electrode line opposite to the first end is grounded,
The heater driving circuit applies a negative heater voltage to a third end opposite to the second end of the other of the inner peripheral electrode line and the outer peripheral electrode line, and the inner peripheral electrode line and the outer peripheral electrode The ring light modulator according to any one of appendices 1 to 7, wherein a positive heater voltage is applied to a fourth end opposite to the first end of one of the lines.

(Appendix 12)
A monitor waveguide optically connected to the ring waveguide;
As the inner circumference electrode line and the outer circumference electrode line, a first inner circumference electrode line and a first outer circumference electrode line provided along the inner circumference and the outer circumference of the first region of the ring waveguide core, respectively, and the ring Any one of appendices 1-11, comprising a second inner peripheral electrode line and a second outer peripheral electrode line provided along the inner periphery and the outer periphery of the second region of the waveguide core, respectively. A ring light modulator according to claim 1.

DESCRIPTION OF SYMBOLS 1 Ring waveguide 1A Ring waveguide core 2 Bus waveguide 3 Inner electrode line 3X, 3Y End part of inner electrode line 4X, 4Y End part of outer electrode line 4 Outer electrode line 5 Modulation drive circuit 6 Heater drive circuit 7 Silicon layer (SOI layer)
7A Rib portion 7AX p-type doped region 7AY n-type doped region 7AZ pn junction portion 7B slab portion 7BX doped silicon region 7BY silicide region 7C slab portion 7CX doped silicon region 7CY silicide region 7D inner silicide region 7E outer silicide region 8, 83X, 83Y , 84X, 84Y Metal electrode terminal 9 Buried oxide film (BOX) layer 10 SiO ₂ film 11 SOI substrate 12 Channel portion 12X Inner channel portion 12Y Outer channel portion 13X Inner metal layer 13Y Outer metal layer 14X Inner metal electrode 14Y Outer metal electrode 15 Terminating resistor 16 Bias tee 20 Monitor waveguide 30A First inner electrode line 30AX, 30AY End part of first inner electrode line 30B Second inner electrode line 30BX, 30BY End part of second inner electrode line 4 0A First outer peripheral electrode line 40AX, 40AY End part of first outer peripheral electrode line 40B Second outer peripheral electrode line 40BX, 40BY End part of second outer peripheral electrode line 830AX, 830AY, 840AX, 840AY, 830BX, 830BY, 840BX, 840BY Metal Electrode terminal

Claims (11)

A ring waveguide including a ring waveguide core that is a rib portion of the silicon layer and has a p-type doping region and an n-type doping region;
A bus waveguide optically connected to the ring waveguide;
Provided along the inner periphery of the ring waveguide core, including an inner doped silicon region or an inner silicide region provided in an inner slab portion with respect to the rib portion of the silicon layer, and functions as a modulation electrode and a heater line An inner circumference electrode line,
An outer doped silicon region or an outer silicide region provided along an outer periphery of the ring waveguide core and provided in an outer slab portion with respect to the rib portion of the silicon layer, and functions as a modulation electrode and a heater line A peripheral electrode line;
A modulation drive circuit for supplying a modulated electrical signal;
A heater drive circuit for supplying a heater current for controlling the resonance wavelength,
The modulation driving circuit and the heater driving circuit are connected to the inner peripheral electrode line and the outer peripheral electrode line, and supply a modulated electric signal to the inner peripheral electrode line and the outer peripheral electrode line and along the circumferential direction. A ring light modulator characterized by flowing a heater current. Metal electrode terminals connected to both ends of each of the inner peripheral electrode line and the outer peripheral electrode line,
The ring light modulator according to claim 1, wherein the modulation driving circuit and the heater driving circuit are connected to the inner peripheral electrode line and the outer peripheral electrode line via the metal electrode terminal. . In the inner peripheral electrode line, a region to which the metal electrode terminal is connected is the inner silicide region, and a region other than a region to which the metal electrode terminal is connected is the inner doped silicon region,
The outer peripheral electrode line is characterized in that a region to which the metal electrode terminal is connected is the outer silicide region, and a region other than the region to which the metal electrode terminal is connected is the outer doped silicon region. Item 3. The ring optical modulator according to Item 2. The inner peripheral electrode line is the inner silicide region provided over the entire length, and the inner metal layer provided over the entire length on the inner silicide region,
The ring optical modulator according to claim 2, wherein the outer peripheral electrode line is the outer silicide region provided over the entire length, and the outer metal layer provided over the entire length on the outer silicide region. . The inner peripheral electrode line is the inner silicide region provided over the entire length,
The outer peripheral electrode line is the outer silicide region provided over the entire length,
On the inner peripheral electrode line and the outer peripheral electrode line, respectively, an inner peripheral metal electrode and an outer peripheral metal electrode provided over the entire length,
The ring light modulator according to claim 1, wherein the modulation driving circuit and the heater driving circuit are connected to both ends of the inner metal electrode and the outer metal electrode. The inner electrode line and the outer electrode line are provided over the same central angle,
6. The ring light modulator according to claim 1, wherein each of the inner electrode line and the outer electrode line has a uniform resistance over the entire length thereof.   The ring optical modulator according to claim 6, wherein the inner electrode line and the outer electrode line have the same resistance. The modulation driving circuit supplies a positive modulation electric signal to a first end of one of the inner peripheral electrode line and the outer peripheral electrode line, and the inner peripheral electrode line and the outer periphery on the opposite side of the first end. Supplying a negative modulated electrical signal to the other second end of the electrode line;
The heater driving circuit applies a positive heater voltage to a third end opposite to the first end of one of the inner peripheral electrode line and the outer peripheral electrode line, and the inner peripheral electrode line and the outer peripheral electrode The ring light modulator according to claim 1, wherein a negative heater voltage is applied to a fourth end portion opposite to the second end portion on the other side of the line. The modulation driving circuit and the heater driving circuit supply a positive modulation electric signal to one first end portion of the inner peripheral electrode line and the outer peripheral electrode line and apply a positive heater voltage, and the first end Supplying a negative modulation electric signal to the other second end of the inner peripheral electrode line and the outer peripheral electrode line on the opposite side of the part, and applying a negative heater voltage,
A third end opposite to the first end of one of the inner peripheral electrode line and the outer peripheral electrode line, and a third end opposite to the second end of the other of the inner peripheral electrode line and the outer peripheral electrode line. The ring optical modulator according to any one of claims 1 to 7, wherein a termination resistor is connected to each of the four ends. The modulation drive circuit supplies a positive modulation electrical signal to a first end of one of the inner peripheral electrode line and the outer peripheral electrode line,
The other second end of the inner electrode line and the outer electrode line opposite to the first end is grounded,
The heater driving circuit applies a negative heater voltage to a third end opposite to the second end of the other of the inner peripheral electrode line and the outer peripheral electrode line, and the inner peripheral electrode line and the outer peripheral electrode The ring light modulator according to claim 1, wherein a positive heater voltage is applied to a fourth end opposite to the first end of one of the lines. A monitor waveguide optically connected to the ring waveguide;
As the inner circumference electrode line and the outer circumference electrode line, a first inner circumference electrode line and a first outer circumference electrode line provided along the inner circumference and the outer circumference of the first region of the ring waveguide core, respectively, and the ring 11. The semiconductor device according to claim 1, further comprising a second inner peripheral electrode line and a second outer peripheral electrode line provided along the inner periphery and the outer periphery of the second region of the waveguide core. The ring optical modulator according to item.