JP2015032680A - p-TYPE ZnO-BASED SEMICONDUCTOR LAYER MANUFACTURING METHOD AND ZnO-BASED SEMICONDUCTOR ELEMENT MANUFACTURING METHOD - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a p-type ZnO-based semiconductor layer having a high acceptor concentration.SOLUTION: A p-type ZnO-based semiconductor layer manufacturing method comprises: (a) forming an n-type ZnO-based semiconductor single crystal structure including a group IB element which is Cu or/and Ag and one and more group IIIB elements selected from a group consisting of B, Ga, Al and In; (b) performing first annealing on the n-type ZnO-based semiconductor single crystal structure under reduced pressure; and (c) performing second annealing on the n-type ZnO-based semiconductor singe crystal structure having been subjected to first annealing in an oxidant-containing atmosphere to form a p-type ZnO-based semiconductor layer in which the group IB element and the group IIIB element are co-doped.

Description

  The present invention relates to a method for manufacturing a p-type ZnO-based semiconductor layer and a method for manufacturing a ZnO-based semiconductor element.

  Zinc oxide (ZnO) is a direct-transition semiconductor having a band gap energy of 3.37 eV at room temperature, and has a relatively high exciton binding energy of 60 meV. In addition, the raw materials are inexpensive and have a feature of little influence on the environment and the human body. For this reason, realization of a light-emitting element using ZnO with high efficiency, low power consumption and excellent environmental performance is expected.

  However, the ZnO-based semiconductor is difficult to control the p-type conductivity because of the self-compensation effect due to strong ionicity. For example, as an acceptor impurity, a p-type having practical performance using a group VA element such as N, P, As, and Sb, a group IA element such as Li, Na, and K, and a group IB element such as Cu, Ag, and Au. Research on ZnO-based semiconductors has been conducted (see, for example, Patent Documents 1 to 5).

JP 2001-48698 A JP 2001-68707 A JP 2004-221132 A JP 2009-256142 A Japanese Patent No. 4365530

The inventors of the present application have found that an n-type ZnO-based semiconductor structure in which Ga-doped ZnO single crystal layers and Cu layers are alternately stacked becomes p-type by annealing, and the previous application (Japanese Patent Application No. 2012-166837). ), For example, a structure in which a Ga-doped Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer and a Cu layer are laminated in the thickness direction (alternate laminated structure) is annealed, and Cu and Ga Proposed a method of manufacturing a p-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) layer co-doped with.

  With reference to FIGS. 12A to 12D, the proposal according to the previous application will be described.

FIG. 12A is a graph showing a CV characteristic and a depth profile of impurity concentration for an n-type ZnO-based semiconductor structure in which Ga-doped ZnO single crystal layers and Cu layers are alternately stacked. The graph showing the CV characteristics in the upper column and the depth profile of the impurity concentration is shown in the lower column. The measurement was performed by an electrochemical CV measurement method (ECV method) using an electrolytic solution as a Schottky electrode. The graph shows the results of analysis using a parallel model. The horizontal axis of the graph showing the CV characteristic represents the voltage in the unit “V”, and the vertical axis represents “1 / C ² ” in the unit “cm ⁴ / F ² ”. Both axes use a linear scale. The horizontal axis of the graph showing the depth profile of the impurity concentration represents the position in the depth (thickness) direction of the sample in the unit “nm”, and the vertical axis represents the impurity concentration in the unit “cm ⁻³ ”. The horizontal axis uses a linear scale, and the vertical axis uses a logarithmic scale.

Referring to the graph showing the CV characteristics (upper column), a curve that rises to the right (the relationship that 1 / C ² increases as the voltage increases) is obtained, and the n-type ZnO-based semiconductor structure has n-type conductivity. It is shown. Note that the slope corresponds to the impurity concentration (resistance value).

Referring to the graph showing the depth profile of the impurity concentration (lower column), it can be seen that the impurity concentration (donor concentration) N _d of the n-type ZnO-based semiconductor structure is about 1.0 × 10 ²¹ cm ⁻³ .

FIG. 12B is a graph showing a depth profile by secondary ion mass spectrometry (SIMS) of an absolute Cu concentration [Cu] and an absolute Ga concentration [Ga] in an n-type ZnO-based semiconductor structure. is there. The horizontal axis of the graph represents the position in the depth direction of the sample in the unit “nm”, and the vertical axis represents the Cu concentration [Cu] and the Ga concentration [Ga] in the unit “cm ⁻³ ”. The horizontal axis uses a linear scale, and the vertical axis uses a logarithmic scale.

It can be seen that the Cu concentration [Cu] in the n-type ZnO-based semiconductor structure is about 2.0 × 10 ²¹ cm ⁻³ and the Ga concentration [Ga] is about 7.0 × 10 ²⁰ cm ⁻³ . [Cu] and [Ga] may not be accurately measured near the surface due to, for example, the influence of adsorbates.

  Note that the n-type ZnO-based semiconductor structure whose analysis results are shown in FIG. 12A and FIG. 12B is the same as the alternating stacked structure of the sample before annealing of the sample used in the experiment according to the present invention (described later).

  FIG. 12C is a graph showing the annealing temperature for converting the n-type ZnO-based semiconductor structure to p-type. For example, annealing is performed at 570 ° C. for 10 minutes in an oxygen atmosphere with a flow rate of 1 L / min.

  FIG. 12D is a graph showing a CV characteristic and an impurity concentration depth profile of the annealed ZnO-based semiconductor structure. The graph showing the CV characteristics in the upper column and the depth profile of the impurity concentration is shown in the lower column. The meanings of both axes of the graph are equal to those of the graph shown in FIG. 12A.

Referring to the graph showing the CV characteristics (upper column), a downward-sloping curve (relation that 1 / C ² decreases as the voltage increases) is obtained, and the ZnO-based semiconductor structure has p-type conductivity. It is shown.

Referring to the graph (lower column) showing the depth profile of the impurity concentration, the impurity concentration (acceptor concentration) of the p-type and the ZnO-based semiconductor structure _{N a} is found to be about 6.0 × ¹⁰ 17 ^{cm -3.}

  An n-type ZnO-based semiconductor structure in which Ga-doped ZnO single crystal layers and Cu layers are alternately stacked is made p-type by annealing. By performing annealing, Cu and Ga diffuse in the ZnO-based semiconductor structure, and Cu diffused in the ZnO crystal replaces the Zn position (Zn site). Accordingly, it is considered that the n-type ZnO-based semiconductor structure becomes a p-type ZnO-based semiconductor layer co-doped with Cu and Ga (becomes p-type).

  Thus, the proposal according to the previous application is, for example, that an n-type ZnO-based semiconductor structure in which Ga-doped ZnO single crystal layers and Cu layers are alternately stacked is prepared and annealed to prepare a p-type ZnO. This is a method for obtaining a semiconductor layer.

However, in the proposal according to the previous application, the Cu concentration (doping concentration) in the ZnO-based semiconductor structure to be p-type by annealing is, for example, on the order of 10 ²¹ cm ^−3. The impurity concentration (acceptor concentration) N _a (for example, on the order of 10 ¹⁷ cm ⁻³ ) cannot be said to be high.

The standard generation energies for Cu and Zn to combine with O to form an oxide are −300 kJ / mol (in the case of Cu ₂ O) and −670 kJ / mol (in the case of ZnO), respectively. That is, Zn is more likely to be an oxide by bonding with O than Cu. Preceding the proposal according to application, the Cu diffused into the ZnO crystal, effectively it is difficult to replace the Zn position, therefore the impurity concentration compared to the Cu concentration (acceptor concentration) N _a is considered to be low.

The present inventors have continued intensive studies and found a method of manufacturing a p-type ZnO based semiconductor layer having high acceptor concentration N _a than the invention according to the earlier application.

  An object of the present invention is to provide a method for manufacturing a p-type ZnO-based semiconductor layer having a high acceptor concentration and a method for manufacturing a ZnO-based semiconductor element including a p-type ZnO-based semiconductor layer having a high acceptor concentration.

  According to one aspect of the present invention, (a) an n-type comprising a group IB element that is Cu or / and Ag, and one or more group IIIB elements selected from the group consisting of B, Ga, Al, and In A step of forming a ZnO-based semiconductor single crystal structure; (b) a step of subjecting the n-type ZnO-based semiconductor single crystal structure to first annealing under reduced pressure; and (c) an n-type ZnO-based semiconductor after the first annealing. P-type ZnO-based process comprising: forming a p-type ZnO-based semiconductor layer co-doped with the group IB element and the group IIIB element by subjecting the single crystal structure to a second annealing in an atmosphere containing an oxidant. A method for manufacturing a semiconductor layer is provided.

  According to another aspect of the present invention, the step of forming an n-type ZnO-based semiconductor layer above the substrate and the step of forming a p-type ZnO-based semiconductor layer above the n-type ZnO-based semiconductor layer are provided. And the step of forming the p-type ZnO-based semiconductor layer includes (a) one or more IIIB selected from the group consisting of a group IB element that is Cu or / and Ag, and B, Ga, Al, and In Forming an n-type ZnO-based semiconductor single crystal structure containing a group element; (b) applying a first anneal to the n-type ZnO-based semiconductor single crystal structure under reduced pressure; and (c) the first anneal. A second annealing process is performed on the subsequent n-type ZnO-based semiconductor single crystal structure in an atmosphere containing an oxidizing agent to form a p-type ZnO-based semiconductor layer in which the IB group element and the IIIB group element are co-doped. Of a ZnO-based semiconductor device comprising: There is provided.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of a p-type ZnO type | system | group semiconductor layer with a high acceptor density | concentration and the manufacturing method of a ZnO type semiconductor element provided with a p-type ZnO type | system | group semiconductor layer with a high acceptor density | concentration can be provided.

FIG. 1 is a schematic cross-sectional view showing an MBE apparatus. FIG. 2A is a schematic cross-sectional view of a sample before annealing, and FIG. 2B is a time chart showing a shutter sequence of Zn cells, O cells, Ga cells, and Cu cells when forming an alternately laminated structure, 2C is a schematic cross-sectional view of the alternately laminated structure 54, and FIG. 2D is a schematic cross-sectional view of the Ga-doped ZnO single crystal layer 54a and the Cu layer 54b. FIG. 3A is a graph showing the CV characteristics (upper column) and the impurity concentration depth profile (lower column) of the alternately laminated structure 54 of the sample before annealing, and FIG. 3B shows the Cu of the alternately laminated structure 54. It is a graph which shows the depth profile by SIMS of absolute concentration [Cu] and absolute concentration [Ga] of Ga. 4A and 4B are graphs showing the annealing temperatures of the first annealing and the second annealing, respectively. FIG. 5A is a graph showing a depth profile of the CV characteristics and impurity concentration at the position where the alternate stacked structure 54 of the sample after the first annealing of the sample is formed, and FIG. 5B is an alternate stacked structure 54 of the sample after the second annealing of the sample. It is a graph which shows the CV characteristic and depth profile of impurity concentration in a formation position. 6A and 6B are flowcharts illustrating an outline of a method for manufacturing a ZnO-based semiconductor light emitting device according to an embodiment. FIG. 7A is a schematic cross-sectional view of a ZnO-based semiconductor light-emitting device manufactured by the manufacturing method according to the first embodiment, and FIG. 7B is a schematic cross-sectional view of an alternate stacked structure 5A. FIG. 8 shows a Zn cell, an Mg cell, an O cell, and a Zn cell when an alternating laminated structure is formed when forming a Cu, Ga co-doped p-type Mg _x Zn _1-x O (0 <x ≦ 0.6) single crystal layer. It is a time chart which shows an example of the shutter sequence of Ga cell and Cu cell. FIG. 9A is a schematic cross-sectional view of a ZnO-based semiconductor light-emitting device manufactured by the manufacturing method according to the second embodiment, and FIG. 9B is a schematic cross-sectional view showing another example of the active layer 15. FIG. 9C is a schematic cross-sectional view of the alternately laminated structure 16A. FIG. 10 is a schematic cross-sectional view of a ZnO based semiconductor light emitting device manufactured by the manufacturing method according to the third embodiment. 11A to 11D show examples of an n-type ZnO-based semiconductor single crystal structure capable of forming a p-type ZnO-based semiconductor single crystal layer having _a high acceptor concentration Na by performing the first annealing and the second annealing. It is a schematic sectional drawing. FIG. 12A is a graph showing a CV characteristic and a depth profile of impurity concentration for an n-type ZnO-based semiconductor structure in which Ga-doped ZnO single crystal layers and Cu layers are alternately stacked, and FIG. 12B shows an n-type ZnO-based semiconductor structure. It is a graph which shows the depth profile by SIMS of absolute concentration [Cu] of Cu and absolute concentration [Ga] of Ga in a semiconductor structure. FIG. 12C is a graph showing the annealing temperature for converting the n-type ZnO-based semiconductor structure to p-type, and FIG. 12D is a graph showing the CV characteristics and the depth profile of the impurity concentration of the ZnO-based semiconductor structure after annealing. .

  First, a crystal manufacturing apparatus used for growing a ZnO-based semiconductor layer or the like will be described. In the experiments and examples described below, molecular beam epitaxy (MBE) is used as a crystal manufacturing method. Here, the ZnO-based semiconductor contains at least Zn and O.

  FIG. 1 is a schematic cross-sectional view showing an MBE apparatus. In the vacuum chamber 71, a Zn source gun 72, an O source gun 73, an Mg source gun 74, a Cu source gun 75, and a Ga source gun 76 are provided.

  The Zn source gun 72, the Mg source gun 74, the Cu source gun 75, and the Ga source gun 76 are Knudsen cells that contain solid sources of Zn (7N), Mg (6N), Cu (9N), and Ga (7N), respectively. A Zn beam, Mg beam, Cu beam, and Ga beam are emitted by heating the cell.

The O source gun 73 includes an electrodeless discharge tube that uses a radio frequency of 13.56 MHz, for example, and plasmas O ₂ gas (6N) in the electrodeless discharge tube to emit an O radical beam. As the discharge tube material, alumina or high-purity quartz can be used.

  A stage 77 having a substrate heater holds the substrate 78. Each of the source guns 72 to 76 includes a cell shutter. By opening / closing each cell shutter, it is possible to switch between a state where each beam is irradiated onto the substrate 78 and a state where each beam is not irradiated. By irradiating a desired beam on the substrate 78 at a desired timing, a ZnO-based compound semiconductor layer having a desired composition can be grown.

By adding Mg to ZnO, the band gap can be widened. However, since ZnO has a wurtzite structure (hexagonal crystal) and MgO has a rock salt structure (cubic crystal), phase separation occurs when the Mg composition is too high. In Mg _x Zn _1-x O in which the Mg composition of MgZnO is specified as x, the Mg composition x is preferably 0.6 or less in order to maintain the wurtzite structure. Note that the notation Mg _x Zn _1-x O includes ZnO to which Mg is not added when x = 0.

  The n-type conductivity of the ZnO-based semiconductor can be obtained without doping impurities. Impurities such as Ga can be doped to increase n-type conductivity. The p-type conductivity of the ZnO-based semiconductor can be obtained by doping with a p-type impurity.

  A film thickness meter 79 using a crystal resonator is provided in the vacuum chamber 71. From the adhesion rate measured by the film thickness meter 79, the flux intensity of each beam is obtained.

  A gun 80 for reflection high energy electron diffraction (RHEED) and a screen 81 for displaying an RHEED image are attached to the vacuum chamber 71. From the RHEED image, the surface flatness and growth mode of the crystal layer formed on the substrate 78 can be evaluated.

  When the crystal is two-dimensionally grown and the surface is epitaxially grown (single crystal growth), the RHEED image shows a streak pattern, and when the crystal is three-dimensionally grown and the surface is not flat (single crystal growth), the RHEED image is A spot pattern is shown. In the case of polycrystalline growth, the RHEED image becomes a ring pattern.

Next, the VI / II flux ratio in Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) crystal growth will be described. The flux intensity of Zn beam _J Zn, the flux intensity of the Mg beam _{J Mg,} the flux intensity of O radical beam expressed as _{J O.} A beam of Zn or Mg, which is a metal material, contains atoms or clusters of Zn or Mg containing a plurality of atoms. Both atoms and clusters are effective for crystal growth. The O beam, which is a gas material, contains atomic radicals and neutral molecules. Here, the flux intensity of atomic radicals effective for crystal growth is considered.

An adhesion coefficient indicating the ease with which Zn adheres to the crystal is represented by k _Zn , an adhesion coefficient indicating the ease with which Mg is deposited is represented by k _Mg , and an adhesion coefficient indicating the ease with which O is deposited is represented by k _O. Zn adhesion coefficient k _Zn and flux strength J _Zn product k _Zn J _Zn , Mg adhesion coefficient k _Mg and flux strength J _Mg product k _Mg J _Mg , O adhesion coefficient k _O and flux strength J _O product k _O J _O corresponds to the number of Zn atoms, Mg atoms, and O atoms attached to the unit area of the substrate per unit time.

k _Zn J _Zn and _k Mg to the sum of _{J Mg} is the ratio of _{k O J O k O J O} / a _{(k Zn J Zn + k Mg} J Mg), defined as VI / II flux ratio. When the VI / II flux ratio is smaller than 1, the group II rich condition (simply Zn rich condition when Mg is not included), when the VI / II flux ratio is equal to 1, the stoichiometric condition, and the VI / II flux ratio is The case where it is larger than 1 is called VI group rich condition (or O rich condition).

In the crystal growth on the Zn plane (+ c plane), if the substrate surface temperature is 850 ° C. or lower, the adhesion coefficients k _Zn , k _Mg and k 2 _O can be regarded as 1, and the VI / II flux ratio is J _{O 2} / (J _Zn + J _Mg ).

The VI / II flux ratio can be calculated by the following procedure, for example, in the growth of ZnO. The Zn flux is measured as a _Zn deposition rate F _Zn (nm / s) at room temperature by a film thickness monitor using a crystal resonator. The Zn flux is converted from F _Zn (nm / s) to J _Zn (atoms / cm ² s).

On the other hand, O radical flux is calculated | required as follows. ZnO is grown by changing the Zn flux under constant O radical beam irradiation conditions (for example, RF power 300 W, O ₂ flow rate 2.0 sccm), and the Zn flux growth rate is experimentally determined. By fitting the result using the approximate expression of ZnO growth rate G _ZnO : G _ZnO = [(k _Zn J _Zn ) ^-1 + (k _O J _O ) ^-1 ] ^-1 , O radicals under the conditions flux _{J O} is calculated. From Zn flux _{J Zn} and O radical flux _{J O} thus obtained, it is possible to calculate the VI / II flux ratio.

  Subsequently, an experiment conducted by the inventors will be described. In the description, a sample before annealing is described as a sample before annealing, and a sample after the start of annealing is described as a sample after annealing.

  A method for manufacturing a sample before annealing the sample will be described. FIG. 2A shows a schematic cross-sectional view of the sample before annealing.

After performing thermal cleaning at 900 ° C. for 30 minutes on a Zn-faced ZnO (0001) substrate (hereinafter referred to as a ZnO substrate in this specification) 51 having n-type conductivity, the temperature of the substrate 51 was lowered to 300 ° C. At that temperature (growth temperature 300 ° C.), Zn flux F _Zn is 0.17 nm / s (J _Zn = 1.1 × 10 ¹⁵ atoms / cm ² s), O radical beam irradiation conditions are RF power 300 W, O ₂ flow rate. The ZnO buffer layer 52 having a thickness of 30 nm was grown on the ZnO substrate 51 at 2.0 sccm (J 2 _O = 8.1 × 10 ¹⁴ atoms / cm ² s). In order to improve the crystallinity and surface flatness of the ZnO buffer layer 52, annealing was performed at 900 ° C. for 10 minutes.

On the ZnO buffer layer 52, the growth temperature is 900 ° C., the Zn flux F _Zn is 0.17 nm / s (J _Zn = 1.1 × 10 ¹⁵ atoms / cm ² s), the O radical beam irradiation condition is RF power 300 W, An undoped ZnO layer 53 having a thickness of 100 nm was grown at an O ₂ flow rate of 2.0 sccm (J _O = 8.1 × 10 ¹⁴ atoms / cm ² s). The undoped ZnO layer 53 is an n-type ZnO layer. On the undoped ZnO layer 53, Zn, O and Ga, and Cu were supplied at different timings to form an alternately laminated structure 54. The formation temperature of the alternately laminated structure 54 was 250 ° C.

  FIG. 2B is a time chart showing a shutter sequence of Zn cells, O cells, Ga cells, and Cu cells when forming an alternately laminated structure.

  In forming the alternate laminated structure 54, a Zn cell shutter, an O cell shutter, and a Ga cell shutter are opened, a Cu cell shutter is closed, a Ga-doped ZnO single crystal layer growth step, a Zn cell shutter, an O cell shutter, and a Ga cell are formed. The Cu adhesion step (Cu layer forming step) in which the shutter was closed and the Cu cell shutter was opened was repeated alternately.

  In the Ga-doped ZnO single crystal layer growth step, the O cell shutter and the Ga cell shutter are opened and closed simultaneously, and the open period of the Zn cell shutter is extended before and after the open periods of the O cell shutter and the Ga cell shutter.

  In the preparation of the sample before annealing of the sample, the opening period of each of the O cell shutter and the Ga cell shutter is 10 seconds, and the opening period of the Zn cell shutter is 1 before and after the opening period of the O cell shutter and the Ga cell shutter. Extended by seconds. The open period per time of the Zn cell shutter is 12 seconds. The 10-second period in which the Zn cell shutter, the O cell shutter, and the Ga cell shutter are all opened is a Ga-doped ZnO single crystal layer growth period per time. The open period per time of the Cu cell shutter was 50 seconds.

The Ga-doped ZnO single crystal layer growth step and the Cu attachment step were alternately repeated 60 times to obtain an alternating laminated structure 54 having a thickness of 120 nm. Zn flux F _Zn in the Ga-doped ZnO single crystal layer growth step is 0.13 nm / s (J _Zn = 8.6 × 10 ¹⁴ atoms / cm ² s), O radical beam irradiation conditions are RF power 300 W, O ₂ flow rate. 2.0 sccm (J 2 _O = 8.1 × 10 ¹⁴ atoms / cm ² s), and the cell temperature T _Ga of _Ga was 600 ° C. (F _Ga was less than the detection lower limit). The VI / II flux ratio is 0.94 (Zn-rich condition). The Cu cell temperature T _Cu in the Cu adhesion step was 990 ° C., and the Cu flux F _Cu was 0.004 nm / s.

  FIG. 2C is a schematic cross-sectional view of the alternately laminated structure 54. The alternate laminated structure 54 has a laminated structure in which Ga-doped ZnO single crystal layers 54a and Cu layers 54b are alternately laminated.

  The thickness of the Ga-doped ZnO single crystal layer 54a is about 2.0 nm, and the thickness of the Cu layer 54b (Cu deposition thickness) is 1 atomic layer or less, for example, about 1/20 atomic layer. In this case, the Cu coverage on the surface of the Ga-doped ZnO single crystal layer 54a is about 5%.

  FIG. 2D shows a schematic cross-sectional view of the Ga-doped ZnO single crystal layer 54a and the Cu layer 54b. For example, the Cu layer 54b having a thickness of about 1/20 atomic layer is formed of Cu adhering to a part of the surface of the Ga-doped ZnO single crystal layer 54a as shown in FIG. Hereinafter, for the sake of simplification of the drawing, the alternate laminated structure including the Cu deposition mode is represented by the layer structure of FIG. 2C.

  FIG. 3A is a graph showing CV characteristics (upper column) and impurity concentration depth profile (lower column) of the alternately laminated structure 54 of the sample before annealing, which is the same as FIG. 12A.

From the graph showing the CV characteristics, it can be seen that the alternately laminated structure 54 has n-type conductivity. Also, from the graph showing the depth profile of the impurity concentration, the impurity concentration (donor concentration) of alternate stacked structure 54 _{N d} is found to be about 1.0 × ¹⁰ 21 ^{cm -3.}

  FIG. 3B is a graph showing a SIMS depth profile of the Cu absolute concentration [Cu] and the Ga absolute concentration [Ga] in the alternate stacked structure 54, which is the same as FIG. 12B.

It can be seen that the Cu concentration [Cu] in the alternately laminated structure 54 is about 2.0 × 10 ²¹ cm ⁻³ and the Ga concentration [Ga] is about 7.0 × 10 ²⁰ cm ⁻³ .

  Next, the sample was annealed. Annealing was performed in two stages.

4A and 4B are graphs showing the annealing temperatures of the first annealing and the second annealing, respectively. The first annealing is performed under reduced pressure (less than 1 atmosphere). The second annealing is performed after the first annealing is completed, for example, in an atmosphere in which water vapor is included in the carrier gas. In the experiment, the first annealing was performed at 420 ° C. for 10 minutes under a pressure of less than 1 Pa. The second annealing was performed at 400 ° C. for 60 minutes by adding water vapor to oxygen (carrier gas) at a flow rate of 1 L / min. Note that by passing the O ₂ gas in pure water was boiling, was included steam.

  FIG. 5A is a graph showing a depth profile of CV characteristics and impurity concentration at the position where the alternately laminated structure 54 is formed in the sample after the first annealing of the sample. The graph showing the CV characteristics in the upper column and the depth profile of the impurity concentration is shown in the lower column. The meanings of both axes of the graph are equal to those of the graph shown in FIG. 12A.

Referring to the graph showing the CV characteristics (upper column), a curve that rises to the right (the relationship in which 1 / C ² increases as the voltage increases) is obtained. It has been shown to have n-type conductivity.

Referring to the graph (lower column) showing the depth profile of the impurity concentration, the impurity concentration (donor concentration) _{N d} of alternate stacked structure 54 formed position after first annealing sample is approximately 3.0 × ¹⁰ 21 ^{cm -3} I understand that. Alternate stacked structure 54 forming position after first annealing the sample has a unannealed sample substantially equal impurity concentration (donor concentration) n-type layer of low resistance having a N _d and alternate stacked structure 54 (see FIG. 3A) .

  FIG. 5B is a graph showing a CV characteristic and a depth profile of the impurity concentration at the position where the alternately laminated structure 54 is formed in the sample after the second annealing of the sample. The graph showing the CV characteristics in the upper column and the depth profile of the impurity concentration is shown in the lower column. The meaning of both axes of the graph is equivalent to that of the graph shown in FIG. 12D.

Referring to the graph showing the CV characteristics (upper column), a downward-sloping curve (relation that 1 / C ² decreases as the voltage increases) is obtained, and the position where the alternate stacked structure 54 is formed has p-type conductivity. It is shown.

Referring to the graph (lower column) showing the depth profile of the impurity concentration, the impurity concentration (acceptor concentration) N _a of alternate stacked structure 54 forming position after the second annealing sample (p-type layer formation position) is 3.5 × 10 It turns out that it is about ²⁰ cm- ³ .

Note that the Cu concentration (doping concentration) was on the order of 10 ²¹ cm ⁻³ at the position where the alternate laminated structure 54 was formed (p-type layer formation position) after the second annealing was completed. Cu and Ga were uniformly doped over the entire thickness direction of the layer.

By the second annealing, the position where the alternate stacked structure 54 is formed becomes p-type. In the proposal according to the earlier application, the acceptor concentration _{N a} is 6.0 × ¹⁰ 17 ^cm approximately ^-3 p-type and the ZnO-based semiconductor structure but a had been (see FIG. 12D), p-type layer according to the present experiment the acceptor concentration N _a, 3 orders of magnitude higher than that. Further, in the present application experiments, the acceptor concentration _{N a} of the p-type layer, for example to ¹⁰ 21 ^{cm -3} order Cu concentration (doping concentration) of alternate stacked structure 54 is (see FIG. 3B), only about one order of magnitude lower It is.

According to the experiments conducted by the inventors of the present application, the sample alternately laminated structure 54 is as-grown and n-type (see FIG. 3A), and after the first annealing and the second annealing, the p-type layer having _a high acceptor concentration Na. (See FIG. 5B).

  By performing heat treatment (first annealing) at an appropriate temperature and time under reduced pressure, it is considered that Zn is desorbed (evaporated) from the crystal to some extent, and Cu and Ga are diffused in the alternately laminated structure 54. Desorption of Zn makes it easier for Cu to replace the Zn position, and Cu replaces the Zn position at a higher rate than in the proposals of the previous application. While Cu functions as a p-type impurity, O vacancies that act as a donor source are generated at the position where the alternate stacked structure 54 is formed by the first annealing. Therefore, the impurity concentration (donor concentration) at the position where the alternate stacked structure 54 is formed is It is almost the same as before the first annealing.

By performing the second annealing, it is considered that O is supplemented to the O vacancies, and the position where the alternately laminated structure 54 is formed becomes p-type. Since Cu replaces the Zn position at a high rate, a p-type layer (p-type ZnO single crystal layer co-doped with Cu and Ga) having _a high acceptor concentration Na is formed.

In the experiment, the second annealing was performed in an atmosphere in which water vapor (H ₂ O) was included in the carrier gas. H ₂ O functions as an oxidizing agent. Therefore, by performing the second annealing not only in H ₂ O but also in an atmosphere containing an oxidant, the O vacancies can be complemented and the formation position of the alternately laminated structure 54 can be made p-type. In addition to H ₂ O, O ₂ , NO ₂ , N ₂ O, ozone, methyl alcohol, ethyl alcohol, or the like can be used as an oxidizing agent.

  In the experiment, oxygen was used as a carrier gas during the second annealing. Although there is no particular limitation on the carrier gas, it is preferable to use oxygen from the viewpoint of reducing oxygen desorbed from the position where the alternately laminated structure 54 is formed.

Furthermore, as a result of intensive studies by the inventors of the present application, the first annealing is performed on the alternately laminated structure 54 under reduced pressure, for example, at a processing temperature of 350 ° C. to 500 ° C. under a pressure of less than 1 Pa, for 5 to 20 minutes. By performing for a long time, the second annealing is further performed in an atmosphere containing H ₂ O in a carrier gas (in an atmosphere containing an oxidizing agent), a processing temperature of 350 ° C. to 450 ° C., and 10 minutes to 90 minutes. By performing the processing time, for example, the acceptor concentration N _a is 10 ²⁰ cm ⁻³ or more, and is a high acceptor concentration p-type layer (Cu, It was found that a Ga co-doped p-type ZnO layer) can be formed.

The method according to the experiment of this application improves the Zn position substitution rate of Cu, efficiently substitutes Cu for the Zn position, and makes the alternate stacked structure 54 _a p-type layer having _a high acceptor concentration Na. It is a manufacturing method of a semiconductor layer.

  From the experiment, Cu and Ga are uniformly distributed over the entire thickness direction of the layer by applying a two-step annealing process to the alternately laminated structure in which the Ga-doped ZnO single crystal layer growth step and the Cu deposition step are alternately repeated. It was found that a doped Cu and Ga co-doped p-type ZnO layer (p-type ZnO-based semiconductor layer) having a high acceptor concentration was obtained. Next, a first example of manufacturing a ZnO-based semiconductor light emitting device using a Cu, Ga co-doped ZnO layer as a p-type semiconductor layer will be described.

  6A and 6B are flowcharts illustrating an outline of a method for manufacturing a ZnO-based semiconductor light emitting device according to an embodiment. In addition, although an Example demonstrates a semiconductor light-emitting device, this invention is applicable not only to a light-emitting device but a semiconductor device widely.

  As shown in FIG. 6A, a method for manufacturing a ZnO-based semiconductor light emitting device according to an embodiment includes a step of forming an n-type ZnO-based semiconductor layer above a substrate (step S101) and an n-type ZnO-based semiconductor formed in step S101. A step (step S102) of forming a p-type ZnO-based semiconductor layer above the layer is included.

  Further, the p-type ZnO-based semiconductor layer forming step in step S102 includes five steps of steps S102a to S102e as shown in FIG. 6B.

In the p-type ZnO-based semiconductor layer forming step (step S102), first, Zn, O, Mg and Ga are supplied as necessary, and Ga-doped n-type Mg _x Zn _1-x O (0 ≦ 0). x ≦ 0.6) A single crystal layer is formed (step S102a). Next, Cu is supplied onto the Ga-doped n-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer formed in step S102a (step S102b). Step S102a and step S102b are alternately repeated to form a stacked structure (step S102c). Then, the laminated structure formed in step S102c is annealed under reduced pressure (less than 1 atm) (step S102d). For example, the processing temperature of the first annealing is 350 ° C. to 500 ° C., and the processing time is 5 minutes to 20 minutes. Further, second annealing is performed in an atmosphere containing an oxidant to form a p-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) layer co-doped with Cu and Ga (step S102e). For example, the processing temperature of the second annealing is 350 ° C. to 450 ° C., and the processing time is 10 minutes to 90 minutes.

  With reference to FIGS. 7A and 7B, a first embodiment for producing a homostructure ZnO-based semiconductor light-emitting device will be described in detail. FIG. 7A is a schematic cross-sectional view of a ZnO based semiconductor light emitting device manufactured by the manufacturing method according to the first embodiment.

On the ZnO substrate 1, the growth temperature is 300 ° C., the Zn flux F _Zn is 0.15 nm / s (J _Zn = 9.9 × 10 ¹⁴ atoms / cm ² s), and the O radical beam irradiation condition is RF power 300 W, The ZnO buffer layer 2 having a thickness of 30 nm was grown at an O ₂ flow rate of 2.0 sccm (J _O = 8.1 × 10 ¹⁴ atoms / cm ² s). In order to improve the crystallinity and surface flatness of the ZnO buffer layer 2, annealing was performed at 900 ° C. for 10 minutes.

On the ZnO buffer layer 2, Zn, O and Ga were simultaneously supplied at a growth temperature of 900 ° C. to grow the n-type ZnO layer 3 having a thickness of 150 nm (for example, step S101 in FIG. 6A). Zn flux F _Zn is 0.15 nm / s (J _Zn = 9.9 × 10 ¹⁴ atoms / cm ² s), O radical beam irradiation conditions are RF power 250 W, O ₂ flow rate 1.0 sccm (J _O = 4.0). × 10 ¹⁴ atoms / cm ² s), and the cell temperature of Ga was 460 ° C. The Ga concentration of the n-type ZnO layer 3 is, for example, 1.5 × 10 ¹⁸ cm ⁻³ .

On the n-type ZnO layer 3, the growth temperature is 900 ° C., the Zn flux F _Zn is 0.03 nm / s (J _Zn = 2.0 × 10 ¹⁴ atoms / cm ² s), the O radical beam irradiation conditions are RF power 300 W, An undoped ZnO active layer 4 having a thickness of 15 nm was grown at an O ₂ flow rate of 2.0 sccm (J _O = 8.1 × 10 ¹⁴ atoms / cm ² s).

  Subsequently, a Cu and Ga co-doped p-type ZnO layer 5 was formed on the undoped ZnO active layer 4 (step S102 in FIG. 6A).

First, the substrate temperature was set to 250 ° C., and Zn, O, Ga, and Cu were supplied at different timings in a shutter sequence (see FIG. 2B) that was the same as that in the preparation of the sample before annealing of the sample, thereby forming an alternately laminated structure. Specifically, a step of growing a Ga-doped ZnO single crystal layer by supplying Zn, O, and Ga (step S102a in FIG. 6B), and a step of supplying Cu on the Ga-doped ZnO single crystal layer (in FIG. 6B). Step S102b) was repeated 60 times alternately to form an alternating stacked structure with a thickness of 120 nm (step S102c in FIG. 6B). The growth period of the Ga-doped ZnO single crystal layer per time is 10 seconds, and the Cu supply period per time is 50 seconds. Zn flux F _Zn in the Ga-doped ZnO single crystal layer growth step is 0.13 nm / s (J _Zn = 8.6 × 10 ¹⁴ atoms / cm ² s), O radical beam irradiation conditions are RF power 300 W, O ₂ flow rate. 2.0 sccm (J 2 _O = 8.1 × 10 ¹⁴ atoms / cm ² s), and the Ga cell temperature T _Ga was 600 ° C. The VI / II flux ratio is 0.94. Further, the cell temperature _{T Cu} of Cu in the Cu supplying step and 990 ° C., and the Cu flux _{F Cu} and 0.004 nm / s.

FIG. 7B is a schematic cross-sectional view of the alternately laminated structure 5A. The alternate laminated structure 5A has a laminated structure in which Ga-doped ZnO single crystal layers 5a and Cu layers 5b are alternately laminated. The thickness of the Ga-doped ZnO single crystal layer 5a is about 2.0 nm, the thickness of the Cu layer 5b is 1 atomic layer or less, for example, about 1/20 atomic layer (the Cu coverage on the surface of the Ga-doped ZnO single crystal layer 5a is 5 %). The alternate stacked structure 5A exhibits n-type conductivity, and the donor concentration _Nd is, for example, 1.0 × 10 ²¹ cm ⁻³ .

Next, first annealing was performed on the alternately laminated structure 5A (step S102d in FIG. 6B). For example, the first annealing was performed at 420 ° C. for 10 minutes under a pressure reduced to a pressure of less than 1 Pa. By the first annealing, Cu and Ga are diffused in the alternate laminated structure 5A. Since Zn is desorbed (evaporated) from the crystal to some extent, and Cu easily replaces the Zn position, Cu replaces the Zn position at a high rate. While Cu functions as a p-type impurity, since the O vacancies act as donor source occurs, alternate stacked structure 5A forming position, n-type layer comprising a nearly equal impurity concentration (donor concentration) N _d and alternate stacked structure 5A It becomes.

  Further, the second annealing is performed at 400 ° C. for 60 minutes in an atmosphere in which water vapor is included in oxygen at a flow rate of 1 L / min (step S102e in FIG. 6B), and the O vacancies are complemented to form the alternate stacked structure 5A formation position. To p-type to form a Cu, Ga co-doped p-type ZnO layer 5.

  Thereafter, an n-side electrode 6 n was formed on the back surface of the ZnO substrate 1. A p-side electrode 6p was formed on the Cu and Ga co-doped p-type ZnO layer 5, and a bonding electrode 7 was formed on the p-side electrode 6p. The n-side electrode 6n can be formed by stacking an Au layer having a thickness of 500 nm on a Ti layer having a thickness of 10 nm. The p-side electrode 6p is formed by laminating a 10 nm thick Au layer on a 1 nm thick Ni layer having a size of 300 μm □, and the bonding electrode 7 is formed by an Au layer having a size of 100 μm □ and a thickness of 500 nm. . In this manner, a ZnO-based semiconductor light emitting device was fabricated by the method according to the first example.

Cu ZnO based semiconductor light emitting device manufactured by the manufacturing method according to the first embodiment, Ga co-doped p-type ZnO layer 5, Cu and Ga are co-doped, acceptor concentration _{N a} is ¹⁰ 20 ^{cm -3} order or higher, For example, it is a p-type ZnO-based semiconductor single crystal layer having _a high acceptor concentration Na of 3.5 × 10 ²⁰ cm ⁻³ . In the Cu and Ga co-doped p-type ZnO layer 5, the Cu concentration [Cu] and the Ga concentration [Ga] are both substantially constant in the layer thickness direction, and the Cu concentration [Cu] is, for example, 10 ²¹ cm ^{−. 3} orders. The Cu and Ga co-doped p-type ZnO layer 5 is a p-type layer having _a high acceptor concentration Na, which is substantially equal to the Cu concentration [Cu] or only about one digit lower.

  According to the manufacturing method according to the first embodiment, a ZnO-based semiconductor light-emitting element including Cu and Ga co-doped p-type ZnO layer 5 in which Cu and Ga are uniformly doped throughout the thickness direction of the layer and the acceptor concentration is high. Can be manufactured.

In the experiment and the first example, a Cu and Ga co-doped p-type ZnO layer was formed (for example, x = 0 in the notation of Mg _x Zn _1-x O in step S102a to step S102e in FIG. 6B). By applying the first annealing and the second annealing to the alternately laminated structure formed by alternately repeating the Mg _x Zn _1-x O (0 <x ≦ 0.6) single crystal layer growth step and the Cu adhesion step, Cu having an acceptor concentration _{N a,} Ga codoped _{Mg x Zn 1-x O (} 0 <x ≦ 0.6) of the step S102a~ step S102e single crystal layer can be obtained (e.g., FIG. 6B _Mg x Zn _{1 -X} 0 in the x-O notation).

8, Cu, Ga co-doped p-type _Mg x _{Zn 1-x} O time (0 <x ≦ 0.6) single crystal layer formed, Zn cells making the alternate stacked structure, Mg cells, O cell, It is a time chart which shows an example of the shutter sequence of Ga cell and Cu cell.

In the production of the alternately laminated structure, a Ga-doped Mg _x Zn _1-x O (0 <x ≦ 0.6) is opened, which opens a Zn cell shutter, an Mg cell shutter, an O cell shutter, and a Ga cell shutter and closes a Cu cell shutter. The single crystal layer growth step and the Cu deposition step of closing the Zn cell shutter, Mg cell shutter, O cell shutter, and Ga cell shutter and opening the Cu cell shutter are alternately repeated.

In the example shown in this figure, the open period of the Zn cell shutter in the Ga-doped Mg _x Zn _1-x O single crystal layer growth step is set to include the open periods of the Mg cell shutter, the O cell shutter, and the Ga cell shutter. Has been. Specifically, the Mg cell shutter, the O cell shutter, and the Ga cell shutter are simultaneously opened and closed, and the Zn cell shutter open period is set before and after the Mg cell shutter, O cell shutter, and Ga cell shutter open periods. Extended.

For example, the open period per time of the Mg cell shutter, the O cell shutter, and the Ga cell shutter is 10 seconds. The open period of the Zn cell shutter is extended by 1 second before and after the open period of the Mg cell shutter, the O cell shutter, and the Ga cell shutter, and the open period of each Zn cell shutter is 12 seconds. 10 seconds when all of the Zn cell shutter, Mg cell shutter, O cell shutter, and Ga cell shutter are in the open state is the Ga-doped Mg _x Zn _1-x O single crystal layer growth period. The opening period per time of the Cu cell shutter is 50 seconds.

Next, a second example of manufacturing a double heterostructure ZnO-based semiconductor light-emitting device including a Cu, Ga co-doped p-type Mg _x Zn _1-x O (0 <x ≦ 0.6) single crystal layer and A third embodiment will be described.

  FIG. 9A is a schematic cross-sectional view of a ZnO based semiconductor light emitting device manufactured by the manufacturing method according to the second embodiment.

Zn and O were simultaneously supplied on the ZnO substrate 11 to grow, for example, a ZnO buffer layer 12 having a thickness of 30 nm. As an example, the growth temperature may be 300 ° C., the Zn flux F _Zn may be 0.15 nm / s, the O radical beam irradiation conditions may be RF power 300 W, and the O ₂ flow rate 2.0 sccm. In order to improve the crystallinity and surface flatness of the ZnO buffer layer 12, annealing was performed at 900 ° C. for 10 minutes.

Zn, O, and Ga were simultaneously supplied on the ZnO buffer layer 12 to grow an n-type ZnO layer 13 having a thickness of 150 nm at a growth temperature of 900 ° C., for example. Zn flux F _Zn was 0.15 nm / s, O radical beam irradiation conditions were RF power 250 W, O ₂ flow rate 1.0 sccm, and Ga cell temperature was 460 ° C. The Ga concentration of the n-type ZnO layer 13 is, for example, 1.5 × 10 ¹⁸ cm ⁻³ .

Zn, Mg and O were simultaneously supplied on the n-type ZnO layer 13 to grow, for example, an n-type MgZnO layer 14 having a thickness of 30 nm. The growth temperature can be 900 ° C., Zn flux F _Zn can be 0.1 nm / s, Mg flux F _Mg can be 0.025 nm / s, O radical beam irradiation conditions can be RF power 300 W, and O ₂ flow rate 2.0 sccm. The Mg composition of the n-type MgZnO layer 14 is, for example, 0.3.

Zn and O were simultaneously supplied on the n-type MgZnO layer 14 to grow a ZnO active layer 15 having a thickness of 10 nm at a growth temperature of 900 ° C., for example. Zn flux F _Zn was 0.1 nm / s, O radical beam irradiation conditions were RF power 300 W, and O ₂ flow rate 2.0 sccm.

  As shown in FIG. 9B, the active layer 15 may employ a quantum well structure in which MgZnO barrier layers 15b and ZnO well layers 15w are alternately stacked instead of a single ZnO layer.

  The substrate temperature was lowered to, for example, 250 ° C., and the Ga-doped n-type MgZnO single crystal layer growth step and the Cu deposition step were alternately repeated to form an alternately laminated structure on the active layer 15. The shutter sequence of the Zn cell, Mg cell, O cell, Ga cell, and Cu cell in forming the alternate laminated structure is the same as that shown in FIG. 8, for example.

For example, the growth period in the single Ga-doped MgZnO single crystal layer growth step is 10 seconds, and the Cu supply period in one Cu deposition step is 50 seconds. Zn flux F _Zn in the Ga-doped MgZnO single crystal layer growth step is 0.13 nm / s, Mg flux F _Mg is 0.04 nm / s, O radical beam irradiation conditions are RF power 300 W, O ₂ flow rate 2.0 sccm, The cell temperature T _Ga of _Ga is 600 ° C. The VI / II flux ratio is 0.79. The Cu cell temperature T _Cu in the Cu supplying step was 990 ° C., and the Cu flux F _Cu was 0.004 nm / s. The Ga-doped MgZnO single crystal layer growth step and the Cu deposition step were alternately repeated 60 times to obtain an alternately laminated structure having a thickness of 120 nm.

FIG. 9C is a schematic cross-sectional view of the alternately laminated structure 16A. The alternate laminated structure 16A has a laminated structure in which Ga-doped MgZnO single crystal layers 16a and Cu layers 16b are alternately laminated. The thickness of the Ga-doped MgZnO single crystal layer 16a is about 2.0 nm, and the thickness of the Cu layer 16b is 1 atomic layer or less, for example, about 1/20 atomic layer (Cu coverage on the surface of the Ga-doped MgZnO single crystal layer 16a is 5 %). Alternating structure 16A exhibits n-type conductivity, and donor concentration _Nd is, for example, 1.0 × 10 ²⁰ cm ⁻³ .

Next, first annealing was performed on the alternate stacked structure 16A. For example, the first annealing was performed at 420 ° C. for 10 minutes under a pressure reduced to a pressure of less than 1 Pa. By the first annealing, Cu and Ga are diffused in the alternate laminated structure 16A. Since Zn and Mg are desorbed (evaporated) from the crystal to some extent and Cu is easily substituted at the Zn and Mg positions, Cu substitutes Zn and Mg positions at a high rate. While Cu functions as a p-type impurity, since the O vacancies act as donor source occurs, alternate stacked structure 16A forming position, n-type layer comprising a nearly equal impurity concentration (donor concentration) N _d and alternate stacked structure 16A It becomes.

  Furthermore, in an atmosphere in which water vapor is included in oxygen at a flow rate of 1 L / min, the second annealing is performed at 400 ° C. for 60 minutes to complement the O vacancies, and the position where the alternate stacked structure 16A is formed becomes p-type. A Cu and Ga co-doped p-type MgZnO layer 16 was formed on the substrate 15. The Mg composition of the Cu and Ga co-doped p-type MgZnO layer 16 is, for example, 0.3.

  Thereafter, an n-side electrode 17 n is formed on the back surface of the ZnO substrate 11, and a p-side electrode 17 p is formed on the Cu and Ga co-doped p-type MgZnO layer 16. Further, the bonding electrode 18 is formed on the p-side electrode 17p. For example, the n-side electrode 17n is formed by laminating a 500-nm thick Au layer on a 10-nm-thick Ti layer, and the p-side electrode 17p has a thickness of 300 μm □ and a 1-nm-thick Ni layer. It can be formed by laminating a 10 nm Au layer. The bonding electrode 18 is formed of an Au layer having a size of 100 μm □ and a thickness of 500 nm. In this way, a ZnO-based semiconductor light emitting device is manufactured by the method according to the second embodiment.

Although the ZnO substrate 11 is used in the second embodiment, a conductive substrate such as an MgZnO substrate, a GaN substrate, a SiC substrate, or a Ga ₂ O ₃ substrate can be used.

Cu ZnO based semiconductor light emitting device manufactured by the manufacturing method according to the second embodiment, Ga co-doped p-type MgZnO layer 16, Cu and Ga are co-doped, acceptor concentration _{N a} is ¹⁰ 20 ^{cm -3} order or higher, For example, it is a p-type ZnO-based semiconductor single crystal layer having _a high acceptor concentration Na of 2.0 × 10 ²⁰ cm ⁻³ . In the Cu and Ga co-doped p-type MgZnO layer 16, both the Cu concentration [Cu] and the Ga concentration [Ga] are substantially constant in the layer thickness direction, and the Cu concentration [Cu] is, for example, 10 ²¹ cm ^{−. 3} orders. The Cu and Ga co-doped p-type MgZnO layer 16 is a p-type layer having _a high acceptor concentration Na, which is almost equal to the Cu concentration [Cu] or only about one digit lower.

  According to the manufacturing method according to the second embodiment, a ZnO-based semiconductor light-emitting element including Cu and Ga co-doped p-type MgZnO layer 16 in which Cu and Ga are uniformly doped throughout the thickness direction of the layer and the acceptor concentration is high is provided. Can be manufactured.

  FIG. 10 is a schematic cross-sectional view of a ZnO based semiconductor light emitting device manufactured by the manufacturing method according to the third embodiment. In the first and second embodiments, crystals are grown on a conductive substrate and a layer is formed. In the third embodiment, crystals are grown on an insulating substrate.

Mg and O are simultaneously supplied on the c-plane sapphire substrate 21 which is an insulating substrate, and an MgO buffer layer 22 having a thickness of, for example, 10 nm is grown. As an example, the growth temperature can be 650 ° C., the Mg flux F _Mg can be 0.05 nm / s, the O radical beam irradiation conditions can be RF power 300 W, and the O ₂ flow rate 2.0 sccm. The MgO buffer layer 22 functions as a polarity control layer for controlling the ZnO-based semiconductor thereon to grow with the Zn surface as the surface.

On the MgO buffer layer 22, for example, a growth temperature of 300 ° C., a Zn flux F _Zn of 0.15 nm / s, an O radical beam irradiation condition of an RF power of 300 W, an O ₂ flow rate of 2.0 sccm, and Zn and O are simultaneously supplied. A ZnO buffer layer 23 having a thickness of 30 nm is grown. The ZnO buffer layer 23 grows on the Zn plane. In order to improve the crystallinity and surface flatness of the ZnO buffer layer 23, annealing is performed at 900 ° C. for 30 minutes.

Zn, O, and Ga are simultaneously supplied on the ZnO buffer layer 23 to grow, for example, an n-type ZnO layer 24 having a thickness of 1.5 μm. As an example, the growth temperature is 900 ° C., the Zn flux F _Zn is 0.05 nm / s, the O radical beam irradiation condition is RF power 300 W, the O ₂ flow rate 2.0 sccm, and the Ga cell temperature is 480 ° C.

On the n-type ZnO layer 24, Zn, Mg and O are simultaneously supplied to grow, for example, an n-type MgZnO layer 25 having a thickness of 30 nm. The growth temperature can be 900 ° C., Zn flux F _Zn can be 0.1 nm / s, Mg flux F _Mg can be 0.025 nm / s, O radical beam irradiation conditions can be RF power 300 W, and O ₂ flow rate 2.0 sccm. The Mg composition of the n-type MgZnO layer 25 is, for example, 0.3.

  On the n-type MgZnO layer 25, for example, a ZnO active layer 26 having a thickness of 10 nm is grown. The growth conditions can be made equal to those of the active layer 15 in the second embodiment. Instead of the single ZnO layer, a quantum well structure may be adopted.

  A Cu and Ga co-doped p-type MgZnO layer 27 is formed on the active layer 26. The formation method is the same as that of the Cu and Ga co-doped p-type MgZnO layer 16 in the second embodiment, for example.

  Since the c-plane sapphire substrate 21 of the third embodiment is an insulating substrate, an n-side electrode cannot be formed on the back side of the substrate 21. Therefore, etching is performed from the upper surface of the Cu and Ga co-doped p-type MgZnO layer 27 until the n-type ZnO layer 24 is exposed, and an n-side electrode 28n is formed on the exposed n-type ZnO layer 24. A p-side electrode 28p is formed on the Cu, Ga co-doped p-type MgZnO layer 27, and a bonding electrode 29 is formed on the p-side electrode 28p.

  The n-side electrode 28n is formed by stacking a 500 nm thick Au layer on a 10 nm thick Ti layer, and the p side electrode 28p is formed by a 10 nm thick Au layer on a 0.5 nm thick Ni layer. It can be formed by stacking. The bonding electrode 29 is formed of an Au layer having a thickness of 500 nm. In this manner, a ZnO-based semiconductor light emitting device is manufactured by the method according to the third embodiment.

  The Cu and Ga co-doped p-type MgZnO layer 27 of the ZnO-based semiconductor light emitting device according to the third embodiment is a p-type ZnO-based semiconductor single layer having the same properties as the Cu and Ga co-doped p-type MgZnO layer 16 of the second embodiment. It is a crystal layer.

  As mentioned above, although this invention was demonstrated along experiment and an Example, this invention is not restrict | limited to these.

For example, in the experiments and examples, O radicals were used as the oxygen source of the MBE apparatus, but other gases having strong oxidizing power, such as polar oxidants such as ozone, H ₂ O, and alcohol, can be used.

In the experiments and examples, the first annealing and the second annealing are performed on a structure in which Ga-doped n-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layers and Cu layers are alternately stacked. Then, a Cu, Ga co-doped Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer exhibiting p-type conductivity was formed (p-type). By annealing the alternately laminated structure containing Cu (IB group element) and Ga (IIIB group element), Cu becomes easy to bond with O which is a VIB group element in a monovalent (Cu ⁺ ) state, and as an acceptor. It is considered that the function of monovalent Cu ⁺ is more likely to occur than divalent Cu ²⁺ , and as a result, the alternate stacked structure becomes p-type. Therefore, Ag which is a group IB element capable of forming a plurality of valences similarly to Cu can be used instead of or together with Cu. Moreover, not only Ga but B, Al, and In which are IIIB group elements like Ga can be used. The group IIIB element used may be one or more group IIIB elements selected from the group consisting of B, Ga, Al, and In.

Furthermore, the inventors of the present application not only have a structure in which Ga-doped n-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layers and Cu layers are alternately stacked, but also Cu (Group IB elements). ) And Ga (IIIB group element), various n-type ZnO-based semiconductor single crystal structures were formed and annealed to co-doped Cu (IB group element) and Ga (IIIB group element) Several proposals have been made regarding a method for forming a p-type ZnO-based semiconductor layer and a method for manufacturing a ZnO-based semiconductor element using the p-type ZnO-based semiconductor layer. The n-type ZnO-based semiconductor single crystal structure to be annealed in these proposals can also be made into a p-type ZnO-based semiconductor layer having _a high acceptor concentration Na by performing the first annealing and the second annealing.

11A to 11D show examples of an n-type ZnO-based semiconductor single crystal structure capable of forming a p-type ZnO-based semiconductor single crystal layer having _a high acceptor concentration Na by performing the first annealing and the second annealing. It is a schematic sectional drawing.

FIG. 11A shows an alternate stacked structure 61A in which Cu-doped n-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layers 61a and Ga layers 61b are alternately stacked (for example, Japanese Patent Application No. 2013-2013). No. 036824).

For example, (i) Zn, (ii) O, (iii) supply an IB group element that is Mg, (iv) Cu, and / or Ag as needed, and the alternate stacked structure 61A is doped with the IB group element. Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer, and Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer, The step of supplying one or more group IIIB elements selected from the group consisting of Ga, Al, and In can be alternately repeated.

11B shows an n-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer 62a, a Cu layer 62b, and an n-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single unit. An alternating stacked structure 62A in which crystal layers 62a and Ga layers 62c are alternately stacked in this order is shown (for example, see Japanese Patent Application No. 2013-085380).

The alternate stacked structure 62A includes, for example, a step of forming a _first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer and a first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) forming a group IB element layer containing a group IB element of Cu or / and Ag on the single crystal layer; and forming a second Mg _x Zn _1-x O ( 0 ≦ x ≦ 0.6) a step of forming a single crystal layer, and B, Ga, Al, and In on the second Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer The step of forming a group IIIB element layer containing one or more group IIIB elements selected from the group consisting of can be formed repeatedly.

FIG. 11C shows an alternate stacked structure 63A in which n-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layers 63a and Cu and Ga layers 63b are alternately stacked (for example, Japanese Patent Application No. 2013-2013). No. 085381).

The alternate stacked structure 63A includes, for example, a step of forming a Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer and a Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal. A step of supplying a group IB element of Cu or / and Ag and one or more group IIIB elements selected from the group consisting of B, Ga, Al, and In on the layer is alternately repeated. Is possible.

FIG. 11D shows a Cu-doped n-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer 64a and a Ga-doped n-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single unit. An alternate laminated structure 64A in which crystal layers 64b are alternately laminated is shown (for example, see Japanese Patent Application No. 2013-138550).

The alternate stacked structure 64A includes a step of forming a _first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer doped with a group IB element such as Cu or / and Ag, 1 Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer doped with one or more group IIIB elements selected from the group consisting of B, Ga, Al, and In 2 Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layers can be formed alternately and repeatedly.

By performing the first annealing and the second annealing also for these structures, Cu (IB group element), Ga (IIIB group element) having _a high acceptor concentration, for example, an acceptor concentration Na of 10 ²⁰ cm ⁻³ or more order. ) A co-doped p-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer can be formed. The formed Cu, Ga co-doped p-type Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer is, for example, approximately the same as the Cu concentration [Cu], or a high value that is only one digit lower. a p-type layer having an acceptor concentration N _a.

  It will be apparent to those skilled in the art that other various modifications, improvements, combinations, and the like can be made.

  The p-type ZnO-based semiconductor layer manufactured by the manufacturing method according to the embodiment can be used for, for example, a light emitting diode (LED) or a laser diode (LD) that emits light of a short wavelength (ultraviolet to blue wavelength region). It can be used for application products (various indicators, LED displays, CV / DVD light sources, etc.). Furthermore, it can be used for white LEDs and their application products (lighting fixtures, various indicators, displays, backlights for various displays, etc.). Moreover, it can utilize for an ultraviolet sensor.

DESCRIPTION OF SYMBOLS 1 ZnO substrate 2 ZnO buffer layer 3 n-type ZnO layer 4 Undoped ZnO active layer 5 Cu, Ga co-doped p-type ZnO layer 5A Alternating structure 5a Ga-doped ZnO single crystal layer 5b Cu layer 6n n-side electrode 6p p-side electrode 7 Bonding electrode 11 ZnO substrate 12 ZnO buffer layer 13 n-type ZnO layer 14 n-type MgZnO layer 15 active layer 15b MgZnO barrier layer 15w ZnO well layer 16 Cu, Ga co-doped p-type MgZnO layer 16A Alternating structure 16a Ga-doped MgZnO single crystal Layer 16b Cu layer 17n n-side electrode 17p p-side electrode 18 bonding electrode 21 c-plane sapphire substrate 22 MgO buffer layer 23 ZnO buffer layer 24 n-type ZnO layer 25 n-type MgZnO layer 26 active layer 27 Cu, Ga co-doped p-type MgZnO Layer 28n n-side electrode 28p p-side electrode 29 Bonding electrode 51 ZnO substrate 52 ZnO buffer layer 53 Undoped ZnO layer 54 Alternating structure 54a Ga-doped ZnO single crystal layer 54b Cu layer 61a Cu-doped Mg _x Zn _1-x O single crystal layer 61b Ga layer 62a Mg _x Zn _1-x O single crystal layer 62b Cu layer 62c Ga layer 63a Mg _x Zn _1-x O single crystal layer 63b Cu, Ga layer 64a Cu doped Mg _x Zn _1-x O single crystal layer 64b Ga doped Mg _x Zn _1-x O single Crystal layers 61A to 64A Alternating laminated structure 71 Vacuum chamber 72 Zn source gun 73 O source gun 74 Mg source gun 75 Cu source gun 76 Ga source gun 77 Stage 78 Substrate 79 Film thickness meter 80 RHEED gun 81 Screen

Claims (20)

(A) Forming an n-type ZnO-based semiconductor single crystal structure containing a group IB element that is Cu or / and Ag and one or more group IIIB elements selected from the group consisting of B, Ga, Al, and In Process,
(B) applying a first anneal to the n-type ZnO-based semiconductor single crystal structure under reduced pressure;
(C) p-type ZnO in which the n-type ZnO-based semiconductor single crystal structure after the first annealing is subjected to a second annealing in an atmosphere containing an oxidizing agent, and the IB group element and the IIIB group element are co-doped. Forming a p-type ZnO-based semiconductor layer, comprising: forming a semiconductor-based semiconductor layer.   The first annealing is performed at a processing temperature of 350 ° C. to 500 ° C. for a processing time of 5 minutes to 20 minutes, and the second annealing is performed at a processing temperature of 350 ° C. to 450 ° C. for a processing time of 10 minutes to 90 minutes. The manufacturing method of the p-type ZnO type | system | group semiconductor layer of Claim 1 to perform.   The method of manufacturing a p-type ZnO-based semiconductor layer according to claim 1 or 2, wherein the second annealing is performed in an atmosphere in which water vapor is included in a carrier gas.   The method for producing a p-type ZnO-based semiconductor layer according to claim 3, wherein oxygen is used as the carrier gas.   The method for producing a p-type ZnO-based semiconductor layer according to claim 1, wherein the first annealing is performed under a pressure of less than 1 Pa. The step (a)
(A1) (i) Zn, (ii) O, (iii) Supply one or more group IIIB elements selected from the group consisting of Mg, (iv) B, Ga, Al, and In as necessary. Forming a Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer doped with the IIIB group element;
(A2) supplying a group IB element of Cu or / and Ag on the Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer;
(A3) The method for producing a p-type ZnO-based semiconductor layer according to any one of claims 1 to 5, comprising a step of alternately repeating the step (a1) and the step (a2) to form a laminated structure. The step (a)
(A4) (i) Zn, (ii) O, (iii) Mg _x doped with IB group element by supplying Mg, (iv) Cu or / and Ag group IB element as required Forming a Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer;
(A5) One or more Group IIIB elements selected from the group consisting of B, Ga, Al, and In are supplied onto the Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer. Process,
(A6) The method for producing a p-type ZnO-based semiconductor layer according to any one of claims 1 to 5, comprising a step of alternately repeating the step (a4) and the step (a5) to form a laminated structure. The step (a)
(A7) forming a _first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer;
(A8) forming a group IB element layer containing a group IB element of Cu or / and Ag on the first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer; ,
(A9) forming a second Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer on the group IB element layer;
(A10) One or more Group IIIB elements selected from the group consisting of B, Ga, Al, and In on the second Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer Forming a group IIIB element layer comprising:
(A11) The method for producing a p-type ZnO-based semiconductor layer according to any one of claims 1 to 5, comprising a step of repeating the steps (a7) to (a10) to form a laminated structure. The step (a)
(A12) a step of forming a Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer;
(A13) On the Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer, a group consisting of a group IB element that is Cu or / and Ag, and B, Ga, Al, and In Supplying one or more selected Group IIIB elements;
(A14) The method for producing a p-type ZnO-based semiconductor layer according to any one of claims 1 to 5, comprising a step of alternately repeating the step (a12) and the step (a13) to form a laminated structure. The step (a)
(A15) forming a _first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer doped with a group IB element of Cu or / and Ag;
(A16) One or more group IIIB elements selected from the group consisting of B, Ga, Al, and In on the first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer Forming a second Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer doped with
(A17) The method for producing a p-type ZnO-based semiconductor layer according to any one of claims 1 to 5, comprising a step of alternately repeating the step (a15) and the step (a16) to form a laminated structure. Forming an n-type ZnO-based semiconductor layer above the substrate;
Forming a p-type ZnO-based semiconductor layer above the n-type ZnO-based semiconductor layer,
The step of forming the p-type ZnO-based semiconductor layer includes:
(A) Forming an n-type ZnO-based semiconductor single crystal structure containing a group IB element that is Cu or / and Ag and one or more group IIIB elements selected from the group consisting of B, Ga, Al, and In Process,
(B) applying a first anneal to the n-type ZnO-based semiconductor single crystal structure under reduced pressure;
(C) p-type ZnO in which the n-type ZnO-based semiconductor single crystal structure after the first annealing is subjected to a second annealing in an atmosphere containing an oxidizing agent, and the IB group element and the IIIB group element are co-doped. Forming a ZnO-based semiconductor layer.   The first annealing is performed at a processing temperature of 350 ° C. to 500 ° C. for a processing time of 5 minutes to 20 minutes, and the second annealing is performed at a processing temperature of 350 ° C. to 450 ° C. for a processing time of 10 minutes to 90 minutes. The manufacturing method of the ZnO type semiconductor device according to claim 11 performed.   The method for manufacturing a ZnO-based semiconductor element according to claim 11 or 12, wherein the second annealing is performed in an atmosphere in which water vapor is contained in a carrier gas.   The method for manufacturing a ZnO-based semiconductor element according to claim 13, wherein oxygen is used as the carrier gas.   The method for manufacturing a ZnO-based semiconductor element according to claim 11, wherein the first annealing is performed under a pressure of less than 1 Pa. The step (a)
(A1) (i) Zn, (ii) O, (iii) Supply one or more group IIIB elements selected from the group consisting of Mg, (iv) B, Ga, Al, and In as necessary. Forming a Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer doped with the IIIB group element;
(A2) supplying a group IB element of Cu or / and Ag on the Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer;
The method of manufacturing a ZnO-based semiconductor element according to claim 11, comprising: (a3) a step of alternately repeating the step (a1) and the step (a2) to form a laminated structure. The step (a)
(A4) (i) Zn, (ii) O, (iii) Mg _x doped with IB group element by supplying Mg, (iv) Cu or / and Ag group IB element as required Forming a Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer;
(A5) One or more Group IIIB elements selected from the group consisting of B, Ga, Al, and In are supplied onto the Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer. Process,
(A6) The method for manufacturing a ZnO-based semiconductor element according to any one of claims 11 to 15, comprising a step of alternately repeating the step (a4) and the step (a5) to form a laminated structure. The step (a)
(A7) forming a _first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer;
(A8) forming a group IB element layer containing a group IB element of Cu or / and Ag on the first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer; ,
(A9) forming a second Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer on the group IB element layer;
(A10) One or more Group IIIB elements selected from the group consisting of B, Ga, Al, and In on the second Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer Forming a group IIIB element layer comprising:
(A11) The method for manufacturing a ZnO-based semiconductor element according to claim 11, further comprising a step of repeating the steps (a7) to (a10) to form a laminated structure. The step (a)
(A12) a step of forming a Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer;
(A13) On the Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer, a group consisting of a group IB element that is Cu or / and Ag, and B, Ga, Al, and In Supplying one or more selected Group IIIB elements;
(A14) The method for manufacturing a ZnO-based semiconductor element according to any one of claims 11 to 15, including a step of alternately repeating the step (a12) and the step (a13) to form a laminated structure. The step (a)
(A15) forming a _first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer doped with a group IB element of Cu or / and Ag;
(A16) One or more group IIIB elements selected from the group consisting of B, Ga, Al, and In on the first Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer Forming a second Mg _x Zn _1-x O (0 ≦ x ≦ 0.6) single crystal layer doped with
(A17) The method for manufacturing a ZnO-based semiconductor element according to any one of claims 11 to 15, including a step of alternately repeating the step (a15) and the step (a16) to form a laminated structure.

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