JP2015015396A - Optical semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical semiconductor element that allows injecting a current into an active layer formed on a semiconductor substrate and capable of confining light or applying a voltage to the active layer in a horizontal direction to a surface of the semiconductor substrate, and in which spreading of a current or an electric field in a substrate direction is prevented.SOLUTION: An optical semiconductor element includes: a semi-insulating substrate 101 composed of InP; a current diffusion prevention layer 102 formed on the semi-insulating substrate 101 and composed of semi-insulating GaInP; an optical waveguide layer A formed on the current diffusion prevention layer 102; and an n-type InP layer 106 and a p-type InP layer 107 formed on both sides of the optical waveguide layer A and formed parallel to the semi-insulating substrate 101. Since the current diffusion prevention layer 102 formed under the optical waveguide layer A has semi-insulation properties and the band-gap energy of the current diffusion prevention layer 102 is larger than that of the n-type InP layer 106 and the p-type InP layer 107, current spread toward the current diffusion prevention layer 102 is prevented.

Description

  The present invention relates to an optical semiconductor element in which a horizontal direction of an optical waveguide is a current conduction direction.

  Semiconductor devices such as semiconductor lasers generally conduct current in a direction perpendicular to the semiconductor substrate by injecting current from the electrodes formed on the front and back surfaces of the semiconductor substrate to the active layer or applying an electric field. Works. In some cases, two electrodes are formed on the surface of the semiconductor substrate. Even in this case, the vertical direction is often the current conduction direction.

  The active layer of such a semiconductor device generally uses a structure called a double heterojunction. The double heterostructure is a structure in which an active layer having a high refractive index is sandwiched between semiconductor materials having a refractive index lower than that of the active layer, and light can be confined in the active layer.

  Furthermore, a semiconductor device having a buried heterostructure in which both sides of an active layer are sandwiched between semiconductor materials having a refractive index smaller than that of the active layer is also known (see Non-Patent Document 1). This buried heterostructure improves the characteristics of the semiconductor device.

  On the other hand, unlike the semiconductor devices described above, research has been conducted on a semiconductor device that operates by injecting a current in the horizontal direction or applying an electric field to the substrate, that is, a lateral device.

  FIG. 8 shows the structure of a conventional lateral device. In the lateral device, an active waveguide layer 802 is generally formed on a semi-insulating substrate 801, and an n-type semiconductor layer 803 made of a semiconductor material having a low refractive index and a p-type semiconductor layer are formed on both sides of the active waveguide layer 802. 804 is formed. An n-type contact layer 805 and an n-type electrode 806 are formed on the n-type semiconductor layer 803, and a p-type contact layer 807 and a p-type electrode 808 are formed on the p-type semiconductor layer 804. Is done.

In a conventional lateral device, both sides of the active waveguide layer 802 are sandwiched by a semiconductor material having a low refractive index, and the upper surface of the active waveguide layer 802 or both upper and lower surfaces of the active waveguide layer 802 are air. And a layer made of a material having a very low refractive index such as a dielectric. Each refractive index of the active waveguide layer 802 and the semiconductor material having a small refractive index is 3 or more, and the difference in refractive index between them is about 5%. On the other hand, since the refractive index of air is 1, and the refractive index of, for example, SiO ₂ as a dielectric is about 1.4, the difference in refractive index between the two is about 5% as described above. In comparison, it becomes very large. Therefore, light is strongly confined in the active waveguide layer 802 sandwiched between air and a dielectric.

  When light is strongly confined in the active waveguide layer 802, the threshold current is reduced in the case of a semiconductor laser, and the modulation operation with a small applied voltage is possible in the case of an optical modulator. Characteristics can be improved.

  Furthermore, by forming two electrodes in the same plane in a lateral device, the device can be integrated by bonding the electrodes together with an electronic device such as a CMOS, such as a CMOS, or called silicon photonics. It is possible to integrate with an optical waveguide or the like formed of silicon fine wires in a laminated form. From the viewpoints of such improvement of device characteristics and high compatibility with large-scale integrated optical circuits, research on lateral devices has been actively conducted.

Supervised by Tetsuhiko Ikegami, Haruhiko Tsuchiya, Osamu Mikami, “Semiconductor Photonics Engineering”, Corona, published on January 10, 1995, ISBN 4-339-00623, p. 202-206

  However, in the lateral device as described above, it is difficult to form a current confinement structure in the active layer 802 as compared with the conventional vertical device. In particular, the spread of carriers and electric fields in the direction of the semi-insulating substrate 801 causes a decrease in carrier injection efficiency into the active layer 802 due to an increase in leakage current, and a deterioration in modulation efficiency due to a decrease in electric field strength due to an increase in dark current. There was a problem.

  Therefore, the present invention can inject current or apply voltage to the active layer formed on the semiconductor substrate, in which light can be confined, in the horizontal direction with respect to the surface of the semiconductor substrate. An object of the present invention is to provide an optical semiconductor element in which the spread of current or electric field is suppressed.

  In order to solve the above-described problems, the present invention provides an optical semiconductor element, which is a semiconductor substrate, a current diffusion prevention layer formed on the semiconductor substrate, and an optical waveguide formed on the current diffusion prevention layer. A layer, an n-type semiconductor layer formed on the current diffusion preventing layer so as to be in contact with the first surface of the optical waveguide layer, and a second surface of the optical waveguide layer facing the first surface; A p-type semiconductor layer formed on the current diffusion prevention layer so as to be in contact with the current diffusion prevention layer, wherein the current diffusion prevention layer has a band gap energy greater than or equal to a band gap energy of the n type semiconductor layer and the p type semiconductor layer. And having a resistivity higher than that of the n-type semiconductor layer and the p-type semiconductor layer.

  According to a second aspect of the present invention, in the optical semiconductor element of the first aspect, the current diffusion prevention layer includes a group III element including at least one of In, Ga, and Al, and at least N, P, and As. It is a compound semiconductor composed of a group V element containing any of them.

  According to a third aspect of the present invention, in the optical semiconductor device according to the first or second aspect, the current diffusion preventing layer is a semiconductor film having a critical thickness of 10 nm or more.

  According to a fourth aspect of the present invention, in the optical semiconductor device according to any one of the first to third aspects, the sacrifice formed between the current diffusion preventing layer, the n-type semiconductor layer, and the p-type semiconductor layer. It further has a layer, and an air layer is formed between the current diffusion preventing layer and the optical waveguide layer.

  According to a fifth aspect of the present invention, in the optical semiconductor device according to the first to fourth aspects, the optical waveguide layer includes a first cladding layer and the active waveguide formed on the first cladding layer. And a second cladding layer formed on the active waveguide layer, wherein the active waveguide layer is in contact with the n-type semiconductor layer and the p-type semiconductor layer, respectively. To do.

  According to the present invention, in a semiconductor device capable of injecting a current or applying a voltage in a horizontal direction to the surface of a semiconductor substrate into an active layer capable of confining light formed on the semiconductor substrate, The spread of current and electric field in the direction of the substrate can be suppressed.

(A) is a perspective view of the optical semiconductor element which concerns on 1st Embodiment of this invention, (b) is sectional drawing of the optical semiconductor element which concerns on 1st Embodiment of this invention. (A)-(k) is a figure which shows the preparation processes of the optical semiconductor element which concerns on 1st Embodiment of this invention. (A) is a perspective view of the optical semiconductor element which concerns on 2nd Embodiment of this invention, (b) is sectional drawing of the optical semiconductor element which concerns on 2nd Embodiment of this invention. (A)-(l) is a figure which shows the preparation process of the optical semiconductor element which concerns on 2nd Embodiment of this invention. It is a figure which shows the relationship between Ga composition of GaInP, and band gap energy. It is a figure which shows the relationship between Ga composition and critical film thickness of GaInP epitaxially grown on the InP substrate. The critical film thickness shows the relationship between the degree of lattice mismatch between the substrate and the epitaxial film. It is a figure which shows the structure of the conventional lateral device.

<First Embodiment>
FIG. 1A shows a perspective view of an optical semiconductor device according to the first embodiment of the present invention, and FIG. 1B shows a cross-sectional view of the optical semiconductor device according to the first embodiment of the present invention. The optical semiconductor device according to the first embodiment is used for a semiconductor laser, an optical modulator, or the like, and is an element for using, for example, 1.5 μm band light.

The optical semiconductor element includes a semi-insulating substrate 101 made of InP, a current diffusion preventing layer 102 made of semi-insulating Ga _x In _1-x P formed on the semi-insulating substrate 101, and the current diffusion. An optical waveguide layer A formed on the prevention layer 102, an n-type InP layer 106 formed in parallel with the semi-insulating substrate 101 on both sides of the optical waveguide layer A, and a p-type InP layer 107 are provided. The n-type InP layer 106 is an n-type semiconductor layer and can have a band gap energy of 1.35 eV. The p-type InP layer 107 is a p-type semiconductor layer and can have a band gap energy of 1.35 eV.

  An n-type GaInAs contact layer 108 and an n-type electrode 109 are stacked on the n-type InP layer 106. Similarly, a p-type GaInAs contact layer 110 and a p-type electrode 111 are stacked on the p-type InP layer 107.

  In FIG. 1, an optical waveguide layer A includes, in order from the side closer to the semi-insulating substrate 101, a lower optical confinement layer 103a made of non-doped InGaP, a lower clad layer 104a made of non-doped InP, and an active guide made of a multiple quantum well structure. The waveguide layer 105, the upper cladding layer 104b made of non-doped InP, and the upper optical confinement layer 103b made of non-doped InGaP are laminated.

In the current diffusion prevention layer 102 made of semi-insulating Ga _x In _1-x P, the Ga composition (x) is, for example, 0.1 (bandgap energy is 1.53 eV), the thickness is, for example, 30 nm, and the Fe doping concentration is, for example, It can be 1 × 10 ¹⁷ cm ⁻³ . At this time, the resistivity of the current diffusion preventing layer 102 is 10 ⁸ Ω · cm. It is assumed that the resistivity of the current diffusion preventing layer 102 is larger than that of the n-type InP layer 106 and the p-type InP layer 107.

In the n-type contact layer 108, the doping concentration can be set to 2 × 10 ¹⁸ cm ⁻³ , for example, and the thickness can be set to 100 nm, for example. In the p-type contact layer 110, the doping concentration can be set to 2 × 10 ¹⁹ cm ⁻³ , for example, and the thickness can be set to 100 nm, for example.

  The n-type electrode 109 and the p-type electrode 111 are each connected to a voltage source (not shown), whereby a voltage is applied to the n-type electrode 109 and the p-type electrode 111 so that the optical semiconductor element can operate. . Instead of the voltage source, it is also possible to operate the optical semiconductor element by connecting a current source to each of the electrodes 109 and 111 and injecting a current from the current source to each of the electrodes 109 and 111.

  In the first embodiment, the optical waveguide layer A includes a lower optical confinement layer 103a, a lower clad layer 104a, an active waveguide layer 105 having a multiple quantum well structure, an upper clad layer 104b, and an upper optical confinement layer 103b. The lower optical confinement layer 103a and the upper optical confinement layer 103b can each be made of non-doped GaInAsP having a band gap wavelength of 1.2 μm. Here, each film thickness of the lower light confinement layer 103a and the upper light confinement layer 103b can be set to, for example, 30 nm.

  The multiple quantum well structure of the active waveguide layer 105 includes a non-doped GaInAsP quantum well layer (for example, a band gap wavelength of 1.55 μm, a film thickness of 6 nm, and the number of wells of 7) and a non-doped GaInAsP barrier layer (for example, a band gap wavelength of 1.25 μm). And a film thickness of 10 nm).

  The active waveguide layer 105 functions as a light emitting layer of a semiconductor laser, a light absorbing layer of a light modulator, a refractive index changing layer, or the like depending on the use of the optical semiconductor element.

  As described above, the current diffusion prevention layer 102 formed under the optical waveguide layer A has a semi-insulating property, and the band gap energy of the current diffusion prevention layer 102 is higher than that of the n-type InP layer 106 and the p-type InP layer 107. Since it is large, the current spread to the current diffusion preventing layer 102 side is suppressed.

  For example, when a forward bias is applied (current drive) to the optical waveguide layer A, no current flows through the semi-insulating current diffusion prevention layer 102, and thus the efficiency of carrier injection into the active waveguide layer 105 is improved. Is obtained.

  Further, even when a reverse bias is applied to the optical waveguide layer A, the leakage current flowing in the current diffusion preventing layer 102 can be reduced, so that a voltage can be efficiently applied to the active waveguide layer 105. .

Here, an example in which the current diffusion prevention layer 102 is made of Fe-doped semi-insulating Ga _x In _1-x P has been described, but the current diffusion prevention layer 102 may be a dielectric film such as SiO ₂ , for example. . However, in the case where the current diffusion preventing layer 102 is a semiconductor film, an optical semiconductor element can be provided as a lateral device having better characteristics than the prior art by utilizing a conventional semiconductor process extension technique.

  Next, a method for manufacturing an optical semiconductor element will be described with reference to FIGS. 2A to 2K show a manufacturing process of the optical semiconductor device according to the first embodiment of the present invention.

  2A, first, a laminated structure of a current diffusion prevention layer 102 made of Fe-doped semi-insulating GaInP and an optical waveguide layer A is formed on a semi-insulating substrate 101 made of semi-insulating InP, for example, an organic metal vapor phase. It is formed by crystal growth using a growth (MOVPE: Metalorganic Vapor Phase Epitaxy) method. In general, in the MOVPE method using the semi-insulating substrate 101 made of semi-insulating InP, it is known that the product growth is performed at a temperature of about 600 ° C. to 700 ° C. In the example of a), the substrate temperature is set to 620 ° C., for example.

In FIG. 2A, the doping concentration of the current diffusion preventing layer 102 made of semi-insulating GaInP is, for example, 1 × 10 ¹⁷ cm ⁻³ , the Ga composition (x) is 0.1, and the thickness is 30 nm. be able to.

  Although the MOVPE method will be described as an example of the crystal growth method, in any case, a crystal growth method such as a molecular beam epitaxy method may be employed instead of the MOVPE method.

Next, a SiO ₂ film 112-1 having a thickness of, for example, 100 nm is formed on the surface of the manufactured wafer by, for example, a plasma CVD method (FIG. 2B).

Thereafter, the region where the n-type InP layer 106 is to be formed is removed from the region where the SiO ₂ film 112-1 is formed using, for example, photolithography (FIG. 2C).

After removing a part of the SiO ₂ film 112-1, a part of the optical waveguide layer A corresponding to a region where the n-type InP layer 106 is formed is removed by dry etching, for example (FIG. 2D). For removal of the optical waveguide layer A, wet etching, for example, may be used instead of dry etching. However, dry etching is superior to wet etching in terms of the perpendicularity of the etched surface. Etching is used.

  Next, for example, an n-type InP layer 106 and an n-type GaInAs contact layer 108 are sequentially formed on the wafer by crystal growth in the region from which the optical waveguide layer A has been removed using the MOVPE method (FIG. 2 ( e)).

After the n-type InP layer 106 and the n-type GaInAs contact layer 108 are crystal-grown, the SiO ₂ film 112-1 on the wafer surface is completely removed (FIG. 2 (f)).

Then, again, a SiO ₂ film 112-2 having a thickness of, for example, 100 nm is formed on the entire surface of the wafer by, for example, a plasma CVD method, and then the SiO ₂ film 112-2 is formed by using, for example, photolithography. Among the regions, the region where the p-type InP layer 107 is to be formed is removed (FIG. 2G).

After removing the SiO ₂ film 112-2, a part of the optical waveguide layer A corresponding to the region where the p-type InP layer 107 is formed is removed by dry etching, for example (FIG. 2H).

  Next, for example, a p-type InP layer 107 and a p-type GaInAs contact layer 110 are sequentially formed on the wafer by crystal growth in the region from which the optical waveguide layer A has been removed using the MOVPE method (FIG. 2 ( i)).

After the p-type InP layer 107 and the p-type GaInAs contact layer 110 are grown, the SiO ₂ film 112-2 on the wafer surface is completely removed (not shown).

  Thereafter, a photoresist is applied to the entire surface of the wafer, and an electrode is formed out of the region of the optical waveguide layer A and the regions of the n-type GaInAs contact layer 108 and the p-type GaInAs contact layer 110 using, for example, photolithography. Leave the photoresist only in the areas that will be. Thereafter, unnecessary regions of the n-type GaInAs contact layer 108 and the p-type GaInAs contact layer 110 are removed by, for example, wet etching using an etchant in which sulfuric acid, hydrogen peroxide solution, and water are mixed, for example (FIG. 2 (j )).

  Finally, an n-type electrode 109 and a p-type electrode 111 are formed on the n-type GaInAs contact layer 108 and the p-type GaInAs contact layer 110, respectively, and cleaved to a desired length, thereby completing an optical semiconductor element (see FIG. 2 (k)). For example, when the optical semiconductor element operates as a semiconductor laser, the above-described cleavage plane is used as a resonator.

  As described above, according to the optical semiconductor device of this embodiment, the current diffusion preventing layer 102 located under the optical waveguide layer A has a semi-insulating property, and the band gap energy is the n-type InP layer 106, the p-type. Since it is larger than the InP layer 107, current spreading to the current diffusion preventing layer 102 side is suppressed. Therefore, the characteristics of the optical semiconductor element are improved.

Second Embodiment
FIG. 3A shows a perspective view of an optical semiconductor element according to the second embodiment of the present invention, and FIG. 3B shows a cross-sectional view of the optical semiconductor element according to the second embodiment of the present invention. The optical semiconductor element of the second embodiment is different from the first embodiment mainly in that a layer having a refractive index smaller than that of the semiconductor material, for example, an air layer, is formed under the optical waveguide layer A. Unlike the optical semiconductor element of the first embodiment, the optical semiconductor element of the second embodiment is characterized in that the recombination of carriers is further suppressed by forming an air layer directly under the optical waveguide layer A. .

  As in the case of the first embodiment, the optical semiconductor element of the second embodiment includes a semi-insulating substrate 201 made of semi-insulating InP and a current diffusion preventing layer 202 formed on the semi-insulating substrate 201. A sacrificial layer 203a, 203b made of GaInAs, an optical waveguide layer A, an n-type InP layer 207 (n-type semiconductor layer) formed on both sides of the optical waveguide layer A, and a p-type InP layer 208 (p-type semiconductor). Layer). The sacrificial layers 203a and 203b exist only in the regions of the n-type InP layer 207 and the p-type InP layer 208, and an air layer is formed between the current diffusion preventing layer 202 and the optical waveguide layer A.

  Next, a method for manufacturing an optical semiconductor element will be described with reference to FIGS. 4A to 4L show a process for manufacturing an optical semiconductor device according to the second embodiment of the present invention.

  In FIG. 4A, a laminated structure of a semi-insulating GaInP current diffusion preventing layer 202, a sacrificial layer 203 made of GaInAs, and an optical waveguide layer A is sequentially formed on a semi-insulating substrate 201 made of InP using, for example, the MOVPE method. For example, it is formed by crystal growth at a substrate temperature of 620 ° C. The laminated structure of the optical waveguide layer A is the same as that in the first embodiment.

Next, as in the case shown in FIGS. 2B to 2K, the manufacture of FIGS. 4B to 4K is performed. That is, a SiO ₂ film 213-1 having a thickness of, for example, 100 nm is formed on the surface of the manufactured wafer, that is, the upper optical confinement layer 204b by, for example, a plasma CVD method (FIG. 4B).

Thereafter, the region where the n-type InP layer 207 is to be formed is removed from the region of the SiO ₂ film 213-1 using, for example, photolithography (FIG. 4C).

  Thereafter, a part of the optical waveguide layer A corresponding to the region where the n-type InP layer 207 is formed is removed by, for example, dry etching (FIG. 4D).

  Next, an n-type InP layer 207 having a band gap of, for example, 1.35 eV and an n-type GaInAs contact layer 209 are sequentially formed on the wafer in the region where the optical waveguide layer A is removed using the MOVPE method. It is formed by growth (FIG. 4E).

After the n-type InP layer 207 and the n-type GaInAs contact layer 209 are crystal-grown, all of the SiO ₂ film 213-1 on the wafer surface is removed (FIG. 4F). Then, again, a SiO ₂ film 213-2 having a thickness of, for example, 100 nm is formed on the entire surface of the wafer by, for example, a plasma CVD method, and then, for example, by using photolithography, in the region of the SiO ₂ film 213-2 Then, the region where the p-type InP layer 208 is to be formed is removed (FIG. 4G).

After removing the SiO ₂ film 213-2, a part of the optical waveguide layer A corresponding to the region where the p-type InP layer 208 is formed is removed by, for example, dry etching (FIG. 4H).

  Next, a p-type InP layer 208 having a band gap energy of, for example, 1.35 eV and a p-type GaInAs contact layer 211 are sequentially formed on the wafer by using the MOVPE method in a region where the optical waveguide layer A is removed. It is formed by crystal growth (FIG. 4 (i)).

After the p-type InP layer 208 and the p-type GaInAs contact layer 211 are crystal-grown, the SiO ₂ film 213-2 on the wafer surface is all removed.

  Thereafter, a photoresist is applied to the entire surface of the wafer, and an electrode is formed from the region of the optical waveguide layer A and the regions of the n-type GaInAs contact layer 209 and the p-type GaInAs contact layer 211 using, for example, photolithography. Leave the photoresist only in the areas that will be. Thereafter, unnecessary regions of the n-type GaInAs contact layer 209 and the p-type GaInAs contact layer 211 are removed by, for example, wet etching using an etchant in which sulfuric acid, hydrogen peroxide solution, and water are mixed (FIG. 4 (j )).

  Then, electrodes are formed on the n-type GaInAs contact layer 209 and the p-type GaInAs contact layer 211, respectively (FIG. 4 (k)).

  In FIG. 4L, holes that reach the GaInAs sacrificial layer are formed by dry etching, for example, in regions that are outside the region of the optical semiconductor element among the regions of the InP layer. Then, a solution capable of selectively etching the GaInAs sacrificial layer (for example, a mixed solution of sulfuric acid, hydrogen peroxide solution, and water) is poured from this hole, so that the GaInAs sacrificial layer 203 including the region immediately below the optical waveguide layer A is formed. Remove some. Finally, the optical semiconductor element shown in FIG. 3 is completed by cleaving with a desired length.

  As described above, according to the optical semiconductor device of the second embodiment, the current diffusion prevention layer 202 disposed below the optical waveguide layer A and the sacrificial layers 203a and 203b has a semi-insulating property, and the band gap energy is low. Since it is larger than the n-type InP layer 207 and the p-type InP layer 208, current spreading toward the current diffusion preventing layer 202 is suppressed. Therefore, the characteristics of the optical semiconductor element are improved.

  As mentioned above, although each embodiment of this invention has been explained in full detail, a concrete structure is not restricted to each embodiment.

For example, in each embodiment, the case where a Ga _0.1 In _0.9 P current diffusion prevention layer having a band gap energy of 1.53 eV is used has been described. However, the current diffusion prevention layer has a band gap energy of n-type semiconductor. If it is more than the band gap energy of InP which is the material of the layer and the p-type semiconductor layer, and the resistivity is higher than the resistivity of InP which is the material of the n-type semiconductor layer and the p-type semiconductor layer, it is not limited to this. .

  FIG. 5 shows the relationship between the Ga composition of GaInP and the band gap energy. A case where the influence of distortion due to lattice mismatch with InP is not considered is indicated by a solid line, and a case where the influence of distortion is taken into consideration is indicated by a dotted line. The alternate long and short dash line indicates the band gap energy when Ga is not included. Thus, since GaInP has a larger band gap energy than InP regardless of the Ga composition, GaInP having any Ga composition can be used for the current diffusion preventing layer.

  Here, FIG. 6 shows the relationship between the Ga composition of GaInP epitaxially grown on the InP substrate and the critical film thickness. When the film thickness is less than 10 nm, a tunnel effect is exhibited. Therefore, a film thickness of 10 nm or more is desirable for the current diffusion prevention layer made of GaInP. Therefore, from the relationship between the Ga composition of GaInP epitaxially grown on the InP substrate shown in FIG. 6 and the critical film thickness, the Ga composition of GaInP capable of epitaxial growth with a film thickness of 10 nm or more that does not exhibit the tunnel effect is 0.27 or less. Therefore, the Ga composition is preferably 0 to 0.27 (corresponding band gap energy: 1.35 eV to 1.82 eV). The film thickness of the current diffusion preventing layer may be 10 nm or more so that the tunnel effect does not appear. However, since crystal defects occur above the critical film thickness, the film thickness of the current diffusion preventing layer is preferably 10 nm or more and the critical film thickness or less. That is, when the GaInP current diffusion prevention layer is formed on the InP substrate, the relationship between the Ga composition and the film thickness of the current diffusion prevention layer that brings about the effect of the present invention is a combination on the solid line shown in FIG.

If the Fe doping concentration of the current diffusion preventing layer is equal to or higher than the residual carrier concentration in the epitaxial film (generally, the residual carrier concentration in the epitaxial film is 1 × 10 ¹⁶ cm ⁻³ or less), the resistance can be increased. In general, it is only necessary to dope Fe atoms activated at a concentration of 1 × 10 ¹⁶ cm ⁻³ or more. However, it is known that doping Fe atoms at a concentration of 2 × 10 ¹⁷ cm ⁻³ or more causes structural deterioration such as pits generated on the surface. Therefore, the doping concentration of the activated Fe atoms is preferably 1 × 10 ¹⁶ cm ⁻³ to 2 × 10 ¹⁷ cm ⁻³ . Here, Fe is used as a dopant used for semi-insulation, but the effect of the present invention is not limited to Fe as long as the current diffusion preventing layer has semi-insulating properties.

  In each embodiment, the case where the current diffusion prevention layer is made of GaInP has been described. However, it is sufficient that the band gap energy is larger than that of the n-type semiconductor layer and the p-type semiconductor layer sandwiching the optical waveguide layer. It is not limited. Therefore, it is desirable that the current diffusion preventing layer is a compound semiconductor composed of a group III element including any one of In, Ga, and Al and a group V element including at least one of N, P, and As. For example, when InP is used for the semiconductor layer sandwiching the optical waveguide layer, the effects described in the embodiments can be obtained even if InAlAs, InAlGaAs, or the like is used for the current diffusion preventing layer. In addition, when GaAs is used for the semiconductor layer sandwiching the optical waveguide layer, the effects described in the embodiments can be obtained even if AlGaAs or the like is used.

  However, the critical film thickness depends on the degree of lattice mismatch between the substrate and the epitaxial film. FIG. 7 shows the relationship between the critical film thickness and the degree of lattice mismatch between the substrate and the epitaxial film. Therefore, when a lattice mismatch occurs between the current diffusion preventing layer and the substrate material, it is desirable that the degree of the lattice mismatch is in a range where the critical film thickness is 10 nm or more.

101, 201 Semi-insulating substrate 102, 202 Current diffusion prevention layer 103, 204 Optical confinement layer 104, 205 Clad layer 105, 206 Active waveguide layer 203 Sacrificial layer 106, 207 n-type InP layer 107, 208 p-type InP layer 108 , 209 n-type GaInAs contact layer 109, 210 n-type electrode 110, 211 p-type GaInAs contact layer 111, 212 p-type electrode 112, 213 SiO ₂ film 801 semi-insulating substrate 802 active waveguide layer 803 n-type semiconductor layer 804 p Type semiconductor layer 805 n type contact layer 806 n type electrode 807 p type contact layer 808 p type electrode

According to a fourth aspect of the present invention, in the optical semiconductor device according to any one of the first to third aspects, the sacrifice formed between the current diffusion preventing layer, the n-type semiconductor layer, and the p-type semiconductor layer. And an air layer formed between the current diffusion preventing layer and the optical waveguide layer by selectively removing a part of the sacrificial layer, and the current diffusion preventing layer and the optical waveguide. The light of the optical waveguide layer is confined in the vertical direction by an air layer between the optical waveguide layer and an air layer above the optical waveguide layer .

Claims (5)

A semiconductor substrate;
A current diffusion prevention layer formed on the semiconductor substrate;
An optical waveguide layer formed on the current diffusion preventing layer;
An n-type semiconductor layer formed on the current diffusion preventing layer so as to be in contact with the first surface of the optical waveguide layer;
A p-type semiconductor layer formed on the current diffusion preventing layer so as to be in contact with the second surface of the optical waveguide layer facing the first surface;
With
The current diffusion preventing layer has a band gap energy equal to or higher than that of the n-type semiconductor layer and the p-type semiconductor layer, and has a higher resistivity than the n-type semiconductor layer and the p-type semiconductor layer. An optical semiconductor element characterized by the above.   The current diffusion preventing layer is a compound semiconductor composed of a group III element containing at least one of In, Ga, and Al and a group V element containing at least one of N, P, and As. 2. The optical semiconductor device according to 1.   The optical semiconductor element according to claim 1, wherein the current diffusion preventing layer is a semiconductor film having a thickness of 10 nm or more and a critical thickness or less. A sacrificial layer formed between the current diffusion preventing layer and the n-type semiconductor layer and the p-type semiconductor layer;
4. The optical semiconductor element according to claim 1, wherein an air layer is formed between the current diffusion preventing layer and the optical waveguide layer. The optical waveguide layer is
A first cladding layer;
The active waveguide layer formed on the first cladding layer;
A second cladding layer formed on the active waveguide layer;
Including
5. The optical semiconductor device according to claim 1, wherein the active waveguide layer is in contact with the n-type semiconductor layer and the p-type semiconductor layer, respectively.

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