JP2014528662A5 - - Google Patents

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JP2014528662A5
JP2014528662A5 JP2014533240A JP2014533240A JP2014528662A5 JP 2014528662 A5 JP2014528662 A5 JP 2014528662A5 JP 2014533240 A JP2014533240 A JP 2014533240A JP 2014533240 A JP2014533240 A JP 2014533240A JP 2014528662 A5 JP2014528662 A5 JP 2014528662A5
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JP
Japan
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ack
hybrid arq
nack bits
state information
channel state
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JP2014533240A
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Japanese (ja)
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JP5948423B2 (ja
JP2014528662A (ja
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Priority claimed from PCT/SE2012/050152 external-priority patent/WO2013051983A1/en
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Publication of JP2014528662A5 publication Critical patent/JP2014528662A5/ja
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Publication of JP5948423B2 publication Critical patent/JP5948423B2/ja
Expired - Fee Related legal-status Critical Current
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JP2014533240A 2011-10-03 2012-02-14 Ｐｕｃｃｈフォーマット３リソースを用いるａｃｋ／ｎａｃｋとチャネル状態情報の同時報告 Expired - Fee Related JP5948423B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201161542503P 2011-10-03 2011-10-03
US61/542,503 2011-10-03
PCT/SE2012/050152 WO2013051983A1 (en) 2011-10-03 2012-02-14 Simultaneous reporting of ack/nack and channel-state information using pucch format 3 resources

Publications (3)

Publication Number Publication Date
JP2014528662A JP2014528662A (ja) 2014-10-27
JP2014528662A5 true JP2014528662A5 (enExample) 2015-03-05
JP5948423B2 JP5948423B2 (ja) 2016-07-06

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JP2014533240A Expired - Fee Related JP5948423B2 (ja) 2011-10-03 2012-02-14 Ｐｕｃｃｈフォーマット３リソースを用いるａｃｋ／ｎａｃｋとチャネル状態情報の同時報告

Country Status (8)

Country Link
US (4) US8837410B2 (enExample)
EP (1) EP2764650A1 (enExample)
JP (1) JP5948423B2 (enExample)
CN (1) CN103843277B (enExample)
AU (1) AU2012319228B2 (enExample)
IN (1) IN2014KN00930A (enExample)
RU (1) RU2705224C2 (enExample)
WO (1) WO2013051983A1 (enExample)

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