JP2014528609A5 - - Google Patents
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- Publication number
- JP2014528609A5 JP2014528609A5 JP2014533604A JP2014533604A JP2014528609A5 JP 2014528609 A5 JP2014528609 A5 JP 2014528609A5 JP 2014533604 A JP2014533604 A JP 2014533604A JP 2014533604 A JP2014533604 A JP 2014533604A JP 2014528609 A5 JP2014528609 A5 JP 2014528609A5
- Authority
- JP
- Japan
- Prior art keywords
- lock
- tas
- spin
- shared memory
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims 19
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Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201161541051P | 2011-09-29 | 2011-09-29 | |
| US61/541,051 | 2011-09-29 | ||
| US13/414,593 | 2012-03-07 | ||
| US13/414,593 US8782352B2 (en) | 2011-09-29 | 2012-03-07 | System and method for supporting a self-tuning locking mechanism in a transactional middleware machine environment |
| PCT/US2012/055942 WO2013048826A1 (en) | 2011-09-29 | 2012-09-18 | System and method for supporting a self-tuning locking mechanism in a transactional middleware machine environment |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014528609A JP2014528609A (ja) | 2014-10-27 |
| JP2014528609A5 true JP2014528609A5 (OSRAM) | 2015-10-01 |
| JP6088527B2 JP6088527B2 (ja) | 2017-03-01 |
Family
ID=47993775
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014533604A Active JP6088527B2 (ja) | 2011-09-29 | 2012-09-18 | トランザクショナルミドルウェアマシン環境においてセルフチューニングロックメカニズムをサポートするためのシステムおよび方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US8782352B2 (OSRAM) |
| JP (1) | JP6088527B2 (OSRAM) |
| KR (1) | KR101964392B1 (OSRAM) |
| CN (1) | CN103842986B (OSRAM) |
| IN (1) | IN2014CN01325A (OSRAM) |
| WO (1) | WO2013048826A1 (OSRAM) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2523804B (en) * | 2014-03-06 | 2021-03-31 | Advanced Risc Mach Ltd | Transactional memory support |
| CN106471486B (zh) * | 2014-04-30 | 2019-05-17 | 甲骨文国际公司 | 用于在事务中间件机器环境中支持自适应自调整锁定机制的系统和方法 |
| EP3304297A1 (en) * | 2015-06-04 | 2018-04-11 | Siemens Aktiengesellschaft | Method and system for clustering engineering data in a multidisciplinary engineering system |
| US10459909B2 (en) * | 2016-01-13 | 2019-10-29 | Walmart Apollo, Llc | System for providing a time-limited mutual exclusivity lock and method therefor |
| WO2017131624A1 (en) * | 2016-01-26 | 2017-08-03 | Hewlett Packard Enterprise Development Lp | A unified lock |
| US20240152359A1 (en) * | 2022-11-04 | 2024-05-09 | International Business Machines Corporation | Ensuring fairness for try spin lock |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5050072A (en) | 1988-06-17 | 1991-09-17 | Modular Computer Systems, Inc. | Semaphore memory to reduce common bus contention to global memory with localized semaphores in a multiprocessor system |
| JP2853608B2 (ja) * | 1995-05-30 | 1999-02-03 | 日本電気株式会社 | 並列処理システムのファイルアクセス制御方式 |
| JPH10269027A (ja) * | 1997-03-26 | 1998-10-09 | Toshiba Corp | ディスク装置及び同装置におけるバッファ管理制御方法 |
| US6182216B1 (en) * | 1997-09-17 | 2001-01-30 | Frank C. Luyster | Block cipher method |
| US6549961B1 (en) | 1999-10-27 | 2003-04-15 | Infineon Technologies North America Corporation | Semaphore access in a multiprocessor system |
| KR20010045288A (ko) * | 1999-11-04 | 2001-06-05 | 이계철 | 다중 데이터 관리 미들웨어 시스템에서의 공유메모리를이용한 스키마 관리 방법 |
| JP2001229678A (ja) * | 1999-12-07 | 2001-08-24 | Toshiba Corp | 半導体記憶装置 |
| US20010033654A1 (en) * | 2000-01-13 | 2001-10-25 | Gabor Wieser | W-EC1 encryption and decryption method and system |
| US7430627B2 (en) | 2000-12-19 | 2008-09-30 | International Business Machines Corporation | Adaptive reader-writer lock |
| AU2002356885B2 (en) * | 2001-11-01 | 2008-10-02 | Verisign, Inc. | Method and system for updating a remote database |
| CA2374290A1 (en) * | 2002-03-01 | 2003-09-01 | Ibm Canada Limited-Ibm Canada Limitee | Updating spin counters for spin latches |
| US7697690B2 (en) * | 2003-07-21 | 2010-04-13 | Hewlett-Packard Development Company, L.P. | Windowed backward key rotation |
| US7594234B1 (en) | 2004-06-04 | 2009-09-22 | Sun Microsystems, Inc. | Adaptive spin-then-block mutual exclusion in multi-threaded processing |
| KR100596394B1 (ko) * | 2004-12-13 | 2006-07-04 | 한국전자통신연구원 | 유닉스 시스템에서 이중화된 공유메모리 접근 제어 방법및 장치 |
| US7984248B2 (en) | 2004-12-29 | 2011-07-19 | Intel Corporation | Transaction based shared data operations in a multiprocessor environment |
| US20060143511A1 (en) | 2004-12-29 | 2006-06-29 | Huemiller Louis D Jr | Memory mapped spin lock controller |
| US8028133B2 (en) | 2006-02-22 | 2011-09-27 | Oracle America, Inc. | Globally incremented variable or clock based methods and apparatus to implement parallel transactions |
| CN101546275B (zh) * | 2008-03-26 | 2012-08-22 | 中国科学院微电子研究所 | 一种获取多处理器硬件信号量的方法 |
-
2012
- 2012-03-07 US US13/414,593 patent/US8782352B2/en active Active
- 2012-09-18 CN CN201280047496.7A patent/CN103842986B/zh active Active
- 2012-09-18 WO PCT/US2012/055942 patent/WO2013048826A1/en not_active Ceased
- 2012-09-18 KR KR1020147005377A patent/KR101964392B1/ko active Active
- 2012-09-18 IN IN1325CHN2014 patent/IN2014CN01325A/en unknown
- 2012-09-18 JP JP2014533604A patent/JP6088527B2/ja active Active
-
2014
- 2014-05-20 US US14/282,947 patent/US8914588B2/en active Active
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