JP2014241477A - Communication system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a communication system in which a plurality of terminal devices are connected with a communication bus at lower cost.SOLUTION: A communication system of the invention is a communication system in which a plurality of terminal devices 10 are connected with a communication bus, and an output terminal 24 of an upper-level terminal device 10 and an input terminal 23 of a lower-level terminal device 10 are connected with a signal line. The terminal device 10 includes: first pulse signal outputting means for outputting one pulse signal from the output terminal 24 under the condition of start of initial setting; second pulse signal outputting means for outputting one pulse signal from the output terminal 24 under the condition that one pulse signal was input into the input terminal 23; and address setting means for setting its address used when communication is performed via the communication bus on the basis of the number of pulse signals inputted into the input terminal 23.

Description

  The present invention relates to a communication system in which a plurality of terminal devices are connected to a communication bus.

  In a communication system in which a plurality of terminal devices are connected to a communication bus, it is necessary to set a unique address for each terminal device. As a technique for setting a unique address for each terminal device, for example, a configuration in which a multi-bit digital signal can be arbitrarily set for each terminal device by a switch, a setting pin, etc. provided in each terminal device, and different values for each terminal device. A method of setting a unique address for each terminal device by manually setting the digital signal is known.

  However, the method of manually setting the address of each terminal device as described above is complicated and may cause an address setting omission or erroneous setting. Therefore, as an example of a technique for automatically setting the address of each terminal device, there is a communication system that automatically distributes the address from the center controller to each terminal device connected to the transmission line through the transmission line. It is known (see, for example, Patent Document 1).

Japanese Patent Laid-Open No. 4-156739

  However, in the communication system disclosed in Patent Document 1 described above, it is necessary to set a unique identification number that is different for each terminal device in advance, and to mount an identification number storage unit including a nonvolatile memory that stores the unique identification number in each terminal device. There is. In other words, the prior art disclosed in the above Patent Document 1 requires that a dedicated circuit chip or the like be mounted on each terminal device in order to give a unique identification number, thereby increasing the manufacturing cost of the terminal device, As a result, there is a risk that the cost of the entire communication system will increase significantly.

  The present invention has been made in view of such circumstances, and an object thereof is to realize a communication system in which a plurality of terminal devices are connected to a communication bus at a lower cost.

<First Aspect of the Present Invention>
A first aspect of the present invention is a communication system in which a plurality of terminal devices are connected to a communication bus, wherein an output terminal of a higher-level terminal device and an input terminal of a lower-level terminal device are connected by a signal line, The terminal device has a first pulse signal output means for outputting one pulse signal from the output terminal on the condition that the initial setting is started, and from the output terminal on the condition that one pulse signal is input to the input terminal. Second pulse signal output means for outputting one pulse signal, and address setting means for setting its own address when performing communication via the communication bus based on the number of pulse signals input to the input terminal And a communication system characterized by the above.

  In the plurality of terminal devices, the output terminal of the upper terminal device and the input terminal of the lower terminal device are connected by a signal line. Here, “upper” and “lower” mean higher and lower in the order of connection by signal lines. Therefore, in the plurality of terminal devices, nothing is connected to the input terminal of the terminal device with the highest connection order and the output terminal of the terminal device with the lowest order.

  Each terminal device first outputs one pulse signal from the output terminal on condition that the initial setting is started (first pulse signal output means). That is, at the start of the initial setting, one pulse signal is output from the upper terminal device to the lower terminal device. Each terminal device outputs one pulse signal from the output terminal on the condition that one pulse signal is input to the input terminal (second pulse signal output means). That is, when one pulse signal is output from the upper terminal apparatus to the lower terminal apparatus, the lower terminal apparatus outputs one pulse signal to the lower terminal apparatus.

  Therefore, for example, since the highest terminal device is not connected to the input terminal, the number of pulse signals input to the input terminal is zero. In addition, the second terminal device whose input terminal is connected to the output terminal of the first terminal device outputs only one pulse signal from the first terminal device at the start of the initial setting. The number of pulse signals to be performed is 1. Further, the third terminal device whose input terminal is connected to the output terminal of the second terminal device outputs one pulse signal from the second terminal device at the start of the initial setting and from the first terminal device. Since one pulse signal is further output from the second terminal device in response to one pulse signal output to the second terminal device, the number of pulse signals input to the input terminal is two.

  That is, in the plurality of terminal devices, the number of pulse signals input to the input terminal increases one by one from the upper level to the lower level. Therefore, each terminal device sets its own address when performing communication via the communication bus based on the number of pulse signals input to the input terminal, thereby providing a unique address that does not overlap with other terminal devices. You can set it as your own address. That is, the communication system according to the present invention is based on the number of pulse signals input to the input terminals of each terminal device, rather than distributing addresses to each terminal device from an address management device that performs address setting and management. Each terminal device sets its own address.

  In this way, the communication system according to the present invention can automatically set a unique address in each terminal device without providing an address management device or the like for setting and managing the address of each terminal device. Moreover, the communication system according to the present invention can be realized with an extremely simple configuration in which the output terminals of the upper terminal devices of the plurality of terminal devices and the input terminals of the lower terminal devices are simply connected by signal lines.

  Thereby, according to the 1st aspect of this invention, the effect that the communication system with which a some terminal device is connected to a communication bus can be implement | achieved at lower cost is acquired.

<Second Aspect of the Present Invention>
According to a second aspect of the present invention, in the first aspect of the present invention described above, the second pulse signal output means has a predetermined standby time elapsed from the time when one pulse signal is input to the input terminal. A communication system is characterized in that one pulse signal is output from the output terminal later.
According to such a feature, a time difference due to the standby time can be provided between the output timing of the pulse signal by the first pulse signal output means and the output timing of the pulse signal by the second pulse signal output means. As a result, the pulse signals input to the input terminal of the terminal device can be reliably detected one by one, so that the possibility of erroneously counting the number of pulse signals can be reduced.

<Third Aspect of the Present Invention>
According to a third aspect of the present invention, in the first aspect or the second aspect of the present invention, the second pulse signal output means has a pulse width of a predetermined length of the pulse signal input to the input terminal. On the condition that this is the case, the communication system is characterized in that one pulse signal is output from the output terminal.
According to such a feature, for example, when the potential of the signal line connecting the input terminal and the output terminal of the terminal device changes instantaneously due to noise or the like, the possibility of erroneous detection as a pulse signal is reduced. can do. As a result, the possibility of erroneously counting the number of pulse signals input to the input terminal can be reduced, so that the possibility of erroneous address setting due to noise or the like can be reduced.

<Fourth aspect of the present invention>
According to a fourth aspect of the present invention, in any one of the first to third aspects of the present invention described above, the address setting unit adds the number of pulse signals input to the input terminal to a common base address. Then, the communication system is characterized in that its own address is determined.
According to such a feature, each terminal device can determine its own address by a very simple procedure without requiring complicated arithmetic processing.

<Fifth aspect of the present invention>
According to a fifth aspect of the present invention, in any one of the first to fourth aspects of the present invention described above, the terminal device further includes a control device that communicates with the plurality of terminal devices via the communication bus. Further includes a battery, a charge / discharge circuit for the battery, and the control device includes means for controlling the charge / discharge circuit for each of the plurality of terminal devices in accordance with a state of charge of the battery. This is a featured communication system.
According to such a feature, in the communication system in which the control device controls the charging / discharging of the battery of each terminal device via the communication bus, the operational effect of any of the first to fourth aspects of the present invention described above is achieved. Can be obtained.

  According to the present invention, a communication system in which a plurality of terminal devices are connected to a communication bus can be realized at a lower cost.

The block diagram which illustrated the structure of the terminal device. 1 is a system configuration diagram schematically illustrating the configuration of a communication system according to the present invention. The flowchart which illustrated the address setting procedure by a terminal control part. The flowchart which illustrated the address setting procedure by a terminal control part. The flowchart which illustrated the procedure of the timer interrupt routine. The timing chart which illustrated the change of the voltage of the input terminal of each terminal device, and an output terminal.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
In addition, this invention is not specifically limited to the Example demonstrated below, It cannot be overemphasized that a various deformation | transformation is possible within the range of the invention described in the claim.

<Configuration of terminal device>
A terminal device 10 constituting a communication system according to the present invention will be described with reference to FIG.
FIG. 1 is a block diagram illustrating the configuration of the terminal device 10.

  The terminal device 10 is a power supply device including a battery module 11, a charging circuit 12, a discharging circuit 13, a voltage measuring circuit 14, a temperature measuring circuit 15, a current measuring circuit 16, a terminal control unit 17, and a connector 20.

  The battery module 11 is configured by connecting a plurality of secondary batteries such as nickel-hydrogen secondary batteries in series or in parallel. The charging circuit 12 is a circuit that controls charging of the battery module 11, and the input side is connected to the charging terminal 21 of the connector 20, and the output side is connected to the positive electrode of the battery module 11 through the diode D 1. An external power source is connected to the charging terminal 21 of the connector 20. The discharge circuit 13 is a circuit that controls the discharge of the battery module 11, and the output side is connected to the discharge terminal 22 of the connector 20, and the input side is connected to the positive electrode of the battery module 11 through the diode D2. A load device that operates with the power of the battery module 11 is connected to the discharge terminal 22 of the connector 20. The voltage measurement circuit 14 is a circuit that measures the voltage of the battery module 11. The temperature measurement circuit 15 is a circuit that includes a known thermistor and the like and measures the temperature of the battery module 11. The current measurement circuit 16 is a circuit that measures a current during charging / discharging of the battery module 11.

  The terminal control unit 17 is a known microcomputer control device, and controls the charging circuit 12 and the discharging circuit 13 based on output signals of the voltage measuring circuit 14, the temperature measuring circuit 15, and the current measuring circuit 16. The terminal control unit 17 is connected to the communication bus via the communication bus connection unit 25 of the connector 20. Further, in the terminal control unit 17, one of the digital input ports is connected to the input terminal 23 of the connector 20, and one of the digital output ports is connected to the output terminal 24 of the connector 20. The input terminal 23 is pulled up to a predetermined voltage through the resistor R <b> 1 inside the terminal device 10.

<Configuration of communication system>
The configuration of the communication system according to the present invention will be described with reference to FIG.
FIG. 2 is a system configuration diagram schematically illustrating the configuration of a communication system according to the present invention.

  In the communication system, the first terminal device 10A, the second terminal device 10B, the third terminal device 10C, the fourth terminal device 10D, and the system controller 30 are connected to a communication bus. The first terminal device 10A, the second terminal device 10B, the third terminal device 10C, and the fourth terminal device 10D are devices having the same configuration, and are all the terminal devices 10 illustrated and described in FIG. The first terminal device 10A is connected to the communication bus through the communication bus connection unit 25A. The second terminal device 10B is connected to the communication bus through the communication bus connection unit 25B. The third terminal device 10C is connected to the communication bus through the communication bus connection unit 25C. The fourth terminal device 10D is connected to the communication bus through the communication bus connection unit 25D.

  The system controller 30 as a “control device” includes a known microcomputer control device, and through a communication bus, the terminal control unit 17A of the first terminal device 10A, the terminal control unit 17B of the second terminal device 10B, and the third terminal device 10C. The terminal control unit 17C and the terminal control unit 17D of the fourth terminal device 10D communicate with each other. Then, the system controller 30 comprehensively manages the charging states of the battery modules 11 of the first terminal device 10A, the second terminal device 10B, the third terminal device 10C, and the fourth terminal device 10D, and charges each battery module 11 Depending on the state or the like, a charge / discharge control command is output to each of the terminal controllers 17A to 17D.

  In the communication system, the output terminal 24 of the upper terminal device 10 and the input terminal 23 of the lower terminal device 10 are connected by a signal line. Here, “upper” and “lower” mean higher and lower in the order of connection by signal lines. More specifically, the output terminal 24A of the first terminal device 10A and the input terminal 23B of the second terminal device 10B are connected by a single signal line. The output terminal 24B of the second terminal device 10B and the input terminal 23C of the third terminal device 10C are connected by a single signal line. The output terminal 24C of the third terminal device 10C and the input terminal 23D of the fourth terminal device 10D are connected by a single signal line. The input terminal 23A of the first terminal device 10A having the highest connection order is not connected. Also, nothing is connected to the output terminal 24D of the fourth terminal device 10D with the lowest connection order, but when there is a lower terminal device 10, the input terminal 23 of the terminal device 10 is connected. be able to.

<Address setting of terminal device>
An address setting procedure executed by the terminal control unit 17 of the terminal device 10 will be described with reference to FIGS. 3A to 5.
3A and 3B are flowcharts illustrating an address setting procedure by the terminal control unit 17.

  When a reset signal that is an initial setting start condition is input, the terminal control unit 17 first initializes an output signal (step S1 in FIG. 3A). More specifically, the voltage of the output terminal 24 is set to a low level (0 V). Subsequently, the timer interrupt routine is initialized (step S2 in FIG. 3A), wait processing for the waiting time TD1 is executed (step S3 in FIG. 3A), and then the timer interrupt routine is started (step S4 in FIG. 3A). The waiting time TD1 is a waiting time for initialization of the timer interrupt routine, and is set to about 1 second in this embodiment. The specific procedure of the timer interrupt routine will be described later.

  Subsequently, the pulse reception flag is cleared (step S5 in FIG. 3B). The pulse reception flag is a flag indicating that reception of a pulse signal is detected by a timer interrupt routine described later. Subsequently, a timer for monitoring the reception timeout of the pulse signal at the input terminal 23 is started (step S6 in FIG. 3B).

  Subsequently, output of a pulse signal from the output terminal 24 is started (step S7 in FIG. 3B). More specifically, the voltage of the output terminal 24 is set to a high level (for example, 5 V). Then, after executing the wait process for time TW (step S8 in FIG. 3B), the output of the pulse signal from the output terminal 24 is terminated (step S9 in FIG. 3B). More specifically, the voltage of the output terminal 24 is returned to the low level. The time TW is a time that defines the width of the pulse signal. For example, in the present embodiment, the time TW is set to 10 mS. That is, the terminal control unit 17 outputs one pulse signal from the output terminal 24 on the condition that the initial setting is started (first pulse signal output means).

  Subsequently, it is determined whether or not a pulse signal is received at the input terminal 23 (step S10 in FIG. 3B). More specifically, it is determined whether or not a pulse reception flag is set by a timer interrupt routine described later. When a pulse signal is received at the input terminal 23 (Yes in step S10), a pulse reception counter indicating the number of received pulse signals is updated (step S11 in FIG. 3B). Then, after executing the wait process at the standby time TD2 (step S12 in FIG. 3B), the process of steps S5 to S9 is executed again by returning to step S5. As a result, one pulse signal is further output from the output terminal 24. That is, the terminal control unit 17 outputs one pulse signal from the output terminal 24 on condition that one pulse signal is input to the input terminal 23 (second pulse signal output means).

  The standby time TD2 is a waiting time for providing a time difference between the output timing of the pulse signal by the first pulse signal output means and the output timing of the pulse signal by the second pulse signal output means. The standby time TD2 may be set to a time sufficiently longer than the time TW that defines the width of the pulse signal. For example, in this embodiment, the standby time TD2 is set to 100 mS. By setting such a standby time TD2, it is possible to reliably detect the pulse signals input to the input terminal 23 of the terminal device 10 one by one, thereby reducing the possibility of erroneously counting the number of pulse signals. can do.

  On the other hand, when the pulse signal is not received at the input terminal 23 (No in step S10), it is determined whether or not the timer has timed out (step S13 in FIG. 3B). If not timed out (No in step S13), the process returns to step S10 to determine whether or not a pulse signal is received at the input terminal 23. When the time-out occurs (Yes in step S13), the timer interrupt routine is stopped (step S14 in FIG. 3B), and based on the value of the pulse reception counter, its own address for communication via the communication bus is determined. (Step S15 in FIG. 3B). That is, the terminal control unit 17 sets its own address when performing communication via the communication bus based on the number of pulse signals input to the input terminal 23 (address setting means).

  FIG. 4 is a flowchart illustrating the procedure of the timer interrupt routine. The timer interrupt routine monitors the state of the input terminal 23. The timer interrupt routine is started by a timer interrupt in the address setting procedure (step S4 in FIG. 3A) and until a stop process is performed (step S14 in FIG. 3B) at a fixed period (for example, 1 mS) regardless of the address setting procedure. Repeatedly executed.

  First, it is determined whether or not the voltage at the input terminal 23 is at a high level (step S21 in FIG. 4). If the voltage at the input terminal 23 is at a high level (Yes in step S21), the pulse width count is counted up and updated (step S22 in FIG. 4).

  On the other hand, if the voltage at the input terminal 23 is not at the high level, it is determined whether or not the pulse width of the pulse signal is a specified value (step S23 in FIG. 4). More specifically, the pulse width of the pulse signal is calculated from the count value of the pulse width count, and it is determined whether or not the pulse width is within a preset pulse width range. For example, when the time TW for defining the pulse width of the pulse signal output from the output terminal 24 is set to 10 mS, if the pulse width calculated from the count value of the pulse width count is within a range of 9 to 11 mS, for example, the pulse signal Is determined to be a valid pulse signal. Therefore, for example, when the potential of the signal line connecting the input terminal 23 and the output terminal 24 of the terminal device 10 changes instantaneously due to noise or the like, it is possible to reduce the possibility of erroneously detecting this as a pulse signal. . As a result, the possibility of erroneously counting the number of pulse signals input to the input terminal 23 can be reduced, so that the possibility of erroneous address setting due to noise or the like can be reduced.

  If the pulse width of the pulse signal is the specified value (Yes in step S23), the pulse reception flag is set (step S24 in FIG. 4), and the count value of the pulse width count is cleared (step S25 in FIG. 4). . On the other hand, when the pulse width of the pulse signal is not the specified value (No in step S23), the count value of the pulse width count is cleared without setting the pulse reception flag (step S25 in FIG. 4).

  FIG. 5 is a timing chart illustrating changes in voltage at the input terminal 23 and the output terminal 24 of each terminal device 10.

  When the reset signal is input, the output terminals 24A to 24D of the first to fourth terminal devices 10A to 10D become low level. Also, the input terminal 23B of the second terminal device 10B connected to the output terminal 24A of the first terminal device 10A, the input terminal 23C of the third terminal device 10C connected to the output terminal 24B of the second terminal device 10B, Similarly, the input terminal 23D of the fourth terminal device 10D connected to the output terminal 24C of the three terminal device 10C is also at the low level (timing T1 in FIG. 5).

  When the standby time TD1 has elapsed since the reset signal was input, the voltages at the output terminals 24A to 24D of the first to fourth terminal devices 10A to 10D become high level (timing T2 in FIG. 5). And when time TW passes, the voltage of the output terminals 24A-24D of 1st-4th terminal device 10A-10D becomes a low level (timing T3 of FIG. 5). That is, when the standby time TD1 elapses after the reset signal is input (timing T2 in FIG. 5), the pulse signal P11 is output from the output terminal 24A of the first terminal apparatus 10A, and the pulse is output from the output terminal 24B of the second terminal apparatus 10B. The signal P21 is output, the pulse signal P31 is output from the output terminal 24C of the third terminal device 10C, and the pulse signal P41 is output from the output terminal 24D of the fourth terminal device 10D (first pulse signal output means).

  Further, as described above, the terminal device 10 outputs one pulse signal from the output terminal 24 on condition that one pulse signal is input to the input terminal 23 (second pulse signal output means). That is, when one pulse signal is output from the upper terminal apparatus 10 to the lower terminal apparatus 10, the lower terminal apparatus 10 outputs one pulse signal to the lower terminal apparatus 10. Hereinafter, each of the first to fourth terminal devices 10A to 10D will be described more specifically.

  The first terminal device 10A having the highest connection order is not connected to the input terminal 23A. Accordingly, in the first terminal apparatus 10A, the number of pulse signals input to the input terminal 23A is 0, and only the pulse signal P11 is output from the output terminal 24A.

  The output terminal 24A of the first terminal device 10A is connected to the input terminal 23B of the second terminal device 10B. Therefore, in the second terminal apparatus 10B, the pulse signal P11 output from the first terminal apparatus 10A is input to the input terminal 23B. Therefore, the number of pulse signals input to the input terminal 23B of the second terminal device 10B is 1. Further, the second terminal apparatus 10B outputs the pulse signal P22 from the output terminal 24B when the standby time TD2 has elapsed from the time when the pulse signal P11 is input to the input terminal 23B (timing T4 in FIG. 5).

  The output terminal 24B of the second terminal device 10B is connected to the input terminal 23C of the third terminal device 10C. Accordingly, in the third terminal apparatus 10C, the pulse signal P21 and the pulse signal P22 output from the second terminal apparatus 10B are input to the input terminal 23C. Therefore, the number of pulse signals input to the input terminal 23C of the third terminal device 10C is 2. Further, the third terminal apparatus 10C outputs the pulse signal P32 from the output terminal 24C when the standby time TD2 has elapsed from the time when the pulse signal P21 is input to the input terminal 23C (timing T4 in FIG. 5). Furthermore, the third terminal apparatus 10C outputs the pulse signal P33 from the output terminal 24C when the standby time TD2 has elapsed from the time when the pulse signal P22 is input to the input terminal 23C (timing T5 in FIG. 5).

The output terminal 24C of the third terminal device 10C is connected to the input terminal 23D of the fourth terminal device 10D. Therefore, in the fourth terminal apparatus 10D, the pulse signal P31, the pulse signal P32, and the pulse signal P33 output from the third terminal apparatus 10C are input to the input terminal 23D. Therefore, the number of pulse signals input to the input terminal 23D of the fourth terminal device 10D is 3. The fourth terminal apparatus 10D outputs the pulse signal P42 from the output terminal 24D when the standby time TD2 has elapsed from the time when the pulse signal P31 is input to the input terminal 23D (timing T4 in FIG. 5). Furthermore, the fourth terminal apparatus 10D outputs the pulse signal P43 from the output terminal 24D when the standby time TD2 has elapsed from the time when the pulse signal P32 is input to the input terminal 23D (timing T5 in FIG. 5). Furthermore, the fourth terminal apparatus 10D outputs the pulse signal P44 from the output terminal 24D when the standby time TD2 has elapsed from the time when the pulse signal P33 is input to the input terminal 23D (timing T6 in FIG. 5).
The output terminal 24D of the fourth terminal device 10D with the lowest connection order is not connected, but if there is a lower terminal device 10, the output terminal 24D of the terminal device 10 has 4 Two pulse signals P41 to P44 are input.

  That is, in the first to fourth terminal devices 10A to 10D, the number of pulse signals input to the input terminal 23 increases one by one from the upper level to the lower level. Accordingly, the first to fourth terminal devices 10A to 10D set their own addresses when performing communication via the communication bus based on the number of pulse signals input to the input terminals 23A to 23D. As a result, the first to fourth terminal devices 10A to 10D can themselves set unique addresses that do not overlap each other as their own addresses.

  For example, the first to fourth terminal devices 10A to 10D can determine their own address by adding the number of pulse signals input to the input terminals 23A to 23D to the common base address. More specifically, since the number of pulse signals input to the input terminal 23A is 0, the first terminal device 10A sets the address obtained by adding 0 to the basic address as its own address. Since the number of pulse signals input to the input terminal 23B is 1, the second terminal device 10B sets the address obtained by adding 1 to the basic address as its own address. Since the number of pulse signals input to the input terminal 23C is two, the third terminal apparatus 10C sets the address obtained by adding 2 to the basic address as its own address. Since the number of pulse signals input to the input terminal 23D is 3, the fourth terminal apparatus 10D sets the address obtained by adding 3 to the basic address as its own address. As described above, the first to fourth terminal apparatuses 10A to 10D can determine their own addresses by an extremely simple procedure without requiring complicated arithmetic processing.

  As described above, the communication system according to the present invention can automatically set a unique address in each terminal device 10 without providing an address management device or the like for setting or managing the address of each terminal device 10. it can. Moreover, the communication system according to the present invention is realized with an extremely simple configuration in which the output terminal 24 of the higher-level terminal device 10 of the plurality of terminal devices 10 and the input terminal 23 of the lower-level terminal device 10 are connected by a signal line. be able to. Therefore, according to the present invention, a communication system in which a plurality of terminal devices 10 are connected to a communication bus can be realized at a lower cost.

10, 10A to 10D Terminal device 11 Battery module 12 Charging circuit 13 Discharging circuit 14 Voltage measuring circuit 15 Temperature measuring circuit 16 Current measuring circuit 17, 17A to 17D Terminal control unit 20 Connector 21 Charging terminal 22 Discharging terminal 23, 23A to 23D Input Terminal 24, 24A-24D Output terminal 25, 25A-25D Communication bus connection part 30 Control apparatus

Claims (5)

A communication system in which a plurality of terminal devices are connected to a communication bus,
The output terminal of the upper terminal device and the input terminal of the lower terminal device are connected by a signal line,
The terminal device includes first pulse signal output means for outputting one pulse signal from the output terminal on condition that the initial setting is started,
Second pulse signal output means for outputting one pulse signal from the output terminal on condition that one pulse signal is input to the input terminal;
An address setting means for setting a self-address when performing communication via the communication bus based on the number of pulse signals input to the input terminal.   2. The communication system according to claim 1, wherein the second pulse signal output means outputs one pulse signal from the output terminal after a predetermined standby time has elapsed since the time when one pulse signal was input to the input terminal. The communication system characterized by outputting.   3. The communication system according to claim 1, wherein the second pulse signal output means is connected to the output terminal on the condition that a pulse width of the pulse signal input to the input terminal is a predetermined length. A communication system characterized by outputting a pulse signal.   The communication system according to any one of claims 1 to 3, wherein the address setting means determines its own address by adding the number of pulse signals input to the input terminal to a common basic address. A communication system characterized by the above. The communication system according to any one of claims 1 to 4, further comprising a control device that communicates with the plurality of terminal devices via the communication bus,
The terminal device further includes a battery, a charge / discharge circuit for the battery,
The said control apparatus is a communication system characterized by including the means to control the said charging / discharging circuit with respect to each of these terminal devices according to the charge condition of the said battery.

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