JP2014222703A - Electronic component packaged body, manufacturing method of the same and electronic component - Google Patents

Electronic component packaged body, manufacturing method of the same and electronic component Download PDF

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Publication number
JP2014222703A
JP2014222703A JP2013101414A JP2013101414A JP2014222703A JP 2014222703 A JP2014222703 A JP 2014222703A JP 2013101414 A JP2013101414 A JP 2013101414A JP 2013101414 A JP2013101414 A JP 2013101414A JP 2014222703 A JP2014222703 A JP 2014222703A
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electronic component
circuit board
confirmation hole
mounting body
underfill agent
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後藤 広之
Hiroyuki Goto
広之 後藤
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Ricoh Co Ltd
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Ricoh Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device packaged body which allows easy confirmation of a filled state of an underfill agent without performing a fracture test.SOLUTION: An electronic component packaged body 1 comprises: an electronic component 3 mounted on a circuit board 5 via a connection terminal 13; and an underfill agent 7 filled between the electronic component 3 and the circuit board 5. The electronic component 3 includes a confirmation hole 19 for confirmation of a filled state of the underfill agent 7, which pierces the electronic component 3 from a surface opposite to the circuit board 5 to a surface on the opposite side.

Description

本発明は、電子部品実装体及びその製造方法並びに電子部品に関するものである。   The present invention relates to an electronic component mounting body, a manufacturing method thereof, and an electronic component.

携帯電子機器は小型軽量化が進んでいる。それに伴って実装される半導体装置として、パッケージ底面に接続端子がアレイ状に並べられたボールグリッドアレイパッケージやチップサイズパッケージなどの表面実装型パッケージが用いられるようになってきている。   Portable electronic devices are becoming smaller and lighter. Along with this, surface mount packages such as a ball grid array package and a chip size package in which connection terminals are arranged in an array on the bottom surface of the package have been used as semiconductor devices to be mounted.

表面実装型パッケージは、例えば半田などによって回路基板に実装されたのち、表面実装型パッケージと回路基板との間に例えばエポキシ樹脂などからなるアンダーフィル剤が充填されることによって、回路基板に接着固定される。   A surface-mount package is mounted on a circuit board by, for example, soldering, and is then bonded and fixed to the circuit board by filling an underfill agent made of, for example, epoxy resin between the surface-mount package and the circuit board. Is done.

図3は、表面実装型パッケージが実装された半導体装置実装体を説明するための概略的な図であり、(A)は分解斜視図、(B)は断面図である。図3(A)においてアンダーフィル剤の図示は省略されている。   3A and 3B are schematic views for explaining a semiconductor device mounting body on which a surface mounting type package is mounted, in which FIG. 3A is an exploded perspective view and FIG. 3B is a cross-sectional view. In FIG. 3A, the illustration of the underfill agent is omitted.

表面実装型パッケージ101は底面にアレイ状に並べられた接続端子103を備えている。回路基板105は表面実装型パッケージ101が実装される面に複数のランド107を備えている。ランド107の配置は接続端子103の配置に対応している。   The surface-mount package 101 includes connection terminals 103 arranged in an array on the bottom surface. The circuit board 105 includes a plurality of lands 107 on the surface on which the surface mount type package 101 is mounted. The arrangement of the lands 107 corresponds to the arrangement of the connection terminals 103.

表面実装型パッケージ101は接続端子103がランド107に接合されていることによって回路基板105に実装されている。表面実装型パッケージ101と回路基板105との間にアンダーフィル剤109が充填されている。   The surface mount package 101 is mounted on the circuit board 105 by connecting the connection terminals 103 to the lands 107. An underfill agent 109 is filled between the surface mount package 101 and the circuit board 105.

表面実装型パッケージと回路基板との間のアンダーフィル剤の充填状態を確認する場合、アンダーフィル剤を塗布した後、表面実装型パッケージを回路基板から機械的に剥がして充填状態を確認する方法では破壊試験になるという問題があった。   When checking the filling state of the underfill agent between the surface mount package and the circuit board, after applying the underfill agent, mechanically peeling the surface mount package from the circuit board to check the filling state. There was a problem of destructive testing.

このような不具合に対して、表面実装型パッケージ及び回路基板を破壊することなくアンダーフィル剤の充填状態を確認する方法が知られている(例えば特許文献1を参照。)。特許文献1では、表面実装型パッケージを回路基板に半田付けするのに先立って、回路基板に貫通孔を形成して予めピンを挿入しておき、アンダーフィル剤の硬化後にピンが引き抜き可能か否かで充填状態を確認することが開示されている。   For such a problem, a method for confirming the filling state of the underfill agent without destroying the surface mount package and the circuit board is known (see, for example, Patent Document 1). In Patent Document 1, prior to soldering a surface-mount package to a circuit board, through holes are formed in the circuit board and pins are inserted in advance, and whether the pins can be pulled out after the underfill agent is cured. It is disclosed that the state of filling is confirmed.

しかし、特許文献1に開示されたアンダーフィル剤の充填状態を確認する方法を実現するためには、充填状態確認用のピンを別途用意し、そのピンを貫通穴に挿入する作業や、ピンが引き抜き可能か否かを確認するためにピンを引っぱる作業が必要であった。   However, in order to realize the method for confirming the filling state of the underfill agent disclosed in Patent Document 1, a pin for confirming the filling state is separately prepared, and the operation of inserting the pin into the through hole, It was necessary to pull the pin to check whether it could be pulled out.

本発明は、破壊試験をすることなくアンダーフィル剤の充填状態を容易に確認できる半導体装置実装体を提供することを目的とする。   An object of this invention is to provide the semiconductor device mounting body which can confirm the filling state of an underfill agent easily, without performing a destructive test.

本発明にかかる電子部品実装体は、電子部品が回路基板に実装され、電子部品と回路基板との間にアンダーフィル剤が充填されている電子部品実装体であって、上記電子部品は上記アンダーフィル剤の充填状態を確認するための確認用穴を備え、上記確認用穴は上記回路基板に対向する面からその反対側の面まで貫通していることを特徴とするものである。   An electronic component mounting body according to the present invention is an electronic component mounting body in which an electronic component is mounted on a circuit board, and an underfill agent is filled between the electronic component and the circuit board. A confirmation hole for confirming the filling state of the filling agent is provided, and the confirmation hole penetrates from the surface facing the circuit board to the opposite surface.

本発明の電子部品実装体は、破壊試験をすることなくアンダーフィル剤の充填状態を容易に確認できる。   The electronic component mounting body of the present invention can easily confirm the filling state of the underfill agent without performing a destructive test.

電子部品実装体の一実施例及び電子部品の一実施例を説明するための概略的な図であり、(A)は斜視図、(B)は断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is the schematic for demonstrating one Example of an electronic component mounting body and one Example of an electronic component, (A) is a perspective view, (B) is sectional drawing. 電子部品実装体の製造方法の一実施例を説明するための概略的な図であり、(A)は斜視図、(B)は側面図である。It is the schematic for demonstrating one Example of the manufacturing method of an electronic component mounting body, (A) is a perspective view, (B) is a side view. 表面実装型パッケージが実装された半導体装置実装体を説明するための概略的な図であり、(A)は分解斜視図、(B)は断面図である。It is a schematic diagram for demonstrating the semiconductor device mounting body by which the surface mount type package was mounted, (A) is a disassembled perspective view, (B) is sectional drawing.

本発明の電子部品実装体において、上記回路基板は、上記確認用穴に対向する位置に配線パターンを備えている例を挙げることができる。ただし、上記回路基板は、上記確認用穴に対向する位置に上記配線パターンを備えていなくてもよい。   In the electronic component mounting body according to the present invention, the circuit board may be provided with a wiring pattern at a position facing the confirmation hole. However, the circuit board may not include the wiring pattern at a position facing the confirmation hole.

また、本発明の電子部品実装体において、上記確認用穴と上記回路基板との間又は上記確認用穴内に上記アンダーフィル剤が存在していることが好ましい。ただし、本発明の電子部品実装体は、上記確認用穴と上記回路基板との間及び上記確認用穴内に上記アンダーフィル剤が存在していないものも含む。   In the electronic component mounting body according to the present invention, it is preferable that the underfill agent is present between the confirmation hole and the circuit board or in the confirmation hole. However, the electronic component mounting body of the present invention includes those in which the underfill agent is not present between the confirmation hole and the circuit board and in the confirmation hole.

また、本発明の電子部品実装体において、上記電子部品は、インターポーザー上に半導体チップが搭載され、上記半導体チップとは反対側の上記インターポーザーの面に接続端子が設けられた表面実装型半導体装置である例を挙げることができる。この態様において、上記確認用穴は上記インターポーザーに設けられている例を挙げることができる。ただし、本発明の電子部品実装体において、上記電子部品は上記表面実装型半導体装置に限定されない。   In the electronic component mounting body according to the present invention, the electronic component is a surface-mount type semiconductor in which a semiconductor chip is mounted on an interposer, and a connection terminal is provided on the surface of the interposer opposite to the semiconductor chip. The example which is an apparatus can be given. In this embodiment, the confirmation hole may be provided in the interposer. However, in the electronic component mounting body of the present invention, the electronic component is not limited to the surface mount semiconductor device.

さらに、上記インターポーザーは上記半導体チップの端子と上記接続端子とを電気的に接続するためのビアを備えており、上記確認用穴は上記ビアと同時に形成されたものである例を挙げることができる。ただし、上記確認用穴は上記ビアとは異なる工程で形成されたものであってもよい。   Further, the interposer includes a via for electrically connecting the terminal of the semiconductor chip and the connection terminal, and the confirmation hole is formed at the same time as the via. it can. However, the confirmation hole may be formed in a process different from the via.

また、本発明の電子部品実装体において、上記確認用穴は、上記電子部品の部品中央部から外れた位置に配置されている例を挙げることができる。ただし、上記確認用穴は上記電子部品の部品中央部に配置されていてもよい。   Moreover, in the electronic component mounting body of the present invention, an example can be given in which the confirmation hole is arranged at a position deviated from the central part of the electronic component. However, the confirmation hole may be arranged in the central part of the electronic component.

本発明にかかる電子部品は、本発明の電子部品実装体に用いられる上記電子部品であって、上記確認用穴を備えているものである。   The electronic component according to the present invention is the electronic component used in the electronic component mounting body of the present invention, and includes the confirmation hole.

本発明にかかる電子部品実装体の製造方法は、本発明の電子部品実装体を製造するための製造方法であって、上記電子部品を上記回路基板に実装した後、上記電子部品と上記回路基板との間に上記アンダーフィル剤を充填し、上記確認用穴と上記回路基板との間又は上記確認用穴内に上記アンダーフィル剤が存在しているか否かに基づいて上記アンダーフィル剤の充填状態の良否を判定することを特徴とする。   The method for manufacturing an electronic component mounting body according to the present invention is a manufacturing method for manufacturing the electronic component mounting body according to the present invention, wherein the electronic component and the circuit board are mounted after the electronic component is mounted on the circuit board. The underfill agent is filled between the check hole and the circuit board or based on whether the underfill agent is present in the check hole or not. It is characterized by determining the quality of the.

本発明の電子部品実装体の製造方法において、上記回路基板として、上記確認用穴に対向する位置に配線パターンを備えているものが用いられる例を挙げることができる。ただし、上記回路基板は、上記確認用穴に対向する位置に上記配線パターンを備えていなくてもよい。   In the method for manufacturing an electronic component mounting body according to the present invention, an example in which the circuit board is provided with a wiring pattern at a position facing the confirmation hole can be given. However, the circuit board may not include the wiring pattern at a position facing the confirmation hole.

また、本発明の電子部品実装体の製造方法において、上記電子部品として、上記確認用穴が部品中央部から外れた位置に配置されているものが用いられ、上記アンダーフィル剤の充填時に、上記アンダーフィル剤は上記部品中央部に対して上記確認用穴とは反対側の位置から上記電子部品と上記回路基板との間に注入される例を挙げることができる。ただし、本発明の電子部品実装体の製造方法において、上記電子部品における上記確認用穴の位置及びアンダーフィル剤の注入位置はこれらに限定されない。   Further, in the method for manufacturing an electronic component mounting body according to the present invention, the electronic component used is one in which the confirmation hole is disposed at a position away from the center of the component, and when the underfill agent is filled, The underfill agent may be injected between the electronic component and the circuit board from a position opposite to the confirmation hole with respect to the component center. However, in the method for manufacturing an electronic component package according to the present invention, the position of the confirmation hole and the injection position of the underfill agent in the electronic component are not limited to these.

以下に、図面を参照して本発明の実施例を説明する。
図1は、電子部品実装体の一実施例及び電子部品の一実施例を説明するための概略的な図であり、(A)は斜視図、(B)は断面図である。図1(B)は図1(A)のA−A’線の位置に対応している。
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a schematic view for explaining an embodiment of an electronic component mounting body and an embodiment of an electronic component, in which (A) is a perspective view and (B) is a cross-sectional view. FIG. 1B corresponds to the position of the AA ′ line in FIG.

電子部品実装体1において、電子部品3が回路基板5に実装されている。電子部品3と回路基板5との間にアンダーフィル剤7が充填されている。   In the electronic component mounting body 1, the electronic component 3 is mounted on the circuit board 5. An underfill agent 7 is filled between the electronic component 3 and the circuit board 5.

電子部品3は、例えば、インターポーザー9上に半導体チップ11が搭載され、半導体チップ11とは反対側のインターポーザー9の面に接続端子13が設けられた表面実装型半導体装置である。接続端子13は例えば半田で形成されている。   The electronic component 3 is, for example, a surface mount type semiconductor device in which a semiconductor chip 11 is mounted on an interposer 9 and a connection terminal 13 is provided on the surface of the interposer 9 opposite to the semiconductor chip 11. The connection terminal 13 is made of, for example, solder.

半導体チップ11の端子11aは、例えばボンディングワイヤを介して、インターポーザー9の半導体チップ実装面に設けられた端子9aと電気的に接続されている。なお、半導体チップ11の端子とインターポーザー9の端子との電気的接続はフリップチップ接続によって実現されていてもよい。   The terminal 11a of the semiconductor chip 11 is electrically connected to the terminal 9a provided on the semiconductor chip mounting surface of the interposer 9, for example, via a bonding wire. The electrical connection between the terminal of the semiconductor chip 11 and the terminal of the interposer 9 may be realized by flip chip connection.

インターポーザー9の端子9aは、例えば貫通穴の内壁に金属メッキ層が形成されてなるビア15を介して、インターポーザー9の端子9aとは反対側の面に設けられた端子9bと電気的に接続されている。端子9bに接続端子13が接合されている。この実施例では、インターポーザー9は2層の配線層構造を備えているが、本発明の電子部品実装体及び電子部品において、インターポーザーは3層以上の配線層構造を備えていてもよい。   The terminal 9a of the interposer 9 is electrically connected to the terminal 9b provided on the surface opposite to the terminal 9a of the interposer 9 through a via 15 in which a metal plating layer is formed on the inner wall of the through hole, for example. It is connected. The connection terminal 13 is joined to the terminal 9b. In this embodiment, the interposer 9 has a two-layer wiring layer structure. However, in the electronic component mounting body and electronic component of the present invention, the interposer may have a three-layer or more wiring layer structure.

半導体チップ11は、インターポーザー9の半導体チップ実装面の上に形成された封止樹脂17によって封止されている。   The semiconductor chip 11 is sealed with a sealing resin 17 formed on the semiconductor chip mounting surface of the interposer 9.

インターポーザー9は、アンダーフィル剤7の充填状態を確認するための確認用穴19を備えている。確認用穴19は、インターポーザー9において、回路基板5に対向する面からその反対側の面まで貫通している。   The interposer 9 includes a confirmation hole 19 for confirming the filling state of the underfill agent 7. In the interposer 9, the confirmation hole 19 penetrates from the surface facing the circuit board 5 to the surface on the opposite side.

確認用穴19は、例えばビア15と同時に形成されたものである。これにより、確認用穴19を形成するための専用の工程は不要となる。ただし、確認用穴19はビア15とは別途形成されたものであってもよい。   The confirmation hole 19 is formed simultaneously with the via 15, for example. This eliminates the need for a dedicated process for forming the confirmation hole 19. However, the confirmation hole 19 may be formed separately from the via 15.

確認用穴19は、封止樹脂17に覆われない位置に設けられている。確認用穴19は、電子部品3の部品中央部から外れた位置に配置されている。なお、確認用穴19は電子部品3の部品中央部に配置されていてもよい。   The confirmation hole 19 is provided at a position not covered by the sealing resin 17. The confirmation hole 19 is arranged at a position away from the central part of the electronic component 3. Note that the confirmation hole 19 may be disposed in the central part of the electronic component 3.

回路基板5は、インターポーザー9の端子9b及び接続端子13に対応する位置にランド21を備えている。ランド21に接続端子13が接合されている。ランド21は、接続端子13、端子9b、ビア15、端子9a及びボンディングワイヤを介して半導体チップ11の端子11aと電気的に接続されている。   The circuit board 5 includes lands 21 at positions corresponding to the terminals 9 b and the connection terminals 13 of the interposer 9. The connection terminal 13 is joined to the land 21. The land 21 is electrically connected to the terminal 11a of the semiconductor chip 11 through the connection terminal 13, the terminal 9b, the via 15, the terminal 9a, and the bonding wire.

回路基板5は、確認用穴19に対向する位置に金属材料からなる配線パターン23を備えている。配線パターン23は、例えばランド21と同時に形成されたものである。ただし、配線パターン23はランド21とは別途形成されたものであってもよい。また、配線パターン23は、ランド21と電気的に接続されていてもよいし、ランド21とは電気的に絶縁されたダミー配線パターンであってもよい。ランド21及び配線パターン23は金属材料、例えば銅によって形成されている。ただし、ランド21及び配線パターン23の材料は銅に限定されない。なお、回路基板5は配線パターン23を備えていなくてもよい。   The circuit board 5 includes a wiring pattern 23 made of a metal material at a position facing the confirmation hole 19. For example, the wiring pattern 23 is formed simultaneously with the land 21. However, the wiring pattern 23 may be formed separately from the land 21. The wiring pattern 23 may be electrically connected to the land 21 or may be a dummy wiring pattern that is electrically insulated from the land 21. The land 21 and the wiring pattern 23 are made of a metal material such as copper. However, the material of the land 21 and the wiring pattern 23 is not limited to copper. The circuit board 5 may not include the wiring pattern 23.

図2は、電子部品実装体の製造方法の一実施例を説明するための概略的な図であり、(A)は斜視図、(B)は側面図である。図2は、電子部品3が回路基板5に実装された後、電子部品3と回路基板5との間にアンダーフィル剤7が充填される前の状態を示している。   2A and 2B are schematic views for explaining an embodiment of a method for manufacturing an electronic component mounting body, where FIG. 2A is a perspective view and FIG. 2B is a side view. FIG. 2 shows a state before the underfill agent 7 is filled between the electronic component 3 and the circuit board 5 after the electronic component 3 is mounted on the circuit board 5.

電子部品3は接続端子13を介して回路基板5に実装されている。電子部品3はアンダーフィル剤の充填状態を確認するための確認用穴19を備えている。確認用穴19は電子部品3の部品中央部から外れた位置に配置されている。   The electronic component 3 is mounted on the circuit board 5 via the connection terminals 13. The electronic component 3 includes a confirmation hole 19 for confirming the underfill agent filling state. The confirmation hole 19 is arranged at a position deviated from the central part of the electronic component 3.

アンダーフィル剤の充填時に、アンダーフィル剤は電子部品3の部品中央部に対して確認用穴19とは反対側の位置から電子部品3と回路基板5との間に注入される。注入されたアンダーフィル剤は、注入位置から電子部品3の部品中央部の下を通過し、注入位置とは反対側の電子部品3の辺に到達する。確認用穴19はアンダーフィル剤の最終到達位置の近傍に設けられている。アンダーフィル剤は確認用穴19の下にも注入される。   At the time of filling the underfill agent, the underfill agent is injected between the electronic component 3 and the circuit board 5 from a position opposite to the confirmation hole 19 with respect to the central part of the electronic component 3. The injected underfill agent passes under the component center of the electronic component 3 from the injection position and reaches the side of the electronic component 3 on the opposite side to the injection position. The confirmation hole 19 is provided in the vicinity of the final position of the underfill agent. The underfill agent is also injected under the confirmation hole 19.

確認用穴19の下に到達したアンダーフィル剤は、確認用穴19の内径寸法が毛細管現象によって確認用穴19内にアンダーフィル剤が這い上がる程度の寸法であれば確認用穴19内に這い上がる。確認用穴19の内径寸法が毛細管現象によってアンダーフィル剤が這い上がらない程度に大きければ、アンダーフィル剤は確認用穴19内に這い上がらない。   The underfill agent that has reached the bottom of the confirmation hole 19 crawls into the confirmation hole 19 if the inner diameter of the confirmation hole 19 is such that the underfill agent crawls into the confirmation hole 19 due to capillary action. Go up. If the inner diameter of the confirmation hole 19 is large enough to prevent the underfill agent from scooping up due to capillary action, the underfill agent does not scoop into the confirmation hole 19.

確認用穴19の内径寸法の設定は、アンダーフィル剤の這い上がりの可否によって決定すればよい。ただし、アンダーフィル剤に対する確認用穴19の内壁の濡れ性の大きさによっては、毛細管現象が生じない程度に確認用穴19の内径寸法が大きくても、アンダーフィル剤が確認用穴19内にある程度這い上がることがある。   The setting of the inner diameter dimension of the confirmation hole 19 may be determined depending on whether or not the underfill agent can be rolled up. However, depending on the wettability of the inner wall of the confirmation hole 19 with respect to the underfill agent, even if the inner diameter dimension of the confirmation hole 19 is large to the extent that capillary action does not occur, the underfill agent will enter the confirmation hole 19. May crawl to some extent.

確認用穴19と回路基板5との間又は確認用穴19内にアンダーフィル剤が存在しているか否かに基づいてアンダーフィル剤の充填状態の良否が判定される。例えば、図1に示されるように、回路基板5として確認用穴19に対向する位置に配線パターン23を備えているものが用いられるようにすれば、確認用穴19を介して配線パターン23が見えるかどうかでアンダーフィル剤7の充填状態を確認しやすくなる。   Based on whether or not the underfill agent is present between the check hole 19 and the circuit board 5 or in the check hole 19, the quality of the underfill agent filling state is determined. For example, as shown in FIG. 1, if the circuit board 5 is provided with the wiring pattern 23 at a position facing the confirmation hole 19, the wiring pattern 23 is connected via the confirmation hole 19. It becomes easy to confirm the filling state of the underfill agent 7 depending on whether it can be seen.

確認用穴19と回路基板5との間又は確認用穴19内にアンダーフィル剤7が存在しているか否かを判定できる外観検査装置を使用すれば、アンダーフィル剤7の充填状態を自動機で判別できる。例えば、アンダーフィル剤7を黒色、配線パターン23を白色として認識する外観検査装置を用いればよい。なお、確認用穴19と回路基板5との間又は確認用穴19内にアンダーフィル剤7が存在しているか否かの判定は、自動機によってではなく、人間の目視によって行われてもよい。   If a visual inspection device that can determine whether or not the underfill agent 7 is present between the check hole 19 and the circuit board 5 or in the check hole 19 is used, the filling state of the underfill agent 7 is automatically set. Can be determined. For example, an appearance inspection apparatus that recognizes the underfill agent 7 as black and the wiring pattern 23 as white may be used. It should be noted that whether or not the underfill agent 7 is present between the confirmation hole 19 and the circuit board 5 or in the confirmation hole 19 may be determined by human eyes, not by an automatic machine. .

確認用穴19と回路基板5との間又は確認用穴19内にアンダーフィル剤7が存在していると判定された電子部品実装体1は良品と判定される。このように、破壊試験をすることなく、電子部品実装体1におけるアンダーフィル剤7の充填状態を容易に確認できる。   The electronic component mounting body 1 determined that the underfill agent 7 is present between the confirmation hole 19 and the circuit board 5 or in the confirmation hole 19 is determined as a non-defective product. Thus, the filling state of the underfill agent 7 in the electronic component mounting body 1 can be easily confirmed without performing a destructive test.

以上、本発明の実施例を説明したが、上記実施例での材料、配置、個数等は一例であり、本発明はこれらに限定されるものではなく、特許請求の範囲に記載された本発明の範囲内で種々の変更が可能である。   Although the embodiments of the present invention have been described above, the materials, arrangement, number, and the like in the above embodiments are merely examples, and the present invention is not limited thereto, and the present invention described in the claims. Various changes can be made within the range.

例えば、上記実施例では、電子部品3はインターポーザー9の上に半導体チップ11が搭載され、半導体チップ11とは反対側のインターポーザー9の面に接続端子13が設けられた表面実装型半導体装置であるが、本発明において電子部品はこれに限定されない。本発明において、電子部品は、回路基板に対向する面からその反対側の面まで貫通している、アンダーフィル剤の充填状態を確認するための確認用穴を備えているものであれば、どのような構成のものであってもよい。例えば、電子部品は、電子部品が組み立てられた後、確認用穴として用いられる貫通穴が形成されたものであってもよい。   For example, in the above embodiment, the electronic component 3 is a surface mount type semiconductor device in which the semiconductor chip 11 is mounted on the interposer 9 and the connection terminal 13 is provided on the surface of the interposer 9 opposite to the semiconductor chip 11. However, the electronic component is not limited to this in the present invention. In the present invention, any electronic component may be used as long as it has a hole for confirmation for confirming the filling state of the underfill agent that penetrates from the surface facing the circuit board to the opposite surface. The thing of such a structure may be sufficient. For example, the electronic component may be one in which a through hole used as a confirmation hole is formed after the electronic component is assembled.

1 電子部品実装体
3 電子部品
5 回路基板
7 アンダーフィル剤
9 インターポーザー
11 半導体チップ
11a 端子
13 接続端子
15 ビア
19 確認用穴
23 配線パターン
DESCRIPTION OF SYMBOLS 1 Electronic component mounting body 3 Electronic component 5 Circuit board 7 Underfill agent 9 Interposer 11 Semiconductor chip 11a Terminal 13 Connection terminal 15 Via 19 Confirmation hole 23 Wiring pattern

特開2007−324214号公報JP 2007-324214 A

Claims (10)

電子部品が回路基板に実装され、電子部品と回路基板との間にアンダーフィル剤が充填されている電子部品実装体において、
前記電子部品は前記アンダーフィル剤の充填状態を確認するための確認用穴を備え、
前記確認用穴は前記回路基板に対向する面からその反対側の面まで貫通していることを特徴とする電子部品実装体。
In an electronic component mounting body in which an electronic component is mounted on a circuit board and an underfill agent is filled between the electronic component and the circuit board,
The electronic component includes a confirmation hole for confirming a filling state of the underfill agent,
The electronic component mounting body, wherein the confirmation hole penetrates from a surface facing the circuit board to a surface on the opposite side.
前記回路基板は、前記確認用穴に対向する位置に配線パターンを備えている請求項1に記載の電子部品実装体。   The electronic component mounting body according to claim 1, wherein the circuit board includes a wiring pattern at a position facing the confirmation hole. 前記確認用穴と前記回路基板との間又は前記確認用穴内に前記アンダーフィル剤が存在している請求項1又は2に記載の電子部品実装体。   The electronic component mounting body according to claim 1, wherein the underfill agent is present between the confirmation hole and the circuit board or in the confirmation hole. 前記電子部品は、インターポーザー上に半導体チップが搭載され、前記半導体チップとは反対側の前記インターポーザーの面に接続端子が設けられた表面実装型半導体装置であり、
前記確認用穴は前記インターポーザーに設けられている請求項1から3のいずれか一項に記載の電子部品実装体。
The electronic component is a surface mount type semiconductor device in which a semiconductor chip is mounted on an interposer, and a connection terminal is provided on the surface of the interposer opposite to the semiconductor chip,
The electronic component mounting body according to any one of claims 1 to 3, wherein the confirmation hole is provided in the interposer.
前記インターポーザーは前記半導体チップの端子と前記接続端子とを電気的に接続するためのビアを備えており、
前記確認用穴は前記ビアと同時に形成されたものである請求項4に記載の電子部品実装体。
The interposer includes a via for electrically connecting the terminal of the semiconductor chip and the connection terminal,
The electronic component mounting body according to claim 4, wherein the confirmation hole is formed simultaneously with the via.
前記確認用穴は、前記電子部品の部品中央部から外れた位置に配置されている請求項1から5のいずれか一項に記載の電子部品実装体。   The electronic component mounting body according to any one of claims 1 to 5, wherein the confirmation hole is disposed at a position deviated from a central part of the electronic component. 請求項1から6のいずれか一項に記載の電子部品実装体に用いられる前記電子部品であって、前記確認用穴を備えている電子部品。   It is the said electronic component used for the electronic component mounting body as described in any one of Claim 1 to 6, Comprising: The electronic component provided with the said hole for confirmation. 請求項1に記載の電子部品実装体を製造するための製造方法であって、
前記電子部品を前記回路基板に実装した後、前記電子部品と前記回路基板との間に前記アンダーフィル剤を充填し、前記確認用穴と前記回路基板との間又は前記確認用穴内に前記アンダーフィル剤が存在しているか否かに基づいて前記アンダーフィル剤の充填状態の良否を判定することを特徴とする電子部品実装体の製造方法。
A manufacturing method for manufacturing the electronic component mounting body according to claim 1,
After the electronic component is mounted on the circuit board, the underfill agent is filled between the electronic component and the circuit board, and the underfill is provided between the confirmation hole and the circuit board or in the confirmation hole. A method of manufacturing an electronic component mounting body, wherein the quality of the underfill agent is determined based on whether or not a filler agent is present.
前記回路基板として、前記確認用穴に対向する位置に配線パターンを備えているものが用いられる請求項8に記載の電子部品実装体の製造方法。   The method for manufacturing an electronic component mounting body according to claim 8, wherein the circuit board is provided with a wiring pattern at a position facing the confirmation hole. 前記電子部品として、前記確認用穴が部品中央部から外れた位置に配置されているものが用いられ、
前記アンダーフィル剤の充填時に、前記アンダーフィル剤は前記部品中央部に対して前記確認用穴とは反対側の位置から前記電子部品と前記回路基板との間に注入される請求項8又は9に記載の電子部品実装体の製造方法。
As the electronic component, one in which the confirmation hole is disposed at a position away from the central part of the component is used,
10. The underfill agent is injected between the electronic component and the circuit board from a position opposite to the confirmation hole with respect to the central portion of the component when the underfill agent is filled. The manufacturing method of the electronic component mounting body of description.
JP2013101414A 2013-05-13 2013-05-13 Electronic component packaged body, manufacturing method of the same and electronic component Pending JP2014222703A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4009352A1 (en) * 2020-12-07 2022-06-08 Intel Corporation Underfilled integrated circuit assembly with substrate having opening therein and method of underfilling an integrate circuit assembly

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4009352A1 (en) * 2020-12-07 2022-06-08 Intel Corporation Underfilled integrated circuit assembly with substrate having opening therein and method of underfilling an integrate circuit assembly

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