JP2014215136A - Battery monitoring device and battery unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a battery monitoring device capable of equalizing voltages using a simple configuration, and a battery unit.SOLUTION: A battery monitoring device includes: a first control unit disposed outside a plurality of battery stacks including a battery cell; a second control unit, disposed in each of the plurality of battery stacks, for detecting the output voltage of the battery cell and outputting pulse data representing the detected voltage; and a daisy chain for connecting the plurality of second control units to the first control unit. When the voltage value represented by the pulse data outputted by another second control unit is higher than the output voltage of the battery cell detected by itself, the second control unit reduces a duty ratio of the pulse data outputted by itself; when the voltage value represented by the pulse data outputted by another second control unit is lower than the output voltage of the battery cell detected by itself, the second control unit increases the duty ratio of the pulse data outputted by itself.

Description

  The present invention relates to a battery monitoring device and a battery unit.

  Conventionally, each monitoring IC receives an output signal from another monitoring IC among the monitoring ICs, and at the same time, the other monitoring IC drives the switching means corresponding to the other monitoring IC according to the output signal. There are battery monitoring devices each including a drive circuit for driving corresponding switching means according to the output signal.

  Each switching means corresponding to each monitoring IC is simultaneously driven by a driving circuit of each monitoring IC according to an output signal output from any monitoring IC (see, for example, Patent Document 1).

JP 2012-161182 A

  By the way, in the conventional battery monitoring device, in order to execute processing such as detection and equalization of the cell voltage, a driving circuit for simultaneously driving the monitoring ICs is required.

  Then, an object of this invention is to provide the battery monitoring apparatus and battery unit which can equalize a voltage with a simple structure.

  A battery monitoring device according to one aspect of the present invention includes a first control unit disposed outside a plurality of battery stacks including battery cells, and a plurality of battery stacks, each of which outputs an output voltage of the battery cells. A second control unit that detects and outputs pulse data representing the detected voltage; and a daisy chain that connects a plurality of the second control units to the first control unit. When the voltage value represented by the pulse data output by the second control unit is higher than the output voltage of the battery cell detected by the second control unit, the duty ratio of the pulse data output by the second control unit is reduced, and the other second control unit When the voltage value represented by the pulse data to be output is lower than the output voltage of the battery cell detected by itself, the duty ratio of the pulse data output by itself is increased.

  According to the present invention, it is possible to provide a battery monitoring device that can perform voltage equalization with a simple configuration and a battery unit.

It is a figure which shows the battery monitoring apparatus and battery unit of Embodiment 1. FIG. It is a figure which shows the flow of the data and clock in 100 A of battery monitoring apparatuses of Embodiment 1. FIG. It is a figure which shows the flow of the data between ECU110 and IC1-IC4 in 100 A of battery monitoring apparatuses of Embodiment 1. FIG. It is a figure which shows the adjustment method of the duty ratio of the voltage data in 100 A of battery monitoring apparatuses of Embodiment 1. FIG. It is a figure explaining the adjustment method of the duty ratio of the data & clock DATA & CLK in the battery monitoring apparatus of Embodiment 2, and a battery unit. It is a figure explaining the adjustment method of the duty ratio of the data & clock DATA & CLK in the battery monitoring apparatus of Embodiment 2, and a battery unit. It is a figure which shows the transmission path | route of the dummy data transmitted between IC1-IC4 in the battery monitoring apparatus and battery unit of Embodiment 3. FIG.

  Hereinafter, embodiments to which the battery monitoring device and the battery unit of the present invention are applied will be described.

<Embodiment 1>
FIG. 1 is a diagram illustrating a battery monitoring device and a battery unit according to the first embodiment.

  The battery unit 100 of the first embodiment includes an ECU (Electric Control Unit) 110 and stacks 120 and 130 as main components. Each of the stacks 120 and 130 includes a plurality of cells 150 and an IC (Integrated Circuit) chip 160. The battery monitoring apparatus according to the first embodiment includes ECU 110 and IC chip 160 included in stacks 120 and 130.

  FIG. 1 schematically shows an example of the arrangement of the battery unit 100 in plan view. The arrangement of ECU 110 and stacks 120 and 130 is not limited to the pattern shown in FIG.

  The battery unit 100 is, for example, a device that is used as a power source that outputs electric power for driving a drive device of an electric vehicle. Here, the drive device of the electric vehicle is a device that drives the vehicle by driving the traveling motor using the electric power of the battery unit 100.

  In addition, the details of the method and configuration of the electric vehicle are arbitrary as long as the electric vehicle is driven by driving a driving motor using electric power. The electric vehicle typically includes a hybrid vehicle (HV (Hybrid Vehicle)) whose power source is an engine and a traveling motor, and an electric vehicle (EV (Electric Vehicle)) whose power source is only a traveling motor.

  ECU 110 is a control device that executes voltage control processing of stacks 120 and 130 of battery unit 100, and is an example of a first control unit. ECU 110 includes a voltage control unit 110A and a memory 110B. The memory 110B is a nonvolatile memory capable of writing and reading data. ECU 110 may further include an authentication unit that performs authentication processing of stacks 120 and 130.

  Further, voltage control processing by the ECU 110 will be described later. Here, the physical configuration of the ECU 110 and the stacks 120 and 130 will be mainly described with reference to FIG.

  The stacks 120 and 130 have the same configuration and are connected in series by a cable 140. Therefore, the configuration of the stack 120 will be described in detail here.

  The stack 120 includes a plurality of cells 150 and an IC chip 160. FIG. 1 shows eight cells 150H1, 150H2, 150H3, 150H4, 150L1, 150L2, 150L3, and 150L4 located at both ends of the plurality of cells 150 included in the stack 120.

  In the following description, the cells 150H1, 150H2, 150H3, 150H4, 150L1, 150L2, 150L3, and 150L4 are not particularly distinguished from the cell 150 (not shown) positioned between the cells 150L4 and 150H1. This is simply referred to as cell 150.

  Each cell 150 indicates the position of the positive terminal and the negative terminal with + and-signs. The plurality of cells 150 included in the stack 120 are connected in series by a connection unit 151.

  The cells 150H1, 150H2, 150H3, and 150H4 are connected in series by connection portions 151H1, 151H2, and 151H3. The positive terminal (+) of the cell 150H4 is connected to one end 140A of the cable 140 via the connection portion 151H4, and the negative polarity terminal (−) of the cell 150H1 is connected to the connection portion 151A.

  Similarly, the cells 150L1, 150L2, 150L3, and 150L4 are connected in series by connection portions 151L1, 151L2, and 151L3. Further, the positive terminal (+) of the cell 150L4 is connected to the negative terminal (−) of the cell 150 (not shown) via the connection part 151L4, and the negative terminal (−) of the cell 150L1 is connected to the connection part 151B. It is connected.

  Note that the connection portions 151A, 151H1, 151H2, 151H3, and 151H4, and the connection portions 151B, 151L1, 151L2, 151L3, and 151L4 are simply referred to as the connection portions 151 unless otherwise distinguished.

  A plurality of cells 150 (not shown) positioned between the cell 150L4 and the cell 150H1 are connected in series by a connection unit 151 (not shown). Thereby, the plurality of cells 150 included in the stack 120 are connected in series by the connection portion 151.

  Therefore, among the plurality of cells 150 included in the stack 120, the cell 150H4 has the highest potential, and the cell 150L1 has the lowest potential.

  Each cell 150 is, for example, a lithium ion secondary battery, and is a secondary battery in which lithium ions in the electrolyte are responsible for electrical conduction. Here, the lithium ion secondary battery is referred to as a lithium ion battery. Since the lithium ion battery is vulnerable to overcharge and overdischarge, a protection circuit is provided to perform overcharge protection, overdischarge protection, and overcurrent protection. Overcharge protection, overdischarge protection, and overcurrent protection are performed by the cooperation of the ECU 110 and the IC chip 160.

  The IC chip 160 is configured to manage four cells 150 included in the stack 120. FIG. 1 shows an IC chip 160H connected to the cells 150H1, 150H2, 150H3, and 150H4 and an IC chip 160L connected to the cells 150L1, 150L2, 150L3, and 150L4. Note that, here, a mode in which the IC chip 160 manages four cells 150 included in the stack 120 will be described. However, the IC chip 160 manages four cells 150 one by one. Any number of cells 150 may be managed.

  Although illustration is omitted, for a plurality of cells 150 located between the cell 150L4 and the cell 150H1, one IC chip 160 is connected to the four cells 150. That is, the stack 120 includes a multiple of four cells 150, and one IC chip 160 is connected to the four cells 150.

  Here, the four cells 150 connected to one IC chip 160 are referred to as a block 150B. That is, the cells 150H1, 150H2, 150H3, and 150H4 constitute a block 150BH, and the cells 150L1, 150L2, 150L3, and 150L4 constitute a block 150BL.

  In addition, when a plurality of IC chips 160 (including IC chips 160H and 160L) included in the stack 120 are not particularly distinguished, they are simply referred to as IC chips 160. Each IC chip 160 is an example of a second control unit.

  The IC chip 160H is connected to the connection portions 151A, 151H1, 151H2, 151H3, and 151H4 via five cables 161. The IC chip 160H detects the voltage between both ends of each of the cells 150H1, 150H2, 150H3, and 150H4 via the five cables 161.

  Similarly, the IC chip 160L is connected to the connection portions 151B, 151L1, 151L2, 151L3, and 151L4 via five cables 161. The IC chip 160L detects the voltage between both ends of each of the cells 150L1, 150L2, 150L3, and 150L4 via the five cables 161.

  Each IC chip 160 is connected to the ECU 110 in a loop via a signal line 170. The ECU 110 transmits data and the like during the voltage control process via the signal line 170.

  A signal line 170 shown in FIG. 1 connects the ECU 110 and each IC chip 160 in a loop. The signal line 170 is folded back by the IC chip 160H to construct a daisy chain. Data transmitted from the ECU 110 to the IC chip 160 is transmitted to each IC chip 160 in order, and a signal line 170 is connected so as to return to the ECU 110.

  That is, for example, data transmitted from the ECU 110 to the IC chip 160 and transmitted from the IC chip 160 to the ECU 110 is transmitted from the ECU 110 to the IC chip 160L via one of the two signal lines (for example, the right signal line). And sequentially transmitted to the IC chip 160H. Further, data transmitted from the ECU 110 to the IC chip 160 is transmitted to the ECU 110 via the IC chip 160L in order from the IC chip 160H via the other of the two signal lines 170 (for example, the left signal line). The As described above, the signal line 170 connects the ECU 110 and each IC chip 160 in a loop shape to construct a daisy chain.

  Although the stack 120 has been described above, the stack 130 has the same configuration as the stack 120. In FIG. 1, for the stack 130, only a part of the reference numerals are shown with priority given to legibility.

  The connection portion 151B of the stack 130 is connected to the other end 140B of the cable 140. Therefore, the plurality of cells 150 included in the stack 120 and the plurality of cells 150 included in the stack 130 are all connected in series.

  Among these cells 150, the cell 150H4 in the stack 130 has the highest potential, and the cell 150L1 in the stack 120 has the lowest potential.

  Although FIG. 1 shows a form in which two stacks 120 and 130 are connected in series, more stacks may be connected in series, and only one stack (for example, stack 120). Only). Although the stacks 120 and 130 are connected in series here, the stacks 120 and 130 may be connected in parallel.

  In such a battery unit 100, each IC chip 160 detects the voltage across the four cells 150. Data representing the average value of the detected voltages across the four cells 150 is transmitted to the ECU 110.

  The ECU 110 discharges the cell 150 having an output voltage equal to or higher than a predetermined voltage among the cells 150 included in the stacks 120 and 130 based on the data representing the voltage between both ends transmitted from each IC chip 160, thereby The output voltage of the cell 150 included in 130 is adjusted.

  For adjusting the output voltage, for example, the IC chip 160 has a discharge resistor outside, and both terminals of the cell 150 whose output voltage is equal to or higher than a predetermined voltage are connected to the discharge resistor outside the IC chip 160. This may be done by passing the output current of the cell 150 through the discharging resistor.

  Note that the output voltage of the cell 150 is synonymous with the voltage across the cell 150 or the charging voltage.

  In battery unit 100 of the first embodiment, ECU 110 performs voltage control processing for stacks 120 and 130 of battery unit 100 in order to adjust the output voltage of cells 150 included in stacks 120 and 130. The voltage control process is performed by the voltage control unit 110A.

  Next, the battery monitoring apparatus 100A according to the first embodiment will be described with reference to FIG.

  2A and 2B are diagrams showing the flow of data and clock in the battery monitoring apparatus 100A of the first embodiment. FIG. 2A is a diagram schematically showing the battery monitoring apparatus 100A, and FIG. 2B is a diagram showing data and clock. (C) is a diagram showing a configuration of the IC chip 160.

  FIG. 2A shows ECU 110 and IC <b> 1 to IC <b> 4 as components of battery monitoring device 100. IC1 to IC4 correspond to the IC chip 160 shown in FIG. In FIG. 2A, a microcomputer 111 and an isolator 112 are shown as components of the ECU 110. The voltage control unit 110A and the memory 110B are built in the microcomputer 111.

  IC1 to IC4 are connected in a daisy chain manner by a signal line 170A. FIG. 2A shows four signal lines 170A between each of IC1 to IC4 so that data can be transmitted in a differential format. A signal is transferred to each signal line 170A in the direction indicated by the arrow.

  Here, it is assumed that the IC4 farthest from the ECU 110 is the highest IC chip 160 (see FIG. 1), and the IC1 closest to the ECU 110 is the lowest IC chip 160.

  IC1 to IC4 all have the same configuration, and have four input terminals and four output terminals. In FIG. 2A, the input terminals and output terminals of IC1 to IC4 are indicated by circles (◯).

  In each of IC <b> 1 to IC <b> 4, the pair of terminals on the lower left side and the pair of terminals on the upper right side are input terminals because the arrows of the signal line 170 </ b> A indicate the input direction. In each of IC1 to IC4, the pair of terminals on the lower right side and the pair of terminals on the upper left side are output terminals because they indicate the direction in which the arrow of the signal line 170A outputs.

  A pair of lower left side input terminals of the lowest IC 1 and one (left side) output terminal of the pair of lower right output terminals are connected to the ECU 110. The other (right side) output terminal of the pair of lower right output terminals of the IC 1 is pulled up to the power supply VCC via the wiring 171. The IC 1 can recognize that it is the lowest IC chip 160 by pulling up one of the output terminals in this way.

  Further, the pair of upper left output terminals and the upper right input terminals of the uppermost IC 4 are connected in a loop with a signal line 170A, so that it can be recognized that it is the uppermost IC chip 160. It is like that.

  As described above, IC1 is connected to ECU 110 by three signal lines 170B, and IC1 to IC4 are connected by four signal lines 170A.

  The signal line 170A and the signal line 170B correspond to the signal line 170 illustrated in FIG. The signal line 170A and the signal line 170B connect the IC1 to IC4 and the ECU 110 by a daisy chain method.

  IC1 to IC4 each detect the output voltage of the four cells 150 included in the corresponding block 150B, and obtain the average value of the four output voltages. Each of IC1 to IC4 transmits voltage data representing the average value of the four output voltages to ECU 110 via signal line 170.

  As shown in FIG. 2B, in the battery monitoring apparatus 100A of the first embodiment, four types of (1) clock CLK, (2) data DATA1, (3) data & clock DATA & CLK, and (4) data DATA2 are used. Handle signals.

  The clock CLK, the data DATA1, the data & clock DATA & CLK, and the data DATA2 are respectively transferred at the portions (1) to (4) shown in FIG.

  As shown in FIG. 2A, the clock CLK is supplied from the microcomputer 111 of the ECU 110 to the IC 1 via the isolator 112. The clock CLK supplied from the ECU 110 to the IC 1 is a single-ended signal.

  As shown in (1) of FIG. 2B, the clock CLK is a pulse signal having a duty ratio of 50%, and is a clock used for driving IC1 to IC4. The clock CLK may be the same clock that the ECU 110 uses to drive the microcomputer 111 and the isolator 112.

  As shown in FIG. 2A, the data DATA1 is supplied from the microcomputer 111 of the ECU 110 to the IC1 via the isolator 112. Data DATA1 supplied from the ECU 110 to the IC1 is a single-ended signal.

  Data DATA1 is data representing a command (voltage detection command) for causing voltage control unit 110A of ECU 110 to cause IC1 to IC4 to detect the voltage value of cell 150. As shown in (2) of FIG. 2B, the data DATA1 is “1” by an H level and L level signal (pulse signal having a duty ratio of 100%) having the same signal width as one cycle of the clock CLK. , Represents '0'.

  (2) in FIG. 2B shows 4-bit data DATA1 ('0100') as an example, but the number of bits of data DATA1 may be an arbitrary number of bits.

  Data & clock DATA & CLK is generated by IC1 based on clock CLK and data DATA1. The data & clock DATA & CLK is a signal obtained by synthesizing the clock CLK and the data DATA1 in order to simultaneously transmit the data and the clock through one signal line. The rising of the data & clock DATA & CLK from the L level (“0”) to the H level (“1”) constructs a clock.

  As shown in FIG. 2A, there are two types of data & clocks DATA & CLK, one sent from IC1 to IC2, IC3, IC4 and one sent from IC4, IC3, IC2 to IC1.

  Data & clock DATA & CLK transmitted from IC1 to IC2, IC3, and IC4 are output from IC1 in a differential format and transmitted to IC2, IC3, and IC4.

  Data & clock DATA & CLK transmitted from IC1 to IC2, IC3, IC4 is a command for causing IC2, IC3, IC4 to detect the output voltage of cell 150, and voltage control unit 110A of ECU 110 causes IC2-IC4 This is a signal obtained by synthesizing a command (voltage detection command) for detecting a voltage value of 150 and the clock CLK.

  Data & clock DATA & CLK transmitted from IC4, IC3, and IC2 to IC1 are sequentially transmitted from IC4, IC3, and IC2 to IC1. Data & clock DATA & CLK transmitted from IC4, IC3, and IC2 to IC1 represents the output voltage value of cell 150 detected by IC4, IC3, and IC2, respectively. IC1 outputs data DATA2.

  Further, as shown in (3) of FIG. 2B, the duty ratio of the data & clock DATA & CLK corresponds to the data value ('1' or '0'). When the H level duty ratio of the data & clock DATA & CLK is larger than 50%, the data represented by the data & clock DATA & CLK is “1”. On the other hand, when the H level duty ratio of the data & clock DATA & CLK is smaller than 50%, the data represented by the data & clock DATA & CLK is “0”.

  The duty ratio of data & clock DATA & CLK transmitted from IC1 to IC2, IC3, and IC4 is set by IC1. The duty ratio of data & clock DATA & CLK transmitted from IC1 to IC2, IC3, IC4 is set to 70% (fixed value) as an example.

  Further, the duty ratios of data & clock DATA & CLK transmitted from IC4, IC3, and IC2 to IC1 are set by IC4, IC3, and IC2, respectively.

  IC4 sets the duty ratio of data & clock DATA & CLK transmitted to IC1 to 70% (fixed value) as an example. The data & clock DATA & CLK transmitted from the IC 4 to the IC 1 is an average value of the output voltages of the four cells 150 included in the block 150B corresponding to the IC 4.

  IC3 sets the duty ratio of the data & clock DATA & CLK transmitted to IC1 according to the voltage value represented by the data & clock DATA & CLK transmitted from IC4 to IC1 via IC3 and IC2.

  When the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC3 is higher than the voltage value represented by the data & clock DATA & CLK transmitted from IC4 to IC1, the data transmitted to IC1 & The duty ratio of the clock DATA & CLK is set higher than the reference value (70%).

  This is because by increasing the duty ratio of data & clock DATA & CLK that IC3 transmits to IC1, the power consumption necessary for transmission of data & clock DATA & CLK is increased more than the power consumption at the reference value. This is because the average value of the output voltages of the four cells 150 included in the block 150B corresponding to 1 is brought close to the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC4.

  On the other hand, when the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC3 is lower than the voltage value represented by the data & clock DATA & CLK transmitted from IC4 to IC1, IC3 transmits to IC1. The duty ratio of the data & clock DATA & CLK to be made is lower than the reference value (70%).

  This is because by reducing the duty ratio of the data & clock DATA & CLK that IC3 transmits to IC1 below the reference value, the power consumption required for transmission of data & clock DATA & CLK is reduced below the power consumption at the reference value. This is because the average value of the output voltages of the four cells 150 included in the block 150B corresponding to 1 is brought close to the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC4.

  As described above, the IC3 compares the average value of the output voltages of the four cells 150 included in the block 150B corresponding to the IC3 with the voltage value represented by the data & clock DATA & CLK output from the IC4, and according to the comparison result. The duty ratio of the data & clock DATA & CLK transmitted to the IC 1 is adjusted with respect to the reference value (70%).

  Similarly, IC2 also adjusts the duty ratio.

  When the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC2 is higher than the voltage value represented by the data & clock DATA & CLK transmitted from IC3 to IC1, the data transmitted to IC1 & The duty ratio of the clock DATA & CLK is set higher than the reference value (70%).

  This is because by increasing the duty ratio of the data & clock DATA & CLK transmitted from the IC2 to the IC1, the power consumption required for the transmission of the data & clock DATA & CLK is increased more than the power consumption at the reference value. This is because the average value of the output voltages of the four cells 150 included in the block 150B corresponding to 1 is brought close to the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC3.

  On the other hand, when the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC2 is lower than the voltage value represented by the data & clock DATA & CLK transmitted from IC3 to IC1, IC2 transmits to IC1. The duty ratio of the data & clock DATA & CLK to be made is lower than the reference value (70%).

  This is because by reducing the duty ratio of the data & clock DATA & CLK that the IC2 transmits to the IC1 lower than the reference value, the power consumption necessary for the transmission of the data & clock DATA & CLK is reduced more than the power consumption at the reference value. This is because the average value of the output voltages of the four cells 150 included in the block 150B corresponding to 1 is brought close to the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC3.

  As described above, IC2 compares the average value of the output voltages of the four cells 150 included in the block 150B corresponding to itself with the voltage value represented by the data & clock DATA & CLK output from IC3, and according to the comparison result. The duty ratio of the data & clock DATA & CLK transmitted to the IC 1 is adjusted with respect to the reference value (70%).

  In addition to the voltage value represented by the data & clock DATA & CLK output from the IC3, or the voltage represented by the data & clock DATA & CLK output from the IC4, the IC2 represents the voltage represented by the data & clock DATA & CLK output from the IC3. The duty ratio may be adjusted by comparison with the value.

  When the voltage value represented by the data & clock DATA & CLK output from the IC4 is used for comparison in addition to the voltage value represented by the data & clock DATA & CLK output from the IC3, for example, the following may be performed.

  The duty ratio is set by comparing the average value of the voltage value represented by the data & clock DATA & CLK output by IC3 and IC4 with the average value of the output voltage of the four cells 150 included in the block 150B corresponding to itself. May be.

  IC2 has an average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC2 higher than the voltage value represented by the data & clock DATA & CLK output by IC3 and IC4, and IC4 outputs it. When the voltage value represented by the data & clock DATA & CLK output by the IC3 is lower than the voltage value represented by the data & clock DATA & CLK output by the IC3, the voltage value is decreased in accordance with the voltage value represented by the data & clock DATA & CLK output by the IC4. The duty ratio may be increased.

  Further, IC2 has an average value of output voltages of the four cells 150 included in the block 150B corresponding to IC2 lower than a voltage value represented by data & clock DATA & CLK output by IC3 and IC4, and IC4 outputs it. When the voltage value represented by the data & clock DATA & CLK output by the IC3 is lower than the voltage value represented by the data & clock DATA & CLK output by the IC3, the voltage value is decreased in accordance with the voltage value represented by the data & clock DATA & CLK output by the IC4. The duty ratio may be increased.

  Further, the IC 2 may set the duty ratio by other methods.

  A command (voltage detection command) for causing IC1 to detect the output voltage of cell 150 is input to IC1 as data DATA1 from voltage control unit 110A of ECU 110.

  Data DATA2 is data transmitted from IC1 to ECU 110 as shown in (4) of FIG. 2B, and is transmitted as a single-ended signal. As data DATA2, data representing the voltage values of IC1 to IC4 are transmitted from IC1 to ECU 110 in time series.

  When IC1 receives data & clock DATA & CLK from IC4, IC3, and IC2, IC1 generates data DATA2 representing the output voltage of cell 150 detected by each of IC4, IC3, and IC2, and transmits the data DATA2 to voltage control unit 110A of ECU 110.

  IC1 transmits the average value of the output voltages of the four cells 150 included in the block 150B detected by itself to data controller 110A of ECU 110 as data DATA2.

  The data DATA2 represents “1” and “0” by H level and L level signals (pulse signals having a duty ratio of 100%) having the same signal width as one cycle of the clock CLK.

  FIG. 2B shows four-bit data ('0100') as an example, but the number of bits of data DATA2 may be an arbitrary number.

  As shown in FIG. 2C, the IC chip 160 may have a configuration including, for example, a data processing unit 160A and a voltage detection unit 160B. When the voltage detection command is input, the data processing unit 160A causes the voltage detection unit 160B to obtain an average value of the output voltages of the four cells 150 included in the block 150B, and based on the average value of the output voltage, the voltage data Is generated. The data format of the voltage data generated by the data processing unit 160A is data & clock DATA & CLK for IC4, IC3, and IC2, and the duty ratio is also adjusted for IC3 and IC2. The data format of the voltage data generated by the data processing unit 160A for IC1 is data DATA2.

  Next, a data flow between the ECU 110 and the IC1 to IC4 will be described with reference to FIG.

  FIG. 3 is a diagram illustrating a data flow between ECU 110 and IC1 to IC4 in battery monitoring apparatus 100A of the first embodiment. In FIG. 3, the horizontal axis represents the time axis.

  In battery monitoring apparatus 100A of the first embodiment, voltage detection commands are sequentially transmitted from ECU 110 to each of IC1 to IC4, and thereafter, IC4, IC3, IC2, and IC1 receive voltage data representing the voltage of cell 150, respectively. Send to.

  For this reason, in FIG. 3, in order to show the flow of the voltage detection command and the voltage data from top to bottom in the vertical direction, the blocks of the ECU, IC1, IC2, IC3, IC4, IC4, IC3, IC2, IC1, ECU Indicates. Further, on the right side of each block, a voltage detection command received by each block and voltage data output from each block are shown.

  In addition, the fact that the voltage detection command and the voltage data are shifted to the right side from the top to the bottom represents the passage of time.

  As shown in FIG. 3, the voltage detection command is sequentially transferred from the ECU to IC <b> 1 to IC <b> 4 as indicated by an arrow A. Each of IC1 to IC4 receives a voltage detection command in order. Note that the clock CLK and the data DATA1 shown in (1) and (2) of FIG. 2B are transmitted between the ECU 110 and the IC1. Further, data & clock DATA & CLK shown in (3) of FIG. 2B is transmitted between IC1 and IC2 to IC4.

  Further, after reaching the IC 4, the voltage detection command is transferred again in the order of IC 4, IC 3, IC 2, IC 1, ECU 110 through the signal line 170 (see FIGS. 1 and 2).

  Further, the IC 4, IC 3, IC 2, and IC 1 that have received the voltage detection command transmit voltage data representing the output voltage of the cell 150 that they monitor to the ECU 110. In FIG. 3, voltage data at a stage where the IC4, IC3, IC2, and IC1 output to the signal line 170 (see FIGS. 1 and 2) is shown by a thick frame.

  As a result, as indicated by an arrow B, voltage data is sequentially output from IC4, IC3, IC2, and IC1, and the ECU 110 receives the four voltage data.

  By the way, as shown in FIG. 3, the voltage data of IC4 is transmitted from IC4 to ECU110 via IC3, IC2, and IC1. Further, the voltage data of IC3 is transmitted from the IC3 to the ECU 110 via IC2 and IC1. The voltage data of IC2 is transmitted from the IC2 to the ECU 110 via the IC1.

  Therefore, IC3 can obtain the voltage data of IC4, IC2 can obtain the voltage data of IC4 and IC3, and IC1 can obtain the voltage data of IC4, IC3, and IC2. .

  FIG. 4 is a diagram illustrating a method for adjusting the duty ratio of the voltage data in the battery monitoring apparatus 100A according to the first embodiment. Such adjustment of the duty ratio is performed in IC3 and IC2. Here, adjustment of the duty ratio by the IC 3 will be described.

  When the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC3 is higher than the voltage value represented by the data & clock DATA & CLK transmitted from IC4 to IC1, the data transmitted to IC1 & The duty ratio of the clock DATA & CLK is set higher than the reference value (70%).

  In this case, for example, by setting the duty ratio to 80%, as shown in FIG. 4A, the data “1” is more than the data & clock DATA & CLK shown in (3) of FIG. For, the H level section is long, and for the data “0”, the L level section is long.

  On the other hand, when the average value of the output voltages of the four cells 150 included in the block 150B corresponding to IC3 is lower than the voltage value represented by the data & clock DATA & CLK transmitted from IC4 to IC1, IC3 transmits to IC1. The duty ratio of the data & clock DATA & CLK to be made is lower than the reference value (70%).

  In this case, for example, by setting the duty ratio to 60%, as shown in FIG. 4B, the data “1” is more than the data & clock DATA & CLK shown in (3) of FIG. For, the H level section is short, and for the data “0”, the L level section is short.

  As described above, according to the battery monitoring apparatus 100A and the battery unit 100 of the first embodiment, the data & clock DATA & CLK obtained by synthesizing the clock and data is used between the IC1 to IC4. Since the data & clock DATA & CLK includes a clock and data, between the IC1 and IC4, both the clock and data can be transmitted through the signal line 170A, and the structure of the device is simplified by reducing the number of wirings. Can do.

  In FIG. 2A, four signal lines 170A for transmitting a differential signal are shown. However, when a single-ended signal is sufficient, two signal lines 170A are sufficient.

  Further, according to the battery monitoring device 100A and the battery unit 100 of the first embodiment, the IC3 and IC2 are blocks corresponding to themselves by adjusting the duty ratio of the pulse signal (data & clock DATA & CLK) indicating the voltage data. The average value of the output voltage of 150B can be brought close to the average value of the output voltage of the block 150B corresponding to the higher-order IC. For this reason, equalization of the output voltage can be achieved between the blocks 150B.

  In the above description, the stacks 120 and 130 each include four IC chips 160 (IC1 to IC4). However, when the number of IC chips 160 included in one stack (120 and 130) is larger, Therefore, the number of IC3 and IC2 for adjusting the duty ratio increases. This corresponds to a further increase in the number of ICs similar to IC3 and IC2 between the uppermost IC4 and the lowermost IC1.

  For this reason, when the number of IC chips is larger, the effect of equalizing the output voltage between the blocks 150B becomes more remarkable.

  Further, in order to average the output voltage of the cell 150, when the ignition switch of the vehicle equipped with the battery monitoring device 100A or the battery unit 100 is off, the cell 150 having a high output voltage is discharged and discharged. It can be considered that power is consumed by a resistor or the like.

  However, such a technique requires a circuit for performing a discharge process while the ignition is turned off.

  On the other hand, the battery monitoring device 100A and the battery unit 100 according to the first embodiment average the output voltage of the cell 150 when the ignition of the vehicle is on (that is, when the vehicle is running, for example). Can be made. Therefore, even when the battery monitoring device 100A or the battery unit 100 is mounted on a vehicle in which the ignition is turned off for a short time, such as a commercial vehicle represented by a taxi, the ignition is on. The output voltage of the cell 150 can be averaged efficiently.

  In addition, if the cell 150 is discharged when the ignition is off, the life of the cell 150 may be shortened. However, the battery monitoring device 100A and the battery unit 100 of the first embodiment may not discharge the cell 150. Thus, the lifetime of the cell 150 can be extended.

  In addition, since a circuit for discharging the cell 150 when the ignition is off is unnecessary, the battery monitoring device 100A and the battery unit 100 can be realized with a simple configuration.

  In the above description, in order to level the power of the data & clock DATA & CLK, the form in which the duty ratios of the data “1” and the data “0” of the data & clock DATA & CLK are both increased or decreased has been described. The duty ratio of “and data“ 0 ”may be adjusted separately.

  For example, when the data “1” included in the data & clock DATA & CLK is larger than the data “0”, the duty ratio of the pulse data for the data “1” is lowered and the duty ratio of the pulse data for the data “0” is decreased. When the data “1” included in the data & clock DATA & CLK is smaller than the data “0”, the duty ratio of the pulse data for the data “1” is increased and the pulse data for the data “0” is increased. The duty ratio may be decreased.

<Embodiment 2>
5 and 6 are diagrams for explaining a method for adjusting the duty ratio of data & clock DATA & CLK in the battery monitoring apparatus and battery unit of the second embodiment. The configurations of the battery monitoring device and the battery unit of the second embodiment are the same as the battery monitoring device 100A and the battery unit 100 of the first embodiment except that the adjustment method of the duty ratio of the data & clock DATA & CLK is different. A description of the configuration is omitted.

  As shown in FIG. 5A, in the second embodiment, as an example, one frame of data & clock DATA & CLK has a 10-bit data area, a start bit (1 bit) at the beginning, and a stop at the end. It has a bit (1 bit) and has 8 data bits D0 to D7 between the start bit and the stop bit. The data bits D0 to D7 may be regarded as character bits.

  Here, data & clock DATA & CLK for representing voltage data will be described.

  As shown in FIG. 5B, the start bit is 1-bit data, and the signal level is L level. Data bits D0 to D7 are set to H level or L level according to voltage data. The stop bit is 1-bit data, and the signal level is H level.

  As described above, the data & clock DATA & CLK is 10-bit data, the first start bit is fixed at the L level, and the last stop bit is fixed at the H level.

  Therefore, for example, when all of the data bits D0 to D7 are “1”, the data format is as shown in (1) of FIG. 5C, which includes 9 bits of H level data and L level data. Is included for one bit.

  If all the data bits D0 to D7 are “0”, the data format is as shown in (2) of FIG. 5C, which includes 9 bits of L level data and 1 bit of H level data. Will contain minutes.

  Therefore, depending on the number of bits “1” and “0” included in the data bits D0 to D7, the power consumption when the IC3 and IC2 transmit the data & clock DATA & CLK representing the voltage data to the ECU 110 is greatly different.

  That is, if the number of bits “1” included in the data bits D0 to D7 is relatively large, the power consumption when the IC3 and IC2 transmit the data & clock DATA & CLK to the ECU 110 increases. On the other hand, if the number of bits “0” included in the data bits D0 to D7 is relatively large, the power consumption when the IC3 and IC2 transmit the data & clock DATA & CLK to the ECU 110 decreases.

  Therefore, in the second embodiment, the data processing unit 160A (see FIG. 2C) of IC3 and IC2 performs data &amp; data if the number of bits “1” included in the data bits D0 to D7 is larger than 4 bits. The duty ratio of the clock DATA & CLK is lowered below the reference value (70%).

  In the second embodiment, the data processing unit 160A (see FIG. 2C) of IC3 and IC2 performs the data processing when the number of bits “0” included in the data bits D0 to D7 is larger than 4 bits. & The duty ratio of the clock DATA & CLK is increased from the reference value (70%).

  This is because the number of bits “1” included in the data bits D0 to D7 is greater than 4 bits and the number of bits “0” included in the data bits D0 to D7 is greater than 4 bits. This is for leveling consumption.

  As shown in FIG. 6A, when the number of bits “1” included in the data bits D0 to D7 is larger than 4 bits and includes “1” for 8 bits, the duty ratio of the data & clock DATA & CLK Is lower than the reference value (70%), for example, 60%.

  As a result, as shown in FIG. 6A, the H level section included in one frame of data & clock DATA & CLK is compared with the case where the duty ratio shown in FIG. 5C (1) is 70%. Shorter.

  Further, as shown in FIG. 6B, when the number of bits of “0” included in the data bits D0 to D7 is more than 4 bits and includes “0” for 8 bits, the data & clock DATA & CLK The duty ratio is lowered below the reference value (70%), for example, 60%.

  As a result, as shown in FIG. 6 (B), the H level section included in one frame of data & clock DATA & CLK is compared with the case where the duty ratio shown in FIG. 5 (C) (1) is 70%. Shorter.

  In this way, the length of the H level section included in one frame of data & clock DATA & CLK is made shorter than before adjustment (when the duty ratio is 70% of the reference value), so that the cell 150 in each block 150B has The average value of the output voltage can be equalized.

<Embodiment 3>
In the third embodiment, dummy data is transmitted between IC1 to IC4, thereby equalizing power consumption when IC1 to IC4 transmit data.

  The configuration of the battery monitoring device and the battery unit of the third embodiment is the same as that of the battery monitoring device 100A and the battery unit 100 of the first embodiment except that dummy data is transmitted between IC1 to IC4. The description about is omitted.

  As shown in FIG. 3 in the first embodiment, the voltage data is sequentially output from IC4 to IC1 in the direction from the highest IC4 to the ECU 110 via the lowest IC1.

  Therefore, the IC 4 transmits only its own voltage data to the ECU 110, and the IC 3 transmits its own voltage data and the voltage data of the IC 4 to the ECU 110. IC2 transmits its own voltage data and voltage data of IC4 and IC3 to ECU 110, and IC1 transmits its own voltage data and voltage data of IC4, IC3 and IC2 to ECU110.

  Therefore, the highest-order IC 4 has the smallest number of voltage data to be transmitted, and the lowest-order IC 1 has the largest number of voltage data to be transmitted.

  For this reason, a difference occurs in power consumption by transmitting voltage data between IC1 to IC4.

  In the third embodiment, dummy data is transmitted between such IC1 to IC4 in order to alleviate the difference in power consumption caused by transmitting voltage data.

  FIG. 7 is a diagram illustrating a transmission path of dummy data to be transmitted between IC1 to IC4 in the battery monitoring device and the battery unit according to the third embodiment. FIG. 7 is a diagram in which dummy data is added to FIG.

  As shown in FIG. 7, the IC 3 transmits the dummy data D3 to the higher-order IC 4 simultaneously with transmitting the voltage data to the ECU 110. Similarly, IC2 transmits dummy data D2 to the higher-order IC3 simultaneously with transmitting voltage data to the ECU 110, and IC1 transmits dummy data D1 to the higher-order IC3 simultaneously with transmitting voltage data to the ECU110. Send to IC2.

  As a result, the dummy data D3, D2, and D1 are sequentially transmitted to the IC4. The data processing unit 160A (see FIG. 2C) of the IC 4 deletes the dummy data D3, D2, and D1 without returning them to the IC 3 and transmitting them.

  In this way, the difference in the amount of data transmitted by IC1 to IC4 can be reduced, so that the difference in the average value of the output voltages of the cells 150 in each block 150B can be reduced and equalized.

  Regarding the deletion of the dummy data D3, D2, D1 in the IC 4, for example, the data transmitted in the upper direction during a certain period after the IC 4 receives the voltage detection command is determined as the dummy data, Delete it.

  In the operation example shown in FIG. 7, regarding the number of data of the voltage detection command, the voltage data, and the dummy data, the ECU 110 handles six data, IC1, IC2, and IC3 each handle seven data, and IC4 has six data. Data will be handled.

  Therefore, the difference in the amount of data transmitted by IC1 to IC4 can be reduced, and the difference in the average value of the output voltage of the cell 150 in each block 150B can be reduced and equalized.

  The mitigation of the difference in the average value of the output voltage of the cell 150 in each block 150B using transmission of dummy data in the third embodiment may be realized in combination with the first or second embodiment, but the first embodiment 2 may be performed alone without being combined.

  By using dummy data as described above, the difference in the amount of data transmitted by IC1 to IC4 can be reduced, the difference in the average value of the output voltage of the cell 150 in each block 150B is reduced, This is because they can be equalized.

  Although the battery monitoring device and the battery unit according to the exemplary embodiments of the present invention have been described above, the present invention is not limited to the specifically disclosed embodiments, and is not limited to the claims. Various modifications and changes can be made without departing from the above.

100 battery unit 110 ECU
120, 130 Stack 150, 150H1, 150H2, 150H3, 150H4, 150L1, 150L2, 150L3, 150L4 Cell 150B Block 160, 160H, 160L IC chip 160A Data processing unit 160B Voltage detection unit 170, 170A, 170B Signal line

Claims (8)

A first control unit disposed outside a plurality of battery stacks including battery cells;
A second controller that is disposed in each of the plurality of battery stacks, detects an output voltage of the battery cell, and outputs pulse data representing the detected voltage;
Daisy chain connecting a plurality of the second control units to the first control unit,
The second control unit reduces the duty ratio of the pulse data output by the second control unit when the voltage value represented by the pulse data output by the other second control unit is higher than the output voltage of the battery cell detected by the second control unit. A battery monitoring device that increases the duty ratio of the pulse data output by itself when the voltage value represented by the pulse data output by another second control unit is lower than the output voltage of the battery cell detected by itself . A first control unit disposed outside a plurality of battery stacks including battery cells;
A second controller that is disposed in each of the plurality of battery stacks, detects an output voltage of the battery cell, and outputs pulse data representing the detected voltage;
Daisy chain connecting a plurality of the second control units to the first control unit,
In the daisy chain, the second control unit outputs itself to a voltage value represented by pulse data output from another second control unit located on the farther side than the first control unit. A battery monitoring device that adjusts the duty ratio of pulse data. A first control unit disposed outside a plurality of battery stacks including battery cells;
A second controller that is disposed in each of the plurality of battery stacks, detects an output voltage of the battery cell, and outputs pulse data representing the detected voltage;
Daisy chain connecting a plurality of the second control units to the first control unit,
The second control unit adjusts the duty ratio of the pulse data so that the power of the pulse data is leveled according to the ratio of the H level data and the L level data included in the pulse data output by the second control unit. A battery monitoring device.   The second control unit reduces the duty ratio of the pulse data when the H level data included in the pulse data output by itself is greater than the L level data, and the H level data included in the pulse data output by the second control unit. The battery monitoring apparatus according to claim 3, wherein the duty ratio of the pulse data is increased when it is less than the L level data.   The second control unit reduces the duty ratio of the pulse data for the H level data when the H level data included in the pulse data output by the second control unit is greater than the L level data, and the pulse data for the L level data. When the H level data included in the pulse data output by itself is less than the L level data, the duty ratio of the pulse data for the H level data is increased and the pulse data for the L level data is increased. The battery monitoring device according to claim 3, wherein the duty ratio of the battery is reduced.   The plurality of second control units transmit dummy data from the second control unit closer to the first control unit to the second control unit far from the first control unit in the daisy chain. The battery monitoring device according to any one of claims 1 to 5.   Among the plurality of second control units, in the daisy chain, the second control unit farthest from the first control unit receives the dummy data received from the second control unit closer to the first control unit than itself. The battery monitoring device according to claim 6, wherein no transfer is performed. A plurality of battery stacks including battery cells;
A first control unit disposed outside the battery stack;
A second controller that is disposed in each of the plurality of battery stacks, detects an output voltage of the battery cell, and outputs pulse data representing the detected voltage;
Daisy chain connecting a plurality of the second control units to the first control unit,
The second control unit reduces the duty ratio of the pulse data output by the second control unit when the voltage value represented by the pulse data output by the other second control unit is higher than the output voltage of the battery cell detected by the second control unit. The battery unit increases the duty ratio of the pulse data output by itself when the voltage value represented by the pulse data output by the other second control unit is lower than the output voltage of the battery cell detected by itself.

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