JP2014212232A - Ge-BASED NANOWIRE OPTICAL ELEMENT AND METHOD OF MANUFACTURING THE SAME - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a Ge-based nanowire optical element in which stable tensile distortion is applied to a Ge-based semiconductor containing Ge as a main component, and also to provide a method of manufacturing the same.SOLUTION: On a substrate whose linear expansion coefficient is smaller than Ge, a block part is provided which is composed of a material having a larger linear expansion coefficient than the substrate and has an extension part prevented from being restricted by the substrate.Tensile distortion is provided between end surfaces of a pair of block parts opposite to each other, and at least a part thereof is bridged by a Ge-based nanowire composed of a Ge-based semiconductor containing Ge as the maximum component.

Description

  The present invention relates to a Ge-based nanowire optical device and a method of manufacturing the same, and, for example, a Ge-based nanowire having Ge as a maximum component on a substrate having a larger linear thermal expansion coefficient than that of Ge such as Si is monolithically formed. The present invention relates to the formed high efficiency light emitting element / light receiving element.

  In recent years, high-efficiency light-emitting elements and light-receiving elements that can be formed monolithically on silicon have been demanded for the realization of high-performance electronic / optical integrated circuits. In particular, since semiconductor germanium (Ge) is the same group IV semiconductor as Si, realization of an element using Ge is desired.

  However, since Ge is an indirect transition type semiconductor like Si, the quantum efficiency is low as it is, and there is a problem that it is not suitable for a light emitting / receiving layer material. Therefore, it is expected that a high-efficiency element is formed by applying a tensile strain of several percent order to Ge and utilizing the property as a direct transition type semiconductor.

  A Ge light-emitting / light-receiving element structure in which tensile strain is applied by providing a silicon nitride (SiN) film having a thermal expansion coefficient controlled by optimizing the H / N content ratio on the Ge thin film has been proposed (for example, Patent Documents). 1).

International publication pamphlet WO 2010/055750

  However, in the proposed structure, in addition to the instability of the thermal expansion coefficient of the SiN film, since the lower side of the Ge thin film is fixed to the substrate, the SiN film stably pulls the Ge thin film. There is a problem that it is difficult to apply strain.

  Accordingly, an object of the Ge optical device is to apply a stable tensile strain to a Ge semiconductor containing Ge as a main component.

  From one aspect disclosed, a substrate having a smaller linear expansion coefficient than Ge, a material having a larger linear expansion coefficient than the substrate, a fixed base that is crystallographically bonded to the substrate, and an extending portion that is not constrained by the substrate A pair of block portions whose end faces in the extending direction of the extending portions are opposed to each other via a gap, and at least a part of the bridge between the end surfaces facing each other of the pair of block portions has Ge as a maximum component. There is provided a Ge-based nanowire optical element comprising: a Ge-based nanowire made of a Ge-based semiconductor, wherein the Ge-based semiconductor having Ge as a maximum component has a tensile strain.

  From another viewpoint to be disclosed, a step of providing a selective growth mask having a pair of openings arranged in parallel on a substrate having a smaller coefficient of linear expansion than Ge, and a crystallographic feature on the substrate in the openings. A step of selectively growing a fixed base to be joined, and a stretched portion that is not restrained by the substrate by lateral growth with the fixed base as a base point so that end surfaces in the stretched direction of the stretched portion are opposed to each other via a gap. A step of forming a pair of block portions together with the fixed base, and a Ge-based nanowire made of a Ge-based semiconductor having at least a portion of Ge as a maximum component between the end faces of the extending portion, And a step of applying a tensile strain to the Ge-based nanowire by lowering the temperature to a Ge-based nanowire optical element.

  According to the disclosed Ge-based nanowire optical element and the manufacturing method thereof, it is possible to apply a stable tensile strain to a Ge-based semiconductor containing Ge as a main component.

It is explanatory drawing of the Ge type nanowire optical element of embodiment of this invention. It is explanatory drawing to the middle of the manufacturing process of Ge nanowire light emitting element of Example 1 of this invention. It is explanatory drawing after FIG. 2 of the manufacturing process of Ge nanowire light emitting element of Example 1 of this invention. It is explanatory drawing to the middle of the manufacturing process of Ge nanowire light emitting element of Example 2 of this invention. It is explanatory drawing to the middle after FIG. 4 of the manufacturing process of Ge nanowire light emitting element of Example 2 of this invention. It is explanatory drawing after FIG. 5 of the manufacturing process of Ge nanowire light emitting element of Example 2 of this invention. It is a schematic perspective view of Ge nanowire laser of Example 3 of this invention. It is explanatory drawing to the middle of the manufacturing process of Ge nanowire light emitting element array of Example 4 of this invention. It is explanatory drawing to the middle after FIG. 8 of the manufacturing process of Ge nanowire light emitting element array of Example 4 of this invention. It is explanatory drawing after FIG. 9 of the manufacturing process of Ge nanowire light emitting element array of Example 4 of this invention.

Here, a Ge-based nanowire element according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 is an explanatory diagram of a Ge-based nanowire optical element according to an embodiment of the present invention. First, as shown in FIG. 1 (a), a base 1 having a linear expansion coefficient smaller than that of Ge, a fixed base 3 that is crystallographically bonded to the substrate 1, and stretching that is not constrained by the substrate 1 with the fixed base 3 as a starting point. The part 4 is formed so as to be opposed to each other through the gap 5 to form a pair of block parts 2. FIGS. 1 (a) shows the state at the low temperature thermal _{T L,} the length of the stretching unit 4 with _{L BL,} the void spacing 5 to _{d TL.} The temperature _TL usually means room temperature.

Then, as shown in FIG. 1 (b), a Ge-based nanowires 6 Ge system length comprising a semiconductor of L _NW to the maximum component of Ge between the end face of the extending portion 4 at the temperature T _H of a temperature higher than room temperature crosslinking To do. At this time, the substrate 1 extends by ΔL _SB in the left-right direction in the drawing with respect to the gap d _TL , and the extending portion 4 extends by ΔL _BL with reference to the fixed base portion 3 fixed to the substrate 1. No strain is applied to the Ge-based nanowire 6.

The stretch amounts ΔL _BL and ΔL _SB in this case are
ΔL _BL = L _BL κ _BL ΔT (1)
ΔL _SB = d _TL κ _SB ΔT (2)
It is represented by Here, since the linear expansion coefficients κ _SB and κ _BL of the substrate 1 and the block portion 2 are set to κ _SB <κ _BL , the gap interval d _TH at the temperature T _H is the gap interval d at the temperature T _{L. TL}
d _TH = d _TL -2ΔL _BL + ΔL _SB (3)
It becomes narrower than before the temperature rise.

In this state, when crosslinking a Ge-based nanowires 6, the nanowire length _{L NW} is equal to the gap spacing _{d TH} at a temperature _{T H,}
d _TH = L _NW (4)
It becomes. From (1) to (4)
d _TL = (L _NW + 2ΔL _BL ) / (1 + κ _SB ΔT) (5)
It becomes.

Next, as shown in FIG. 1C, when the temperature is lowered to the temperature _TL , the stretched portion 4 returns to the original state, and as a result, the Ge-based nanowire 6 is pulled and stretched by ΔL _NW, so that tensile strain is applied. Will be. That is, the tensile strain ε _{NW corresponding} to the change in the gap interval and the contraction amount of the Ge-based nanowire 6 itself is applied.

The tensile strain ε _NW is
ε _NW = (d _TL −d _TH + ΔL _NW ) / L _NW (6)
It is represented by Here, the change ΔL _NW in the length of the nanowire portion when the temperature changes ΔT is:
ΔL _NW = L _NW κ _SB ΔT (7)
Therefore, from (5) to (7), the tensile strain ε _NW is
ε _NW = {(L _NW + 2ΔL _BL ) / (1 + κ _SB ΔT) −L _NW + ΔL _NW } / L _NW
... (8)
I found out that

Next, the fact that it is possible to apply a uniaxial tensile strain of 2.4% or more necessary for direct transition of Ge will be described with specific examples of materials and sizes. As a first example, it is assumed that the substrate is Si, the block 2 is GaP, and the entire nanowire is Ge. The linear expansion coefficients of Si, GaP, and Ge are 2.4 × 10 ⁻⁶ K ⁻¹ , 5.6 × 10 ⁻⁶ K ⁻¹ , and 5.9 × 10 ⁻⁶ K ⁻¹ , respectively. In this configuration, the length of the stretched portion 4 that is not constrained by the substrate 1 of the block portion 2 is L _BL = 5 μm, the temperature difference before and after crosslinking is ΔT = 450 ° C., and the length of the Ge nanowire during crosslinking is L _NW = 1 μm. if there is,
ε _NW = 0.026
Thus, the direct transition type condition is satisfied.

As a second example, it is assumed that the substrate 1 is Si, the block portion 2 is Si _0.7 Ge _0.3 , and the entire nanowire is Ge. The linear expansion coefficients of Si, Si _0.7 Ge _0.3 , and Ge are 2.4 × 10 ⁻⁶ K ⁻¹ , 3.45 × 10 ⁻⁶ K ⁻¹ , 5.9 × 10 ⁻⁶ K ^{−, respectively. 1} . In this configuration, if the length of the stretched portion 4 is L _BL = 8 μm, the temperature difference before and after crosslinking is ΔT = 450 ° C., and the total length of the Ge nanowires during crosslinking is L _NW = 1 μm,
ε _NW = 0.026
Thus, the direct transition type condition is satisfied. The block 2 is preferably a single crystal, but may be a polycrystal.

The Ge-based nanowire 6 is not limited to a pure Ge nanowire, and SiGe having a Si content of 15% or less, that is, Si _1-x Ge _x (0.85 ≦ x ≦ 1) is also an indirect transition. Since the lowest point of the mold is the same L point as Ge, it is possible to make a transition directly by applying tensile strain by the same method. However, the amount of distortion required for direct transition becomes larger. In addition, nanowire means a rod-shaped thing with a diameter of 200 nm or less.

  Further, the Ge-based nanowire 6 may be a double heterojunction structure composed of Si nanowire / Ge nanowire / Si nanowire, and carriers are confined in the Ge nanowire, so that the light emission efficiency is increased. It is possible to configure a laser by arranging a plurality of nanowires of this double heterojunction structure in parallel and coating the nanowire with a polymer having a refractive index smaller than that of the nanowire and having a larger refractive index than the environment where the polymer side wall is in contact. Become.

  In order to form such a structure, a selective growth mask having a pair of openings arranged in parallel is provided on a substrate 1 having a smaller linear expansion coefficient than Ge, and crystallographically bonded to the substrate 1 in the openings. The fixed base 3 to be selectively grown is grown. Next, a stretched portion 4 that is not constrained by the substrate 1 by lateral growth with the fixed base 3 as a starting point is formed so that end surfaces in the stretched direction of the stretched portion 4 face each other with a gap 5 therebetween. The block part 2 is as follows.

  Next, a Ge-based nanowire 6 made of a Ge-based semiconductor having at least a part of Ge as a maximum component between the end faces of the extending portions 4 is cross-linked at a temperature higher than room temperature and then cooled to room temperature. As a result, tensile strain is applied to the Ge-based nanowire 6.

  In addition, in the step of bridging the Ge-based nanowire 6, a catalyst for growing the Ge-based nanowire 6 may be formed on a part of the end surface of one extending portion 4 of the pair of block portions 2, and the catalyst was formed. Ge-based nanowires 6 grow from the side. Note that Au, Cu, or Ni may be used as the catalyst, and the growth is always performed in a mode in which the catalyst is present at the growth tip of the Ge-based nanowire 6.

  Alternatively, in the case where no catalyst is used, the end surface of one extending portion 4 of the pair of block portions 2 is covered with a growth inhibiting film, and the end surface of the other extending portion 4 of the pair of block portions 2 is used as a base point. The growth of the Ge-based nanowire 6 is started to form an initial Ge layer. Next, after the initial Ge layer is formed, at least a part of the growth inhibition film may be removed, and the growth may be performed until the Ge-based nanowire 6 contacts the removal portion of the growth inhibition film.

  As the substrate 1, a so-called SOI substrate in which a single crystal Si layer is provided on a single crystal Si substrate via a BOX layer may be used. By processing the single crystal Si layer to form a single crystal Si core layer, A Ge-based nanowire optical element integrated with a waveguide can be realized. As the optical element, a light emitting element is typical, but it can be used as a light receiving element.

Next, with reference to FIG.2 and FIG.3, the manufacturing process of Ge nanowire light emitting element of Example 1 of this invention is demonstrated. First, as shown in FIG. 2A, an SiO ₂ film 12 having a thickness of 200 nm is formed on a single crystal Si substrate 11 having a (001) plane as a main surface, and an opening 13 having a width of 2 μm is formed to have a thickness of 30 μm. A selective growth mask is formed at a pitch.

Next, as shown in FIG. 2B, the gap 17 facing the pair of GaP blocks 14 is 2.5 μm using the MOCVD (metal organic chemical vapor deposition) method at a substrate temperature of 500 ° C. to 600 ° C. To grow. At this time, triethylgallium (TEGa) is used as the Ga material, and phosphine (PH ₃ ) is used as the P material. First, the fixed base 15 is epitaxially grown on the surface of the single crystal Si substrate 11 exposed in the opening 13, and then the stretched portion 16 is grown by lateral growth.

Next, as shown in FIG. 2C, the exposed portion of the SiO ₂ film 12 is removed by etching so that the stretched portion 16 is not constrained by the single crystal Si substrate 11, and the stretched portion 16 is further etched by side etching. A part of the SiO ₂ film 12 underneath is also removed. Although the SiO ₂ film 12 under the extending portion 16 may be completely removed, the strength is structurally reduced.

Then, as shown in FIG. 2 (d), by after forming a SiO ₂ film 18, a resist pattern having an opening corresponding to the width of the gap 17 (shown which is omitted) provided to etch, SiO ₂ An opening 19 that opens a part of the end face of the extending portion 16 is formed in the film 18. The width of the opening 19 at this time is 60 nm.

  Next, as shown in FIG. 3E, an Au thin film 20 having a thickness of 20 nm serving as a catalyst is formed by ion plating on the end face of the extending portion 16 exposed in one opening 19 (left side in the drawing). .

Next, as shown in FIG. 3F, first, an n-type Si nanowire 22 having a length of 1 μm is grown at a growth temperature of 600 ° C. At this time, the Au thin film 20 is melted to form a circular Au catalyst 21 having a diameter approximately equal to the width of the opening 19, and the nanowire is in the growth mode in which the Au catalyst 21 is always located at the tip (the right side in the figure). However, no growth occurs on the side where no catalyst is provided. Further, the diameter of the n-type Si nanowire 22 is approximately the same as the width of the opening 19. In this case, disilane (Si ₂ H ₆ ) is used as the Si raw material, and phosphine (PH ₃ ) is used as the n-type dopant source.

Next, as shown in FIG. 3G, an i-type Ge nanowire 23 having a length of 0.5 μm and a p-type Si nanowire 24 having a length of 1 μm are sequentially grown and exposed to the opening 19 on the right side in the drawing. It joins with the end surface of the extending | stretching part 16 to perform. At this time, germane (GeH ₄ ) is used as the Ge raw material, disilane (Si ₂ H ₆ ) is used as the Si raw material, and diborane (B ₂ H ₆ ) is used as the p-type dopant source.

  Next, as shown in FIG. 3 (h), the n-side electrode 25 is provided so as to be in contact with the n-type Si nanowire 22, and the p-side electrode 26 is provided so as to be in contact with the p-type Si nanowire 24. The Ge nanowire light emitting device of Example 1 of the invention is completed. Note that Au—Sb is used as the n-side electrode 25, and Au—Ga is used as the p-side electrode 26.

Since the linear expansion coefficients of Si, GaP, and Ge are 2.4 × 10 ⁻⁶ K ⁻¹ , 5.6 × 10 ⁻⁶ K ⁻¹ , and 5.9 × 10 ⁻⁶ K ⁻¹ , respectively, i-type Ge The nanowire 23 is applied with a tensile strain of 2.4% or more, and the band structure becomes a direct transition type. Therefore, since phonons are not present in luminescent recombination, luminous efficiency is improved.

Next, with reference to FIGS. 4 to 6, a manufacturing process of the Ge nanowire light-emitting element of Example 2 of the present invention will be described. First, as shown in FIG. 4A, an SiO ₂ film 32 having a thickness of 200 nm is formed on a single crystal Si substrate 31 having a (001) plane as a main surface, and an opening 33 having a width of 1 μm is formed to have a thickness of 20 μm. A selective growth mask is formed at a pitch.

Next, as shown in FIG. 4B, the gap 37 facing the SiGe block 34 made of a pair of Si _0.7 Ge _0.3 using a vapor phase growth method at a substrate temperature of 550 ° C. to 650 ° C. is 1 μm. Grow to become. At this time, disilane (Si ₂ H ₆ ) is used as the Si material, and germane (GeH ₄ ) is used as the Ge material. First, the fixed base 35 is epitaxially grown on the surface of the single crystal Si substrate 31 exposed in the opening 33, and then the stretched portion 36 is grown by lateral growth.

Next, as shown in FIG. 4C, the exposed portion of the SiO ₂ film 32 is removed by etching so that the stretched portion 36 is not constrained by the single crystal Si substrate 31, and the stretched portion 36 is further etched by side etching. A part of the underlying SiO ₂ film 32 is also removed. Although the SiO ₂ film 32 under the extending portion 36 may be completely removed, the strength is structurally lowered.

  Next, as shown in FIG. 5 (d), P is ion-implanted into one (left side) SiGe block 34, and B is ion-implanted into the other (right side) SiGe block 34, followed by activation annealing. The n-type SiGe block 38 and the p-type SiGe block 39 are used.

Next, as shown in FIG. 5E, after the SiO ₂ films 40 and 41 are formed, a resist pattern (not shown) having an opening is provided and etched, whereby the stretched portion is formed on the SiO ₂ film 40. An opening 42 that opens a part of the end face 36 is formed. The width of the opening 42 at this time is 40 nm.

Next, as shown in FIG. 5F, i-type Ge nanowires 43 to be an initial Ge layer are grown using germane (GeH ₄ ) as a Ge raw material at a growth temperature of 500 ° C. The diameter of the i-type Ge nanowire 43 is approximately the same as the width of the opening 42. In this case, disilane (Si ₂ H ₆ ) is used as the Si raw material, and phosphine (PH ₃ ) is used as the n-type dopant source.

Next, as shown in FIG. 6G, a resist pattern (not shown) having an opening is provided and etched, so that one end face of the extending portion 36 of the p-type SiGe block 39 is formed on the SiO ₂ film 41. An opening 44 is formed to open the part.

Next, as shown in FIG. 6 (h), the i-type Ge nanowire 43 is further grown again using germane (GeH ₄ ) as a Ge raw material at a growth temperature of 500 ° C. and exposed to the opening 44. It connects with the end surface of the extending part 36 of the block 39. In this step, the i-type Ge nanowires 43 are extended from the side on which the initial Ge layer is formed due to the selective growth property of Ge on the same material, and the p-type SiGe block 39 on the opposite bank is stretched. It can be grown until it is bonded to the end face of the portion 36.

Next, as shown in FIG. 6I, a contact hole is formed in the SiO ₂ films 40 and 41, and an n-side electrode 45 and a p-side electrode 46 are provided so as to fill the contact hole. The Ge nanowire light-emitting device of Example 2 of the present invention is completed. Note that Au—Sb is used as the n-side electrode 45, and Al is used as the p-side electrode 46.

The linear expansion coefficients of Si, Si _0.7 Ge _0.3 , and Ge are 2.4 × 10 ⁻⁶ K ⁻¹ , 3.45 × 10 ⁻⁶ K ⁻¹ , 5.9 × 10 ⁻⁶ K ^{−, respectively. 1,} so that the band structure is applied 2.4% or more of tensile strain in the i-type Ge nanowire 43 is direct transition type. Therefore, since phonons are not present in luminescent recombination, luminous efficiency is improved.

In Example 2, the block body is made of Si _0.7 Ge _0.3 , but the mixed crystal ratio is arbitrary, and the surface of the i-type Ge nanowire 43 is in the near infrared region. It may be protected with a transparent resin.

  Next, the Ge nanowire laser according to the third embodiment of the present invention will be described with reference to FIG. 7. The basic manufacturing process is the same as that of the first embodiment just by arraying the nanowires. Only a typical device structure is shown.

  FIG. 7 is a schematic perspective view of a Ge nanowire laser according to Example 3 of the present invention, in which 50 nanowires having a Si / Ge / Si structure with a diameter of 60 nm are arranged in parallel at a pitch of 500 nm. In the figure, eight nanowires are shown for ease of illustration. In order to form such a nanowire array, it is only necessary to set the pitch of the openings provided in each GaP block 14 to 500 nm.

  A space between the nanowire arrays is filled with a polymer 27 made of benzocyclobutene (BCB) serving as a waveguide, and reflection films 28 constituting a resonator are formed at both ends of the waveguide. In the figure, the reflective film 28 is shown only on one end face so that the structure can be easily understood. As the reflective film 28, a dielectric multilayer film mirror in which two dielectrics having different refractive indexes and having an optical film thickness of ¼ of the oscillation wavelength may be used. However, the present invention is not limited to this.

  As described above, in Example 3 of the present invention, since a tensile strain is applied to Ge, which is originally an indirect transition type, to make a direct transition type, a laser can be realized by densely providing Ge nanowires. it can.

Next, the manufacturing process of the Ge nanowire light-emitting element array according to Example 4 of the present invention will be described with reference to FIGS. 8 to 10. The manufacturing process of the light-emitting element part is basically the same as that of Example 2 described above. It is. First, as shown in FIG. 8A, a single crystal having a thickness of 250 nm is formed on a single crystal Si substrate 51 having a (001) plane as a main surface through a BOX layer 52 made of SiO ₂ having a thickness of 3 μm. An SOI substrate provided with the Si layer 53 is prepared.

  Next, as shown in FIG. 8B, the single crystal Si layer 53 is etched to form a single crystal Si core layer 54 with a width of 400 nm and a pitch of 10 μm. In the figure, three single crystal Si core layers 54 are shown for ease of illustration, but the number is arbitrary.

Next, as shown in FIG. 8C, after an SiO ₂ film is grown, etching is performed so that both end faces of the single crystal Si core layer 54 are exposed to form the upper cladding layer 55. The BOX layer 52 becomes the lower cladding layer. Next, openings 56 having a width of 1 μm are formed in the BOX layer 52 at a pitch of 20 μm to form a selective growth mask.

Next, as shown in FIG. 9D, a growth inhibition film 57 made of SiN is provided so as to cover one end face of the single crystal Si core layer 54. Thereafter, as in the second embodiment, the gap between the SiGe block 58 made of a pair of Si _0.7 Ge _0.3 is set to 1 μm using the vapor phase growth method at the substrate temperature of 550 ° C. to 650 ° C. To grow. At this time, disilane (Si ₂ H ₆ ) is used as the Si material, and germane (GeH ₄ ) is used as the Ge material. First, the fixed base 59 is epitaxially grown on the surface of the single crystal Si substrate 51 exposed in the opening 56, and then the stretched portion 60 is grown by lateral growth.

  Next, as shown in FIG. 9E, the growth inhibition film 57 is selectively removed by interrupting the growth of the SiGe block 58 immediately before the SiGe block 58 reaches the growth inhibition film 57. After the growth blocking film 57 is removed, the growth is started again, and the growth is continued until the right SiGe block 58 is bonded to the single crystal Si core layer 54 in the drawing.

  Next, as shown in FIG. 10 (f), the exposed portion of the BOX layer 52 is etched away so that the stretched portion 60 is not constrained by the single crystal Si substrate 51, and the stretched portion 60 is further etched by side etching. A portion of the underlying BOX layer 52 is also removed. The BOX layer 52 under the extending portion 60 may be completely removed, but the strength is structurally reduced.

  Next, P is ion-implanted into one (left side) SiGe block 58, and B is ion-implanted into the other (right side) SiGe block 58, and then activation annealing is performed to perform n-type SiGe block 61 and p-type SiGe block. 62. Next, the n-type SiGe block 61 and the p-type SiGe block 62 are etched to be divided so as to match the pitch of the single crystal Si core layer 54.

Next, as shown in FIG. 10 (g), after forming the SiO ₂ films 63 and 64, a resist pattern (not shown) having an opening is provided and etched, whereby the stretched portion is formed on the SiO ₂ film 63. An opening 65 that opens a part of the end face of 60 is formed. The width of the opening 65 at this time is 40 nm.

Next, i-type Ge nanowires 66 serving as an initial Ge layer are grown using germanium (GeH ₄ ) as a Ge raw material at a growth temperature of 500 ° C. The diameter of the i-type Ge nanowire 66 is approximately the same as the width of the opening 65. In this case, disilane (Si ₂ H ₆ ) is used as the Si raw material, and phosphine (PH ₃ ) is used as the n-type dopant source.

Next, a resist pattern (not shown) having an opening is provided and etched to form an opening 67 that opens a part of the end surface of the extended portion 60 of the p-type SiGe block 62 in the SiO ₂ film 64. . Next, again, an i-type Ge nanowire 66 is further grown using germane (GeH ₄ ) as a Ge raw material at a growth temperature of 500 ° C., and bonded to the end face of the extended portion 60 of the p-type SiGe block 62 exposed in the opening 67. Let

Next, contact holes are formed in the SiO ₂ films 63 and 64, and an n-side electrode 68 and a p-side electrode 69 are provided so as to fill the contact holes. Next, a polymer cladding 70 made of BCB is provided so as to individually coat the i-type Ge nanowires 66, thereby completing the Ge nanowire light-emitting element array of Example 4 of the present invention. Note that Au—Sb is used as the n-side electrode 68, and Al is used as the p-side electrode 69.

  In Example 4 of the present invention, since an SOI substrate is used as the substrate, it is possible to monolithically integrate a high-efficiency light-emitting element array and an optical waveguide using Ge nanowires that have been directly transitioned by applying tensile strain. it can.

Here, the following supplementary notes are attached to the embodiments of the present invention including Examples 1 to 4.
(Supplementary note 1) A substrate having a linear expansion coefficient smaller than that of Ge, a material having a linear expansion coefficient larger than that of the substrate, a fixed base portion that is crystallographically bonded to the substrate, and an extending portion that is not constrained by the substrate. A pair of block parts whose end faces in the extension direction of the extension parts are opposed to each other via a gap, and at least a part of the bridge between the opposite end faces of the pair of block parts is Ge-based. A Ge-based nanowire optical element comprising: a Ge-based nanowire made of a semiconductor, wherein the Ge-based semiconductor having Ge as a maximum component has a tensile strain.
(Supplementary note 2) The Ge-based nanowire optical element according to Supplementary note 1, wherein the tensile strain is a value at which a band structure of a Ge-based semiconductor having Ge as a maximum component is a direct transition type.
(Supplementary note 3) The supplementary note 2, wherein the Ge-based semiconductor having Ge as a maximum component is Ge, and the tensile strain is 2.4% or more in a direction connecting the end faces facing each other. Ge-based nanowire optical device.
(Supplementary note 4) The Ge-based nanowire optical element according to any one of Supplementary notes 1 to 3, wherein the substrate is a single crystal Si substrate, and the block portion is made of a single crystal semiconductor.
(Additional remark 5) The said block part consists of either GaP or SiGe, The Ge type | system | group nanowire optical element of Additional remark 4 characterized by the above-mentioned.
(Supplementary note 6) Any one of Supplementary notes 1 to 5, wherein a plurality of Ge-based nanowires made of a Ge-based semiconductor having at least a part of Ge as a maximum component are arranged in parallel to form an array. 2. A Ge-based nanowire optical device according to claim 1.
(Supplementary note 7) The Ge-based nanowire optical element according to supplementary note 6, wherein each Ge-based nanowire is coated with a polymer having a refractive index lower than that of the Ge-based nanowire.
(Appendix 8) A step of providing a selective growth mask having a pair of openings arranged in parallel on a substrate having a smaller linear expansion coefficient than Ge, and a fixed base that is crystallographically bonded to the substrate is selected in the openings. And a step of growing and an extending portion that is not constrained by the substrate by lateral growth with the fixed base as a starting point so that end surfaces in the extending direction of the extending portion face each other with a gap therebetween, together with the fixed base A step of forming a pair of block parts, and a Ge-based nanowire made of a Ge-based semiconductor having at least a part of Ge as a maximum component between the end faces of the stretched part are cross-linked at a temperature higher than room temperature, and then cooled to room temperature. And a step of applying a tensile strain to the system nanowire. A method for producing a Ge-based nanowire optical element.
(Supplementary note 9) In the step of crosslinking the Ge-based nanowire, the method further includes the step of forming a catalyst for growing the Ge-based nanowire on a part of one end face of the pair of block portions. The manufacturing method of Ge type | system | group nanowire optical element of description.
(Additional remark 10) The process of bridge | crosslinking the said Ge type | system | group nanowire WHEREIN: In the state which coat | covered one end surface of the said pair of block part with the growth inhibition film | membrane, it is based on the other end surface of the said pair of block part. A step of starting growth to form an initial Ge layer; a step of removing at least a portion of the growth inhibition film after the formation of the initial Ge layer; and the Ge-based nanowire hits the removal portion of the growth inhibition film. The method for producing a Ge-based nanowire optical element according to Supplementary Note 8, further comprising a step of growing until contact.

1 substrate 2 block 3 fixed base 4 extending portion 5 gap 6 Ge-based nanowires 11 single-crystal Si substrate 12 SiO ₂ film 13 opening 14 GaP block 15 fixed base 16 extending portions 17 gaps 18 SiO ₂ film 19 opening 20 Au thin film 21 Au catalyst 22 n-type Si nanowire 23 i-type Ge nanowire 24 p-type Si nanowire 25 n-side electrode 26 p-side electrode 27 polymer 28 reflector 31 single crystal Si substrate 32 SiO ₂ film 33 opening 34 SiGe block 35 fixed base 36 Stretched portion 37 Gap 38 n-type SiGe block 39 p-type SiGe block 40, 41 SiO ₂ film 42 opening 43 i-type Ge nanowire 44 opening 45 n-side electrode 46 p-side electrode 51 single crystal Si substrate 52 BOX layer 53 single crystal Si layer 54 Single crystal Si core layer 55 Upper cladding layer 56 Opening 57 Growth prevention film 58 SiGe block 59 Fixed base 60 Extending portion 61 n-type SiGe block 62 p-type SiGe block 63, 64 SiO ₂ film 65 opening 66 i-type Ge nanowire 67 opening 68 n-side electrode 69 p-side electrode 70 polymer cladding

Claims (5)

A substrate having a smaller linear expansion coefficient than Ge;
It is made of a material having a larger linear expansion coefficient than that of the substrate, and has a fixed base portion crystallographically bonded to the substrate and an extending portion that is not constrained by the substrate, and end surfaces in the extending direction of the extending portion are mutually spaced via a gap. A pair of opposing block portions;
And a Ge-based nanowire made of a Ge-based semiconductor having at least a part of a bridge between the opposed end faces of the pair of block portions, the Ge being a maximum component;
A Ge-based nanowire optical element, wherein the Ge-based semiconductor having Ge as a maximum component has tensile strain.   2. The Ge-based nanowire optical device according to claim 1, wherein the tensile strain is a value at which a band structure of a Ge-based semiconductor having Ge as a maximum component is a direct transition type.   3. The Ge according to claim 1, wherein a plurality of Ge-based nanowires made of a Ge-based semiconductor having at least a part of Ge as a maximum component are arranged in parallel to form an array. 4. Nanowire optical element. Providing a selective growth mask having a pair of openings arranged in parallel on a substrate having a smaller linear expansion coefficient than Ge;
Selectively growing a fixed base crystallographically bonded to the substrate in the opening;
A stretched portion that is not restrained by the substrate by lateral growth with the fixed base as a starting point is formed so that end surfaces in the stretched direction of the stretched portion face each other with a gap therebetween, and a pair of block portions together with the fixed base And a process of
A step of bridging a Ge-based nanowire made of a Ge-based semiconductor having Ge as a maximum component between end faces of the stretched portion at a temperature higher than room temperature, and then lowering the temperature to room temperature to apply tensile strain to the Ge-based nanowire. And a method for producing a Ge-based nanowire optical element.   The step of cross-linking the Ge-based nanowires includes a step of forming a catalyst for growing the Ge-based nanowires on a part of one end face of the pair of block portions. A method for producing a Ge-based nanowire optical element.

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