JP2014191527A - Microcomputer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce power consumption without interfering with arithmetic processing in an intermittent operation of a microcomputer.SOLUTION: A microcomputer is provided with an internal circuit (13) and a power supply circuit (11). The internal circuit has: a first operation mode; a second operation mode in which operation time is longer than that of the first operation mode; and a low-power consumption mode in which power consumption is set lower than that for the first operation mode and second operation mode. The power supply circuit includes: a trimming register (116) capable of holding trimming data; and a trimming circuit (115) for adjusting an operation power supply voltage level according to the trimming data. The internal circuit includes a control circuit (137) that when transitioning from the low power consumption mode to the first operation mode, omits the transmission of the trimming data to the trimming register and when transitioning from the low power consumption mode or first operation mode to the second operation mode, transmits the trimming data to the trimming register .

Description

  The present invention relates to a microcomputer, and can be suitably used for a microcomputer application system that supplies a power supply voltage for operation from a battery.

  A microcomputer as an example of a semiconductor device is provided with a constant voltage circuit for generating a power supply voltage for operating an internal circuit. Examples of the constant voltage circuit include a constant voltage circuit using fixed trimming and a constant voltage circuit using variable trimming.

  In the constant voltage circuit by fixed trimming, the operation power supply voltage is trimmed in the manufacturing process by a master slice of a wiring layer or a laser fuse. The constant voltage circuit by fixed trimming has a simpler structure than the constant voltage circuit by variable trimming, and can easily supply the internal voltage to the internal circuit in a short time after the power is turned on. However, the constant voltage circuit by fixed trimming does not reflect chip variations, so the accuracy of the operating power supply voltage is low.

  In the constant voltage circuit by variable trimming, trimming data is determined for each chip on a test or field after manufacture and stored in a nonvolatile memory in the microcomputer. After the power is turned on, the trimming data in the nonvolatile memory is transferred to the trimming register, and trimming is performed according to the value of the trimming register. For this reason, according to the constant voltage circuit by variable trimming, chip variation is reflected in the trimming data, so that a highly accurate power supply voltage for operation can be obtained for each chip.

  Japanese Patent Application Laid-Open No. 2004-228561 describes a technique for preventing a semiconductor device including a reference voltage generation circuit that can be adjusted by trimming data from being affected by variations in the reference voltage until the power is turned on. According to this, the reference voltage generation unit generates the first reference voltage adjusted according to the trimming data and the second reference voltage that does not depend on the trimming data. Then, the timing for switching the logic level of the reset signal is determined based on the second reference voltage.

JP 2012-48349 A

  In a microcomputer application system that supplies a power supply voltage for operation from a battery, it is necessary to suppress power consumption in the system as much as possible in order to extend the operation time of the battery. It is effective for reducing power consumption to intermittently operate the microcomputer by shifting the microcomputer to the low power consumption mode during a period when the processing by the microcomputer is not necessary.

  For example, in a microcomputer application system in which the output of the sensor is sampled at predetermined time intervals and the sampling data is accumulated to some extent and the sampling data is processed and transmitted to the host system, the microcomputer is operated intermittently. Thus, the battery life can be extended.

  In a microcomputer having a low power consumption mode, a constant voltage circuit by fixed trimming or a constant voltage circuit by variable trimming can be adopted as a constant voltage circuit for generating an operation power supply voltage for an internal circuit.

  When a constant voltage circuit with fixed trimming is used as the constant voltage circuit for generating the operation power supply voltage for the internal circuit, an operation power supply voltage level suitable for the operation of the internal circuit is obtained due to chip variations. There is a risk of not being able to.

  When a constant voltage circuit by variable trimming is adopted as the constant voltage circuit for generating the operation power supply voltage of the internal circuit, the power supply voltage value is determined in the initial state of the trimming circuit after the power is turned on, Trimming data in the nonvolatile memory is transferred to the trimming register and trimming is performed. For this reason, it is possible to obtain an operating power supply voltage of an appropriate level for the internal circuit of the microcomputer with high accuracy.

  However, when a constant voltage circuit using variable trimming is adopted as the constant voltage circuit for generating the operation power supply voltage for the internal circuit, the trimming data in the nonvolatile memory is stored in the trimming register every time the microcomputer is intermittently operated. It is necessary to perform trimming according to the trimming data in the trimming register. For this reason, the time from when the power is turned on until the sampling of the sensor output is started becomes longer, and the power consumption increases accordingly. Therefore, the battery life when the constant voltage circuit by variable trimming is adopted is shorter than that when the constant voltage circuit by fixed trimming is adopted.

  Such a problem is not considered in the cited document 1.

  Other problems and novel features will become apparent from the description of the specification and the accompanying drawings.

  An outline of a representative means for solving the problems will be briefly described as follows.

  That is, a microcomputer is configured including an internal circuit and a power supply circuit. The internal circuit consumes power compared to the first operation mode corresponding to intermittent operation, the second operation mode having a longer operation time than the first operation mode, and the first operation mode and the second operation mode. And a low power consumption mode set low. The power supply circuit includes a trimming register capable of holding trimming data transmitted from the internal circuit, and a trimming circuit for adjusting the level of the operation power supply voltage in accordance with the trimming data held in the trimming register. . When the internal circuit makes a transition from the low power consumption mode to the first operation mode, transmission of trimming data to the trimming register is omitted, and the internal circuit skips the low power consumption mode or the first operation mode to the first operation mode. A control circuit for transmitting trimming data to the trimming register when transitioning to the two operation modes is included.

  The effects obtained by typical means for solving the problems will be briefly described as follows.

  That is, in a microcomputer corresponding to intermittent operation, power consumption can be reduced without hindering arithmetic processing in the microcomputer.

It is a block diagram of a configuration example of a microcomputer. FIG. 2 is a circuit diagram illustrating a configuration example of a trimming circuit in the microcomputer illustrated in FIG. 1. FIG. 2 is a block diagram illustrating a configuration example of a sensor system including the microcomputer illustrated in FIG. 1. It is a flowchart of the main operation | movement in the microcomputer shown by FIG. It is a block diagram which shows the example of a change of the microcomputer shown by FIG.

1. First, an outline of a typical embodiment disclosed in the present application will be described. Reference numerals in the drawings referred to in parentheses in the outline description of the representative embodiments merely exemplify what are included in the concept of the components to which the reference numerals are attached.

  [1] A microcomputer according to a typical embodiment includes an internal circuit (13) and a power supply circuit (11). The internal circuit consumes power compared to the first operation mode corresponding to intermittent operation, the second operation mode having a longer operation time than the first operation mode, and the first operation mode and the second operation mode. And a low power consumption mode set low. The power supply circuit forms a power supply voltage for operation of the internal circuit. The power supply circuit includes a trimming register (116) capable of holding trimming data transmitted from the internal circuit, and a trimming circuit for adjusting the level of the operation power supply voltage in accordance with the trimming data held in the trimming register. (115). When the internal circuit makes a transition from the low power consumption mode to the first operation mode, transmission of trimming data to the trimming register is omitted, and the internal circuit skips the low power consumption mode or the first operation mode to the first operation mode. A control circuit (137) for transmitting trimming data to the trimming register when transitioning to the two operation modes is included.

  In the above configuration, when the low power consumption mode is changed to the first operation mode, transmission of trimming data to the trimming register is omitted. For this reason, in the intermittent operation, it is possible to shorten the time required to transition from the low power consumption mode to the first operation mode and complete the processing in the first operation mode. Thereby, power consumption in the first operation mode corresponding to the intermittent operation can be reduced. Further, in the first operation mode corresponding to the intermittent operation, there is an analog signal sampling process or the like, which is not accompanied by an advanced calculation process. Therefore, in the generation of the operation power supply voltage in the first operation mode, there is no problem even if the operation power supply voltage of an appropriate level cannot be obtained in the internal circuit by omitting the transmission of the trimming data to the trimming register.

  On the other hand, when the transition from the low power consumption mode or the first operation mode to the second operation mode is performed, trimming data is transmitted to the trimming register, so that the operation power supply voltage is in accordance with the trimming data held in the trimming register. The level of is adjusted. Since the second operation mode corresponds to a process having a longer operation time than the first operation mode, transmission of trimming data to the trimming register and presence / absence of the trimming operation almost affect power consumption in the second operation mode. do not do.

  Further, in the arithmetic processing in the second operation mode in which the operation time is longer than that in the first operation mode corresponding to the intermittent operation, it is conceivable that high processing capability is required. Such arithmetic processing in the second operation mode is executed in a state where the level of the operation power supply voltage is adjusted in accordance with the trimming data held in the trimming register, which impedes arithmetic processing in the microcomputer. There is no.

  [2] The internal circuit detects that a switching register (141) that holds identification information between the first operation mode and the second operation mode and that the output voltage level of the power supply circuit has reached a predetermined level. And a voltage detection circuit (135). At this time, the control circuit determines the logic of the identification information held in the switching register after the output voltage level of the power supply circuit reaches a predetermined level. When the identification information is in the first logic state, the control circuit omits transmission of the trimming data to the trimming register and executes processing in the first operation mode, and the identification information is in the second logic state. In the state, after the trimming data is transmitted to the trimming register, the process is executed in the second operation mode.

  In the control circuit, after the output voltage level of the power supply circuit reaches a predetermined level, the logic of the identification information held in the switching register is determined because the output voltage level of the power supply circuit is This is because stable operation of the control circuit can be expected by reaching the predetermined level. By providing a switching register for holding identification information between the first operation mode and the second operation mode, the control circuit can easily select a process based on the logical state of the identification information. it can.

  [3] The control circuit determines whether or not to transit to the low power consumption mode after executing the processing in the first operation mode. If the control circuit does not transition to the low power consumption mode, the control circuit changes the logic of the identification information held in the switching register to the second logic state and then executes the process in the second operation mode. Thereafter, the logic of the identification information held in the switching register is changed to the first logic state, and then the internal circuit is shifted to the low power consumption mode.

  Thereby, the transition from the first operation mode to the second operation mode and the transition from the second operation mode to the low power consumption mode can be easily performed.

  [4] A process of sampling an analog signal taken from the outside of the microcomputer can be applied to the process in the first operation mode in the internal circuit. For the processing in the second operation mode in the internal circuit, it is possible to apply processing in which a signal sampled in the first operation mode is arithmetically processed and output to the outside of the microcomputer.

  [5] The power supply circuit may include a constant voltage circuit (112, 113) for making the operation power supply voltage necessary for the operation of the internal circuit constant. The constant voltage circuit includes a first operational amplifier (112) that obtains a difference between a feedback voltage corresponding to an output voltage of the constant voltage circuit and a reference voltage, and the operation power supply voltage according to an output of the first operational amplifier. And a first transistor (113) that outputs a signal. At this time, the trimming circuit adjusts the feedback voltage corresponding to the output voltage of the constant voltage circuit according to the trimming data held in the trimming register.

  [6] The power supply circuit includes a first constant voltage circuit (117, 118) that obtains a second reference voltage by making the first reference voltage constant, and an operation of the internal circuit with reference to the second reference voltage. And a second constant voltage circuit (112, 113) for making the operation power supply voltage necessary for the operation constant. The first constant voltage circuit includes a second operational amplifier (117) that obtains a difference between a feedback voltage corresponding to the second reference voltage and the first reference voltage, and the first operational amplifier according to an output of the second operational amplifier. And a second transistor (118) that outputs two reference voltages. At this time, the trimming circuit adjusts the feedback voltage corresponding to the second reference voltage according to the trimming data held in the trimming register.

2. Details of Embodiments Embodiments will be further described in detail.

Embodiment 1
FIG. 3 shows a sensor system as an example of a microcomputer application system.

  The sensor system 302 includes the microcomputer 1 and the sensor 4. The sensor 4 is not particularly limited, but is a temperature sensor capable of detecting temperature. The microcomputer 1 operates by the power supply voltage Vcc supplied from the battery 3 via the power switch 2 and samples the analog signal transmitted from the sensor 3. The microcomputer 1 performs arithmetic processing such as filtering processing for noise reduction when data obtained by sampling the analog signal transmitted from the sensor 3 is accumulated to some extent. The result of this arithmetic processing is transmitted to the host system 301 via the serial communication path 5. In order to suppress the power consumption in the microcomputer 1 and to extend the life of the battery 3 as long as possible, the microcomputer 1 has a low power consumption mode and returns from the low power consumption mode at predetermined time intervals. The analog signal from the sensor is sampled, and after the sampling is completed, the mode is changed again to the low power consumption mode. That is, the microcomputer 1 is intermittently operated to extend the life of the battery 3.

  FIG. 1 shows a configuration example of the microcomputer 1.

  The microcomputer 1 includes, but is not limited to, a low power consumption switch 10, a first power supply circuit 11, a second power supply circuit 12, and an internal circuit 13. Formed on two semiconductor substrates.

  The low power consumption switch 10 is provided to turn on / off the power supply voltage Vcc supplied from the battery 3 in a state where the power switch 2 in FIG. 3 is turned on. The power supply voltage Vcc is supplied to the first power supply circuit 11 with the low power consumption switch 10 turned on. In a state where the low power consumption switch 10 is turned off, the power supply voltage Vcc is not supplied to the first power supply circuit 11. The low power consumption switch 10 can be formed by an n-channel MOS transistor.

  The first power supply circuit 11 forms the first operation power supply voltage Vdd1 of the internal circuit 13 using the power supply voltage Vcc transmitted through the low power consumption switch 10. The first power supply circuit 11 includes a band gap reference circuit (BGR) 111, an operational amplifier 112, an n-channel MOS transistor 113, a voltage dividing resistor 114, a trimming circuit 115, and a trimming register 116.

  The bandgap reference circuit 111 uses the “bandgap voltage” which is a physical property of silicon, which is a semiconductor material used for MOS transistors, to generate a reference voltage Vref that is stable against fluctuations in temperature and power supply voltage.

  The n-channel MOS transistor 113 and the voltage dividing resistor 114 are connected in series with each other. A power supply voltage Vcc is supplied to the drain electrode of the n-channel MOS transistor 113 through the low power consumption switch 10. The other end of the voltage dividing resistor 114 is coupled to the ground GND. A first operating power supply voltage Vdd1 is obtained from a series connection node of the n-channel MOS transistor 113 and the voltage dividing resistor 114. The voltage dividing resistor 114 is formed by connecting a plurality of resistors in series. A plurality of series connection nodes in the voltage dividing resistor 114 are connected to the trimming circuit 115.

  The trimming register 116 holds the trimming data transferred from the internal circuit 13. A volatile memory to which the first operation power supply voltage Vdd1 is supplied can be applied to the trimming register 116.

  The trimming circuit 115 selects one of the plurality of series connection nodes in the voltage dividing resistor 114 according to the trimming data held in the trimming register 116. The voltage at the series connection node selected by the trimming circuit 115 is fed back to the inverting input terminal of the operational amplifier 112.

  The operational amplifier 112 obtains the difference between the reference voltage Vref obtained by the bandgap reference circuit 111 and the voltage fed back through the trimming circuit 115, and determines the on-resistance of the n-channel MOS transistor 113 according to the difference. Control. As a result, the first operating power supply voltage Vdd1 is stabilized.

  The second power supply circuit 12 forms the second operation power supply voltage Vdd2 of the internal circuit 13 using the power supply voltage Vcc. The power supply voltage Vcc is supplied to the second power supply circuit 12 regardless of the state of the low power consumption switch 10. Similar to the first power supply circuit 11, the second power supply circuit 12 can basically be configured to include a band gap reference circuit, an operational amplifier, an n-channel MOS transistor, and a voltage dividing resistor. However, since the second operation power supply voltage Vdd2 may be less accurate than the first operation power supply voltage Vdd1, a trimming circuit for selecting a series connection node in the voltage dividing resistor is not necessary.

  The internal circuit 13 includes a main oscillator 131, a sub-oscillator 132, a timer 133, a switch driving circuit 134, a voltage detection circuit 135, a flash memory 136, a CPU (Central Processing Unit) 137, and a RAM (Random Access Memory). 138). The internal circuit 13 includes an SCI (Serial Communication Interface) 139, an A / D (analog / digital) converter 140, and a switching register 141.

  The main oscillator 131, the voltage detection circuit 135, the flash memory 136, the CPU 137, the RAM 138, the SCI 139, the A / D converter 140, and the switching register 141 have the first operation power supply voltage Vdd1 in a state where the low power consumption switch 10 is turned on. Is supplied. The sub-oscillator 132, the timer 133, and the switch drive circuit 134 are supplied with the second operation power supply voltage Vdd2 regardless of whether the low power consumption switch 10 is on or off.

  Accordingly, when the low power consumption switch 10 is turned off while the power supply voltage Vcc is being supplied, the main oscillator 131, the voltage detection circuit 135, the flash memory 136, the CPU 137, the RAM 138, the SCI 139, and the A / D converter 140. The switching register 141 does not operate. This state is referred to as a “low power consumption mode”.

  The trimming register 116, flash memory 136, CPU 137, RAM 138, SCI 139, A / D converter 140, and switching register 141 are coupled to each other via a bus 142.

  The main oscillator 131 generates a first clock signal CK1 based on an external clock signal obtained by a crystal resonator connected to an external terminal of the microcomputer 1. The first clock signal CK1 is mainly used as an operation clock for the CPU 137.

  The sub oscillator 132 forms a second clock signal CK2 to be supplied to the timer 132 based on the external clock signal obtained by the crystal resonator.

  The timer 133 forms a timing signal SWT for turning on the low power consumption switch 10 by counting the second clock signal transmitted from the sub oscillator. The operation of the timer 133 is controlled by the CPU 137.

  The switch drive circuit 134 controls the on / off operation of the low power consumption switch 10 based on the timing signal SWT from the timer 133.

  The voltage detection circuit 135 is provided to detect that the level of the first operation power supply voltage Vdd1 has increased to the reference voltage Vref since the low power consumption switch 10 was turned on. The detection result of the voltage detection circuit 135 is transmitted to the CPU 137.

  The flash memory 136 is a nonvolatile memory, and the flash memory 136 stores a program executed by the CPU 137 and trimming data 143 transferred to the trimming register 116.

  The CPU 137 controls predetermined arithmetic processing and operation of peripheral circuits according to a program in the flash memory 136.

  The RAM 138 is used as a work area in arithmetic processing by the CPU 137.

  The SCI 139 is provided, for example, for performing serial communication with the host system.

  The A / D converter 140 samples an analog signal and converts it into a digital signal.

  The switching register 141 is provided for holding identification information of the operation mode of the internal circuit 13. The identification information of the operation mode of the internal circuit 13 has a 1-bit configuration. A non-volatile memory different from the flash memory 136 is applied to the switching register 141. Therefore, the identification information held in the switching register 141 is not lost even when the power switch 2 or the low power consumption switch 10 is turned off.

  The operation mode of the internal circuit 13 is determined by the logic of the identification information held in the switching register 141. As an operation mode of the internal circuit 13, apart from the low power consumption mode, there are a first operation mode corresponding to the intermittent operation and a second operation mode having a longer operation time than the first operation mode. In this example, the signal from the sensor 4 is sampled by the A / D converter 140 and converted into a digital signal in the first operation mode, and obtained by sampling in the A / D converter 140 in the second operation mode. The obtained data is processed and transferred to the host system 301 via the SCI 139.

  In the processing in the first operation mode, that is, the processing in which the signal from the sensor is sampled by the A / D converter 140 and converted into a digital signal, high processing capability of the microcomputer 1 is not required. On the other hand, in the process in the second operation mode for calculating the data obtained by sampling in the A / D converter 140 and transferring the data to the host system via the SCI 139, compared to the first operation mode, The high processing capability of the microcomputer 1 is required.

  Therefore, in the processing in the first operation mode, priority is given to shortening the time from when the low power consumption switch 10 is turned on until the sampling is actually started by the A / D converter 140, and the flash memory 136 to the trimming register 116 are prioritized. The transfer of trimming data to is omitted.

  In the second operation mode, a higher processing capacity is required in the microcomputer 1 than in the first operation mode. Therefore, by transferring the trimming data from the flash memory 136 to the trimming register 116, the microcomputer 1 is supplied to the internal circuit 13 with a high-accuracy operation power supply voltage necessary for 1 to exhibit high processing capability. In the second operation mode, in order to enable high-speed processing by the CPU 137, the frequency of the first clock signal CK1 formed by the main oscillator 131 may be increased as necessary.

  FIG. 2 shows a configuration example of the trimming circuit 115.

  The trimming circuit 115 is not particularly limited, but includes a decoder (DEC) 206 for decoding 2-bit trimming data held in the trimming register 116, and an n-channel MOS transistor corresponding to the decoded output of the decoder 206. 207-210. The n-channel MOS transistors 207 to 210 are provided to select any one of the series connection nodes (taps) a1 to a4 of the voltage dividing resistors 201 to 205. Which of the n-channel MOS transistors 207 to 210 is turned on is determined by the trimming data having a 2-bit configuration held in the trimming register 116. That is, when the 2-bit trimming data is “00”, the n-channel MOS transistor 207 is turned on, and the potential of the series connection node a1 is transmitted to the inverting terminal of the operational amplifier 112. When the 2-bit trimming data is “01”, the n-channel MOS transistor 208 is turned on, and the potential of the series connection node a2 is transmitted to the inverting terminal of the operational amplifier 112. When the 2-bit trimming data is “10”, the n-channel MOS transistor 209 is turned on, and the potential of the series connection node a3 is transmitted to the inverting terminal of the operational amplifier 112. When the 2-bit trimming data is “11”, the n-channel MOS transistor 210 is turned on, and the potential of the series connection node a4 is transmitted to the inverting terminal of the operational amplifier 112.

  FIG. 4 shows a flow of main operations in the microcomputer 1.

  When the power supply voltage Vcc is not supplied to the microcomputer 1, the low power consumption switch 10 is turned off.

  When the power switch 2 is turned on, the power supply voltage Vcc is supplied from the battery 3 to the microcomputer 1. At this time, in order to prevent malfunction, the microcomputer 1 automatically performs a power-on reset until the first operation power supply voltage Vdd1 and the second operation power supply voltage Vdd2 reach predetermined levels. ing.

  When the power supply voltage Vcc is supplied to the microcomputer 1, the second power supply voltage Vdd <b> 2 is formed by the second power supply circuit 12 and is supplied to the sub oscillator 132, the timer 133, and the switch drive circuit 134. A second clock signal CK 2 is generated by the sub oscillator 132 and is transmitted to the timer 133. At this time, the timer 133 has not been started yet. When the timer 133 is not activated, the output signal Tout of the timer 122 is at a high level. When the output signal Tout of the timer 122 is at the high level, the switch driving circuit 134 sets the switch control signal SWcnt to the high level and turns on the low power consumption switch 10 (401). When the low power consumption switch 10 is turned on, supply of the power supply voltage Vcc to the first power supply circuit 11 is started.

  When the supply of the power supply voltage Vcc to the first power supply circuit 11 is started, the bandgap reference circuit 111 forms the reference voltage Vref, which is transmitted to the operational amplifier 112. When the supply of the power supply voltage Vcc to the first power supply circuit 11 is started, the first internal power supply voltage Vdd1 is raised from 0 volts. At this stage, since trimming data has not yet been transferred to the trimming register 116, variable trimming by trimming data is not executed. Therefore, the trimming in this case is fixed trimming. Although not particularly limited, if the series connection node a1 of the voltage dividing resistors 201 and 202 is selected in the initial state of the trimming circuit 115, the potential of the series connection node a1 is the inverting input terminal of the operational amplifier 112 in the fixed trimming. Feedback. In the operational amplifier 112, the difference between the potential of the series connection node a1 and the reference voltage Vref is obtained, and the level of the first operation power supply voltage Vdd1 is controlled by controlling the on-resistance of the n-channel MOS transistor 113 accordingly. It is determined. The level of the first operation power supply voltage Vdd 1 is monitored by the voltage detection circuit 135. The voltage detection circuit 135 compares the first operation power supply voltage Vdd1 with the reference voltage Vref, and asserts the voltage detection signal DEV when the level of the first operation power supply voltage Vdd1 reaches the level of the reference voltage Vref. (402). When the voltage detection signal DEV is asserted, the power-on reset of the CPU 137 is released, and the CPU 137 determines whether the identification information held in the switching register 141 is the logical value “1” or the logical value “0”. (403). The logical value “1” of the identification information indicates the first operation mode, and the logical value “0” of the identification information indicates the second operation mode. The initial value of the identification information before the power-on reset of the CPU 137 is canceled may be any of logical values “1” and “0”, but here, for convenience, the logical value “1” is set. .

  If it is determined in step 403 that the identification information held in the switching register 141 is the logical value “1”, the internal circuit 13 starts processing in the first operation mode (410).

  In the first operation mode, priority is given to shortening the time from when the low power consumption switch 10 is turned on until the analog signal sampling is actually started by the A / D converter 140. Transfer of trimming data is omitted. As a result, the first operating power supply voltage Vdd1 is maintained in a state where the potential of the series connection node a1 of the voltage dividing resistors 201 and 202 is fed back to the operational amplifier 112.

  In the first operation mode, the analog signal from the sensor 4 is sampled by the A / D converter 140 and converted into a digital signal. The timing of sampling by the A / D converter 140 is controlled by the CPU 137 based on the first clock signal CK1 formed by the main oscillator 131. The digital signal obtained in this way is stored in the flash memory 136 under the control of the CPU 137.

  After the storage of the digital signal in the flash memory 136 is completed, the CPU 137 determines whether or not to turn off the low power consumption switch 10, that is, whether or not to shift to the low power consumption mode (411). If it is determined in this determination that the low power consumption switch 10 is to be turned off (Yes), the CPU 137 starts the timer 133 (408). When the timer 133 is activated by the CPU 137, it immediately sets the output signal Tout to the low level and starts counting the second clock signal CK2 from the sub oscillator 132. When the output signal Tout of the timer 133 is set to the low level, the switch drive signal 134 sets the switch control signal SWcnt to the low level, and the low power consumption switch 10 is turned off (409). Thereby, the microcomputer 1 shifts to the low power consumption mode.

  When a predetermined time set in advance in the timer 133 elapses after the timer 133 is started, the output signal Tout of the timer 133 is changed from the previous low level to the high level. Then, the switch control signal SWcnt is set to the high level by the switch driving circuit 134, and the low power consumption switch 10 is turned on again (401). The subsequent operation is as described above. That is, after each of the above-described steps 402, 403, 410, 411, 408, and 409, the mode again shifts to the low power consumption mode.

  The sampling data is accumulated in the flash memory 136 every time the above series of processing is repeated by the intermittent operation of the microcomputer 1. When the sampling data is accumulated to some extent in the flash memory 136, the CPU 137 determines that the low power consumption switch 10 is not turned off (No) in the determination in step 411, and the identification held in the switching register 141 is determined. The information is changed to a logical value “0” (412). Accordingly, the CPU 137 determines that the identification information held in the switching register is the logical value “0” in the determination in step 403. In that case, the CPU 137 transfers the trimming data 143 in the flash memory 136 to the trimming register 116 (404).

  The trimming data 143 in the flash memory 136 is data for correcting the chip variation of the microcomputer 1 and correcting it. When such trimming data 143 is transferred from the flash memory 136 to the trimming register 116 under the control of the CPU 137, the trimming circuit 115 is connected in series in the voltage dividing resistors 201 to 205 according to the trimming data 143 in the trimming register 116. Trimming of the first operation power supply voltage Vdd1 is executed by selecting one of the nodes a1 to a4 (406). That is, variable trimming is performed by selecting the series connection nodes a1 to a4 in the voltage dividing resistors 201 to 205. As a result, the potential of the first operation power supply voltage Vdd1 becomes an appropriate level after the chip variation is corrected.

  After the trimming at step 406 is executed, the CPU 137 executes processing in the second operation mode (407). For example, in the second operation mode, the sampling data stored in the flash memory 136 is arithmetically processed as necessary. This arithmetic processing includes, for example, digital filtering processing for removing a noise component included in sampling data, addition averaging processing of a plurality of sampling data, and the like. In particular, since the digital filtering process for removing the noise component included in the sampling data takes time, increasing the frequency of the first clock signal CK1 formed by the main oscillator 131 in the second operation mode is This is effective for shortening the processing time in the two operation modes. The calculation processing result of the sampling data is transmitted to the host system 301 via the SCI 139. After this transmission, the sampling data in the flash memory 136 is deleted and prepared for storing new sampling data.

  After the processing in the second operation mode in step 406 is completed, the CPU 137 changes the identification information held in the switching register 141 to the logical value “1” (407). Then, the CPU 137 activates the timer 133 (408). When the timer 133 is activated by the CPU 137, it immediately sets the output signal Tout to the low level and starts counting the second clock signal CK2 from the sub oscillator 132. When the output signal Tout of the timer 133 is set to the low level, the switch drive signal 134 sets the switch control signal SWcnt to the low level, and the low power consumption switch 10 is turned off (409). Thereby, the microcomputer 1 shifts to the low power consumption mode.

  When a predetermined time set in advance in the timer 133 elapses after the timer 133 is started, the output signal Tout of the timer 133 is changed from the previous low level to the high level. Then, the switch control signal SWcnt is set to the high level by the switch driving circuit 134, and the low power consumption switch 10 is turned on again (401). The subsequent operation is as described above.

  Note that the initial value of the identification information before the power-on reset of the CPU 137 is canceled may be a logical value “0”. In such a case, the trimming data 143 in the flash memory 136 is transferred to the trimming register 116 (403) without performing the process (410) in the first operation mode according to the determination in step 403, and the trimming is executed. After that (405), processing in the second operation mode is performed (406).

  According to the first embodiment, the following operational effects are obtained.

  When transitioning from the low power consumption mode to the first operation mode, transmission of trimming data to the trimming register 116 is omitted. For this reason, in the intermittent operation, it is possible to shorten the time required to transition from the low power consumption mode to the first operation mode and complete the processing in the first operation mode. Such time reduction can reduce power consumption in the first operation mode corresponding to intermittent operation.

  When transitioning from the low power consumption mode or the first operation mode to the second operation mode, the trimming data 143 is transmitted to the trimming register 116, and therefore the level of the power supply voltage for operation according to the trimming data in the trimming register 116 Is adjusted. Since the second operation mode corresponds to a process having a longer operation time than the first operation mode, transmission of trimming data to the trimming register and presence / absence of the trimming operation almost affect power consumption in the second operation mode. do not do.

  In the arithmetic processing in the second operation mode, which has a longer operation time than the first operation mode, a high processing capability is required such as filtering processing. The arithmetic processing in the second operation mode is executed without any trouble in a state where the level of the operation power supply voltage is adjusted according to the trimming data held in the trimming register.

<< Embodiment 2 >>
FIG. 5 shows a modification of the microcomputer 1 shown in FIG.

  The microcomputer 1 shown in FIG. 5 is greatly different from that shown in FIG. 1 in that the second reference voltage Vref-2 is trimmed in accordance with the trimming data in the configuration of the first power supply circuit 11. This is the point. An operational amplifier 117 and an n-channel MOS transistor 118 are provided, and a voltage dividing resistor 114 is connected to the n-channel MOS transistor 118 in series. The operational amplifier 117 calculates a difference between the first reference voltage Vref−1 obtained by the bandgap reference circuit 111 and the voltage fed back through the trimming circuit 115, and the n-channel MOS transistor 118 according to the difference. Controls the on-resistance. As a result, the second reference voltage Vref-2 is stabilized. The trimming data 143 in the flash memory 143 is data for correcting the chip variation of the microcomputer 1 in consideration thereof. When such trimming data 143 is transferred to the trimming register 116, the trimming circuit 115 performs trimming of the second reference voltage Vref-2 according to the trimming data.

  In the operational amplifier 112, the difference between the second reference voltage Vref-2 and the first internal power supply voltage Vdd1 is obtained, and the on-resistance of the n-channel MOS transistor 113 is controlled accordingly. A capacitor 119 is provided between the non-inverting input terminal of the operational amplifier 112 and the ground GND to stabilize the second reference voltage Vref-2. By transmitting the second reference voltage Vref-2 to the operational amplifier 112, the first internal power supply voltage Vdd1 is stabilized.

  As described above, even when the first power supply circuit 11 performs the trimming of the second reference voltage Vref-2 according to the trimming data, the first power supply circuit 11 is operated according to the flowchart of FIG. An effect can be obtained.

  Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, even if the switching register 141 is volatile, if the second operation power supply voltage Vdd2 is supplied as the operation power supply for the switching register 141, the switching register 141 is turned off even if the low power consumption switch 10 is turned off. Therefore, the same operation and effect as when the switching register 141 is formed of a nonvolatile memory can be obtained.

  In order to enhance the security of the trimming data 143, the trimming data 143 in the flash memory 136 may be encrypted and transferred to the trimming register 116.

DESCRIPTION OF SYMBOLS 1 Microcomputer 2 Power switch 3 Battery 4 Sensor 10 Low power consumption switch 11 1st power supply circuit 12 2nd power supply circuit 13 Internal circuit 111 Band gap reference circuit 112,117 Operational amplifier 113,118 n channel type MOS transistor 114 Voltage dividing resistor 115 Trimming Circuit 116 Trimming Register 119 Capacitor 131 Main Oscillator 132 Sub Oscillator 133 Timer 134 Switch Drive Circuit 135 Voltage Detection Circuit 136 Flash Memory 137 CPU
138 RAM
139 SCI
140 A / D converter 141 switching register 302 sensor system 301 host system

Claims (6)

The first operation mode corresponding to the intermittent operation, the second operation mode in which the operation time is longer than the first operation mode, and the power consumption are set lower than those in the first operation mode and the second operation mode. An internal circuit having a low power consumption mode;
A power supply circuit for forming a power supply voltage for operation of the internal circuit,
The power supply circuit includes a trimming register capable of holding trimming data transmitted from the internal circuit;
A trimming circuit for adjusting the level of the operation power supply voltage according to the trimming data held in the trimming register,
When the internal circuit makes a transition from the low power consumption mode to the first operation mode, transmission of trimming data to the trimming register is omitted, and the internal circuit skips the low power consumption mode or the first operation mode to the first operation mode. A microcomputer including a control circuit for transmitting trimming data to the trimming register when transitioning to the two operation modes. The internal circuit includes a switching register that holds identification information between the first operation mode and the second operation mode;
Including a voltage detection circuit for detecting that the output voltage level of the power supply circuit has reached a predetermined level;
The control circuit determines the logic of the identification information held in the switching register after the output voltage level of the power supply circuit reaches a predetermined level, and when the identification information is in the first logic state, When the transmission of the trimming data to the trimming register is omitted and the process is executed in the first operation mode and the identification information is in the second logic state, the trimming data is transmitted to the trimming register and then the second The microcomputer according to claim 1, wherein the microcomputer executes processing in an operation mode.   The control circuit determines whether or not to transition to the low power consumption mode after executing processing in the first operation mode, and if not transitioned to the low power consumption mode, holds it in the switching register. The logic of the identification information that has been changed is changed to the second logic state, and then the processing is executed in the second operation mode. Thereafter, the logic of the identification information held in the switching register is changed to the first logic state. 3. The microcomputer according to claim 2, wherein the internal circuit is shifted to the low power consumption mode. The processing in the first operation mode in the internal circuit includes processing for sampling an analog signal taken from the outside of the microcomputer,
4. The microcomputer according to claim 3, wherein the processing in the second operation mode in the internal circuit includes processing for computing the signal sampled in the first operation mode and then outputting the signal to the outside of the microcomputer. The power supply circuit includes a constant voltage circuit for making the power supply voltage for operation necessary for the operation of the internal circuit constant,
The constant voltage circuit includes a first operational amplifier that obtains a difference between a feedback voltage corresponding to an output voltage of the constant voltage circuit and a reference voltage;
A first transistor that outputs the power supply voltage for operation according to the output of the first operational amplifier;
5. The microcomputer according to claim 4, wherein the trimming circuit adjusts a feedback voltage corresponding to an output voltage of the constant voltage circuit according to trimming data held in the trimming register. The power supply circuit includes a first constant voltage circuit that obtains a second reference voltage by making the first reference voltage constant;
A second constant voltage circuit for making the power supply voltage for operation necessary for the operation of the internal circuit constant, with reference to the second reference voltage,
The first constant voltage circuit includes a second operational amplifier that obtains a difference between the feedback voltage corresponding to the second reference voltage and the first reference voltage;
A second transistor that outputs the second reference voltage in response to the output of the second operational amplifier;
5. The microcomputer according to claim 4, wherein the trimming circuit adjusts a feedback voltage corresponding to the second reference voltage according to trimming data held in the trimming register.

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