JP2014175940A - Converter, communication device and communication method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a communication error generated due to a signal deteriorated before converting an electric signal into an optical signal.SOLUTION: A converter includes: a first communication unit for receiving an electric signal; a converter unit for converting the electric signal received by the first communication unit into an optical signal; a correction unit for correcting the electric signal received by the first communication unit; a first determination unit for determining whether or not an error in the electric signal corrected by the first correction unit is a target value; and when the error in the electric signal is the target value, a first control unit for controlling the converter unit to convert the received electric signal into an optical signal.

Description

  The present invention relates to a converter, a communication device, and a communication method.

  In digital optical communication, a binary logic electrical signal is converted into an optical signal by an optical transmitter, an optical signal is transmitted through an optical fiber, and an optical signal is converted into a binary logic electrical signal by an optical receiver. It is known to do. In addition, high-speed serial communication such as PCI EXPRESS (registered trademark) has high data transfer speed and flexibility to adapt to various applications, and is widely used in various devices.

  On the other hand, in a high-speed serial communication system, signal degradation during propagation through a communication path becomes significant with an increase in data transfer speed, and countermeasures according to degradation factors are essential. As a technique for improving the signal quality, a method of compensating for the loss in the transmission path by performing equalization on the transmission side and the reception side is common. In addition, a method for compensating for the loss of a signal may be defined as a standard specification.

  Further, Patent Document 1 relates to the intensity of an optical signal when identifying the data value of an electrical data signal converted from the optical signal based on the data identification level for identifying the data value. An optical receiver is disclosed that generates an intensity signal and adjusts a data identification level in relation to the intensity signal.

  However, there has been a problem that the signal deterioration that occurs before the conversion of the electrical signal into the optical signal cannot be sufficiently corrected, and errors increase.

  The present invention has been made in view of the above, and a converter, a communication apparatus, and a communication method capable of preventing a signal from being deteriorated and causing a communication error before converting the electric signal into an optical signal. The purpose is to provide.

  In order to solve the above-described problems and achieve the object, the present invention includes a first communication unit that receives an electrical signal, a conversion unit that converts the electrical signal received by the first communication unit into an optical signal, A first correction unit that corrects an electrical signal received by the first communication unit; a first determination unit that determines whether an error in the electrical signal corrected by the first correction unit is a target value; A first control unit configured to control the conversion unit to convert the received electrical signal into an optical signal when the first determination unit determines that a signal error is a target value. And

  According to the present invention, it is possible to prevent a signal from being deteriorated and causing a communication error before an electric signal is converted into an optical signal.

FIG. 1 is a schematic view illustrating an outline of a communication device according to the first embodiment. FIG. 2 is a configuration diagram illustrating a hardware configuration of the communication device according to the first embodiment. FIG. 3 is a functional block diagram illustrating functions of the communication device according to the first embodiment. FIG. 4 is a flowchart illustrating an operation example of the communication apparatus according to the first embodiment. FIG. 5 is a schematic diagram illustrating an outline of a communication device according to the second embodiment. FIG. 6 is a configuration diagram illustrating a hardware configuration of the communication apparatus according to the second embodiment. FIG. 7 is a functional block diagram illustrating functions of the communication device according to the second embodiment. FIG. 8 is a flowchart illustrating an operation example of the communication apparatus according to the second embodiment.

  An optical transceiver (converter) and a communication device according to embodiments will be described below with reference to the accompanying drawings.

(First embodiment)
FIG. 1 is a schematic view illustrating the outline of a communication device 1 according to the first embodiment. As illustrated in FIG. 1, the communication device 1 includes, for example, a controller (SerDes) 2 and an optical transceiver 3 and performs communication using a communication protocol that complies with, for example, the specification of PCI EXPRESS3.0. The controller 2 is a control IC including, for example, a SerDes (SERializer / DESerializer) circuit, and communicates with other devices via the optical transceiver 3 and the optical fiber by transmitting and receiving electrical signals to and from the optical transceiver 3. Do. An optical transceiver (optical transceiver: converter) 3 performs photoelectric (O / E) conversion and electro-optic (E / O) conversion, and performs digital optical communication with a device connected via an optical fiber.

  First, an outline of the operation of the communication device 1 will be described. The controller 2 outputs a known fixed signal pattern (A → B). The optical transceiver 3 calculates an error of an electric signal such as BER (Bit error rate) using a known fixed signal pattern to be input, and optimizes the equalizer setting so that the BER is minimized. Then, when the optimization of the equalizer setting is completed, the optical transceiver 3 stops outputting the fixed signal pattern by the controller 2, performs electro-optical conversion, outputs an optical signal, and starts communication (C).

  Next, details of the communication device 1 will be described with reference to FIGS. FIG. 2 is a configuration diagram illustrating a hardware configuration of the communication device 1. The controller 2 includes a protocol control unit 20, a second register 21, an SP (serial / parallel) conversion unit 22, and a transceiver 23, and controls the optical transceiver 3. The controller 2 is provided with an EEPROM as a storage unit outside (or inside). Further, the controller 2 may be provided with a CPU and a memory (not shown) either inside or outside.

  The protocol control unit 20 is, for example, a PCIe protocol control block. The second register 21 is a storage unit that stores presets and the like. The second register 21 includes a status register that indicates whether or not linking is performed at an arbitrary transfer speed or number of lanes. The second register 21 includes a register that stores information for adjusting equalization on the transmission side (TX) and the reception side (RX).

  The SP converter 22 converts the serial signal into a parallel signal and converts the parallel signal into a serial signal. The transceiver 23 is a PCIe transceiver and performs transmission / reception with the optical transceiver 3 using a differential signal of an electrical signal.

The optical transceiver 3 includes an electro-optic conversion unit 30, a transmission processing unit 31, a photoelectric conversion unit 32, a reception processing unit 33, a first register 34, and an I ² C controller 35. The electro-optic conversion unit 30 includes a light emitting unit (LD) and a drive circuit (LDD), and outputs an optical signal transmission signal TX. The transmission processing unit 31 receives the transmission signal TX of the differential signal, takes each difference, and outputs the transmission signal TX, which is one electric signal, to the electro-optic conversion unit 30.

  The photoelectric conversion unit 32 includes a light receiving unit (PD) and an amplifier (Amp), receives the optical signal reception signal RX, and outputs the electrical signal reception signal RX to the reception processing unit 33. The reception processing unit 33 receives a reception signal RX that is one electric signal, and outputs a differential reception signal RX to the controller 2 in accordance with setting information stored in the first register 34.

  For example, the first register 34 includes a register that stores an electrical signal output from the optical transceiver 3 and information for adjusting the intensity of the optical signal.

The I ² C controller 35 performs communication with the controller 2 at a slower speed than the transmission processing unit 31 and the reception processing unit 33.

  Next, functions of the communication device 1 will be described. FIG. 3 is a functional block diagram illustrating functions of the communication device 1. The communication device 1 implements the functions shown in FIG. 3 with the hardware configuration described with reference to FIG. As illustrated in FIG. 3, the optical transceiver 3 includes a first communication unit 50, a first correction unit 51, a first change unit 52, a first determination unit 53, a first storage unit 54, and a first control unit 55. The first control unit 55 controls each functional block shown in FIG. Further, the controller 2 includes a second communication unit 40 and a second control unit 45.

  The first communication unit 50 includes a transmission processing unit 31, a reception processing unit 33, and the like. The first communication unit 50 communicates with the second communication unit 40 using an electrical signal.

  The first correction unit 51 includes the first register 34 and the like. Then, the first correction unit 51 performs signal correction of the transmission / reception signal.

  The first change unit 52 includes, for example, a program and the first register 34. Then, the first changing unit 52 changes the settings for the signal correction of the transmission signal and the signal correction of the reception signal performed by the first correction unit 51. Specifically, the first changing unit 52 changes the setting for signal correction of the transmission signal performed by the first correction unit 51 using setting information for setting equalization on the transmission side stored in the first register 34. To do. The first changing unit 52 performs signal correction of the received signal by changing CTLE on / off (passing or bypassing the received signal), gain of the attenuator or booster, or changing the number of taps or tap coefficients of the DFE. Change the setting for.

  The first determination unit 53 is configured by a program, for example. And the 1st determination part 53 determines whether the BER in communication by the electric signal which the 1st correction | amendment part 51 carries out a signal correction by the setting which the 1st change part 52 changed is the minimum (target value achievement). To do.

  The first storage unit 54 is configured by a memory or the like. And the 1st storage part 54 memorizes the setting etc. which the 1st change part 52 changed.

  The second communication unit 40 includes the transceiver 23 and the like. The second communication unit 40 communicates with the first communication unit 50 using an electrical signal.

  The second control unit 45 controls each unit constituting the controller 2.

  Next, an operation example of the communication device 1 will be described. First, the controller 2 outputs a known fixed signal pattern. The fixed signal pattern is, for example, a signal pattern defined by a predetermined signal pattern or a communication protocol. In PCI EXPRESS, there is a known signal pattern called a compliance pattern.

In order to output the compliance pattern, the Enter Compliance bit in the Link Control 2 register in the second register of the controller 2 is set to 1. This setting is performed using the EEPROM 24 or the I ² C controller 35. Alternatively, TS1 Ordered Sets with the Compliance Receive bit (bit 4 of Symbol 5) set to 1 and the Loopback bit (bit 2 of Symbol 5) set to 0 may be transmitted by communication from the optical transceiver 3 to the controller 2.

  Secondly, the optical transceiver 3 calculates the BER using a known fixed signal pattern that is input, and optimizes the equalizer setting so that the BER is minimized. Since the input signal pattern is known, the optical transceiver 3 can easily determine whether or not an error has occurred. The optical transceiver 3 needs to detect the start of the fixed signal pattern in order to measure the BER. Here, the optical transceiver 3 can easily detect the beginning of the fixed signal pattern by setting the fixed signal pattern to a signal pattern that can be easily discriminated, such as COM Symbol in PCI EXPRESS.

  The optimization of the equalizer setting may be performed by a procedure of trying all the settings and selecting the setting with the smallest BER among them, or setting the target value of the BER in advance and achieving the target value In some cases, the procedure may be such that the optimization of the equalizer setting is terminated. In addition, it is desirable that the communication apparatus 1 does not perform light-to-light conversion and stops output of an optical signal while optimizing the equalizer setting in order to prevent malfunction and reduce power consumption. .

Thirdly, when the optimization of the equalizer setting is completed, the optical transceiver 3 stops outputting the fixed signal pattern, performs electro-optical conversion, outputs an optical signal, and starts communication. In order to complete the optimization of the equalizer settings, the optical transceiver 3 flags a completion. Then, the controller 2 reads the flag set by the optical transceiver 3 and stops outputting the fixed signal pattern. Also, in PCI EXPRESS, the optical transceiver 3 may be configured such that the I ² C controller 35 sets the Enter Compliance bit of the Link Control 2 register of the controller 2 to 0. Further, the output of the fixed signal pattern may be stopped when the optical transceiver 3 transmits an Electrical Idle exit to the controller 2.

  FIG. 4 is a flowchart illustrating an operation example of the communication device 1. As shown in FIG. 4, when the communication apparatus 1 is turned on, the second communication unit 40 outputs a known fixed signal pattern to the first communication unit 50 in step 100 (S100).

  In step 102 (S102), after the first correction unit 51 corrects the input signal, the first determination unit 53 calculates the BER.

  In step 104 (S104), the first determination unit 53 determines whether or not the BER is minimum (target value achieved). If the first determination unit 53 determines that the BER is not minimum (S104: No), the process proceeds to S106. If the first determination unit 53 determines that the BER is minimum (S104: Yes), the process proceeds to S108.

  In step 106 (S106), the first changing unit 52 changes the setting value related to signal correction, and the process proceeds to S102.

  In step 108 (S108), the first control unit 55 stops the fixed signal pattern output of the second communication unit 40.

  In step 110 (S110), the controller 2 and the optical transceiver 3 make the first communication unit 50 and the second communication unit 40 operate during normal communication. And the communication apparatus 1 starts communication with another apparatus via an optical fiber.

  In this way, by preventing signal deterioration between the controller 2 and the optical transceiver 3, it is possible to prevent a signal from being deteriorated and causing a communication error before the electric signal is converted into an optical signal.

(Second Embodiment)
FIG. 5 is a schematic view illustrating the outline of the communication device 1a according to the second embodiment. As illustrated in FIG. 5, the communication device 1a includes, for example, a controller (SerDes) 2a and an optical transceiver 3a, and performs communication using a communication protocol that complies with, for example, the specification of PCI EXPRESS3.0. The controller 2a is a control IC including, for example, a SerDes (SERializer / DESerializer) circuit, and communicates with other devices via the optical transceiver 3a and optical fiber by transmitting and receiving electrical signals to and from the optical transceiver 3a. Do. The optical transceiver (optical transceiver) 3a performs photoelectric (O / E) conversion and electro-optic (E / O) conversion, and performs digital optical communication with a device connected via an optical fiber.

  First, an outline of the operation of the communication device 1a will be described. The controller 2a outputs a known fixed signal pattern (A → B). The optical transceiver 3a calculates a BER (Bit error rate) using a known input fixed signal pattern, and optimizes the equalizer setting so that the BER is minimized. Then, the optical transceiver 3a returns a fixed pattern to the controller 2a (C → D). The controller 2a calculates a BER (Bit error rate) using a known input fixed signal pattern, and optimizes the equalizer setting so that the BER is minimized. Then, the controller 2a stops outputting the fixed signal pattern when the optimization of each equalizer setting is completed. The optical transceiver 3a performs electro-optic conversion, outputs an optical signal, and starts communication (E).

  Next, details of the communication device 1a will be described with reference to FIGS. FIG. 6 is a configuration diagram illustrating a hardware configuration of the communication device 1a. Of the constituent parts of the communication device 1a shown in FIG. 6, the same parts as those shown in FIG.

  In addition to the function of the transmission processing unit 31 illustrated in FIG. 2, the transmission processing unit 31 a outputs the fixed signal pattern received from the transceiver 23 to the reception processing unit 33 a via the path P. In addition to the functions of the reception processing unit 33 illustrated in FIG. 2, the reception processing unit 33 a has a function of outputting the fixed signal pattern input from the transmission processing unit 31 a to the transceiver 23.

  Next, functions of the communication device 1a will be described. FIG. 7 is a functional block diagram illustrating functions of the communication device 1a. The communication device 1a implements the functions shown in FIG. 7 with the hardware configuration described with reference to FIG. Note that, among the components of the communication device 1a illustrated in FIG. 7, the same components as those illustrated in FIG. 3 are denoted by the same reference numerals.

  As illustrated in FIG. 7, the controller 2 a includes a second communication unit 40, a second correction unit 41, a second change unit 42, a second determination unit 43, a second storage unit 44, and a second control unit 45. The first control unit 55 controls each functional block shown in FIG. Further, the controller 2 includes a second communication unit 40 and a second control unit 45.

  The second correction unit 41 includes the second register 21 and the like. And the 2nd correction | amendment part 41 performs signal correction | amendment of a transmission / reception signal.

  The second changing unit 42 includes, for example, a program and the second register 21. Then, the second changing unit 42 changes the settings for the signal correction of the transmission signal and the signal correction of the reception signal performed by the second correction unit 41. Specifically, the second changing unit 42 changes the setting for the signal correction of the transmission signal performed by the second correction unit 41 using the setting information for setting the transmission side equalization stored in the second register 21. To do. Further, the second changing unit 42 performs signal correction of the received signal by changing CTLE on / off (passing or bypassing the received signal), gain of the attenuator or booster, or the number of taps and tap coefficients of the DFE. Change the setting for.

  The second determination unit 43 is configured by a program, for example. And the 2nd determination part 43 determines whether the BER in communication by the electric signal which the 2nd correction | amendment part 41 carries out a signal correction by the setting which the 2nd change part 42 changed is the minimum (target value achievement). To do.

  The second storage unit 44 is configured by a memory or the like. And the 2nd memory | storage part 44 memorize | stores the setting etc. which the 2nd change part 42 changed.

  Next, an operation example of the communication device 1a will be described. First, the controller 2a outputs a known fixed signal pattern. The output method of the fixed signal pattern is the same as that of the first embodiment.

  Secondly, the optical transceiver 3a calculates a BER using a known fixed signal pattern to be inputted, and optimizes the equalizer setting so that the BER is minimized. The procedure for optimizing the equalizer is the same as in the first embodiment.

  Third, the optical transceiver 3a returns the input known fixed signal pattern as it is (via the equalizer in the optical transceiver 3a) to the controller 2a. Here, the optical transceiver 3a returns a fixed signal pattern to the controller 2a using the path P described above. In this case, the optical transceiver 3a stops the photoelectric conversion. Therefore, even if an optical signal is input to the optical transceiver 3a, the optical signal does not affect the fixed signal pattern.

  Fourth, the controller 2a calculates the BER using the returned fixed signal pattern, and optimizes the equalizer setting of the controller 2a so that the BER becomes the smallest. The procedure for optimizing the equalizer is the same as in the first embodiment.

Further, the controller 2a is configured to optimize the output signal amplitude, de-emphasis, and the like of the optical transceiver 3a by transmitting the BER information of the controller 2a to the optical transceiver 3a via the I ² C controller 35. Also good.

  Fifth, the controller 2a stops outputting the fixed signal pattern when the optimization of the equalizer setting is completed. Then, the optical transceiver 3a performs electro-optical conversion, outputs an optical signal, and starts communication. Here, the path P described above is switched so as not to return a signal.

  FIG. 8 is a flowchart illustrating an operation example of the communication device 1a. Note that, in the processing of the communication device 1a illustrated in FIG. 8, substantially the same processing as that illustrated in FIG.

  In step 200 (S200), the first communication unit 50 returns a fixed signal pattern to the second communication unit 40.

  In step 202 (S202), after the 2nd correction | amendment part 41 correct | amends an input signal, the 2nd determination part 43 calculates BER.

  In step 204 (S204), the second determination unit 43 determines whether or not the BER is minimum (target value achieved). If the second determination unit 43 determines that the BER is not minimum (S204: No), the process proceeds to S206. If the second determination unit 43 determines that the BER is minimum (S204: Yes), the process proceeds to S208.

  In step 206 (S206), the second changing unit 42 changes the set value related to signal correction, and the process proceeds to S202.

  In step 208 (S208), the second control unit 45 stops the fixed signal pattern output of the second communication unit 40.

  Thus, by preventing signal deterioration in the controller 2a as well, it is possible to prevent a signal from being deteriorated and causing a communication error before converting the electric signal into an optical signal.

1, 1a communication device 2, 2a controller 3, 3a optical transceiver 20 protocol control unit 21 second register 22 SP converter 23 transceiver 24 EEPROM
30 electro-optic conversion unit 31, 31a transmission processing unit 32 photoelectric conversion unit 33, 33a reception processing unit 34 first register 35 I ² C controller 40 second communication unit 41 second correction unit 42 second change unit 43 second determination unit 44 Second storage unit 45 Second control unit 50 First communication unit 51 First correction unit 52 First change unit 53 First determination unit 54 First storage unit 55 First control unit

Japanese Patent No. 4032531

Claims (7)

A first communication unit for receiving an electrical signal;
A conversion unit that converts an electrical signal received by the first communication unit into an optical signal;
A first correction unit that corrects an electrical signal received by the first communication unit;
A first determination unit that determines whether or not an error in the electrical signal corrected by the first correction unit is a target value;
A first control unit configured to control the conversion unit to convert the received electric signal into an optical signal when the first determination unit determines that the error of the electric signal is a target value;
A converter characterized by comprising: The apparatus further comprises a first change unit that changes a setting for signal correction of the first correction unit when the first determination unit determines that the error of the electrical signal is not a target value. Item 2. The converter according to Item 1. The first communication unit is
Receiving an electrical signal that is a fixed signal pattern until the first determination unit determines that the error is a target value;
The first determination unit includes:
The converter according to claim 1, wherein it is determined whether or not an error of the electric signal that is the fixed signal pattern is a target value. The first communication unit is
The received electrical signal as a fixed signal pattern is returned until the first control unit controls at least the received electrical signal to be converted into an optical signal by the conversion unit. converter. The converter according to any one of claims 1 to 4, wherein the communication protocol is compliant with PCI EXPRESS. A converter according to claim 4;
A second communication unit for transmitting and receiving electrical signals;
The second communication unit transmits an electric signal which is a fixed signal pattern until the first control unit controls at least the electric signal to be converted into an optical signal by the conversion unit, and the first communication unit returns the electric signal. The second control unit that controls the second communication unit to receive an electrical signal that is a fixed signal pattern;
A second correction unit for correcting the electrical signal received by the second communication unit;
A second determination unit that determines whether or not an error in the electrical signal corrected by the second correction unit is a target value;
A second changing unit that changes a setting for signal correction of the second correction unit when the second determination unit determines that the error of the electric signal is not a target value;
A communication apparatus comprising: Receiving an electrical signal;
Correcting the received electrical signal;
Determining whether the error in the corrected electrical signal is a target value;
A step of controlling to convert the received electrical signal into an optical signal when it is determined that the error of the electrical signal is a target value;
A communication method comprising:

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