JP2014157886A - Circuit board and method for manufacturing the same - Google Patents

Circuit board and method for manufacturing the same Download PDF

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Publication number
JP2014157886A
JP2014157886A JP2013027101A JP2013027101A JP2014157886A JP 2014157886 A JP2014157886 A JP 2014157886A JP 2013027101 A JP2013027101 A JP 2013027101A JP 2013027101 A JP2013027101 A JP 2013027101A JP 2014157886 A JP2014157886 A JP 2014157886A
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mounting
mounting component
substrate
component
circuit board
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Takashi Okada
崇志 岡田
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Konica Minolta Inc
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Konica Minolta Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a circuit board capable of reducing a mounting area without impairing connection reliability of a connection section by a heat cycle, and to provide a method for manufacturing the circuit board.SOLUTION: A circuit board comprises: a substrate 1; a first mounting component 2-1 which is mounted at a first surface of the substrate 1 via first connection members 3-1, and includes one or a plurality of electronic parts; and a second mounting component 2-2 which is mounted at a second surface, facing the first surface, of the substrate 1 via second connection members 3-2, and includes one or a plurality of electronic parts. The first and second mounting components 2-1 and 2-2 are mounted so that a centroid of the first mounting component 2-1 and a centroid of the second mounting component 2-2 are arranged on the same normal line of the substrate 1 at the first surface and the second surface. Each of the first and second connection members 3-1 and 3-2 comprises: a core member formed of an elastic material; and a conductive layer which is formed of a conductive material and covers the surface of the core member.

Description

本発明は、電子部品を固定するための回路基板およびこの回路基板の製造方法に関する。   The present invention relates to a circuit board for fixing electronic components and a method for manufacturing the circuit board.

一般に、例えばテレビジョン、冷蔵庫、掃除機、カメラ、パーソナルコンピュータおよび携帯電話機等の電子機器には、その機能を実現するために、様々な電子部品が用いられている。この電子部品は、通常、例えばプリント基板やフレキシブル基板等の基板に実装され固定される。電子部品は、例えば抵抗素子やコンデンサ等の受動部品、例えばダイオードやトランジスタ等の能動部品、および、このような能動部品を集積化した集積回路(ICやLSIを含む)等である。集積回路の中には、受動部品を集積化した部品も知られている。このような電子部品の実装では、従来、挿入実装技術(THT、through hole technology)が主流であったが、集積回路が多用されるようになると、表面実装技術(SMT、surface mount technology)が主流となってきている。これに応じて挿入実装技術に適した形態であった受動部品も、例えばチップ抵抗やチップコンデンサ等の「チップ型」と呼ばれる表面実装技術に適した形態に改良されている。この表面実装技術によって回路基板の低背化や実装部品の高密度化が可能となり、電子機器の小型化や軽量化が可能となっている。   In general, for example, various electronic components are used in electronic devices such as a television, a refrigerator, a vacuum cleaner, a camera, a personal computer, and a mobile phone in order to realize their functions. This electronic component is usually mounted and fixed on a board such as a printed board or a flexible board. The electronic component is, for example, a passive component such as a resistance element or a capacitor, an active component such as a diode or a transistor, and an integrated circuit (including an IC or LSI) in which such an active component is integrated. Among integrated circuits, a component in which passive components are integrated is also known. Conventionally, in such electronic component mounting, insertion mounting technology (THT, through hole technology) has been the mainstream, but when integrated circuits are frequently used, surface mounting technology (SMT, surface mount technology) is the mainstream. It has become. Accordingly, passive components that have been in a form suitable for the insertion mounting technique have also been improved to a form suitable for a surface mounting technique called “chip type” such as a chip resistor or a chip capacitor. With this surface mounting technology, it is possible to reduce the height of the circuit board and increase the density of the mounted components, and it is possible to reduce the size and weight of the electronic device.

この表面実装技術に適した形態の実装部品の一つに、ボールグリッドアレイ(Ball Grid Arry、BGA)と呼ばれるパッケージ部品がある。このBGAのパッケージ部品は、電子部品をパッケージ化したパッケージと、このパッケージの底面に配列された複数の金属球とを備えている。この複数の金属球は、パッケージ内の前記電子部品と外部とを電気的に接続するための引き出し用電極であり、従来、半田によって形成され、半田ボールと呼ばれている。   One type of mounting component suitable for this surface mounting technology is a package component called a ball grid array (BGA). The BGA package component includes a package in which electronic components are packaged and a plurality of metal balls arranged on the bottom surface of the package. The plurality of metal balls are lead electrodes for electrically connecting the electronic component in the package and the outside, and are conventionally formed of solder and are called solder balls.

このBGAのパッケージ部品を基板に表面実装した回路基板では、実装後に、加熱と冷却とを繰り返すヒートサイクルによって、熱膨張係数の相違から、基板やパッケージに対する半田ボールの接続部(接合部)に亀裂(クラック)が生じ、電気的な接続が保持できない場合がある。より具体的には、例えば、パッケージ内のICチップを構成するシリコンの熱膨張係数が約2.6ppm/℃である一方、基板を構成するガラスエポキシの熱膨張係数が約12〜16ppm/℃である場合、両者の熱膨張係数は、互いに大きく相違する。パッケージ(主にICチップ)の自己発熱や環境の変化によって温度変化が生じると、この熱膨張係数の相違から応力が生じる。この応力は、基板やパッケージに対する半田ボールの接続部(接合部)にストレスを与え、温度変化が繰り返されると(ヒートサイクルによって)、このストレスの蓄積によって半田ボールの前記接続部に亀裂が生じ、電気的な接続が不良となる。   In a circuit board in which the BGA package component is surface-mounted on a substrate, the solder ball connection portion (joint portion) to the substrate or package is cracked due to a difference in thermal expansion coefficient due to a heat cycle in which heating and cooling are repeated after mounting. (Crack) may occur, and electrical connection may not be maintained. More specifically, for example, the thermal expansion coefficient of silicon constituting the IC chip in the package is about 2.6 ppm / ° C., while the thermal expansion coefficient of glass epoxy constituting the substrate is about 12 to 16 ppm / ° C. In some cases, the thermal expansion coefficients of the two are greatly different from each other. When temperature changes occur due to self-heating of the package (mainly IC chip) or environmental changes, stress is generated due to the difference in the thermal expansion coefficient. This stress gives stress to the connection part (joint part) of the solder ball to the substrate or package, and when the temperature change is repeated (by heat cycle), the accumulation of this stress causes a crack in the connection part of the solder ball, Electrical connection is poor.

この半田ボールにおける接続信頼性の低下を回避するために、例えば、特許文献1のプリント配線板構造が開示されている。この特許文献1に開示のプリント配線板構造は、半導体チップをサブストレートに搭載した半導体パッケージを実装部品とする第1の部品実装面および第2の部品実装面を表裏の関係に有するプリント配線板と、前記プリント配線板を介してサブストレート相互は一部が重なり、半導体チップ相互は重ならない位置関係で、前記第1の部品実装面に実装された第1の半導体パッケージ、および前記第2の部品実装面に実装された第2の半導体パッケージと、を具備している。このようなプリント配線板構造は、特許文献1によれば、半導体チップ(ベアチップ)相互に重なりが生じた場合(当然サブストレート相互にも重なりが生じる)、接続信頼性の低下を招くことから、半導体チップ相互に重なりが生じない範囲で、表裏の各部品実装面に半導体パッケージを実装可能にし、これによって、接続信頼性の低下を招くことなく、実装部品の高密度化、および配線の高密度化を図っている(特許文献1の[0012]段落)。   In order to avoid a decrease in connection reliability in the solder balls, for example, a printed wiring board structure disclosed in Patent Document 1 is disclosed. The printed wiring board structure disclosed in Patent Document 1 is a printed wiring board having a first component mounting surface and a second component mounting surface in a front-back relationship, each having a semiconductor package having a semiconductor chip mounted on a substrate as a mounting component. A first semiconductor package mounted on the first component mounting surface in a positional relationship in which the substrates partially overlap each other and the semiconductor chips do not overlap each other via the printed wiring board, and the second And a second semiconductor package mounted on the component mounting surface. According to Patent Document 1, such a printed wiring board structure causes a reduction in connection reliability when an overlap occurs between semiconductor chips (bare chips) (which naturally occurs also between substrates). Semiconductor packages can be mounted on the front and back component mounting surfaces within a range where there is no overlap between semiconductor chips, thereby increasing the density of mounted components and reducing the wiring density without deteriorating connection reliability. (Patent Document 1, paragraph [0012]).

特開2009−16398号公報JP 2009-16398 A

ところで、前記特許文献1に開示のプリント配線板構造は、半導体チップ相互に重なりが生じない範囲で、表裏の各部品実装面に半導体パッケージを実装しているため、実装面積をさらに縮小化することが難しい。   By the way, the printed wiring board structure disclosed in Patent Document 1 has a semiconductor package mounted on each of the component mounting surfaces on the front and back sides within a range in which the semiconductor chips do not overlap each other, thereby further reducing the mounting area. Is difficult.

本発明は、上述の事情に鑑みて為された発明であり、その目的は、ヒートサイクルによる前記接続部(接合部)の接続信頼性を損なうことなく、実装面積を縮小することができる回路基板および回路基板の製造方法を提供することである。   The present invention has been made in view of the above circumstances, and its purpose is a circuit board capable of reducing the mounting area without impairing the connection reliability of the connection part (joint part) by heat cycle. And it is providing the manufacturing method of a circuit board.

本発明者は、種々検討した結果、上記目的は、以下の本発明により達成されることを見出した。すなわち、本発明の一態様にかかる回路基板は、基板と、前記基板の一方面に第1接続部材を介して実装され、1または複数の電子部品を含む第1実装部品と、前記基板の前記一方面に対向する他方面に第2接続部材を介して実装され、1または複数の電子部品を含む第2実装部品とを備え、前記第1および第2実装部品は、前記第1実装部品の重心と前記第2実装部品の重心とが前記基板における前記一方面または前記他方面の同一法線上に位置するように実装され、前記第1および第2接続部材は、それぞれ、弾性材料で形成されたコア部材と、導電性材料で形成され前記コア部材の表面を被覆する導電性層とを備えることを特徴とする。好ましくは、この回路基板において、第1実装部品の第1実装面と第2実装部品の第2実装面とは、同形である。   As a result of various studies, the present inventor has found that the above object is achieved by the present invention described below. That is, a circuit board according to an aspect of the present invention includes a board, a first mounting component that is mounted on one surface of the board via a first connection member and includes one or more electronic components, and the board of the board. A second mounting component including one or a plurality of electronic components mounted on the other surface facing the one surface via a second connection member, wherein the first and second mounting components are the first mounting component The center of gravity and the center of gravity of the second mounting component are mounted so as to be located on the same normal line of the one surface or the other surface of the substrate, and the first and second connection members are each formed of an elastic material. And a conductive layer that is formed of a conductive material and covers the surface of the core member. Preferably, in this circuit board, the first mounting surface of the first mounting component and the second mounting surface of the second mounting component have the same shape.

このような回路基板は、基板両面のそれぞれに第1および第2実装部品を実装するので、基板片面に実装する場合に較べて実装面積を低減することができる。そして、基板両面のそれぞれに第1および第2実装部品を実装する場合に、第1および第2実装部品の各重心が基板実装面(一方面、他方面)の同一法線上に位置するので、第1実装部品の第1実装面積と第2実装部品の第2実装面積とが、前記法線方向と直交する面内で比較的大きく重なり、このような回路基板は、前記法線方向から平面視した場合の実装面積を比較的小さくすることができる。特に、第1実装部品の第1実装面と第2実装部品の第2実装面とが同形である場合には、前記法線方向から平面視した場合の実装面積は、最小となる。   In such a circuit board, the first and second mounting components are mounted on both sides of the board, so that the mounting area can be reduced as compared with the case of mounting on one side of the board. And when mounting the first and second mounting components on each of the both surfaces of the substrate, the respective centroids of the first and second mounting components are located on the same normal line of the substrate mounting surface (one surface, the other surface), The first mounting area of the first mounting component and the second mounting area of the second mounting component overlap relatively large in a plane orthogonal to the normal direction, and such a circuit board is planar from the normal direction. The mounting area when viewed can be made relatively small. In particular, when the first mounting surface of the first mounting component and the second mounting surface of the second mounting component have the same shape, the mounting area when viewed in plan from the normal direction is minimized.

そして、このような回路基板は、弾性材料で形成されたコア部材を持つ第1および第2接続部材を備えるので、基板、第1実装部品および第2実装部品の各熱膨張係数が相違する場合に、温度変化と熱膨張係数の相違とから前記応力が生じたとしても、第1および第2接続部材における弾性材料のコア材料で吸収され、緩和される。さらに、このような回路基板は、基板両面のそれぞれに互いの重心を重ねて第1および第2実装部品を実装するので、前記第1および第2接続部材のそれぞれが複数である場合に、略均等に負担させることができ、前記応力の集中を緩和できる。特に、第1実装部品の第1実装面と第2実装部品の第2実装面とが同形であって第1および第2接続部材のそれぞれが重心位置を対称中心として対称に配置されている場合には、最も均等に負担させることができ、応力集中を最小化できる。このように、この回路基板は、前記応力を第1および第2接続部材のコア部材で吸収することができ、さらに、前記応力集中を緩和できるので、基板や第1および第2実装部品に対する第1および第2接続部材の各接続部(接合部)に生じ得る亀裂(クラック)の発生を抑制することができる。   And since such a circuit board is provided with the 1st and 2nd connection member with the core member formed with the elastic material, when each thermal expansion coefficient of a board | substrate, a 1st mounting component, and a 2nd mounting component differs In addition, even if the stress is generated due to the change in temperature and the difference in thermal expansion coefficient, the stress is absorbed and relaxed by the core material of the elastic material in the first and second connecting members. Further, since such a circuit board mounts the first and second mounting components on the both surfaces of the board with the center of gravity of each other overlapped, when the plurality of first and second connection members are plural, The burden can be evenly distributed, and the stress concentration can be reduced. In particular, when the first mounting surface of the first mounting component and the second mounting surface of the second mounting component have the same shape, and each of the first and second connection members is arranged symmetrically with the center of gravity as the center of symmetry. Can be loaded evenly and stress concentration can be minimized. Thus, the circuit board can absorb the stress by the core members of the first and second connecting members, and further reduce the stress concentration, so that the circuit board and the first and second mounting components can be reduced. It is possible to suppress the occurrence of cracks (cracks) that may occur in each connection portion (joint portion) of the first and second connection members.

したがって、このような回路基板は、ヒートサイクルによる前記接続部(接合部)の接続信頼性を損なうことなく、実装面積を縮小することができる。   Therefore, such a circuit board can reduce a mounting area without impairing the connection reliability of the connection part (joint part) by heat cycle.

また、他の一態様では、上述の回路基板において、前記第1実装部品の第1周囲または前記第1周囲の一部であって前記第1実装部品と前記基板との間に設けられ、前記第1実装部品と前記基板との接続を補強する第1補強部材、および、前記第2実装部品の第2周囲または前記第2周囲の一部であって前記第2実装部品と前記基板との間に設けられ、前記第2実装部品と前記基板との接続を補強する第2補強部材のうちの少なくとも一方をさらに備えることを特徴とする。   According to another aspect, in the above-described circuit board, the first periphery of the first mounting component or a part of the first periphery and provided between the first mounting component and the substrate, A first reinforcing member that reinforces a connection between the first mounting component and the substrate; and a second periphery of the second mounting component or a part of the second periphery, and the second mounting component and the substrate. It is further provided with at least one of the 2nd reinforcement members which are provided in between and reinforce the connection of the said 2nd mounting components and the said board | substrate.

このような回路基板は、第1および第2補強部材の少なくとも一方をさらに備えるので、外部応力に対し、回路基板全体で外部応力を負担することによって接続部材に応力集中することを低減することができる。このため、このような回路基板は、接続部材における基板や実装部品に対する接続部(接合部)の接続の信頼性をより向上することができる。   Since such a circuit board further includes at least one of the first and second reinforcing members, it is possible to reduce stress concentration on the connection member by bearing the external stress on the entire circuit board against the external stress. it can. For this reason, such a circuit board can improve the reliability of the connection of the connection part (joining part) with respect to the board | substrate and mounting component in a connection member more.

また、他の一態様では、これら上述の回路基板において、前記第1実装部品は、前記第1接続部材を持つボールグリッドアレイのパッケージ部品であり、前記第2実装部品は、前記第2接続部材を持つボールグリッドアレイのパッケージ部品であることを特徴とする。   According to another aspect, in the above-described circuit boards, the first mounting component is a ball grid array package component having the first connection member, and the second mounting component is the second connection member. It is a ball grid array package part having

この構成によれば、ボールグリッドアレイのパッケージ部品を接続部材を介して基板両面にそれぞれ実装した回路基板が提供される。   According to this configuration, a circuit board is provided in which the package components of the ball grid array are respectively mounted on both sides of the board via the connection member.

また、本発明の他の一態様にかかる回路基板の製造方法は、基板の一方面に第1接続部材を介して、1または複数の電子部品を含む第1実装部品を実装する第1実装工程と、前記基板の前記一方面に対向する他方面に第2接続部材を介して、1または複数の電子部品を含む第2実装部品を実装する第2実装工程とを備え、前記第1および第2実装部品は、前記第1実装部品の重心と前記第2実装部品の重心とが前記基板における前記一方面または前記他方面の同一法線上に位置するように実装され、前記第1および第2接続部材は、それぞれ、弾性材料で形成されたコア部材と、導電性材料で形成され前記コア部材の表面を被覆する導電性層とを備えることを特徴とする。   The circuit board manufacturing method according to another aspect of the present invention includes a first mounting step of mounting a first mounting component including one or more electronic components on one surface of the substrate via a first connection member. And a second mounting step of mounting a second mounting component including one or more electronic components on the other surface of the substrate facing the one surface via a second connection member, the first and first The two mounted components are mounted such that the center of gravity of the first mounted component and the center of gravity of the second mounted component are located on the same normal line of the one surface or the other surface of the substrate, and the first and second components are mounted. Each of the connection members includes a core member formed of an elastic material and a conductive layer that is formed of a conductive material and covers the surface of the core member.

このような回路基板の製造方法は、基板両面のそれぞれに第1および第2実装部品を実装するので、基板片面に実装する場合に較べて実装面積を低減することができる。そして、基板両面のそれぞれに第1および第2実装部品を実装する場合に、第1および第2実装部品の各重心が基板実装面(一方面、他方面)の同一法線上に位置するので、第1実装部品の第1実装面積と第2実装部品の第2実装面積とが、前記法線方向と直交する面内で比較的大きく重なり、このような回路基板の製造方法は、前記法線方向から平面視した場合の実装面積を比較的小さくすることができる。特に、第1実装部品の第1実装面と第2実装部品の第2実装面とが同形である場合には、前記法線方向から平面視した場合の実装面積は、最小となる。   In such a circuit board manufacturing method, the first and second mounting components are mounted on both sides of the board, so that the mounting area can be reduced as compared with the case of mounting on one side of the board. And when mounting the first and second mounting components on each of the both surfaces of the substrate, the respective centroids of the first and second mounting components are located on the same normal line of the substrate mounting surface (one surface, the other surface), The first mounting area of the first mounting component and the second mounting area of the second mounting component overlap relatively large in a plane orthogonal to the normal direction, and the method of manufacturing such a circuit board includes the normal line. The mounting area when viewed in plan from the direction can be made relatively small. In particular, when the first mounting surface of the first mounting component and the second mounting surface of the second mounting component have the same shape, the mounting area when viewed in plan from the normal direction is minimized.

そして、このような回路基板の製造方法は、弾性材料で形成されたコア部材を持つ第1および第2接続部材を用いて第1および第2実装部品を基板に実装するので、基板、第1実装部品および第2実装部品の各熱膨張係数が相違する場合に、温度変化と熱膨張係数の相違とから前記応力が生じたとしても、第1および第2接続部材における弾性材料のコア部材で吸収され、緩和される。さらに、このような回路基板の実装方法は、基板両面のそれぞれに互いの重心を重ねて第1および第2実装部品を実装するので、前記第1および第2接続部材のそれぞれが複数である場合に、略均等に負担させることができ、前記応力の集中を緩和できる。特に、第1実装部品の第1実装面と第2実装部品の第2実装面とが同形であって第1および第2接続部材のそれぞれが重心位置を対称中心として対称に配置されている場合には、最も均等に負担させることができ、応力集中を最小化できる。このように、この回路基板の実装方法は、前記応力を第1および第2接続部材のコア部材で吸収することができ、さらに、前記応力集中を緩和できるので、基板や第1および第2実装部品に対する第1および第2接続部材の各接続部(接合部)に生じ得る亀裂(クラック)の発生を抑制することができる。   And since the manufacturing method of such a circuit board mounts a 1st and 2nd mounting component on a board | substrate using the 1st and 2nd connection member which has a core member formed with the elastic material, a board | substrate, 1st When the thermal expansion coefficients of the mounting component and the second mounting component are different, even if the stress is generated due to the temperature change and the difference of the thermal expansion coefficient, the core member of the elastic material in the first and second connection members Absorbed and relaxed. Further, in such a circuit board mounting method, since the first and second mounting components are mounted on the both surfaces of the board with the respective centers of gravity superimposed on each other, there are a plurality of the first and second connection members. In addition, the stress can be applied substantially evenly, and the stress concentration can be alleviated. In particular, when the first mounting surface of the first mounting component and the second mounting surface of the second mounting component have the same shape, and each of the first and second connection members is arranged symmetrically with the center of gravity as the center of symmetry. Can be loaded evenly and stress concentration can be minimized. Thus, in this circuit board mounting method, the stress can be absorbed by the core members of the first and second connection members, and the stress concentration can be reduced. Generation | occurrence | production of the crack (crack) which may arise in each connection part (joint part) of the 1st and 2nd connection member with respect to components can be suppressed.

したがって、このような回路基板の製造方法は、ヒートサイクルによる前記接続部(接合部)の接続信頼性を損なうことなく、実装面積を縮小することができる。   Therefore, such a method for manufacturing a circuit board can reduce the mounting area without impairing the connection reliability of the connection part (joint part) by heat cycle.

本発明にかかる回路基板および回路基板の製造方法は、ヒートサイクルによる前記接続部(接合部)の接続信頼性を損なうことなく、実装面積を縮小することができる。   The circuit board and the circuit board manufacturing method according to the present invention can reduce the mounting area without impairing the connection reliability of the connection part (joint part) by heat cycle.

第1実施形態における回路基板の構成を示す断面図である。It is sectional drawing which shows the structure of the circuit board in 1st Embodiment. 第1実施形態における回路基板の分解斜視図である。It is a disassembled perspective view of the circuit board in 1st Embodiment. 第1実施形態の回路基板における接続部材の構成を示す断面図である。It is sectional drawing which shows the structure of the connection member in the circuit board of 1st Embodiment. 第1実施形態における回路基板の製造工程を説明するための図である。It is a figure for demonstrating the manufacturing process of the circuit board in 1st Embodiment. 第2実施形態における回路基板の構成を示す断面図である。It is sectional drawing which shows the structure of the circuit board in 2nd Embodiment.

以下、本発明にかかる実施の一形態を図面に基づいて説明する。なお、各図において同一の符号を付した構成は、同一の構成であることを示し、適宜、その説明を省略する。本明細書において、総称する場合には添え字を省略した参照符号で示し、個別の構成を指す場合には添え字を付した参照符号で示す。   Hereinafter, an embodiment according to the present invention will be described with reference to the drawings. In addition, the structure which attached | subjected the same code | symbol in each figure shows that it is the same structure, The description is abbreviate | omitted suitably. In this specification, when referring generically, it shows with the reference symbol which abbreviate | omitted the suffix, and when referring to an individual structure, it shows with the reference symbol which attached the suffix.

(第1実施形態)
図1は、第1実施形態における回路基板の構成を示す断面図である。図2は、第1実施形態における回路基板の分解斜視図である。図3は、第1実施形態の回路基板における接続部材の構成を示す断面図である。
(First embodiment)
FIG. 1 is a cross-sectional view showing a configuration of a circuit board in the first embodiment. FIG. 2 is an exploded perspective view of the circuit board in the first embodiment. FIG. 3 is a cross-sectional view illustrating a configuration of a connection member in the circuit board according to the first embodiment.

第1実施形態における回路基板Caは、図1および図2に示すように、基板1と、実装部品2と、1または複数の球状接続部材3とを備えている。   As shown in FIGS. 1 and 2, the circuit board Ca in the first embodiment includes a board 1, a mounting component 2, and one or a plurality of spherical connection members 3.

基板1は、電子部品を固定して配線するために用いられる例えば板状およびフィルム状等の部品である。基板1は、例えば、ガラスコンポジット基板、ガラスエポキシ基板およびポリイミドフレキシブル基板等である。基板1には、配線を行うために、その表面に配線パターンや電極パッドが形成されてよく、その内部に、スルーホールドビア、ブラインドビアおよびベリッドビア等のビアが形成されてよい。基板1は、このようなプリント配線基板であってよい。   The substrate 1 is, for example, a plate-like or film-like component used for fixing and wiring an electronic component. The substrate 1 is, for example, a glass composite substrate, a glass epoxy substrate, a polyimide flexible substrate, or the like. In order to perform wiring, a wiring pattern and electrode pads may be formed on the surface of the substrate 1, and vias such as through-hold vias, blind vias, and buried vias may be formed therein. The substrate 1 may be such a printed wiring board.

実装部品2は、1または複数の電子部品を含む部品である。電子部品は、例えば、抵抗素子やコンデンサ等の受動部品、例えばダイオードやトランジスタ等の能動部品、および、これら受動部品や能動部品を集積化したICチップ(LSIチップを含む)等である。実装部品2は、より具体的には、1または複数の、このような電子部品を搭載した部材を例えば樹脂やセラミック等でパッケージ化したパッケージ部品である。本実施形態では、例えば、実装部品2は、球状接続部材3をさらに備え、例えばICチップ等の半導体チップを搭載した部材(サブ基板)をパッケージ化した、ボールグリッドアレイ(Ball Grid Arry)の半導体パッケージ部品である。   The mounting component 2 is a component including one or a plurality of electronic components. The electronic components are, for example, passive components such as resistance elements and capacitors, active components such as diodes and transistors, and IC chips (including LSI chips) in which these passive components and active components are integrated. More specifically, the mounting component 2 is a package component in which one or a plurality of members on which such electronic components are mounted are packaged with, for example, resin or ceramic. In the present embodiment, for example, the mounting component 2 further includes a spherical connection member 3, and a ball grid array (Ball Grid Array) semiconductor in which a member (sub-board) on which a semiconductor chip such as an IC chip is mounted is packaged. Package parts.

ボールグリッドアレイは、表面実装技術に適したパッケージ方法であり、半導体パッケージ部品の平面には、図2に示すように、前記樹脂やセラミックのパッケージ22から外部に臨む1または複数の電極ランド21が設けられる。この電翌ランド21は、球状接続部材3を接続するためのものである。   The ball grid array is a packaging method suitable for surface mounting technology. As shown in FIG. 2, one or a plurality of electrode lands 21 facing the outside from the resin or ceramic package 22 are provided on the plane of the semiconductor package component. Provided. This electric next land 21 is for connecting the spherical connecting member 3.

本実施形態では、実装部品2は、基板1の一方面に実装され、1または複数の電子部品を含む第1実装部品2−1と、基板1の前記一方面に対向する他方面に実装され、1または複数の電子部品を含む第2実装部品2−2とを備えている。   In the present embodiment, the mounting component 2 is mounted on one surface of the substrate 1 and mounted on the first mounting component 2-1 including one or more electronic components and the other surface facing the one surface of the substrate 1. And a second mounting component 2-2 including one or more electronic components.

球状接続部材3は、実装部品2を基板1に実装するために用いられる部材である。球状接続部材3は、例えば、図3に示すように、弾性材料で形成された球状のコア部材31と、導電性材料で形成されコア部材31の表面を被覆する導電性層32とを備えている。このような球状接続部材3として、例えば、ミクロパールSOL(積水化学工業株式会社製)が挙げられる。このミクロパールSOLは、ジビニルベンゼン架橋重合体から形成された樹脂コアと、この樹脂コアの表面を被覆する銅(Cu)の第1導電性金属層と、この第1導電性金属層の表面を被覆する半田の第2導電性金属層とを備えている。   The spherical connection member 3 is a member used for mounting the mounting component 2 on the substrate 1. For example, as shown in FIG. 3, the spherical connecting member 3 includes a spherical core member 31 formed of an elastic material and a conductive layer 32 formed of a conductive material and covering the surface of the core member 31. Yes. Examples of such a spherical connecting member 3 include Micropearl SOL (manufactured by Sekisui Chemical Co., Ltd.). The micropearl SOL includes a resin core formed from a divinylbenzene crosslinked polymer, a copper (Cu) first conductive metal layer covering the surface of the resin core, and a surface of the first conductive metal layer. And a second conductive metal layer of solder to be covered.

本実施形態では、基板1の両面に第1および第2実装部品2−1、2−2をそれぞれ実装するため、球状接続部材3は、第1実装部品2−1を基板1に実装するために用いられる複数の第1球状接続部材3−1(図1および図2に示す例では、8個の第1球状接続部材3−11〜3−18)と、第2実装部品2−2を基板1に実装するために用いられる複数の第2球状接続部材3−2(3−21〜3−28)とから成る。   In the present embodiment, since the first and second mounting components 2-1 and 2-2 are mounted on both surfaces of the substrate 1, the spherical connecting member 3 is used for mounting the first mounting component 2-1 on the substrate 1. A plurality of first spherical connecting members 3-1 (eight first spherical connecting members 3-11 to 3-18 in the example shown in FIG. 1 and FIG. 2) and a second mounting component 2-2. It comprises a plurality of second spherical connecting members 3-2 (3-21 to 3-28) used for mounting on the substrate 1.

また、本実施形態では、基板1には、図2に示すように、この第1球状接続部材3−1を接続するための第1電極パッド11−1が一方面上に形成され、この第2球状接続部材3−2を接続するための第2電極パッド11−2(不図示)が他方面上に形成されている。第1電極パッド11−1は、第1球状接続部材3−1の位置に対応する位置に、その個数に対応する個数で形成され、図2に示す例では、8個の第1電極パッド11−11〜11−18が形成されている。同様に、第2電極パッド11−2は、第2球状接続部材3−2の位置に対応する位置に、その個数に対応する個数で形成され、図2に示す例では、8個の第2電極パッド11−21〜11−28(不図示)が形成されている。これら第1および第2電極パッド11−1、11−2には、配線を行うために、上述の配線パターンやビアが接続されてよい。   In the present embodiment, as shown in FIG. 2, the substrate 1 is provided with a first electrode pad 11-1 for connecting the first spherical connecting member 3-1, on one surface. A second electrode pad 11-2 (not shown) for connecting the two spherical connecting members 3-2 is formed on the other surface. The first electrode pads 11-1 are formed at the positions corresponding to the positions of the first spherical connection members 3-1, in the number corresponding to the number, and in the example shown in FIG. -11 to 11-18 are formed. Similarly, the second electrode pads 11-2 are formed at the positions corresponding to the positions of the second spherical connecting members 3-2 in the number corresponding to the number, and in the example shown in FIG. Electrode pads 11-21 to 11-28 (not shown) are formed. The first and second electrode pads 11-1 and 11-2 may be connected with the above-described wiring patterns and vias for wiring.

このため、第1実装部品2−1は、基板1の一方面に複数の第1電極パッド11−11〜11−18および複数の第1球状接続部材3−11〜3−18を介して実装され、第2実装部品2−2は、基板1の他方面に複数の第2電極パッド11−21〜11−28および複複数の第2球状接続部材3−21〜3−28を介して実装される。   For this reason, the first mounting component 2-1 is mounted on one surface of the substrate 1 via the plurality of first electrode pads 11-11 to 11-18 and the plurality of first spherical connection members 3-11 to 3-18. The second mounting component 2-2 is mounted on the other surface of the substrate 1 via a plurality of second electrode pads 11-21 to 11-28 and a plurality of second spherical connection members 3-21 to 3-28. Is done.

そして、本実施形態における回路基板Caでは、図2に示すように、第1および第2実装部品2−1、2−2は、第1実装部品2−1の重心W1と第2実装部品2−2の重心W2とが基板1における前記一方面および前記他方面の同一法線NX上に位置するように実装される。すなわち、回路基板Caを平面視した場合に、第1実装部品2−1の重心W1の位置は、第2実装部品2−2の重心W2の位置と重なり合う。   And in the circuit board Ca in this embodiment, as shown in FIG. 2, the 1st and 2nd mounting components 2-1 and 2-2 are the gravity center W1 of the 1st mounting components 2-1, and the 2nd mounting components 2. -2 center of gravity W2 is mounted so as to be located on the same normal line NX of the one surface and the other surface of the substrate 1. That is, when the circuit board Ca is viewed in plan, the position of the center of gravity W1 of the first mounting component 2-1 overlaps the position of the center of gravity W2 of the second mounting component 2-2.

このような第1実施形態の回路基板Caは、基板1両面のそれぞれに第1および第2実装部品2−1、2−2を実装するので、基板1片面に実装する場合に較べて実装面積を低減することができる。そして、基板1両面のそれぞれに第1および第2実装部品2−1、2−2を実装する場合に、第1および第2実装部品2−1、2−2の各重心W1、W2が基板実装面(一方面、他方面)の同一法線NX上に位置するので、第1実装部品2−1の第1実装面積と第2実装部品2−2の第2実装面積とが、前記法線方向と直交する面内で比較的大きく重なり、このような回路基板は、前記法線方向から平面視した場合の実装面積を比較的小さくすることができる。特に、第1実装部品2−1の第1実装面と第2実装部品2−2の第2実装面とが同形である場合には、前記法線方向から平面視した場合の実装面積は、最小となる。   In the circuit board Ca of the first embodiment, the first and second mounting components 2-1 and 2-2 are mounted on both surfaces of the substrate 1, so that the mounting area is larger than when mounting on one surface of the substrate 1. Can be reduced. When the first and second mounting components 2-1 and 2-2 are mounted on both surfaces of the substrate 1, the centers of gravity W1 and W2 of the first and second mounting components 2-1 and 2-2 are the substrate. Since it is located on the same normal line NX of the mounting surface (one surface, the other surface), the first mounting area of the first mounting component 2-1 and the second mounting area of the second mounting component 2-2 are the above-mentioned method. Such a circuit board can be relatively reduced in mounting area when viewed in plan from the normal direction. In particular, when the first mounting surface of the first mounting component 2-1 and the second mounting surface of the second mounting component 2-2 have the same shape, the mounting area in plan view from the normal direction is Minimal.

そして、このような第1実施形態の回路基板Caは、弾性材料で形成されたコア部材31を持つ第1および第2球状接続部材3−1、3−2を備えるので、基板1、第1実装部品2−1および第2実装部品2−2の各熱膨張係数が相違する場合に、温度変化と熱膨張係数の相違とから前記応力が生じたとしても、第1および第2球状接続部材3−1、3−2における弾性材料のコア部材31で吸収され、緩和される。さらに、このような第1実施形態の回路基板Caは、基板1両面のそれぞれに互いの重心W1、W2を重ねて第1および第2実装部品2−1、2−2を実装するので、第1および第2接続部材3−1、3−2のそれぞれが複数である場合に、略均等に負担させることができ、前記応力の集中を緩和できる。特に、第1実装部品3−1の第1実装面と第2実装部品3−2の第2実装面とが同形であって第1および第2接続部材3−1、3−2のそれぞれが重心位置W1、W2を対称中心として対称に配置されている場合には、最も均等に負担させることができ、応力集中を最小化できる。このように、第1実施形態の回路基板Caは、前記応力を第1および第2接続部材3−1、3−2のコア部材で吸収することができ、さらに、前記応力集中を緩和できるので、基板1や第1および第2実装部品2−1、2−2に対する第1および第2接続部材3−1、3−2の各接続部(接合部)に生じ得る亀裂(クラック)の発生を抑制することができる。   And since the circuit board Ca of such 1st Embodiment is equipped with the 1st and 2nd spherical connection members 3-1 and 3-2 with the core member 31 formed with the elastic material, the board | substrate 1, 1st When the thermal expansion coefficients of the mounting component 2-1 and the second mounting component 2-2 are different, even if the stress is generated due to the temperature change and the difference of the thermal expansion coefficient, the first and second spherical connecting members 3-1 and 3-2 are absorbed and relaxed by the core member 31 of the elastic material. Further, the circuit board Ca according to the first embodiment mounts the first and second mounting components 2-1 and 2-2 on the both surfaces of the board 1 so that the center of gravity W 1 and W 2 overlap each other. When there are a plurality of each of the first and second connection members 3-1 and 3-2, the load can be substantially evenly distributed, and the stress concentration can be reduced. In particular, the first mounting surface of the first mounting component 3-1 and the second mounting surface of the second mounting component 3-2 have the same shape, and the first and second connection members 3-1 and 3-2 are respectively When the gravity centers W1 and W2 are arranged symmetrically with respect to the center of symmetry, the burden can be applied most evenly and the stress concentration can be minimized. Thus, the circuit board Ca of the first embodiment can absorb the stress with the core members of the first and second connection members 3-1 and 3-2, and can further reduce the stress concentration. Generation of cracks that can occur in the connection portions (joint portions) of the first and second connection members 3-1 and 3-2 with respect to the substrate 1 and the first and second mounting components 2-1 and 2-2. Can be suppressed.

したがって、このような第1実施形態の回路基板Caは、ヒートサイクルによる前記接続部(接合部)の接続信頼性を損なうことなく、実装面積を縮小することができる。   Therefore, the circuit board Ca of the first embodiment can reduce the mounting area without impairing the connection reliability of the connection part (joint part) by heat cycle.

なお、上述の観点から、第1実施形態の回路基板Caにおいて、好ましくは、第1実装部品2−1の第1実装面と第2実装部品2−2の第2実装面とは、同形である。   From the above viewpoint, in the circuit board Ca of the first embodiment, preferably, the first mounting surface of the first mounting component 2-1 and the second mounting surface of the second mounting component 2-2 have the same shape. is there.

このような第1実施形態における回路基板Caは、次の各工程によって製造することができる。すなわち、第1実施形態における回路基板Caは、基板1の一方面に第1球状接続部材3−1を介して第1実装部品2−1を実装する第1実装工程と、基板1の前記一方面に対向する他方面に第2球状接続部材3−2を介して第2実装部品2−2を実装する第2実装工程とを、実施することによって製造することができる。ここで、前記第1実装工程および前記第2実装工程のうちの少なくとも一方は、第1および第2実装部品2−1、2−2が、第1実装部品2−1の重心W1と第2実装部品2−2の重心W2とが基板1における前記一方面および前記他方面の同一法線NX上に位置するように、実施される。   Such a circuit board Ca in the first embodiment can be manufactured by the following steps. That is, the circuit board Ca in the first embodiment includes a first mounting step of mounting the first mounting component 2-1 on the one surface of the substrate 1 via the first spherical connection member 3-1, and the one of the board 1 described above. It can manufacture by implementing the 2nd mounting process which mounts the 2nd mounting component 2-2 via the 2nd spherical connection member 3-2 on the other surface facing a direction. Here, in at least one of the first mounting step and the second mounting step, the first and second mounting components 2-1 and 2-2 have the second center of gravity W 1 of the first mounting component 2-1 and the second mounting step 2-1. It implements so that the gravity center W2 of the mounting component 2-2 may be located on the same normal line NX of the said one surface and the said other surface in the board | substrate 1. FIG.

図4は、第1実施形態における回路基板の製造工程を説明するための図である。より具体的には、図4において、まず、第1球状接続部材3−11〜3−18のそれぞれが第1実装部品2−1における各第1電極ランド21−11〜21−18のそれぞれに配置されるように、第1球状接続部材3−11〜3−18が、第1実装部品21−1に半田ぺーストで仮留めされる(図4(A))。   FIG. 4 is a diagram for explaining a circuit board manufacturing process according to the first embodiment. More specifically, in FIG. 4, first, each of the first spherical connection members 3-11 to 3-18 is placed on each of the first electrode lands 21-11 to 21-18 in the first mounting component 2-1. The first spherical connecting members 3-11 to 3-18 are temporarily fixed to the first mounting component 21-1 with a solder paste so as to be arranged (FIG. 4A).

次に、第1球状接続部材3−11〜3−18のそれぞれが基板1における各第1電極パッド11−11〜11−18のそれぞれに配置されるように、これら第1球状接続部材3−11〜3−18を備えた第1実装部品2−1が、基板1の一方面(表面)上に半田ぺーストで仮留めされる。そして、いわゆるリフロー方式で半田付けされる。すなわち、まず、予熱が行われ、続いて本加熱が行われ、そして、冷却される。これによって半田ペーストが熱によって融解され、冷却によって固化される(図4(B))。この結果、第1実装部品2−1が第1球状接続部材3−1を介して基板1の一方面(主面)に実装される。   Next, the first spherical connection members 3-11 to 3-18 are arranged on the first electrode pads 11-11 to 11-18 on the substrate 1, respectively. A first mounting component 2-1 having 11 to 18-18 is temporarily fixed on one surface (front surface) of the substrate 1 with a solder paste. And it solders by what is called a reflow system. That is, first, preheating is performed, followed by main heating, and cooling. As a result, the solder paste is melted by heat and solidified by cooling (FIG. 4B). As a result, the first mounting component 2-1 is mounted on one surface (main surface) of the substrate 1 via the first spherical connecting member 3-1.

続いて、同様に、第2球状接続部材3−21〜3−28のそれぞれが第2実装部品2−2における各第2電極ランド21−21〜21−28のそれぞれに配置されるように、第2球状接続部材3−21〜3−28が、第2実装部品21−2に半田ぺーストで仮留めされる(図4(C))。   Subsequently, similarly, the second spherical connection members 3-21 to 3-28 are arranged on the second electrode lands 21-21 to 21-28 in the second mounting component 2-2, respectively. The second spherical connection members 3-21 to 3-28 are temporarily fastened to the second mounting component 21-2 with solder paste (FIG. 4C).

次に、第2球状接続部材3−21〜3−28のそれぞれが基板1における各第2電極パッド11−21〜11−28のそれぞれに配置されるように、これら第2球状接続部材3−21〜3−28を備えた第2実装部品2−2が、基板1の他方面(裏面)上に半田ぺーストで仮留めされる。ここで、第1実装部品2−1の重心W1と第1実装部品2−2の重心W2とが基板1における一方面(他方面)の同一法線NX上に互いに位置するように、基板1における一方面の電極パッド11−11〜11−18の各位置および他方面の電極パッド11−21〜11−28の各位置のうちの少なくとも一方が調整されて配設されている。そして、いわゆるリフロー方式で半田付けされる。すなわち、まず、予熱が行われ、続いて本加熱が行われ、そして、冷却される。これによって半田ペーストが熱によって融解され、冷却によって固化される(図4(D))。この結果、第2実装部品2−2が第2球状接続部材3−2を介して基板1の他方面(裏面)に実装される。   Next, the second spherical connection members 3-21 to 3-28 are arranged on the second electrode pads 11-21 to 11-28 on the substrate 1, respectively. The second mounting component 2-2 including 21 to 28 is temporarily fixed to the other surface (back surface) of the substrate 1 with a solder paste. Here, the substrate 1 is arranged such that the center of gravity W1 of the first mounting component 2-1 and the center of gravity W2 of the first mounting component 2-2 are located on the same normal line NX of one surface (the other surface) of the substrate 1. At least one of the positions of the electrode pads 11-11 to 11-18 on one side and the positions of the electrode pads 11-21 to 11-28 on the other side is adjusted and disposed. And it solders by what is called a reflow system. That is, first, preheating is performed, followed by main heating, and cooling. As a result, the solder paste is melted by heat and solidified by cooling (FIG. 4D). As a result, the second mounting component 2-2 is mounted on the other surface (back surface) of the substrate 1 via the second spherical connecting member 3-2.

なお、上述では、第2球状接続部材3−21〜3−28の第2実装部品2−2への仮留め工程(図4(C))は、第1実装部品2−1を基板1の表面に実装した後に実施されたが、第1球状接続部材3−11〜3−18の第1実装部品2−1への仮留め工程(図4(A))と同時に、あるいは、その仮留め工程(図4(A))後に、実施されてもよい。   In the above description, in the temporary fixing step (FIG. 4C) of the second spherical connection members 3-21 to 3-28 to the second mounting component 2-2, the first mounting component 2-1 is attached to the substrate 1. Although it implemented after mounting on the surface, it is the same as the temporary attachment process (FIG. 4 (A)) to the 1st mounting components 2-1 of the 1st spherical connection members 3-11 to 3-18, or its temporary attachment It may be carried out after the step (FIG. 4A).

また、上述では、パッケージ化された第1および第2実装部品2−1、2−2に対し、第1および第2球状接続部材3−1、3−2が仮留めされたが、第1実装部品2−1がパッケージ化される工程で、第1球状接続部材3−1が第1実装部品2−1と合わせてパッケージ化されてよく、第2実装部品2−2がパッケージ化される工程で、第2球状接続部材3−2が第2実装部品2−1と合わせてパッケージ化されてよい。   In the above description, the first and second spherical connection members 3-1 and 3-2 are temporarily fixed to the packaged first and second mounting components 2-1 and 2-2. In the process of packaging the mounting component 2-1, the first spherical connecting member 3-1 may be packaged together with the first mounting component 2-1, and the second mounting component 2-2 is packaged. In the process, the second spherical connecting member 3-2 may be packaged together with the second mounting component 2-1.

このような各工程を経ることによって、第1および第2実装部品2−1、2−2が、それぞれ、第1および第2球状接続部材3−1、3−2を介して基板1の両面に実装された第1実施形態における回路基板Caが製造される。   Through these steps, the first and second mounting components 2-1 and 2-2 are mounted on both surfaces of the substrate 1 via the first and second spherical connection members 3-1 and 3-2, respectively. The circuit board Ca according to the first embodiment mounted on is manufactured.

次に、別の実施形態について説明する。   Next, another embodiment will be described.

(第2実施形態)
図5は、第2実施形態における回路基板の構成を示す断面図である。第2実施形態における回路基板Cbは、図5に示すように、第1実施形態における回路基板Caに対し、さらに、補強部材5を備えている。すなわち、第2実施形態における回路基板Cbは、基板1と、第1および第2実装部品2−1、2−2と、第1および第2球状接続部材3−1、3−2と、補強部材5とを備える。これら第2実施形態の回路基板Cbにおける基板1、第1および第2実装部品2−1、2−2ならびに第1および第2球状接続部材3−1、3−2は、それぞれ、第1実施形態の回路基板Caにおける基板1、第1および第2実装部品2−1、2−2ならびに第1および第2球状接続部材3−1、3−2と同様であるので、その説明を省略する。
(Second Embodiment)
FIG. 5 is a cross-sectional view showing a configuration of a circuit board in the second embodiment. As shown in FIG. 5, the circuit board Cb in the second embodiment further includes a reinforcing member 5 with respect to the circuit board Ca in the first embodiment. That is, the circuit board Cb in the second embodiment includes the board 1, the first and second mounting components 2-1, 2-2, the first and second spherical connecting members 3-1, 3-2, and the reinforcement. And a member 5. The board 1, the first and second mounting components 2-1, 2-2, and the first and second spherical connecting members 3-1, 3-2 in the circuit board Cb of the second embodiment are respectively the first embodiment. Since it is the same as the substrate 1, the first and second mounting components 2-1, 2-2, and the first and second spherical connecting members 3-1, 3-2 in the circuit board Ca of the embodiment, the description thereof is omitted. .

補強部材5は、実装部品2の周囲またはその一部であって実装部品2と基板1との間に設けられ、実装部品2と基板1との接続を補強する部材である。補強部材5は、いわゆるサイドフィルである。補強部材5は、例えば、エポキシ樹脂等の樹脂材料で形成される。図5に示す例では、補強部材5は、第1実装部品2−1の第1周囲であって第1実装部品2−1と基板1との間に設けられた第1補強部材5−1、および、第2実装部品2−2の第2周囲であって第2実装部品2−2と基板1との間に設けられた第2補強部材5−2から成る。   The reinforcing member 5 is a member that is provided around the mounting component 2 and between the mounting component 2 and the substrate 1 and reinforces the connection between the mounting component 2 and the substrate 1. The reinforcing member 5 is a so-called side fill. The reinforcing member 5 is made of, for example, a resin material such as an epoxy resin. In the example shown in FIG. 5, the reinforcing member 5 is a first reinforcing member 5-1 provided between the first mounting component 2-1 and the substrate 1 around the first periphery of the first mounting component 2-1. And a second reinforcing member 5-2 provided between the second mounting component 2-2 and the substrate 1 around the second mounting component 2-2.

なお、補強部材5は、第1補強部材5−1および第2補強部材5−2のいずれか一方であってよい。第1補強部材5−1は、第1実装部品2−1の全周ではなく、第1周囲の一部であってよく、また、第1補強部材5−1は、第1実装部品2−1の第1周囲に周方向に所定の間隔を空けて複数設けられてよい。同様に、第2補強部材5−2は、第2実装部品2−2の全周ではなく、第2周囲の一部であってよく、また、第2補強部材5−2は、第2実装部品2−2の第1周囲に周方向に所定の間隔を空けて複数設けられてよい。   The reinforcing member 5 may be one of the first reinforcing member 5-1 and the second reinforcing member 5-2. The first reinforcing member 5-1 may be a part of the first periphery instead of the entire circumference of the first mounting component 2-1, and the first reinforcing member 5-1 is the first mounting component 2- A plurality of the first peripherals may be provided at a predetermined interval in the circumferential direction. Similarly, the second reinforcing member 5-2 may be a part of the second periphery instead of the entire circumference of the second mounting component 2-2, and the second reinforcing member 5-2 is the second mounting member. A plurality of parts 2-2 may be provided around the first periphery of the component 2-2 at predetermined intervals in the circumferential direction.

通常、球状接続部材3は、小さく、特に、BGAでは、φ0.2〜0.5mmの直径で非常に小さい。このため、基板1に球状接続部材3を介して実装された実装部品の接続強度が比較的弱いため、例えば衝撃や折り曲げ等の外部から応力が作用すると、実装部品の脱落や、球状接続部材3における基板1や実装部品2に対する接合部分でクラック等が発生する場合がある。   Usually, the spherical connecting member 3 is small, and in particular for BGA, it is very small with a diameter of φ0.2 to 0.5 mm. For this reason, since the connection strength of the mounting component mounted on the substrate 1 via the spherical connection member 3 is relatively weak, for example, when stress is applied from the outside such as impact or bending, the mounting component is dropped or the spherical connection member 3 is removed. In some cases, cracks and the like may occur at the joints to the substrate 1 and the mounting component 2 in FIG.

第2実施形態における回路基板Cbは、補強部材5をさらに備えるので、このような外部応力に対し、回路基板Cb全体で外部応力を負担することによって球状接続部材3に応力集中することを低減することができる。このため、第2実施形態における回路基板Cbは、球状接続部材3における基板1や実装部品2に対する接合部分の接続の信頼性をより向上することができる。   Since the circuit board Cb in the second embodiment further includes the reinforcing member 5, stress concentration on the spherical connection member 3 is reduced by bearing external stress on the entire circuit board Cb against such external stress. be able to. For this reason, the circuit board Cb in 2nd Embodiment can improve the reliability of the connection of the junction part with respect to the board | substrate 1 and the mounting components 2 in the spherical connection member 3 more.

本発明を表現するために、上述において図面を参照しながら実施形態を通して本発明を適切且つ十分に説明したが、当業者であれば上述の実施形態を変更および/または改良することは容易に為し得ることであると認識すべきである。したがって、当業者が実施する変更形態または改良形態が、請求の範囲に記載された請求項の権利範囲を離脱するレベルのものでない限り、当該変更形態または当該改良形態は、当該請求項の権利範囲に包括されると解釈される。   In order to express the present invention, the present invention has been properly and fully described through the embodiments with reference to the drawings. However, those skilled in the art can easily change and / or improve the above-described embodiments. It should be recognized that this is possible. Therefore, unless the modifications or improvements implemented by those skilled in the art are at a level that departs from the scope of the claims recited in the claims, the modifications or improvements are not covered by the claims. To be construed as inclusive.

Ca、Cb 回路基板
1 基板
2 実装部品
3 球状接続部材
5 補強部材
Ca, Cb Circuit board 1 Board 2 Mounting component 3 Spherical connection member 5 Reinforcing member

Claims (5)

基板と、
前記基板の一方面に第1接続部材を介して実装され、1または複数の電子部品を含む第1実装部品と、
前記基板の前記一方面に対向する他方面に第2接続部材を介して実装され、1または複数の電子部品を含む第2実装部品とを備え、
前記第1および第2実装部品は、前記第1実装部品の重心と前記第2実装部品の重心とが前記基板における前記一方面または前記他方面の同一法線上に位置するように実装され、
前記第1および第2接続部材は、それぞれ、弾性材料で形成されたコア部材と、導電性材料で形成され前記コア部材の表面を被覆する導電性層とを備えること
を特徴とする回路基板。
A substrate,
A first mounting component mounted on one surface of the substrate via a first connection member and including one or more electronic components;
A second mounting component including one or more electronic components mounted on the other surface of the substrate facing the one surface via a second connection member;
The first and second mounting components are mounted such that the center of gravity of the first mounting component and the center of gravity of the second mounting component are located on the same normal line of the one surface or the other surface of the substrate,
Each of the first and second connecting members includes a core member formed of an elastic material and a conductive layer formed of a conductive material and covering a surface of the core member.
前記第1実装部品の第1周囲または前記第1周囲の一部であって前記第1実装部品と前記基板との間に設けられ、前記第1実装部品と前記基板との接続を補強する第1補強部材、および、前記第2実装部品の第2周囲または前記第2周囲の一部であって前記第2実装部品と前記基板との間に設けられ、前記第2実装部品と前記基板との接続を補強する第2補強部材のうちの少なくとも一方をさらに備えること
を特徴とする請求項1に記載の回路基板。
A first periphery of the first mounting component or a part of the first periphery, provided between the first mounting component and the substrate, for reinforcing the connection between the first mounting component and the substrate. 1 reinforcing member and a second periphery of the second mounting component or a part of the second periphery and provided between the second mounting component and the substrate; and the second mounting component and the substrate The circuit board according to claim 1, further comprising at least one of second reinforcing members that reinforce the connection.
前記第1実装部品の実装面と前記第2実装部品の実装面とは、同形であること
を特徴とする請求項1または請求項2に記載の回路基板。
3. The circuit board according to claim 1, wherein the mounting surface of the first mounting component and the mounting surface of the second mounting component have the same shape.
前記第1実装部品は、前記第1接続部材を持つボールグリッドアレイ(Ball Grid Arry)のパッケージ部品であり、
前記第2実装部品は、前記第2接続部材を持つボールグリッドアレイ(Ball Grid Arry)のパッケージ部品であること
を特徴とする請求項1ないし請求項3のいずれか1項に記載の回路基板。
The first mounting component is a package component of a ball grid array having the first connection member,
The circuit board according to claim 1, wherein the second mounting component is a ball grid array package component having the second connection member.
基板の一方面に第1接続部材を介して、1または複数の電子部品を含む第1実装部品を実装する第1実装工程と、
前記基板の前記一方面に対向する他方面に第2接続部材を介して、1または複数の電子部品を含む第2実装部品を実装する第2実装工程とを備え、
前記第1および第2実装部品は、前記第1実装部品の重心と前記第2実装部品の重心とが前記基板における前記一方面または前記他方面の同一法線上に位置するように実装され、
前記第1および第2接続部材は、それぞれ、弾性材料で形成されたコア部材と、導電性材料で形成され前記コア部材の表面を被覆する導電性層とを備えること
を特徴とする回路基板の製造方法。
A first mounting step of mounting a first mounting component including one or more electronic components on one surface of the substrate via a first connection member;
A second mounting step of mounting a second mounting component including one or a plurality of electronic components on the other surface facing the one surface of the substrate via a second connection member;
The first and second mounting components are mounted such that the center of gravity of the first mounting component and the center of gravity of the second mounting component are located on the same normal line of the one surface or the other surface of the substrate,
Each of the first and second connection members includes a core member formed of an elastic material, and a conductive layer formed of a conductive material and covering the surface of the core member. Production method.
JP2013027101A 2013-02-14 2013-02-14 Circuit board and method for manufacturing the same Pending JP2014157886A (en)

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