JP2014147966A - Joining material, joining method, joining structure, and semiconductor device - Google Patents

Joining material, joining method, joining structure, and semiconductor device Download PDF

Info

Publication number
JP2014147966A
JP2014147966A JP2013019252A JP2013019252A JP2014147966A JP 2014147966 A JP2014147966 A JP 2014147966A JP 2013019252 A JP2013019252 A JP 2013019252A JP 2013019252 A JP2013019252 A JP 2013019252A JP 2014147966 A JP2014147966 A JP 2014147966A
Authority
JP
Japan
Prior art keywords
connected member
joining
bonding material
bonding
melting point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2013019252A
Other languages
Japanese (ja)
Inventor
Takuto Yamaguchi
拓人 山口
Shohei Hata
昌平 秦
Hideyoshi Shimokawa
英恵 下川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2013019252A priority Critical patent/JP2014147966A/en
Publication of JP2014147966A publication Critical patent/JP2014147966A/en
Pending legal-status Critical Current

Links

Images

Abstract

PROBLEM TO BE SOLVED: To provide a joining structure with high reliability which reduces the creep of a joining layers in joining of semiconductor elements.SOLUTION: As a jointing material between two kinds of members 1 and 3, a solder material which consists of at least one or more kinds of metal among Sb, Sn, Bi, and Zn is used in addition to Ag and In, and by joining in a half-molten state at a temperature equal to or higher than the solidus temperature and equal to or lower than the liquidus temperature of the solder material concerned, low melting point components 22 are discharged out of the joining layer. Based on the present process, by making the rate of a high-melting-point phase 21 of the joining layer increase, the creep resistance of a joining layer 2 is improved. The semiconductor element is a power semiconductor or a semiconductor strain sensor element.

Description

本発明は接合材料に関し、また、該接合材料を用いた接合方法、接合構造、および半導体装置に関する。   The present invention relates to a bonding material, and also relates to a bonding method, a bonding structure, and a semiconductor device using the bonding material.

近年、社会インフラや産業用機器、自動車など、装置・部品の状態を把握することにより、製品の安全性向上、性能の最適化を実現するため、様々な物理量を測定するセンサが注目されている。力、光、加速度など、センサの種類は多岐に渡り、その用途も様々である。例えば、橋梁などの大型構造物に多数のひずみセンサを取り付け、ひずみの状態をモニタリングすることで、部材の寿命を把握するとともに、保守性の改善が図られる。   In recent years, sensors that measure various physical quantities are attracting attention in order to improve product safety and optimize performance by grasping the status of devices and parts such as social infrastructure, industrial equipment, and automobiles. . There are various types of sensors, such as force, light, and acceleration, and their uses are also various. For example, by attaching a large number of strain sensors to a large structure such as a bridge and monitoring the state of strain, the life of the member can be grasped and maintainability can be improved.

ひずみセンサとしては、ひずみゲージが一般的であるが、精度・耐久性・耐熱性・省エネ性を確保することが難しい。それら特性を満足する半導体ひずみセンサや、これを応用した圧力センサや振動センサ、加速度センサの開発も進められている。   As a strain sensor, a strain gauge is generally used, but it is difficult to ensure accuracy, durability, heat resistance, and energy saving. Development of semiconductor strain sensors that satisfy these characteristics, and pressure sensors, vibration sensors, and acceleration sensors using the same are also underway.

半導体ひずみセンサは、当該素子を測定対象に接合することで、測定対象の物理量の変化が素子に伝達され、目的の物理量を測定することができる。例えば特許文献1では、ピエゾ抵抗を利用したひずみセンサが開示されている。また、例えば特許文献2では、部材の固有振動数を検出する圧力センサが開示されている。   The semiconductor strain sensor can measure the target physical quantity by transmitting the change in the physical quantity of the measurement target to the element by bonding the element to the measurement target. For example, Patent Document 1 discloses a strain sensor using a piezoresistor. For example, Patent Document 2 discloses a pressure sensor that detects a natural frequency of a member.

一方、センサ以外の分野に着目すると省エネを実現するため、電力を制御するパワー半導体の利用が進んでいる。パワー半導体を利用した製品の構造は、半導体素子がはんだなどの接合材を介して基板に接合された形態である。パワー半導体は近年、高い温度域で用いられるようになってきており、それに伴い、はんだ接合部の高融点化・高信頼化が求められている。   On the other hand, in order to realize energy saving when focusing on fields other than sensors, the use of power semiconductors for controlling electric power is advancing. The structure of a product using a power semiconductor is a form in which a semiconductor element is bonded to a substrate via a bonding material such as solder. In recent years, power semiconductors have been used in a high temperature range, and accordingly, higher melting point and higher reliability of solder joints are required.

特開2006−3182号公報JP 2006-3182 A 特開2012−118057号公報JP 2012-118057 A 特開2005−32834号公報JP 2005-32834 A

ひずみセンサは測定値の経時変化を極小に抑えることが必要である。例えば、あるときにひずみの測定値が1であれば、その後も測定対象のひずみが変化していないのであれば、一定時間経過後にも測定値は1でなければならない。しかし、センサを高温環境にて長時間用いる場合、センサを測定対象に接合する接着剤やはんだなどの接合材にクリープ(物体に持続応力が作用すると、時間の経過とともに歪みが増大する現象)が生じてしまう。例えば、測定対象の真のひずみは1であるにもかかわらず、はんだがクリープし、センサには0.9のひずみとして検知される。このような現象が生じては、センサとしての用をなさなくなる。従って、ひずみセンサの使用条件は、接合材がクリープを起こさないような低温域、ひずみ範囲、時間に制限されることになる。   A strain sensor is required to minimize changes in measured values with time. For example, if the measured value of the strain is 1 at a certain time and the strain to be measured has not changed after that, the measured value must be 1 even after a certain time has elapsed. However, when the sensor is used for a long time in a high temperature environment, creep (bonding phenomenon such as strain increases over time when sustained stress acts on the object) is applied to the bonding material such as adhesive or solder that joins the sensor to the measurement target. It will occur. For example, although the true strain of the object to be measured is 1, the solder creeps and is detected by the sensor as a strain of 0.9. When such a phenomenon occurs, it cannot be used as a sensor. Accordingly, the use conditions of the strain sensor are limited to a low temperature range, a strain range, and a time at which the bonding material does not cause creep.

また、接合材の長期信頼性も重要である。自動車を対象とした製品の場合、過酷な環境である-55℃から150℃の範囲で信頼性を確保する必要がある。温度サイクルに伴う接合材の亀裂伝播とセンサの特性変動を抑制しなければならない。   Also, the long-term reliability of the bonding material is important. In the case of products targeting automobiles, it is necessary to ensure reliability in the harsh environment of -55 ° C to 150 ° C. It is necessary to suppress the crack propagation of the joint material and the sensor characteristic variation with the temperature cycle.

以上のような耐クリープ性(ひずみセンサの実用温度範囲で接合材のクリープを小さく抑える特性)と長期信頼性を満たす接合材・接合技術が必要である。そのような接合材としては、一般に高融点の接合材が適切と考えられる。しかし、接合温度が500℃を超えると、半導体の性能が変化してしまうため、適当ではない。また、高温で接合してから室温に冷却するときに素子に発生する熱応力で、素子が割れない材料とする必要がある。   There is a need for joint materials and joining technologies that satisfy the above-mentioned creep resistance (characteristics that keep the creep of joint materials small within the practical temperature range of strain sensors) and long-term reliability. Generally, a high melting point bonding material is considered appropriate as such a bonding material. However, if the junction temperature exceeds 500 ° C., the performance of the semiconductor changes, which is not appropriate. In addition, it is necessary to use a material that does not crack the element due to thermal stress generated in the element when it is cooled to room temperature after bonding at a high temperature.

特許文献3に記載の接合技術においては、基板の表面に銅、銅合金、銀のうちいずれかの金属材で形成した配線層上にスズ、亜鉛、インジウムのいずれかの低融点金属材よりなる低融点金属層を設け、低融点金属材の融点以上の温度で圧力を加えつつ一定時間保持することで低融点層を配線層に拡散させ配線層の金属を主成分とする接合技術が開示されている。本技術は、低融点層の成膜が高コストであり、接合に時間がかかるという問題がある。また、低融点金属が配線層内に拡散していくことにより、低融点層から配線層にかけて、金属組成の濃度勾配が発生し、信頼性低下の懸念がある。   In the joining technique described in Patent Document 3, the substrate is made of a low melting point metal material of tin, zinc, or indium on a wiring layer formed of a metal material of copper, copper alloy, or silver on the surface of the substrate. Disclosed is a bonding technique in which a low-melting-point metal layer is provided and the low-melting-point metal layer is diffused into the wiring layer by holding the pressure at a temperature equal to or higher than the melting point of the low-melting-point metal material for a certain period of time to diffuse the low-melting-point layer into the wiring layer. ing. This technique has a problem that the low melting point layer is expensive to be formed and it takes a long time to join. Further, the diffusion of the low melting point metal into the wiring layer causes a concentration gradient of the metal composition from the low melting point layer to the wiring layer, and there is a concern that reliability may be lowered.

本発明の課題は、低コスト且つ接合性および接合信頼性を向上させた低クリープ接合材料およびその接合材料を用いた接合方法、接合構造、および半導体装置を提供することにある。   SUMMARY OF THE INVENTION An object of the present invention is to provide a low creep bonding material that is low in cost and improved in bonding property and bonding reliability, a bonding method using the bonding material, a bonding structure, and a semiconductor device.

上記課題を解決するために本発明では、AgとInを含み、Sb、Sn、Bi、およびZnのうち少なくとも一種類以上の金属を含み、残部が不可避不純物からなるPbフリー接合材を、(Agの重量):(Inの重量):(Sb+Sn+Bi+Znの合計重量)の比が三元状態図上にて(70:27:3)、(70:5:25)、(10:2:88)、(10:45:45)の各点を結ぶ四角形の内側の領域の組成とした。   In order to solve the above-described problems, the present invention provides a Pb-free bonding material containing Ag and In, containing at least one kind of metal of Sb, Sn, Bi, and Zn, and the balance being inevitable impurities (Ag The ratio of (weight of In) :( In weight) :( total weight of Sb + Sn + Bi + Zn) is (70: 27: 3), (70: 5: 25), (10 : 2: 88), (10:45:45), the composition of the area inside the square connecting the points.

また、上記課題を解決するために本発明では、前記接合材を、第一の被接続部材と第二の被接続部材の間に挟持し、当該接合材の固相線温度以上、且つ、液相線温度以下の温度に加熱することで接合する接合方法とした。   Further, in order to solve the above-described problem, in the present invention, the bonding material is sandwiched between a first connected member and a second connected member, and the liquid temperature is equal to or higher than the solidus temperature of the bonding material. It was set as the joining method joined by heating to the temperature below phase wire temperature.

また、上記課題を解決するために本発明では、前記接合方法を用いて、第一の被接続部材を上層に、前記第一の被接続部材より面積の大きい第二の被接続部材を下層に接合し、前記第二の被接続部材の上面に前記第一の被接続部材の直下の接合部から外へ前記接合材の低融点相を濡れ広がらせて接合を完了させて、前記第一の被接続部材の直下の接合部に含まれる前記接合材の低融点相/高融点相の体積比率に対して、前記第一の被接続部材直下からはみ出した前記接合材における低融点相/高融点相の体積比率が大きいことを特徴とする接合構造を構成した。   In order to solve the above problems, in the present invention, the first connected member is used as an upper layer, and the second connected member having a larger area than the first connected member is used as a lower layer using the joining method. Bonding, and spreading the low melting point phase of the bonding material on the upper surface of the second connected member from the bonding portion directly below the first connected member to complete the bonding, With respect to the volume ratio of the low melting point phase / high melting point phase of the bonding material contained in the bonding portion immediately below the connected member, the low melting point phase / high melting point of the bonding material protruding from directly below the first connected member A junction structure characterized by a large volume ratio of phases was constructed.

また、上記課題を解決するために本発明では、前記接合構造において、前記第一の被接続部材を半導体ひずみセンサ素子として、前記第二の接続部材をダイヤフラムとして、前記半導体ひずみセンサ素子が、前記ダイヤフラムの反対面側に加わる圧力の変化に従ってダイヤフラムを介して歪むことによって、圧力の変化を電気信号に変換する半導体装置を構成した。   In order to solve the above problems, in the present invention, in the joining structure, the first connected member is a semiconductor strain sensor element, the second connecting member is a diaphragm, and the semiconductor strain sensor element is A semiconductor device that converts a change in pressure into an electric signal by distorting the diaphragm through a change in accordance with a change in pressure applied to the opposite surface of the diaphragm was configured.

本発明によれば、接合層の耐クリープ性の高い半導体装置を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device with high creep resistance of a joining layer can be provided.

本発明の接合方法で接合した半導体装置の構造を示す図である。It is a figure which shows the structure of the semiconductor device joined by the joining method of this invention. 本発明のはんだ組成の割合を示す図である。実線領域内が本発明の接合方法が成立する組成の範囲内であり、点線領域内が低ボイド接合を実現可能な範囲を示す。It is a figure which shows the ratio of the solder composition of this invention. The inside of the solid line area is within the range of the composition in which the joining method of the present invention is established, and the inside of the dotted line area shows a range where low void joining can be realized. 実施例2で用いたサンプルNo.1~No.28の本発明のはんだ組成を示す図である。FIG. 4 is a diagram showing the solder composition of the present invention for samples No. 1 to No. 28 used in Example 2. 図3に示したはんだ組成と比較例に対して、接合温度とクリープ特性を評価した結果を示す図である。It is a figure which shows the result of having evaluated joining temperature and a creep characteristic with respect to the solder composition shown in FIG. 3, and a comparative example. 本発明のAg-In-Sbはんだを固相線温度以上である450℃まで加熱し接合したサンプルの断面組織を示す図である。It is a figure which shows the cross-sectional structure | tissue of the sample which heated and joined Ag-In-Sb solder of this invention to 450 degreeC which is more than solidus temperature. 本発明のAg-In-Sbはんだを液相線温度以上の500℃まで加熱し接合したサンプルの断面組織を示す図である。It is a figure which shows the cross-sectional structure | tissue of the sample which heated and joined the Ag-In-Sb solder of this invention to 500 degreeC more than liquidus temperature. 本発明の接合材および接合方法で半導体素子と応力緩和材と基板を接合した半導体装置の構造を示す図である。It is a figure which shows the structure of the semiconductor device which joined the semiconductor element, the stress relaxation material, and the board | substrate with the joining material and joining method of this invention. 本発明の接合材および接合方法で、半導体ひずみセンサチップとダイヤフラムを接合した半導体装置(圧力センサモジュール)の構造を示す図である。It is a figure which shows the structure of the semiconductor device (pressure sensor module) which joined the semiconductor strain sensor chip and the diaphragm with the joining material and joining method of this invention. Ag-In-Sbはんだの状態図例を示す図である。It is a figure which shows the example of a state diagram of Ag-In-Sb solder.

以下、本発明の実施の形態を図面に基づいて詳細に説明する。なお、実施の形態を説明するための全図において、同一部材には原則として同一の符号を付し、その繰り返しの説明は省略する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

本願発明者は、耐クリープ高信頼はんだの候補として主たる構成元素がAgであるAg系合金に着目した。Agは融点が962℃であり、半導体用の接合材としては融点が高すぎ、また、純金属はクリープしやすいため、耐クリープ性が優れた接合材としては不適当である。しかし、AgにInを混ぜたAg-In固溶体合金とすることで固相線温度が700℃程度まで下がり、且つ、耐クリープ性が向上することを見出した。それでも、接合温度が700℃を超えては半導体素子の耐熱限界を超え、接合に適用できない。そこで、Sb、Sn、Bi、Znを添加することで固相線温度を500℃以下にまで低下でき、半導体が故障しない温度域で接合できることを見出した。すなわち、AgおよびInおよび、Sb、Sn、Bi、Znの中から少なくとも1種類以上の金属と不可避不純物(工業上避けられない混入物)からなるPbフリーAg-In-(Sb+Sn+Bi+Zn)はんだ材を、後述する実験結果に基づき耐クリープ性に優れた接合材として見出した。(Sb+Sn+Bi+Zn)は、Sb、Sn、Bi、Znの中から少なくとも1種類以上の金属を表す。   The inventor of the present application has focused attention on an Ag-based alloy whose main constituent element is Ag as a candidate for a creep-resistant and highly reliable solder. Ag has a melting point of 962 ° C., and has a melting point that is too high as a bonding material for semiconductors. Further, pure metal is easy to creep, and is therefore unsuitable as a bonding material with excellent creep resistance. However, it has been found that by using an Ag—In solid solution alloy in which Ag is mixed with In, the solidus temperature is lowered to about 700 ° C. and the creep resistance is improved. Nevertheless, if the junction temperature exceeds 700 ° C., it exceeds the heat resistance limit of the semiconductor element and cannot be applied to the junction. Thus, it has been found that by adding Sb, Sn, Bi, and Zn, the solidus temperature can be lowered to 500 ° C. or less, and bonding can be performed in a temperature range in which the semiconductor does not fail. That is, Pb-free Ag-In- (Sb + Sn + Bi + consisting of at least one metal and inevitable impurities (contaminants that are unavoidable industrially) from Ag and In and Sb, Sn, Bi, Zn The Zn) solder material was found as a bonding material having excellent creep resistance based on the experimental results described later. (Sb + Sn + Bi + Zn) represents at least one metal selected from Sb, Sn, Bi, and Zn.

半導体素子1を基板3へ本発明のAg-In-(Sb+Sn+Bi+Zn)はんだ材2により接合する方法について述べる。図1に接合後の構造模式図を示す。上述したAg-In-(Sb+Sn+Bi
+Zn)はんだ2のシートを用意する。基板3と当該はんだ2と半導体素子1とおもりを積み重ねる。はんだの温度が固相線温度以上液相線温度以下となるように温度設定したリフロー炉に流し、はんだ2を溶融させる。
A method of joining the semiconductor element 1 to the substrate 3 with the Ag—In— (Sb + Sn + Bi + Zn) solder material 2 of the present invention will be described. FIG. 1 shows a structural schematic diagram after bonding. Ag-In- (Sb + Sn + Bi
+ Zn) Prepare a sheet of solder 2. The substrate 3, the solder 2, and the semiconductor element 1 are stacked. The solder 2 is melted by flowing in a reflow furnace set so that the temperature of the solder is not lower than the solidus temperature and not higher than the liquidus temperature.

図9に、Ag-In-Sbはんだの状態図例(P.Villars, et.al.,”Handbook of Ternary Alloy Phase Diagrams”, ASM international, vol. 3, p2490 ISBN: 0-87170-528-1より参照)を示す。ライン100上の組成(Ag-25In-25Sbはんだ)の場合には、424℃(固相線)で溶け始めて、466℃(液相線)で溶け終わる。   FIG. 9 shows an example of a phase diagram of Ag-In-Sb solder (P. Villars, et.al., “Handbook of Ternary Alloy Phase Diagrams”, ASM international, vol. 3, p2490 ISBN: 0-87170-528-1 See more). In the case of the composition on the line 100 (Ag-25In-25Sb solder), it starts to melt at 424 ° C. (solid phase line) and ends at 466 ° C. (liquid phase line).

はんだの温度が固相線温度以上液相線温度以下となるような温度設定とすることで、当該Ag-In-(Sb+Sn+Bi+Zn)はんだ2の低融点相22が、半導体素子1の直下から外に濡れ広がり、一部が流出する。結果的に半導体素子1直下の接合層9における高融点相21の割合が当初のはんだ材2に含まれる高融点相よりも多くなる。つまり、半導体素子が故障しない温度域で接合が可能で、接合後は接合層9の耐クリープ性が当初のはんだ材2(固溶体と金属間化合物と共晶が共存している)よりも向上する。ここで、高融点相21とは、AgにInが固溶した相と、In-Sb化合物の相であり、低融点相22とは、Ag-In-(Sb+Sn+Bi+Zn)はんだの各金属が混じり合った融点の低い共晶相である。   By setting the temperature so that the temperature of the solder is not less than the solidus temperature and not more than the liquidus temperature, the low melting point phase 22 of the Ag-In- (Sb + Sn + Bi + Zn) solder 2 becomes a semiconductor element. It spreads out from directly under 1, and a part flows out. As a result, the ratio of the high melting point phase 21 in the bonding layer 9 immediately below the semiconductor element 1 is larger than that of the high melting point phase included in the initial solder material 2. In other words, bonding is possible in a temperature range where the semiconductor element does not fail, and after bonding, the creep resistance of the bonding layer 9 is improved as compared with the original solder material 2 (solid solution, intermetallic compound and eutectic coexist). . Here, the high melting point phase 21 is a phase in which In is dissolved in Ag and a phase of an In-Sb compound, and the low melting point phase 22 is an Ag-In- (Sb + Sn + Bi + Zn) solder. It is a eutectic phase with a low melting point in which the metals are mixed.

接合雰囲気は、窒素、窒素+水素、または、蟻酸など、様々な雰囲気で接合が可能である。また、接合装置については、リフロー以外にも、当該はんだをリボンやワイヤ状に加工することで、ダイボンダーを用いて接合することができる。即ち、加熱した基板に当該はんだリボン・ワイヤを押し当てることで、基板上にはんだを供給し、その後チップをマウントする方法を採ることができる。本方式では加熱時間が短くなり、低融点相の排出が不十分になる場合には、その後追加のリフローを実施してもよい。   The bonding atmosphere can be various atmospheres such as nitrogen, nitrogen + hydrogen, or formic acid. In addition to reflow, the bonding apparatus can be bonded using a die bonder by processing the solder into a ribbon or wire shape. That is, by pressing the solder ribbon wire against the heated substrate, the solder can be supplied onto the substrate and then the chip can be mounted. In this method, when the heating time is shortened and the low melting point phase is insufficiently discharged, an additional reflow may be performed thereafter.

本実施例のAg-In-(Sb+Sn+Bi+Zn)はんだ材料の組成について詳しく述べる。後述する実験結果に基づいて、図2の三元状態図にAg、InとSb、Sn、Bi、Znの適正な割合を示す。上述した接合を実現するため、図2の実線(101,102,103,104)で囲まれる範囲内の組成のはんだが適切である。即ち、重量比でAg:In:(Sb+Sn+Bi+Zn)が(70:27:3)、(70:5:25)、(10:2:88)、(10:45:45)の点を結ぶ四角形の内側の組成である。本組成範囲内であれば、固相線温度が160℃から490℃となり、半導体素子を破壊することなく接合できる。   The composition of the Ag—In— (Sb + Sn + Bi + Zn) solder material of this example will be described in detail. Based on the experimental results described later, the proper ratio of Ag, In and Sb, Sn, Bi, Zn is shown in the ternary phase diagram of FIG. In order to realize the above-described joining, a solder having a composition within the range surrounded by the solid lines (101, 102, 103, 104) in FIG. 2 is appropriate. That is, Ag: In: (Sb + Sn + Bi + Zn) by weight ratio is (70: 27: 3), (70: 5: 25), (10: 2: 88), (10:45:45) It is a composition inside the rectangle which connects the points. Within this composition range, the solidus temperature becomes 160 ° C. to 490 ° C., and bonding can be performed without destroying the semiconductor element.

図2の実線の境界線101より上の領域(1)では、さらにAgの割合が高くなり、融点が550℃を超えて、半導体素子が破壊される温度域に達する。また、境界線102より右側の領域(2)では、Inの量が少なすぎてAgにInが十分に固溶しないため、耐クリープ特性が悪くなる。また、境界線103より下側の領域(3)では、高融点のAgの量が少なすぎて耐クリープ特性が得られない。また、境界線104より左側の領域(4)では、Inの量が多すぎて低融点の高クリープ相が発生して、所望の耐クリープ特性が得られない。以上の判定によって、境界線(101,102,103,104)を定めている。   In the region (1) above the boundary line 101 of the solid line in FIG. 2, the proportion of Ag is further increased, the melting point exceeds 550 ° C., and the temperature region where the semiconductor element is destroyed is reached. Further, in the region (2) on the right side of the boundary line 102, since the amount of In is too small and In does not sufficiently dissolve in Ag, the creep resistance is deteriorated. Further, in the region (3) below the boundary line 103, the amount of high melting point Ag is too small to obtain the creep resistance. Further, in the region (4) on the left side of the boundary line 104, the amount of In is too large, and a high creep phase with a low melting point is generated, and desired creep resistance characteristics cannot be obtained. Based on the above determination, the boundary lines (101, 102, 103, 104) are determined.

さらに、生じる液相の量が一定以上なければ接合時にボイドが多く発生し、耐クリープ性が低下する。従って、液相が十分生じ、耐クリープ特性が低下しないボイド率10%以下の良好な接合を得るためには、図2の三元状態図の点線範囲内の組成がより適切である。即ち、重量比でAg:In:(Sb+Sn+Bi+Zn)が(60:30:10)、(60:15:25)、(15:15:70)、(15:43:42)の点を結ぶ四角形の内側の組成である。その中で、Sb+Sn+Bi+Znの割合について、Sbが80〜100wt.%、Sn+Bi+Znが0〜20wt.%の場合、固相線温度が400℃以上となり、耐クリープ性が最大となる。   Further, if the amount of the generated liquid phase is not more than a certain level, a lot of voids are generated at the time of joining, and the creep resistance is lowered. Therefore, in order to obtain a good bond having a void ratio of 10% or less, in which a liquid phase is sufficiently generated and the creep resistance is not deteriorated, the composition within the dotted line range of the ternary phase diagram of FIG. 2 is more appropriate. That is, Ag: In: (Sb + Sn + Bi + Zn) by weight ratio is (60:30:10), (60:15:25), (15:15:70), (15:43:42) It is a composition inside the rectangle which connects the points. Among them, regarding the ratio of Sb + Sn + Bi + Zn, when Sb is 80-100 wt.% And Sn + Bi + Zn is 0-20 wt.%, The solidus temperature becomes 400 ° C or more, and the creep resistance Is the maximum.

はんだ材料の供給形態について述べる。当該Ag-In-(Sb+Sn+Bi+Zn)はんだ材料は上述したようにシート・リボン・ワイヤなどの形態で供給できる。さらに、ボール状の合金を作り、はんだペーストとして供給することもできる。その際、Ag-In-(Sb+Sn+Bi+Zn)はんだボールとしても良いが、Ag粒子とIn-(Sb+Sn+Bi+Zn)粒子の二種類を混合したペーストとしても良い。その場合は、In-(Sb+Sn+Bi+Zn)粒子が先に溶融し、Ag粒子を徐々に溶かし、最終的にAg-In-(Sb+Sn+Bi+Zn)はんだとして振る舞う。   The supply form of the solder material will be described. The Ag-In- (Sb + Sn + Bi + Zn) solder material can be supplied in the form of a sheet, a ribbon, a wire or the like as described above. Furthermore, a ball-shaped alloy can be made and supplied as a solder paste. At this time, Ag-In- (Sb + Sn + Bi + Zn) solder balls may be used, or a paste in which two kinds of Ag particles and In- (Sb + Sn + Bi + Zn) particles are mixed may be used. In that case, In- (Sb + Sn + Bi + Zn) particles are melted first, Ag particles are gradually dissolved, and finally behave as Ag-In- (Sb + Sn + Bi + Zn) solder.

被接合材である基板について述べる。当該Ag-In-(Sb+Sn+Bi+Zn)はんだ材は各種金属に対して良好な接合を得ることができる。例えば、Cu、Ni、Au、Ag、Ti、SUS、Mo、W、Fe、Fe-Ni合金などである。特に基板との濡れ性の観点ではNi板もしくは、Niめっきを施した金属板との濡れ性が優れる。接合安定性の観点ではCu板もしくは、Cuめっきを施した金属板との接合が良好である。Cuと基板の間に拡散防止層としてTi、Wなどの下地層を形成しても良い。また、アルミナ、窒化アルミニウム、窒化ケイ素などのセラミックスとの接合も可能である。   A substrate which is a material to be bonded will be described. The Ag—In— (Sb + Sn + Bi + Zn) solder material can obtain good bonding to various metals. For example, Cu, Ni, Au, Ag, Ti, SUS, Mo, W, Fe, Fe—Ni alloy and the like. In particular, from the viewpoint of wettability with the substrate, wettability with a Ni plate or a metal plate plated with Ni is excellent. From the viewpoint of bonding stability, bonding with a Cu plate or a metal plate plated with Cu is good. An underlayer such as Ti or W may be formed as a diffusion preventing layer between Cu and the substrate. Also, bonding with ceramics such as alumina, aluminum nitride, and silicon nitride is possible.

一方、当該Ag-In-(Sb+Sn+Bi+Zn)はんだ材はクリープし難いはんだ材であり、言い換えると、伸びにくい材料である。従って、熱膨張係数の小さな半導体素子を接合するとき、基板の熱膨張係数が大きい場合は、接合し冷却するときの熱応力で半導体素子が割れる可能性がある。その場合、基板に低熱膨張材料を用いること、もしくは、低熱膨張中間材を用いることが望ましく、低熱膨張材の例としてSUSやMo、W、Fe-Ni系合金が挙げられる。他にも、SUSとMoを積層した多層クラッド基板でも良い。このような当該はんだ材とこれら金属板との濡れ性を改善するためには、表面にCuやNiのメタライズを付与してもよい。   On the other hand, the Ag—In— (Sb + Sn + Bi + Zn) solder material is a solder material that hardly creeps, in other words, a material that does not easily stretch. Therefore, when bonding a semiconductor element having a small coefficient of thermal expansion, if the substrate has a large coefficient of thermal expansion, the semiconductor element may break due to thermal stress when bonded and cooled. In that case, it is desirable to use a low thermal expansion material or a low thermal expansion intermediate material for the substrate, and examples of the low thermal expansion material include SUS, Mo, W, and Fe—Ni alloys. In addition, a multilayer clad substrate in which SUS and Mo are laminated may be used. In order to improve the wettability between the solder material and the metal plate, Cu or Ni metallization may be applied to the surface.

本実施例は図1に示す接合構造を種々の組成のAg-In-(Sb+Sn+Bi+Zn)はんだ材を使用して作製したものである。作製したAg-In-(Sb+Sn+Bi+Zn)はんだ材の例を図3に示す。Ag、In、Sb、Sb、Bi、Znの各金属を図中の黒丸で示した組成になるように混合し、960℃以上まで昇温し溶解させ、インゴットNo.1〜28(図3中の黒丸に付した番号に対応する)を作製した。Sb+Sn+Bi+Znの各金属の割合は、Sb100%、Sn100%、Bi100%、Zn100%の4系統、計112種類の組成を作製した。インゴットは圧延によりシート状に加工し、はんだとして用いた。基板3はSUS420にTi、Cuを順に成膜したものを用いた。該基板3と各種類のはんだと2mm□の半導体ひずみセンサチップ1、または、パワー半導体チップ1を積み重ねた。窒素+水素混合雰囲気において、各々の固相線温度以上かつ液相線温度以下の温度である。200℃〜490℃まで昇温し、はんだを溶融させ、1min以上加熱保持した。当該温度域で溶融する低融点相22が加熱保持中に半導体1直下の接合層9から基板上に濡れ広がり、流出することを確認した。半導体ひずみセンサチップ1を接合したサンプルについて、180℃環境下にてセンサチップを用いてクリープ特性を調査した。代表としてAg-In-Sbはんだにおける試験結果を図4に示す。その結果、500μひずみを付加しながら180℃で100h保持したところ、クリープ測定値の変動が0.1%以下となり、良好な特性を得ることができた。図4に示したSbを使った接合材のほか、Sn、Bi、Znで作製した接合材を用いても同様の結果が得られることを確認した。   In this example, the joint structure shown in FIG. 1 is produced using Ag—In— (Sb + Sn + Bi + Zn) solder materials having various compositions. An example of the produced Ag-In- (Sb + Sn + Bi + Zn) solder material is shown in FIG. Ag, In, Sb, Sb, Bi and Zn metals were mixed so as to have the composition indicated by the black circles in the figure, and heated to 960 ° C. or higher and dissolved, and ingot Nos. 1 to 28 (in FIG. 3). Corresponding to the numbers attached to the black circles). The ratio of each metal of Sb + Sn + Bi + Zn was 4 types of Sb100%, Sn100%, Bi100%, and Zn100%, and 112 kinds of compositions were produced in total. The ingot was processed into a sheet by rolling and used as solder. As the substrate 3, a SUS420 film formed of Ti and Cu in this order was used. The substrate 3, various types of solder, and a 2 mm □ semiconductor strain sensor chip 1 or a power semiconductor chip 1 were stacked. In a nitrogen + hydrogen mixed atmosphere, the temperature is higher than the respective solidus temperature and lower than the liquidus temperature. The temperature was raised to 200 ° C. to 490 ° C., the solder was melted, and heated and held for 1 min or more. It was confirmed that the low melting point phase 22 melted in the temperature range spreads out from the bonding layer 9 immediately below the semiconductor 1 on the substrate while being heated and flows out. About the sample which joined the semiconductor strain sensor chip 1, the creep characteristic was investigated using the sensor chip in 180 degreeC environment. As a representative, the test result in Ag-In-Sb solder is shown in FIG. As a result, when it was held at 180 ° C. for 100 hours while adding 500 μ strain, the fluctuation of the creep measurement value was 0.1% or less, and good characteristics could be obtained. In addition to the bonding material using Sb shown in FIG. 4, it was confirmed that the same results were obtained even when using a bonding material made of Sn, Bi, and Zn.

比較のために、SUS420にNiめっきを成膜した基板と半導体ひずみセンサチップをAu-Sn共晶はんだ、Sn-Ag-Cuはんだを用いて接合したサンプルを用意した。同様のクリープ試験をしたところ、3%を超えるひずみ変化が測定され、半導体ひずみセンサチップを基板に接合する接合材としての機能が不十分であった。   For comparison, a sample was prepared by joining a substrate obtained by forming a Ni plating film on SUS420 and a semiconductor strain sensor chip using Au—Sn eutectic solder and Sn—Ag—Cu solder. When the same creep test was performed, a strain change exceeding 3% was measured, and the function as a bonding material for bonding the semiconductor strain sensor chip to the substrate was insufficient.

また、本発明のAg-In-(Sb+Sn+Bi+Zn)はんだ材を使用して液相線温度以上の温度で接合をした場合、はんだは綺麗に塗れ広がるものの、素子直下の接合層と接合層外の組成は当初のはんだ組成と同じにしかならず、接合層直下のみの耐クリープ性改善効果は得られなかった。一例として、図5にAg-In-Sbはんだを用い、本発明における固相線温度以上液相線温度以下で接合したサンプルの接合層断面組織と、図6に、同じはんだで液相線温度以上で接合したサンプルの接合層断面組織を示す。図6では低融点相であるAg-In-Sb共晶相が接合断面の約60%の領域で見られるが、図5ではAg-In固溶体相とIn-Sb金属間化合物相がほぼ100%を占める。図5の組織の方が耐クリープ性が良好であることを確認した。   In addition, when the Ag-In- (Sb + Sn + Bi + Zn) solder material of the present invention is used for bonding at a temperature higher than the liquidus temperature, the solder spreads cleanly, but the bonding layer directly under the device The composition outside the joining layer was only the same as the initial solder composition, and the effect of improving the creep resistance just under the joining layer was not obtained. As an example, FIG. 5 shows a cross-sectional structure of a bonding layer of a sample in which Ag—In—Sb solder is used and bonded at a temperature higher than the solidus temperature and lower than the liquidus temperature in the present invention, and FIG. The bonding layer cross-sectional structure of the sample bonded as described above is shown. In FIG. 6, the Ag—In—Sb eutectic phase, which is a low melting point phase, can be seen in the region of about 60% of the bonded cross section, but in FIG. 5, the Ag—In solid solution phase and the In—Sb intermetallic compound phase are almost 100%. Occupy. It was confirmed that the structure of FIG. 5 had better creep resistance.

以上のように、Ag-In-(Sb+Sn+Bi+Zn)はんだは高温環境下においてもクリープが抑制され、耐クリープはんだとして有益であることが判った。   As described above, it has been found that Ag—In— (Sb + Sn + Bi + Zn) solder is useful as a creep-resistant solder because creep is suppressed even in a high temperature environment.

実施例2で示したAg-In-(Sb+Sn+Bi+Zn)はんだのうち、Sb+Sn+Bi+Znの構成比に占めるSbまたはZnの割合が50%を超えるはんだの場合、固相線温度が300℃以上となる。その場合、接合する半導体素子のサイズによって、特に150μm以上の厚みの場合は、接合後の冷却で発生する熱応力で半導体素子が割れることが判った。そこで、図7に示すようにSUS(ステンレス鋼)またはAlの基板3と、Fe-Ni合金板、Mo、W、またはCIC(Cu/インバー/Cuクラッド材)(シリコンウエハー、セラミックとの熱膨張の整合性に富む半導体用クラッド材)の低熱膨張材4を本発明のAg-In-(Sb+Sn+Bi+Zn)はんだ2で接合し、さらに低熱膨張材4と半導体素子1を本発明のはんだ2で接合した。このとき、応力緩和層として機能する低熱膨張材4の寸法は半導体素子1のサイズよりも大きくすることで、固相線温度以上液相線温度以下に保持した時に本発明のはんだの低融点相22が素子直下から溶出され、半導体素子1直下の接合層9に含まれる高融点相21の割合を増加させ、耐クリープ性が改善することを確認した。同様に、基板3と低熱膨張材4の接合層10においても、高融点相21の割合を増加させ、耐クリープ性が改善されることを確認した。   Of the Ag-In- (Sb + Sn + Bi + Zn) solder shown in Example 2, when the proportion of Sb or Zn in the composition ratio of Sb + Sn + Bi + Zn exceeds 50%, The phase line temperature becomes 300 ° C or higher. In that case, depending on the size of the semiconductor element to be bonded, it was found that the semiconductor element was cracked by the thermal stress generated by cooling after bonding, particularly in the case of a thickness of 150 μm or more. Therefore, as shown in FIG. 7, the thermal expansion of the SUS (stainless steel) or Al substrate 3 and the Fe-Ni alloy plate, Mo, W, or CIC (Cu / Invar / Cu clad material) (silicon wafer, ceramic). The low thermal expansion material 4 of the semiconductor clad material having a high degree of consistency) is joined with the Ag-In- (Sb + Sn + Bi + Zn) solder 2 of the present invention, and the low thermal expansion material 4 and the semiconductor element 1 are further combined. Joined with 2 solder. At this time, the size of the low thermal expansion material 4 functioning as a stress relaxation layer is made larger than the size of the semiconductor element 1, so that the low melting point phase of the solder of the present invention is maintained when the temperature is kept above the solidus temperature and below the liquidus temperature. It was confirmed that 22 was eluted from directly under the element, and the ratio of the high melting point phase 21 contained in the bonding layer 9 immediately under the semiconductor element 1 was increased to improve the creep resistance. Similarly, in the bonding layer 10 of the substrate 3 and the low thermal expansion material 4, it was confirmed that the ratio of the high melting point phase 21 was increased and the creep resistance was improved.

また、図1に示した基板3をSUSまたはAlの基板と低熱膨張材であるFe-Ni系合金、Mo、またはWの基板とを張り合わせた基板として作製した。この基板はクラッド圧延により製造した。本低熱膨張材クラッド基板と本発明のはんだと半導体素子を接合したところ、接合温度が300℃以上である組成にも拘わらず、冷却時に発生する熱応力を緩和でき、チップ割れを抑制できることが判った。クリープ試験を実施したところ、180℃,100hで0.1%以下の特性が得られることが判った。さらに、-55/150℃の温度サイクル試験を実施したところ、1000cyc後も特性変化が無いことが判った。   Further, the substrate 3 shown in FIG. 1 was manufactured as a substrate in which a SUS or Al substrate and a low thermal expansion material Fe—Ni alloy, Mo, or W substrate were bonded together. This substrate was manufactured by clad rolling. When this low thermal expansion material clad substrate, the solder of the present invention, and a semiconductor element were joined, it was found that, despite the composition having a joining temperature of 300 ° C. or higher, the thermal stress generated during cooling can be alleviated and chip cracking can be suppressed. It was. When the creep test was carried out, it was found that characteristics of 0.1% or less were obtained at 180 ° C and 100h. Furthermore, when a temperature cycle test at -55 / 150 ° C. was performed, it was found that there was no change in characteristics even after 1000 cyc.

以上のように、低熱膨張材を利用することで厚さが厚いチップをチップ割れなく接合できる。   As described above, by using the low thermal expansion material, a thick chip can be joined without chip cracking.

本発明のはんだを用いて半導体ひずみセンサチップを接続して、図8(A),(B)に示す圧力センサモジュールに適用することができる。
図8(A)に断面図を示す圧力センサモジュールは、例えば自動車の油圧系の配管などに接続されて、ダイヤフラム4,5上に接続された半導体ひずみセンサチップ1が、油圧の変化に従ってダイヤフラム4,5を介して歪むことによって、圧力の変化を電気信号に変換している。
The semiconductor strain sensor chip is connected using the solder of the present invention, and can be applied to the pressure sensor module shown in FIGS.
The pressure sensor module whose sectional view is shown in FIG. 8 (A) is connected to, for example, a hydraulic system piping of an automobile, and the semiconductor strain sensor chip 1 connected on the diaphragms 4 and 5 is connected to the diaphragm 4 according to the change in hydraulic pressure. , 5, the pressure change is converted into an electrical signal.

図8(B)に、半導体ひずみセンサチップ1を本発明のはんだ2により接続した接続部の拡大図を示す。はんだは一例としてAg-In-Sbはんだの場合で述べる。試作をするために、2mm□の半導体ひずみセンサチップと、Ag-In-Sbはんだと、SUSダイヤフラムと、SUS/Moを積層したクラッド基板ダイヤフラムとSUS/42Alloyを積層したクラッド基板ダイヤフラムとCIC基板を用意した。試作をした構造は二種類である。
一つはSUSダイヤフラムとAg-In-SbはんだとCIC基板とAg-In-Sbはんだとチップを順に重ねるものである。図7に示すように、低熱膨張材4を半導体素子1とダイヤフラム5の間に応力緩和層として挟んだ構造である。
もう一つは、SUS/Moを積層したクラッド基板ダイヤフラム4,5、またはSUS/42Alloyを積層したクラッド基板ダイヤフラム4,5とAg-In-Sbはんだと半導体ひずみセンサチップ1をそれぞれ順に重ねた構造である。
FIG. 8B shows an enlarged view of a connection portion in which the semiconductor strain sensor chip 1 is connected by the solder 2 of the present invention. As an example, the case of Ag-In-Sb solder will be described. To make a prototype, a 2 mm square semiconductor strain sensor chip, an Ag-In-Sb solder, a SUS diaphragm, a clad substrate diaphragm laminated with SUS / Mo, a clad substrate diaphragm laminated with SUS / 42Alloy, and a CIC substrate Prepared. There are two types of prototype structures.
One is a stack of SUS diaphragm, Ag-In-Sb solder, CIC substrate, Ag-In-Sb solder and chip in order. As shown in FIG. 7, the low thermal expansion material 4 is sandwiched between the semiconductor element 1 and the diaphragm 5 as a stress relaxation layer.
The other is a structure in which the clad substrate diaphragm 4,5 laminated with SUS / Mo, or the clad substrate diaphragm 4,5 laminated with SUS / 42Alloy, Ag-In-Sb solder, and semiconductor strain sensor chip 1 are sequentially stacked. It is.

1gの重りを載せて窒素+水素雰囲気中で、固相線温度以上液相線温度以下である450℃まで加熱し3min保持して接合した。CIC基板と低熱膨張クラッド基板ダイヤフラムの効果によりそれぞれチップ割れを抑制できた。   A 1 g weight was placed and heated in a nitrogen + hydrogen atmosphere to 450 ° C., which is not lower than the solidus temperature and not higher than the liquidus temperature, and held for 3 minutes for bonding. Chip cracking can be suppressed by the effect of CIC substrate and low thermal expansion clad substrate diaphragm, respectively.

さらに、半導体ひずみセンサチップ1上の電極とプリント基板7をワイヤボンディング6により接続し、中高圧用圧力センサモジュール8を製造した。本モジュールは従来不可能であった180℃環境下でクリープを0.1%以下に抑制し、正確に圧力を測定できることを確認した。   Furthermore, the electrode on the semiconductor strain sensor chip 1 and the printed circuit board 7 were connected by wire bonding 6 to manufacture a pressure sensor module 8 for medium and high pressure. This module has been confirmed to be able to measure pressure accurately by suppressing creep to 0.1% or less in a 180 ° C environment, which was impossible in the past.

以上、本発明者によってなされた発明の実施の形態に基づき具体的に説明したが、本発明は前記実施の形態に限定されるものではなく、その要旨を逸脱しない範囲で種々変更可能であることはいうまでもない。すなわち、上記説明では、本発明の適用について、半導体ひずみセンサチップ、パワー半導体チップを例に挙げて説明したが、そのほか、様々な構造の接合材料として適用できる。適用例としては、オルタネータ用ダイオード、パワーモジュール、LED、封止用リッド、熱電変換モジュールとして適用することも出来る。   As described above, the present invention has been specifically described based on the embodiment of the invention. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say. That is, in the above description, the application of the present invention has been described by taking the semiconductor strain sensor chip and the power semiconductor chip as examples, but in addition, the present invention can be applied as bonding materials having various structures. As an application example, it can also be applied as an alternator diode, power module, LED, sealing lid, and thermoelectric conversion module.

1・・・半導体素子
2・・・はんだ材
3・・・基板
4・・・低熱膨張材
5・・・ダイヤフラム
6・・・ワイヤ
7・・・プリント基板
8・・・圧力センサモジュール
9,10・・・接合層
21・・・高融点相
22・・・低融点相
100・・・Ag-25In-25Sbはんだの状態遷移ライン
101,102,103,104・・・三元状態図上の適正な割合の領域の境界線
1 ... Semiconductor element
2 ... Solder material
3 ... Board
4 ... Low thermal expansion material
5 ... Diaphragm
6 ... Wire
7 ... Printed circuit board
8 ... Pressure sensor module
9,10 ・ ・ ・ Junction layer
21 ... High melting point phase
22 ... Low melting point phase
100 ・ ・ ・ Ag-25In-25Sb solder state transition line
101,102,103,104 ・ ・ ・ Boundary line of appropriate proportion of area on ternary phase diagram

Claims (15)

AgとInを含み、Sb、Sn、Bi、およびZnのうち少なくとも一種類以上の金属を含み、残部が不可避不純物からなるPbフリー接合材であって、
(Agの重量):(Inの重量):(Sb+Sn+Bi+Znの合計重量)の比が三元状態図上にて(70:27:3)、(70:5:25)、(10:2:88)、(10:45:45)の各点を結ぶ四角形の内側の領域の組成であることを特徴とする接合材。
A Pb-free bonding material containing Ag and In, including at least one kind of metal of Sb, Sn, Bi, and Zn, and the balance of inevitable impurities,
The ratio of (Ag weight) :( In weight) :( Total weight of Sb + Sn + Bi + Zn) is (70: 27: 3), (70: 5: 25) on the ternary phase diagram, (10: 2: 88), (10:45:45) A bonding material characterized by having a composition in a region inside a quadrilateral connecting points.
請求項1に記載の接合材であって、Sb、Sn、Bi、およびZnの重量比は、Sbが80%~100%、Sn+Bi+Znの重量比が0%〜20%であることを特徴とする接合材。   The bonding material according to claim 1, wherein the weight ratio of Sb, Sn, Bi, and Zn is 80% to 100% of Sb and 0% to 20% of the weight ratio of Sn + Bi + Zn. A bonding material characterized by Ag粒子とIn-(Sb+Sn+Bi+Zn)合金粒子を混合したペースト状接合材であって、前記Ag粒子と前記In-(Sb+Sn+Bi+Zn)合金粒子を合わせた各金属の重量比が、請求項1または請求項2に記載の組成となることを特徴とするペースト状接合材。   A paste-like bonding material in which Ag particles and In- (Sb + Sn + Bi + Zn) alloy particles are mixed, and each metal including the Ag particles and In- (Sb + Sn + Bi + Zn) alloy particles The paste-like bonding material is characterized in that the weight ratio of is the composition according to claim 1 or 2. 請求項1乃至3のいずれかの請求項に記載の接合材を、第一の被接続部材と第二の被接続部材の間に挟持し、当該接合材の固相線温度以上、且つ、液相線温度以下の温度に加熱することで接合する接合方法。   The bonding material according to any one of claims 1 to 3 is sandwiched between a first connected member and a second connected member, and the liquid is equal to or higher than the solidus temperature of the bonding material. A joining method for joining by heating to a temperature below the phase wire temperature. 請求項4に記載の接合方法を用いて、第一の被接続部材を上層に、前記第一の被接続部材より面積の大きい第二の被接続部材を下層に接合し、前記第二の被接続部材の上面に前記第一の被接続部材の直下の接合部から外へ前記接合材の低融点相を濡れ広がらせて接合を完了させた接合構造であって、
前記第一の被接続部材の直下の接合部に含まれる前記接合材の低融点相/高融点相の体積比率に対して、前記第一の被接続部材直下からはみ出した前記接合材における低融点相/高融点相の体積比率が大きいことを特徴とする接合構造。
Using the joining method according to claim 4, the first connected member is joined to the upper layer, the second connected member having a larger area than the first connected member is joined to the lower layer, and the second connected member is joined. A joining structure in which the low melting point phase of the joining material is wetted and spread out from the joining portion directly below the first connected member on the upper surface of the connecting member, and the joining is completed.
The low melting point of the bonding material protruding from directly below the first connected member with respect to the volume ratio of the low melting point phase / high melting point phase of the bonding material contained in the bonding portion immediately below the first connected member. A junction structure characterized by a large volume ratio of the phase / high melting point phase.
請求項4に記載の接合方法を用いて、第一の被接続部材を上層に、前記第一の被接続部材より面積の大きい第二の被接続部材を下層に、および前記第一の被接続部材と前記第二の被接続部材の間の面積を持つ第三の被接続部材を中間層に配置して、前記接合材を用いて、前記第一の被接続部材と前記第三の被接続部材、および前記第三の被接続部材と前記第二の被接続部材をそれぞれ接合したことを特徴とする接合構造。   The bonding method according to claim 4, wherein the first connected member is an upper layer, the second connected member having a larger area than the first connected member is a lower layer, and the first connected member. A third connected member having an area between the member and the second connected member is disposed in the intermediate layer, and the first connected member and the third connected member are formed using the bonding material. A joint structure characterized by joining a member and the third connected member and the second connected member. 請求項6に記載の接合構造において、
請求項4に記載の接合方法を用いて、前記第三の被接続部材の上面に前記第一の被接続部材の直下の接合部から外へ前記接合材の低融点相を濡れ広がらせ、および前記第二の被接続部材の上面に前記第三の被接続部材の直下の接合部から外へ前記接合材の低融点相を濡れ広がらせて接合を完了させた構造であることを特徴とする接合構造。
The joint structure according to claim 6,
Using the bonding method according to claim 4, the low melting point phase of the bonding material is wetted and spread outward from the bonding portion directly below the first connected member on the upper surface of the third connected member; and It is a structure in which the low melting phase of the bonding material is wetted and spread from the bonding portion directly below the third connected member to the upper surface of the second connected member to complete the bonding. Joining structure.
AgとInを含み、Sb、Sn、Bi、およびZnのうち少なくとも一種類以上の金属を含み、残部が不可避不純物からなり、(Agの重量):(Inの重量):(Sb+Sn+Bi+Znの合計重量)の比が三元状態図上にて(70:27:3)、(70:5:25)、(10:2:88)、(10:45:45)の各点を結ぶ四角形の内側の領域の組成である接合材を、第一の被接続部材を上層、第二の被接続部材を下層とする間に挟持し、
当該接合材の固相線温度以上、且つ、液相線温度以下の温度に前記第一の被接続部材、前記接合材、および前記第二の被接続部材の積層体を加熱し、
前記第二の被接続部材の上面、または側面に、前記第一の被接続部材の直下の接合部から外へ前記接合材の低融点相を濡れ広がらせて接合を完了させることを特徴とする接合方法。
Including Ag and In, including at least one of Sb, Sn, Bi, and Zn, with the balance being inevitable impurities, (Ag weight): (In weight): (Sb + Sn + Bi (Total weight of + Zn) on the ternary phase diagram (70: 27: 3), (70: 5: 25), (10: 2: 88), (10:45:45) Sandwiching the bonding material that is the composition of the inner region of the quadrangle connecting the first connected member as the upper layer and the second connected member as the lower layer,
Heating the laminate of the first connected member, the bonding material, and the second connected member to a temperature not lower than the solidus temperature of the bonding material and not higher than the liquidus temperature,
The bonding is completed by wetting and spreading the low melting point phase of the bonding material outwardly from the bonding portion directly below the first connected member on the upper surface or side surface of the second connected member. Joining method.
前記接合材が、Sb、Sn、Bi、およびZnの重量比は、Sbが80%~100%、Sn+Bi+Znの重量比が0%〜20%であることを特徴とする請求項8に記載の接合方法。   The weight ratio of Sb, Sn, Bi, and Zn in the bonding material is such that Sb is 80% to 100% and the weight ratio of Sn + Bi + Zn is 0% to 20%. The joining method described in 1. 前記接合材が、Ag粒子とIn-(Sb+Sn+Bi+Zn)合金粒子を混合したペースト状接合材であって、前記Ag粒子と前記In-(Sb+Sn+Bi+Zn)合金粒子を合わせた各金属の重量比が、請求項8または請求項9に記載の組成となることを特徴とする接合方法。   The bonding material is a paste-like bonding material in which Ag particles and In- (Sb + Sn + Bi + Zn) alloy particles are mixed, wherein the Ag particles and the In- (Sb + Sn + Bi + Zn) alloy particles The joining method according to claim 8, wherein the weight ratio of each of the metals is the composition according to claim 8. 請求項5乃至7のいずれかの請求項に記載の接合構造において、前記第一の被接続部材が半導体素子であり、前記第二の被接続部材が金属、またはセラミックスであることを特徴とする接合構造。   The joining structure according to any one of claims 5 to 7, wherein the first connected member is a semiconductor element, and the second connected member is a metal or ceramics. Joining structure. 請求項6、または請求項7に記載の接合構造において、前記第三の接続部材の両面はCuであることを特徴とする接合構造。   The joining structure according to claim 6 or 7, wherein both surfaces of the third connecting member are Cu. 請求項11に記載の半導体素子がパワー半導体であることを特徴とする半導体装置。   The semiconductor device according to claim 11, wherein the semiconductor device is a power semiconductor. 請求項11に記載の半導体素子が半導体ひずみセンサ素子であることを特徴とする半導体装置。   12. The semiconductor device according to claim 11, wherein the semiconductor element is a semiconductor strain sensor element. 請求項5乃至7のいずれかの請求項に記載の接合構造において、前記第一の被接続部材が半導体ひずみセンサ素子であり、前記第二の接続部材がダイヤフラムであり、前記半導体ひずみセンサ素子が、前記ダイヤフラムの反対面側に加わる圧力の変化に従ってダイヤフラムを介して歪むことによって、圧力の変化を電気信号に変換することを特徴とする半導体装置。   The joining structure according to any one of claims 5 to 7, wherein the first connected member is a semiconductor strain sensor element, the second connecting member is a diaphragm, and the semiconductor strain sensor element is A semiconductor device characterized in that a change in pressure is converted into an electric signal by distorting through the diaphragm in accordance with a change in pressure applied to the opposite surface of the diaphragm.
JP2013019252A 2013-02-04 2013-02-04 Joining material, joining method, joining structure, and semiconductor device Pending JP2014147966A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2013019252A JP2014147966A (en) 2013-02-04 2013-02-04 Joining material, joining method, joining structure, and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013019252A JP2014147966A (en) 2013-02-04 2013-02-04 Joining material, joining method, joining structure, and semiconductor device

Publications (1)

Publication Number Publication Date
JP2014147966A true JP2014147966A (en) 2014-08-21

Family

ID=51571408

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013019252A Pending JP2014147966A (en) 2013-02-04 2013-02-04 Joining material, joining method, joining structure, and semiconductor device

Country Status (1)

Country Link
JP (1) JP2014147966A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2016052700A1 (en) * 2014-10-02 2018-02-15 国立大学法人茨城大学 Bonding layer structure using alloy bonding material and method for forming the same, semiconductor device having the bonding layer structure, and method for manufacturing the same
JP7267522B1 (en) 2022-09-29 2023-05-01 三菱電機株式会社 Bonding materials and semiconductor devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2016052700A1 (en) * 2014-10-02 2018-02-15 国立大学法人茨城大学 Bonding layer structure using alloy bonding material and method for forming the same, semiconductor device having the bonding layer structure, and method for manufacturing the same
JP7267522B1 (en) 2022-09-29 2023-05-01 三菱電機株式会社 Bonding materials and semiconductor devices
WO2024069866A1 (en) * 2022-09-29 2024-04-04 三菱電機株式会社 Bonding member and semiconductor device

Similar Documents

Publication Publication Date Title
JP4964009B2 (en) Power semiconductor module
KR102097177B1 (en) Power module substrate, power module substrate with heat sink, and power module
JP6079505B2 (en) Bonded body and power module substrate
US10199237B2 (en) Method for manufacturing bonded body and method for manufacturing power-module substrate
JP2010109132A (en) Thermoelectric module package and method of manufacturing the same
WO2003046981A1 (en) Module structure and module comprising it
JP5092168B2 (en) Peltier element thermoelectric conversion module, manufacturing method of Peltier element thermoelectric conversion module, and optical communication module
JP4349552B2 (en) Peltier element thermoelectric conversion module, manufacturing method of Peltier element thermoelectric conversion module, and optical communication module
JP4104429B2 (en) Module structure and module using it
JP5231727B2 (en) Joining method
JP6896734B2 (en) Circuit boards and semiconductor modules
JP5828352B2 (en) Copper / ceramic bonding body and power module substrate
JP6645368B2 (en) Joint body, power module substrate, method of manufacturing joined body, and method of manufacturing power module substrate
JP6529632B1 (en) Semiconductor device using solder alloy, solder paste, molded solder, and solder alloy
JP2014147966A (en) Joining material, joining method, joining structure, and semiconductor device
JP5904257B2 (en) Power module substrate manufacturing method
JP2018111111A (en) Manufacturing method for metal junction body and semiconductor device
JP2006228969A (en) Ceramics circuit board and semiconductor module using it
JP2013146764A (en) Connecting material and soldered product using the same
JP2015080812A (en) Joint method
JP2017135373A (en) Assembly, power module substrate, method for manufacturing assembly, and method for manufacturing power module substrate
TW201250849A (en) Low-temperature chip bonding method for light-condensing type solar chip, power transistor and field effect transistor
TW202142522A (en) Copper/ceramic assembly and insulated circuit board
JP6129980B2 (en) Mechanical quantity measuring apparatus and manufacturing method thereof
JP2007260695A (en) Joining material, joining method, and joined body

Legal Events

Date Code Title Description
RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20140908