JP2014142988A5 - - Google Patents

Download PDF

Info

Publication number
JP2014142988A5
JP2014142988A5 JP2013270487A JP2013270487A JP2014142988A5 JP 2014142988 A5 JP2014142988 A5 JP 2014142988A5 JP 2013270487 A JP2013270487 A JP 2013270487A JP 2013270487 A JP2013270487 A JP 2013270487A JP 2014142988 A5 JP2014142988 A5 JP 2014142988A5
Authority
JP
Japan
Prior art keywords
gate voltage
soft
soft program
bit cells
overerased
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2013270487A
Other languages
English (en)
Japanese (ja)
Other versions
JP2014142988A (ja
JP6274648B2 (ja
Filing date
Publication date
Priority claimed from US13/746,841 external-priority patent/US9129700B2/en
Application filed filed Critical
Publication of JP2014142988A publication Critical patent/JP2014142988A/ja
Publication of JP2014142988A5 publication Critical patent/JP2014142988A5/ja
Application granted granted Critical
Publication of JP6274648B2 publication Critical patent/JP6274648B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2013270487A 2013-01-22 2013-12-26 温度センサを使用した不揮発性メモリに対する適応的ソフトプログラミングのためのシステムおよび方法 Active JP6274648B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/746,841 US9129700B2 (en) 2013-01-22 2013-01-22 Systems and methods for adaptive soft programming for non-volatile memory using temperature sensor
US13/746,841 2013-01-22

Publications (3)

Publication Number Publication Date
JP2014142988A JP2014142988A (ja) 2014-08-07
JP2014142988A5 true JP2014142988A5 (enExample) 2016-12-22
JP6274648B2 JP6274648B2 (ja) 2018-02-07

Family

ID=51190775

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013270487A Active JP6274648B2 (ja) 2013-01-22 2013-12-26 温度センサを使用した不揮発性メモリに対する適応的ソフトプログラミングのためのシステムおよび方法

Country Status (3)

Country Link
US (1) US9129700B2 (enExample)
JP (1) JP6274648B2 (enExample)
CN (1) CN103943147B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102309841B1 (ko) 2015-08-24 2021-10-12 삼성전자주식회사 표면 실장 기술의 적용에 따른 메모리 셀의 문턱 전압 산포 변화 복구 기능을 갖는 데이터 스토리지 및 그것의 동작 방법
US9857999B2 (en) * 2015-11-09 2018-01-02 Western Digital Technologies, Inc. Data retention charge loss sensor
KR102449776B1 (ko) * 2016-01-28 2022-10-04 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그것의 동작 방법
US9830963B1 (en) 2016-05-24 2017-11-28 Sandisk Technologies Llc Word line-dependent and temperature-dependent erase depth
US10573388B2 (en) * 2018-04-04 2020-02-25 Western Digital Technologies, Inc. Non-volatile storage system with adjustable select gates as a function of temperature
US10424387B1 (en) * 2018-05-16 2019-09-24 Sandisk Technologies Llc Reducing widening of threshold voltage distributions in a memory device due to temperature change
KR102569820B1 (ko) * 2018-10-25 2023-08-24 에스케이하이닉스 주식회사 메모리 컨트롤러 및 그 동작 방법
US11315637B2 (en) 2020-06-03 2022-04-26 Western Digital Technologies, Inc. Adaptive erase voltage based on temperature
US11605427B2 (en) 2021-01-04 2023-03-14 Taiwan Semiconductor Manufacturing Company Ltd. Memory device with write pulse trimming
CN114758689A (zh) * 2022-04-08 2022-07-15 珠海博雅科技股份有限公司 用于非易失性存储器的擦除方法和上电修复方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5991201A (en) 1998-04-27 1999-11-23 Motorola Inc. Non-volatile memory with over-program protection and method therefor
JP3854025B2 (ja) * 1998-12-25 2006-12-06 株式会社東芝 不揮発性半導体記憶装置
US20030218913A1 (en) * 2002-05-24 2003-11-27 Le Binh Quang Stepped pre-erase voltages for mirrorbit erase
US7177199B2 (en) 2003-10-20 2007-02-13 Sandisk Corporation Behavior based programming of non-volatile memory
US7079424B1 (en) 2004-09-22 2006-07-18 Spansion L.L.C. Methods and systems for reducing erase times in flash memory devices
US7173859B2 (en) 2004-11-16 2007-02-06 Sandisk Corporation Faster programming of higher level states in multi-level cell flash memory
US7859894B2 (en) * 2006-09-20 2010-12-28 Qimonda Ag Energy adjusted write pulses in phase-change memory cells
US7755940B2 (en) * 2007-12-05 2010-07-13 Micron Technology, Inc. Method, apparatus, and system for erasing memory
CA2743321C (en) * 2007-12-07 2014-05-20 Allen-Vanguard Corporation Apparatus and method for measuring and recording data from violent events
US8125835B2 (en) * 2008-09-22 2012-02-28 Cypress Semiconductor Corporation Memory architecture having two independently controlled voltage pumps
KR101504340B1 (ko) * 2008-11-04 2015-03-20 삼성전자주식회사 온도 보상 기능을 가지는 불휘발성 메모리 장치 및 그것을 포함하는 메모리 시스템
US8351276B2 (en) * 2010-07-13 2013-01-08 Freescale Semiconductor, Inc. Soft program of a non-volatile memory block
US8345485B2 (en) 2011-02-09 2013-01-01 Freescale Semiconductor, Inc. Erase ramp pulse width control for non-volatile memory
US8334796B2 (en) * 2011-04-08 2012-12-18 Sandisk Technologies Inc. Hardware efficient on-chip digital temperature coefficient voltage generator and method
US8509001B2 (en) * 2011-06-27 2013-08-13 Freescale Semiconductor, Inc. Adaptive write procedures for non-volatile memory
US8432752B2 (en) 2011-06-27 2013-04-30 Freescale Semiconductor, Inc. Adaptive write procedures for non-volatile memory using verify read
US8873316B2 (en) * 2012-07-25 2014-10-28 Freescale Semiconductor, Inc. Methods and systems for adjusting NVM cell bias conditions based upon operating temperature to reduce performance degradation

Similar Documents

Publication Publication Date Title
JP2014142988A5 (enExample)
JP2014022031A5 (enExample)
JP2010535395A5 (enExample)
JP2010524147A5 (enExample)
JP2007533055A5 (enExample)
JP2012142067A5 (enExample)
JP6274648B2 (ja) 温度センサを使用した不揮発性メモリに対する適応的ソフトプログラミングのためのシステムおよび方法
JP2008305536A5 (enExample)
WO2014126820A3 (en) Group word line erase and erase-verify methods for 3d nand non-volatile memory
ATE492882T1 (de) Schnelles programmiersystem mit verringerter überprogrammierung
WO2008124760A3 (en) Non-volatile memory and method for predictive programming
JP2015500546A5 (enExample)
WO2012024079A3 (en) Variable resistance memory array architecture
ATE496373T1 (de) Programmierungsverfahren auf der basis des verhaltens nichtflüchtiger speicherzellen
JP2012142562A5 (ja) 半導体装置
WO2007133645A3 (en) Nand architecture memory devices and operation
WO2010093441A8 (en) Automatic refresh for improving data retention and endurance characteristics of an embedded non-volatile memory in a standard cmos logic process
WO2008008466A3 (en) Current sensing for flash
WO2014153174A3 (en) Non-volatile memory program algorithm device and method
TW201129978A (en) A method and apparatus for operation of a NAND-like dual charge retaining transistor NOR flash memory device
JP6053080B2 (ja) 不揮発性メモリのための相補型デコーディング
WO2008027681A3 (en) Non-volatile memory device and method having bit-state assignments selected to minimize signal coupling
WO2009139567A3 (en) Memory device and memory programming method
CN101667446A (zh) 存储器及其读取方法
JP2013125576A (ja) 不揮発性半導体記憶装置