JP2014120039A - Logic information creation device, method and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a logic information creation technique which progresses a logic design in parallel with a hardware design and contributes an increase in work efficiency of a designer.SOLUTION: A logic information creation device 30 comprises: a hardware information registration section 33 in which hardware information on a control system is registered; a logic information registration section 34 in which logic information for operating the control system is registered; an imparting section 35 which imparts a tentative I/O point to wire connection of a macro configuring the logic information; a linkage section 37 which links the tentative I/O point and wiring of a substrate unit; and an output section 39 which outputs the logic information associated with the wiring or I/O point corresponding to the wire connection.

Description

  The present invention relates to a technique for creating logic information of a control system for equipment constituting a plant.

The design process of a control system that controls the operation of various plants such as power plants, factories, and public facilities is classified into hardware design and logic design that operates this hardware.
The hardware of such a control system is composed of a board unit that is connected to a signal cable of the device, and a processor unit that is bus-connected to a plurality of these board units.

The software of such a control system is expressed by a logic composed of a plurality of macros that perform data arithmetic processing and connections that indicate data input / output relationships of these macros.
The logic is created by one or more sheets with a range that can be expressed by one sheet as a unit.
On the other hand, a technique for editing a program for plant control that edits such macro connection attribute information so as to be easily understood by a third party other than the designer is disclosed (for example, see Patent Document 1).

JP 2006-330932 A

In a conventional control system design process, hardware configuration specifications are determined, and then I / O points that define the physical location of the memory in the processor unit are assigned to each logic connection.
For this reason, in the design process of the control system, there has been a problem that the progress of the logic design is affected by the progress of the hardware design.
Further, the designer assigns the wiring of the board unit corresponding to the macro connection to each point while referring to the hardware information associated with these I / O points.
For this reason, if there is a careless mistake in such input / setting work, it is necessary for the designer to re-input / reset every point, and low work efficiency is a problem.

  The present invention has been made in consideration of such circumstances, and an object of the present invention is to provide a logic information creation technique that advances logic design in parallel with hardware design and contributes to improvement of designers' work efficiency. And

  The logic information creation device according to the present invention includes a hardware information registration unit for registering hardware information of a control system having a substrate unit connected to a signal cable of a device and a processor unit in which an I / O point is arranged. Corresponding to the I / O point among the logic information registration unit described in the above sheet and registering logic information for operating the control system and connected to the connection terminal of the macro constituting the logic information A granting unit for giving a temporary I / O point to the connection; a wiring unit for connecting the wiring of the board unit and the temporary I / O point in the hardware information; and the wiring corresponding to the connection or the I / O And an output unit that outputs the logic information associated with the O point.

  According to the present invention, there is provided a logic information creation technique that progresses logic design in parallel with hardware design and contributes to improvement of designers' work efficiency.

1 is a block diagram showing an embodiment of a control system to which a logic information creation device according to the present invention is applied. 1 is a block diagram showing an embodiment of a logic information creation device according to the present invention. The image which shows the logic information which consists of several sheets with which the macro connected by the connection was described. (A) is a list showing hardware information, and (B) is a list showing board types. (A), (B), (C) is explanatory drawing of the procedure which provides a temporary I / O point to a connection in the image which shows logic information. (A), (B), (C) is explanatory drawing of the procedure which links a temporary I / O point to wiring. (A), (B), (C) is a list for browsing logic information associated with hardware information. (A) and (B) are lists for browsing hardware information associated with logic information. (A) is a figure which shows embodiment which connects wiring (connection) via the same CPU, (B) is a figure which shows embodiment which connects wiring (connection) via several different CPU.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
As shown in FIG. 1, the control system 10 is connected to a network 11 and controls the operation of equipment 14 (for example, a pump, a thermometer, an on-off valve, etc.) constituting the plant. And an HMI (Human Machine Interface) 13 that is connected to the network 11 and allows an operator to monitor or operate the plant.

In plant control, a distributed control system in which a control unit 20 is provided for each of a plurality of grouped devices 14 is widely used.
In this distributed control system, the HMI 13 and the plurality of control units 20 are connected to the network 11 and communicate with each other to control the entire plant.

The control unit 20 includes a board unit 22 (22a, 22b) connected to the signal cable 15 of the device 14 and a processor unit 21 connected to the board unit 22 by a bus.
In the board unit 22, a board 24 (DI board (Digital Input), DO board (Digital Output), AI board (Analog Input), AO board (Analog Output)) is detachable in a slot provided in the I / O board. It is attached to.
Similarly, in the processor unit 21, a transmission board 25 and a CPU board 23 are detachably mounted.

The wirings (not shown) of the respective boards 24 are collected on the bus of the mounted I / O board and connected to the memory of the CPU board 23 via the transmission board 25.
Then, the logic information creation device 30 is connected to the CPU board 23, and the wiring of the corresponding board 24 is allocated and set to the I / O point indicating the physical position of the memory.

  As shown in FIG. 2 (refer to FIGS. 1, 3 and 4 as appropriate), the logic information creation device 30 is a processor that arranges board units 22 (22a, 22b) and I / O points connected to the signal cable 15 of the device 14. The hardware information (FIG. 4) of the control system 10 having the unit 21 is described in the hardware information registration unit 33 and one or more sheets 50 (50a, 50b, 50c) and the control system 10 is operated. Connections associated with I / O points among the connection lines 53 connected to the terminals 52a and 52b of the macro 51 constituting the logic information (FIG. 3). The provision unit 35 for assigning temporary I / O points to 53a and 53b, the wiring (FIG. 4) of the board unit in the hardware information, and the temporary An output unit that outputs logic information that associates an I / O point with a tying unit 37 that associates / O points (FIG. 5C) and wirings (FIG. 4) or I / O points corresponding to the connections 53a and 53b (FIG. 3). 39.

  The information registered in each of the registration units 33 and 34 and the storage unit 36 is displayed on the display unit 40 and is appropriately converted in format by the external output conversion unit 41 and output to an external circuit such as the CPU board 23. Is done.

As shown in FIG. 3, the logic information is created by one or more sheets 50 (50a, 50b, 50c) in units of ranges that can be expressed by one sheet.
Each sheet 50 includes a plurality of macros 51 that perform data calculation processing, and connection lines 53 (53a, 53b, and 53c) that indicate data input / output relationships of the macros 51.
In the logic information editing unit 32 b (FIG. 2), the designer edits the macro 51 and the connection 53 on the sheet 50 held in the registration unit 34 via the input unit 31.

The macro 51 arranged in the sheet 50 has one or more input terminals 52a and output terminals 52b for inputting / outputting input data and output data of arithmetic processing.
The connection lines 53a and 53b located at the end of the sheet 50 are physically associated with an I / O point indicating a specific position of the memory on the processor unit 21.

Further, line numbers for identifying each other are originally attached to these connections 53, and the same line number between different sheets 50 refers to the same memory on the processor unit 21.
The data types transferred between the macros 51 include digital, integer, real number, integer set value, real number set value, etc., but the data type that can be connected to each connection terminal 52a, 52b of the macro 51 is determined in advance. Yes.

As illustrated in FIG. 4A, the hardware information describes attribute information of the board 24 mounted in each slot (1-6) of the board unit 22 constituting the control unit 20 (FIG. 1). Has been.
Each board 24 has a plurality of wirings defined by the “number of IOs”, and only the identifier (DI0000...) Of the wiring located at the head is displayed.
In addition, the identifiers of other wirings that are not shown are described by serial numbers such as DI0000, DI0001, DI0002... DI0031.

The wiring of these boards 24 is associated with an I / O point that defines the physical location of the memory in the processor unit 21.
The attribute of “data type” indicates whether each wiring outputs or inputs a signal to the memory of the corresponding I / O point.

In the hardware information editing unit 32a (FIG. 2), the designer edits the attribute information on the hardware information (FIG. 4A) held in the registration unit 33 via the input unit 31.
Specifically, the hardware information editing unit 32a registers what board 24 is mounted in each slot of the board unit 22 (22a, 22b).
Attribute information corresponding to the EU conversion method, the power supply method, and other features in each board 24 is assigned as hardware information. Note that FIG. 4B illustrates an example of a substrate type.

  In the assigning unit 35 (FIG. 2), the provisional I / O is connected to the connections 53a and 53b associated with the I / O point among the connections 53 connected to the connection terminals 52a and 52b of the macro 51 constituting the logic information (FIG. 3). O points are awarded.

Based on FIG. 5, the procedure for giving temporary I / O points to the connection will be described.
When the connection line 53 included in the logic image displayed as shown in FIG. 5A is selected, a temporary I / O point setting screen as shown in FIG. 5B is displayed.
On this temporary I / O point setting screen (FIG. 5B), macro attribute information (input or output, digital signal or analog signal) and board type (EU conversion method, etc.) are selected and set.

Then, a temporary I / O point related to the macro attribute information is attached to the selected connection 53 as shown in FIG. 5A as an identification symbol. The plurality of identification symbols indicated by the common attribute information are further identified by adding a continuous code at the end. In the case of the logic image of FIG. 5A, for example, “IN-A-Z5 (1)” and “OUT-D-D2 (3)” are shown.
Here, “OUT-D-D2 (3)” is a signal whose data type is digital output and whose board type is TYPE-D2, and indicates that it appears third in this combination.

As shown in FIG. 5C, the allocated temporary I / O points are stored in the storage unit 36 as a data list shown for each sheet 50. By calling this list, it is possible to confirm how many temporary I / O points are registered in the logic information.
Further, as shown in FIG. 5A, the logic information in which the temporary I / O point is assigned to the connection 53 is updated in the registration unit 34 (FIG. 2).
In the setting stage of the temporary I / O point, it is not necessary to be aware of the position of the board unit 22 and the slot corresponding to each connection 53, so that the logic design is advanced regardless of the progress of the hardware design. Can do.

Then, as shown in FIG. 6A, when both the hardware design and logic design operations are completed, the associating unit 37 (FIG. 2) performs wiring of the board unit in the hardware information (FIG. 4) and A temporary I / O point (FIG. 5C) is linked.
The associating unit 37 pays attention to the wiring attributes (input or output, digital signal or analog signal, board type (EU conversion method etc.)) of the hardware information (FIG. 4) of the registration unit 33, and the list (FIG. 5). The temporary I / O point of the corresponding identification name is automatically extracted from (C)).
Then, with each sheet 50 as a reference, a data list (FIG. 6A) that associates temporary I / O points of connection with wiring of hardware information is generated and registered in the I / O point registration unit 38.

Based on FIG. 6B, a case where one I / O point is referred to by a plurality of sheets will be considered.
Here, the connections of “IN-A-Z5 (1)” and “IN-A-Z5 (5)” are related to the same I / O point, but different temporary I / O points are attached. Has been.

Therefore, the same wiring setting function as shown in FIG. 6C is used to display a list of temporary I / O points and change the associated wiring as necessary.
For example, if a connection is selected for “IN-A-Z5 (1)” on the sheet of BG101, the same wiring setting screen (FIG. 6C) is displayed, and a temporary connection of the same board type on another sheet is displayed. A list of I / O points is displayed.
By selecting the same signal (in this example, “IN-A-Z5 (5)” on the BG103 sheet) from the same wiring setting screen (FIG. 6C), a data list of I / O points is requested. The target wiring in FIG. 6A is changed from AI0033 to AI0032.

In this way, a data list in which the connection in the sheet and the wiring in the hardware information are changed to the correct association is generated, and the determined formal I / O point is replaced with the temporary I / O point and registered in the registration unit 38. To do.
As described above, after the connection between the wiring in the sheet and the wiring in the hardware information is determined, the corresponding information can be easily changed even if any information is changed for some reason.

FIG. 7 shows the hardware information after the connection and wiring are linked.
As shown in FIG. 7A, when one board mounted in a slot of an arbitrary unit is designated, the number of wirings corresponding to the “number of I / Os” is identified as shown in FIG. 7B. The name and the identification name of the sheet corresponding to each wiring are displayed.
When there are a plurality of sheets corresponding to one wiring, an identifier such as “>” is added at the end, and further developed as shown in FIG.

Then, when the identification name of the sheet of FIG. 7B or FIG. 7C is designated, the image (FIG. 3) is displayed, and the connection name 53a, 53b in the screen has a corresponding wiring identification name or I. / O points are described. Such a function is realized by the hardware information editing unit 32a and the logic information editing unit 32b becoming one editing unit 32 that is linked to each other.
Thereby, the corresponding logic information can be easily recognized from the hardware information.

FIG. 8 shows logic information after the connection and wiring are linked.
When an arbitrary connection 53 is designated as shown in FIG. 8A, the hardware information of the corresponding board 22 (FIG. 1) is displayed as shown in FIG. 8B.
In this case, not only the wiring (AI0010) corresponding to the designated connection 53 but also other wirings of the same substrate 22 are displayed.

When these other wirings are designated, a corresponding sheet image (FIG. 3) can be displayed.
Such a function is realized by the hardware information editing unit 32a and the logic information editing unit 32b becoming one editing unit 32 that is linked to each other.
Thereby, the corresponding hardware information can be easily recognized from the logic information.

  FIG. 9A shows an embodiment in which wiring (connection) is connected through the same CPU, and FIG. 9B shows an embodiment in which wiring (connection) is connected through a plurality of different CPUs.

  According to the logic information creation device of at least one embodiment described above, by introducing a temporary I / O point, hardware design and logic design can be performed in parallel, thereby improving the work efficiency of the designer. It becomes possible.

Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, replacements, changes, and combinations can be made without departing from the scope of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and the equivalents thereof.
The components of the logic information creation device can be realized by a processor of a computer and can be operated by a logic information creation program.

  DESCRIPTION OF SYMBOLS 10 ... Control system, 11 ... Network, 13 ... HMI, 14 ... Apparatus, 15 ... Signal cable, 20 ... Control part, 21 ... Processor unit, 22 (22a, 22b) ... Board unit, 23 ... CPU board, 24 ... Board (DI board, DO board, AI board, AO board), 25 ... transmission board, 30 ... logic information creation device, 31 ... input section, 32 ... editing section, 32a ... hardware information editing section, 32b ... logic information editing section 33 ... Hardware information registration unit (registration unit), 34 ... Logic information registration unit (registration unit), 35 ... Temporary I / O point grant unit (granting unit), 36 ... Temporary I / O point storage unit (storage unit) , 37 ... I / O point linking part (linking part), 38 ... I / O point registration part (registration part), 39 ... output part, 50 ... sheet, 51 ... macro, 52a ... input terminal (connection end) ), 52 b ... output terminal (connection terminal), 53 (53a, 53b, 53c) ... connection.

Claims (8)

A hardware information registration unit for registering hardware information of a control system having a board unit connected to a signal cable of a device and a processor unit for arranging an I / O point;
A logic information registration unit in which logic information described in one or more sheets and operating the control system is registered;
An assigning unit for assigning a temporary I / O point to a connection associated with the I / O point among those connected to a connection terminal of a macro constituting the logic information;
A linking unit for linking the wiring of the board unit and the temporary I / O point in the hardware information;
And an output unit that outputs the logic information associated with the wiring or the I / O point corresponding to the connection. In the logic information creation device according to claim 1,
The temporary I / O point is indicated by an identification symbol associated with the macro attribute information. In the logic information creation device according to claim 2,
A plurality of the identification symbols indicated by the common attribute information are further identified by adding a continuous code. In the logic information creation device according to any one of claims 1 to 3,
A logic information creating apparatus comprising: a display unit that displays a list of the temporary I / O points for changing the associated wiring. In the logic information creation device according to any one of claims 1 to 4,
A logic information creating apparatus comprising: a display unit configured to display the logic information including an identification name or I / O point of the connection corresponding to the wiring designated by the system information. In the logic information creation device according to any one of claims 1 to 5,
A logic information creating apparatus comprising: a display unit configured to display the hardware information including the wiring corresponding to the connection designated by the logic information. Registering hardware information of a control system having a board unit connected to a signal cable of the device and a processor unit for arranging an I / O point;
Registering logic information described in one or more sheets and operating the control system;
Assigning a temporary I / O point to a connection associated with the I / O point among those connected to a macro connection terminal constituting the logic information;
Linking the wiring of the board unit and the temporary I / O point in the hardware information;
Outputting the logic information associated with the wiring or the I / O point corresponding to the connection. On the computer,
Registering hardware information of a control system having a board unit connected to a signal cable of the device and a processor unit for arranging an I / O point;
Registering logic information described in one or more sheets and operating the control system;
Assigning a temporary I / O point to a connection associated with the I / O point among those connected to a macro connection terminal constituting the logic information;
Linking the wiring of the board unit and the temporary I / O point in the hardware information;
And a step of outputting the logic information associated with the wiring or the I / O point corresponding to the connection.

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