JP2014115851A - データ処理装置及びその制御方法 - Google Patents

データ処理装置及びその制御方法 Download PDF

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Publication number
JP2014115851A
JP2014115851A JP2012269786A JP2012269786A JP2014115851A JP 2014115851 A JP2014115851 A JP 2014115851A JP 2012269786 A JP2012269786 A JP 2012269786A JP 2012269786 A JP2012269786 A JP 2012269786A JP 2014115851 A JP2014115851 A JP 2014115851A
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JP
Japan
Prior art keywords
data
entry
prefetch
fetch
reference count
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JP2012269786A
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English (en)
Japanese (ja)
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JP2014115851A5 (enExample
Inventor
Akihiro Takamura
明裕 高村
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Canon Inc
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Canon Inc
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Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2012269786A priority Critical patent/JP2014115851A/ja
Priority to US14/093,965 priority patent/US9235523B2/en
Publication of JP2014115851A publication Critical patent/JP2014115851A/ja
Publication of JP2014115851A5 publication Critical patent/JP2014115851A5/ja
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/126Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2012269786A 2012-12-10 2012-12-10 データ処理装置及びその制御方法 Pending JP2014115851A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2012269786A JP2014115851A (ja) 2012-12-10 2012-12-10 データ処理装置及びその制御方法
US14/093,965 US9235523B2 (en) 2012-12-10 2013-12-02 Data processing apparatus and control method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012269786A JP2014115851A (ja) 2012-12-10 2012-12-10 データ処理装置及びその制御方法

Publications (2)

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JP2014115851A true JP2014115851A (ja) 2014-06-26
JP2014115851A5 JP2014115851A5 (enExample) 2016-02-04

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JP2012269786A Pending JP2014115851A (ja) 2012-12-10 2012-12-10 データ処理装置及びその制御方法

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US (1) US9235523B2 (enExample)
JP (1) JP2014115851A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018519614A (ja) * 2015-05-13 2018-07-19 アプライド・マイクロ・サーキット・コーポレーション 追い出しを促すための先読みタグ
US10031852B2 (en) 2016-04-14 2018-07-24 Fujitsu Limited Arithmetic processing apparatus and control method of the arithmetic processing apparatus

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6191240B2 (ja) * 2013-05-28 2017-09-06 富士通株式会社 変数更新装置、変数更新システム、変数更新方法、変数更新プログラム、変換プログラム、及びプログラム変更検証システム
JP6170363B2 (ja) 2013-07-17 2017-07-26 キヤノン株式会社 制御装置、コンピュータシステム、制御方法、及びプログラム
US10228864B1 (en) * 2016-12-30 2019-03-12 Parallels International Gmbh Pre-fetching data based on memory usage patterns
CN108777685B (zh) * 2018-06-05 2020-06-23 京东数字科技控股有限公司 用于处理信息的方法和装置
US11907722B2 (en) * 2022-04-20 2024-02-20 Arm Limited Methods and apparatus for storing prefetch metadata

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01137347A (ja) * 1987-11-25 1989-05-30 Hitachi Ltd 入出力制御装置
US5944815A (en) * 1998-01-12 1999-08-31 Advanced Micro Devices, Inc. Microprocessor configured to execute a prefetch instruction including an access count field defining an expected number of access
US20060112229A1 (en) * 2004-11-19 2006-05-25 Moat Kent D Queuing cache for vectors with elements in predictable order
JP2008059057A (ja) * 2006-08-29 2008-03-13 Hitachi Ltd 計算機システム及びプロセッサの制御方法
WO2011078014A1 (ja) * 2009-12-21 2011-06-30 ソニー株式会社 キャッシュメモリおよびキャッシュメモリ制御装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5566324A (en) * 1992-12-24 1996-10-15 Ncr Corporation Computer apparatus including a main memory prefetch cache and method of operation thereof
US5537573A (en) * 1993-05-28 1996-07-16 Rambus, Inc. Cache system and method for prefetching of data
JPH10320285A (ja) 1997-05-20 1998-12-04 Toshiba Corp キャッシュメモリ及び情報処理システム
US7493451B2 (en) * 2006-06-15 2009-02-17 P.A. Semi, Inc. Prefetch unit
US8166251B2 (en) * 2009-04-20 2012-04-24 Oracle America, Inc. Data prefetcher that adjusts prefetch stream length based on confidence
JP5759276B2 (ja) 2011-06-09 2015-08-05 キヤノン株式会社 処理装置及び情報処理方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01137347A (ja) * 1987-11-25 1989-05-30 Hitachi Ltd 入出力制御装置
US5944815A (en) * 1998-01-12 1999-08-31 Advanced Micro Devices, Inc. Microprocessor configured to execute a prefetch instruction including an access count field defining an expected number of access
US20060112229A1 (en) * 2004-11-19 2006-05-25 Moat Kent D Queuing cache for vectors with elements in predictable order
JP2008059057A (ja) * 2006-08-29 2008-03-13 Hitachi Ltd 計算機システム及びプロセッサの制御方法
WO2011078014A1 (ja) * 2009-12-21 2011-06-30 ソニー株式会社 キャッシュメモリおよびキャッシュメモリ制御装置
JP2011150684A (ja) * 2009-12-21 2011-08-04 Sony Corp キャッシュメモリおよびキャッシュメモリ制御装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018519614A (ja) * 2015-05-13 2018-07-19 アプライド・マイクロ・サーキット・コーポレーション 追い出しを促すための先読みタグ
US10613984B2 (en) 2015-05-13 2020-04-07 Ampere Computing Llc Prefetch tag for eviction promotion
US10031852B2 (en) 2016-04-14 2018-07-24 Fujitsu Limited Arithmetic processing apparatus and control method of the arithmetic processing apparatus

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US20140164712A1 (en) 2014-06-12
US9235523B2 (en) 2016-01-12

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