JP2014110334A - Method of diffusing dopant and method of manufacturing electronic device - Google Patents

Method of diffusing dopant and method of manufacturing electronic device Download PDF

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JP2014110334A
JP2014110334A JP2012264366A JP2012264366A JP2014110334A JP 2014110334 A JP2014110334 A JP 2014110334A JP 2012264366 A JP2012264366 A JP 2012264366A JP 2012264366 A JP2012264366 A JP 2012264366A JP 2014110334 A JP2014110334 A JP 2014110334A
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electrode
dopant
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Yuki Inaba
祐樹 稲葉
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Fuji Electric Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

PROBLEM TO BE SOLVED: To provide a method of diffusing dopants that can be efficiently added in a simple method to a material selected from a semiconductor and an electrode.SOLUTION: The method of diffusing dopants includes: contacting a second material 2 containing dopants to a first material 1 selected from a semiconductor and an electrode; transferring dopants contained in the second material 2 to the first material 1 by performing a heat treatment in a state where both materials are in contact with each other; and then separating the second material 2 from the first material 1.

Description

本発明は、ドーパントの拡散方法及び、該方法を用いた電子デバイスの製造方法に関する。   The present invention relates to a dopant diffusion method and an electronic device manufacturing method using the method.

一般に、半導体や電極等にドーパントを添加して電子デバイスの特性向上を図ることが行われている。   In general, the characteristics of electronic devices are improved by adding a dopant to a semiconductor or an electrode.

例えば、光電変換層に、CuInSe、Cu(In,Ga)Se等のカルコパイライト構造の半導体を用いたカルコパイライト系太陽電池では、光電変換層にドーパントとしてNaを添加することで変換効率が向上することが知られている。 For example, in a chalcopyrite solar cell using a chalcopyrite-structured semiconductor such as CuInSe 2 or Cu (In, Ga) Se 2 in the photoelectric conversion layer, conversion efficiency is improved by adding Na as a dopant to the photoelectric conversion layer. It is known to improve.

光電変換層にNaを添加する方法の一つとして、光電変換層をスパッタ法で成膜する際に、NaF等のNa化合物を同時蒸着して、光電変換層にNaを添加する方法がある。   As one method of adding Na to the photoelectric conversion layer, there is a method of simultaneously depositing a Na compound such as NaF and adding Na to the photoelectric conversion layer when the photoelectric conversion layer is formed by sputtering.

しかしながら、カルコパイライト構造の半導体は、複数の元素を精度よく制御して成膜する必要があるので、この方法の場合、成膜時における各元素の添加量の制御がより複雑になる問題があった。   However, a chalcopyrite-structured semiconductor needs to be formed by controlling a plurality of elements with high precision. In this method, there is a problem that it becomes more complicated to control the amount of each element added during film formation. It was.

また、他の方法として、ソーダライムガラス基板を用い、成膜の過程で基板中のNaを光電変換層に拡散させる方法がある。   As another method, there is a method of using a soda lime glass substrate and diffusing Na in the substrate into the photoelectric conversion layer in the course of film formation.

しかしながら、この方法の場合、基板がソーダライムガラスに限定されてしまうので、基板選択の自由がなくなってしまう。   However, in this method, since the substrate is limited to soda lime glass, the freedom of substrate selection is lost.

また、他の方法として、ソーダライムガラス薄膜を基板又は裏面電極上に形成し、光電変換層の成膜の過程でソーダライムガラス薄膜中のNaを光電変換層に拡散させる方法がある。   As another method, there is a method in which a soda lime glass thin film is formed on a substrate or a back electrode, and Na in the soda lime glass thin film is diffused into the photoelectric conversion layer in the process of forming the photoelectric conversion layer.

しかしながら、ソーダライムガラス薄膜は、成膜速度が遅く、更には、ソーダライムガラス薄膜を成膜する工程が別途必要なので、工程数の増加を招き、電子デバイスの生産性が低下する。また、ソーダライムガラス薄膜が層間に介在することにより、裏面電極と、基板又は光電変換層との密着性が低下し易かった。   However, the soda lime glass thin film has a slow film formation speed and further requires a separate process for forming the soda lime glass thin film, which increases the number of processes and decreases the productivity of the electronic device. In addition, when the soda lime glass thin film is interposed between the layers, the adhesion between the back electrode and the substrate or the photoelectric conversion layer is easily lowered.

また、他の方法として、NaF等のNa含有薄膜を、裏面電極又は光電変換層上に形成し、加熱処理等を行って、Na含有薄膜中のNaを光電変換層に拡散させる方法がある。   As another method, there is a method in which a Na-containing thin film such as NaF is formed on the back electrode or the photoelectric conversion layer, and heat treatment or the like is performed to diffuse Na in the Na-containing thin film to the photoelectric conversion layer.

しかしながら、NaF等のNa含有薄膜の多くは、吸湿性、潮解性等を有していることが多いため、Na含有薄膜が変質して、光電変換層や透明電極などに悪影響を及ぼす恐れがあった。また、Na含有薄膜を成膜する工程が別途必要なので、工程数の増加を招き、電子デバイスの生産性が低下する。また、Na含有薄膜が層間に介在することにより、裏面電極又は透明電極と、光電変換層との密着性が低下し易かった。   However, since many Na-containing thin films such as NaF often have hygroscopicity, deliquescence, etc., there is a risk that the Na-containing thin film may be altered and adversely affect the photoelectric conversion layer, transparent electrode, and the like. It was. In addition, since a separate step of forming the Na-containing thin film is necessary, the number of steps is increased and the productivity of the electronic device is lowered. Moreover, when the Na-containing thin film is interposed between the layers, the adhesion between the back electrode or the transparent electrode and the photoelectric conversion layer is likely to be lowered.

また、他の方法として、特許文献1に記載されるように、NaとMoとを含有する電極材料を用いて裏面電極を形成し、光電変換層の成膜の過程で裏面電極中のNaを光電変換層に拡散させる方法がある。   As another method, as described in Patent Document 1, a back electrode is formed using an electrode material containing Na and Mo, and Na in the back electrode is formed in the process of forming a photoelectric conversion layer. There is a method of diffusing into the photoelectric conversion layer.

しかしながら、MoとNaとを含む電極材料を用いて裏面電極を形成する場合、裏面電極のNa含有量を高めると、電極が脆くなって加工性が低下し易かった。加工性を高めるには、電極のNa含有量はできるだけ少なくすることが望ましいが、光電変換層などに添加するために必要なNaを裏面電極に含有させるには、裏面電極の膜厚をより厚くする必要がある。Moは抵抗値が高く、また、高価な材料であるため、Mo電極の厚みを大きくすることは、電子デバイスの電気的特性や材料コストの観点から望ましくない。   However, when the back electrode is formed using an electrode material containing Mo and Na, if the Na content of the back electrode is increased, the electrode becomes brittle and the workability tends to be lowered. In order to improve the workability, it is desirable to reduce the Na content of the electrode as much as possible. However, in order to contain Na necessary for adding to the photoelectric conversion layer or the like in the back electrode, the thickness of the back electrode is increased. There is a need to. Since Mo has a high resistance value and is an expensive material, it is not desirable to increase the thickness of the Mo electrode from the viewpoint of the electrical characteristics and material cost of the electronic device.

特開2009−283508号公報JP 2009-283508 A

本発明の目的は、半導体及び電極から選ばれた材料にドーパントを簡単な方法で効率よく添加できるようにしたドーパントの拡散方法及び、半導体層にドーパントが添加されて特性が向上した電子デバイスの製造方法を提供することにある。   An object of the present invention is to provide a dopant diffusion method in which a dopant can be efficiently added to a material selected from a semiconductor and an electrode by a simple method, and to manufacture an electronic device having improved characteristics by adding a dopant to a semiconductor layer. It is to provide a method.

上記目的を達成するため、本発明のドーパントの拡散方法は、半導体及び電極から選ばれた第1材料に、ドーパントを含む第2材料を接触させ、両者を接触させた状態で加熱処理を行って前記第2材料に含まれる前記ドーパントを前記第1材料に移行させた後、前記第1材料から前記第2材料を離反させることを特徴とする。   In order to achieve the above object, the dopant diffusion method of the present invention is such that a first material selected from a semiconductor and an electrode is brought into contact with a second material containing a dopant, and heat treatment is performed in a state in which both materials are in contact with each other. After the dopant contained in the second material is transferred to the first material, the second material is separated from the first material.

本発明のドーパントの拡散方法は、前記第1材料から前記第2材料を離反させた後、第1材料上に、半導体及び電極から選ばれた第3材料を積層し、加熱処理を行うことが好ましい。   In the dopant diffusion method of the present invention, after the second material is separated from the first material, a third material selected from a semiconductor and an electrode is laminated on the first material, and heat treatment is performed. preferable.

本発明のドーパントの拡散方法は、前記第1材料が電極であり、前記第3材料が半導体であることが好ましい。この態様においては、前記第1材料が、前記第3材料側にMoを含む金属層が配置された電極であり、前記第3材料が、Cuと、In及び/又はGaと、Se及び/又はSとを少なくとも含有する半導体、又は、Cuと、Znと、Snと、Se及び/又はSとを少なくとも含む半導体であることが好ましい。   In the dopant diffusion method of the present invention, it is preferable that the first material is an electrode and the third material is a semiconductor. In this aspect, the first material is an electrode in which a metal layer containing Mo is disposed on the third material side, and the third material is Cu, In and / or Ga, Se and / or A semiconductor containing at least S, or a semiconductor containing at least Cu, Zn, Sn, Se and / or S is preferable.

本発明のドーパントの拡散方法は、前記ドーパントが、アルカリ金属であることが好ましい。   In the dopant diffusion method of the present invention, the dopant is preferably an alkali metal.

また、本発明の電子デバイスの製造方法は、基板と、該基板上に積層された、第1電極と、半導体層と、第2電極とを含み、前記第1電極と前記第2電極との間に前記半導体層が配置された電子デバイスの製造方法において、前記第1電極に、ドーパントを含む材料を接触させ、両者を接触させた状態で加熱処理を行って前記材料に含まれるドーパントを前記第1電極に移行させたのち、前記第1電極から前記材料を離反させ、次いで、前記第1電極上に、前記半導体層を形成し、前記半導体層の形成中又は形成後に加熱処理を行うことを特徴とする。   The method for manufacturing an electronic device according to the present invention includes a substrate, a first electrode, a semiconductor layer, and a second electrode laminated on the substrate, wherein the first electrode and the second electrode In the method of manufacturing an electronic device in which the semiconductor layer is disposed between the first electrode, the material containing the dopant is brought into contact with the first electrode, and the dopant contained in the material is subjected to heat treatment in a state where both are in contact with each other. After the transition to the first electrode, the material is separated from the first electrode, and then the semiconductor layer is formed on the first electrode, and heat treatment is performed during or after the formation of the semiconductor layer. It is characterized by.

本発明の電子デバイスの製造方法は、前記第1電極が、前記半導体層側にMoを含む金属層が配置された電極であり、前記半導体層を、Cuと、In及び/又はGaと、Se及び/又はSとを少なくとも含有する半導体、又は、Cuと、Znと、Snと、Se及び/又はSとを少なくとも含む半導体で形成することが好ましい。   In the electronic device manufacturing method of the present invention, the first electrode is an electrode in which a metal layer containing Mo is disposed on the semiconductor layer side, and the semiconductor layer is formed of Cu, In and / or Ga, and Se. And / or a semiconductor containing at least S, or a semiconductor containing at least Cu, Zn, Sn, Se and / or S.

本発明によれば、半導体及び電極から選ばれた第1材料に、ドーパントを含む第2材料を接触させ、両者を接触させた状態で加熱処理することで、第2材料に含まれるドーパントが、熱によって第1材料側に拡散して移行する。そして、第1材料にドーパントを移行させたのち、第1材料から第2材料を離反させることで、ドーパンドが添加された第1材料が得られる。また、ドーパントを含む第2材料は、第1材料から離反させた後、繰り返し利用できる。   According to the present invention, the first material selected from the semiconductor and the electrode is brought into contact with the second material containing the dopant, and the heat treatment is performed in a state in which both are brought into contact, whereby the dopant contained in the second material is It diffuses and moves to the first material side by heat. Then, after the dopant is transferred to the first material, the second material is separated from the first material, whereby the first material to which the dopant is added is obtained. The second material containing the dopant can be used repeatedly after being separated from the first material.

このように、本発明では、ソーダライムガラス基板などのようなドーパントを含有する基板上に、第1材料を形成する必要がないので、基板選択の自由度が高く汎用的である。また、ソーダライムガラス薄膜や、Na含有薄膜などのような、ドーパントを添加するための薄膜を第1材料上に形成する必要がないので、第1材料上に、他の材料で構成された層を密着性よく積層できる。また、ドーパントを含む電極材料を用いて電極を形成する場合、電極の加工性の問題からドーパント濃度を高めることができないことがあるので、電極の厚みが大きくなって、導電性や材料コストの面で不利になることがあるが、本発明によれば、第1材料の厚みが薄くても、ドーパント濃度を十分に高めることができる。また、本発明では、ドライプロセスで第1材料にドーパントを添加できるため、例えば水分によって特性が劣化する電子デバイスにも効率良くドーパントを添加できる。   Thus, in the present invention, since it is not necessary to form the first material on a substrate containing a dopant such as a soda lime glass substrate, the substrate is highly flexible and versatile. Moreover, since it is not necessary to form a thin film for adding a dopant, such as a soda lime glass thin film or a Na-containing thin film, on the first material, a layer made of another material on the first material. Can be laminated with good adhesion. In addition, when an electrode is formed using an electrode material containing a dopant, the dopant concentration may not be increased due to the problem of electrode processability, which increases the thickness of the electrode, leading to conductivity and material cost. However, according to the present invention, the dopant concentration can be sufficiently increased even if the first material is thin. Moreover, in this invention, since a dopant can be added to a 1st material with a dry process, a dopant can be efficiently added also to the electronic device from which a characteristic deteriorates, for example with a water | moisture content.

本発明のドーパントの拡散方法の第1の実施形態を示す工程図である。It is process drawing which shows 1st Embodiment of the diffusion method of the dopant of this invention. 本発明のドーパントの拡散方法の第2の実施形態を示す工程図である。It is process drawing which shows 2nd Embodiment of the diffusion method of the dopant of this invention. 本発明の電子デバイスの製造方法の工程図である。It is process drawing of the manufacturing method of the electronic device of this invention.

本発明のドーパントの拡散方法の第1の実施形態について、図1を用いて説明する。   1st Embodiment of the diffusion method of the dopant of this invention is described using FIG.

図1(a)に示すように、半導体及び電極から選ばれた第1材料1に、ドーパント5を含む第2材料2を接触させる。なお、第1材料1は、電極又は半導体の単層であってもよいし、半導体と電極との積層体であってもよい。   As shown to Fig.1 (a), the 2nd material 2 containing the dopant 5 is made to contact the 1st material 1 chosen from the semiconductor and the electrode. Note that the first material 1 may be an electrode or a single layer of a semiconductor, or may be a stacked body of a semiconductor and an electrode.

ドーパント5の種類は、電子デバイスにより異なるが、Na、K、Liなどアルカリ金属が好ましく、Naが特に好ましい。   Although the kind of dopant 5 changes with electronic devices, alkali metals, such as Na, K, and Li, are preferable and Na is especially preferable.

ドーパント5を含む第2材料2の種類としては、特に限定は無いが、例えば、(1)ガラス基板、金属基板、ポリアミド基板、ポリイミド基板、セラミックス基板等の耐熱性を有する基板の表面に、ソーダライムガラス薄膜、NaF薄膜等のドーパントを含有する薄膜を形成したもの、(2)Mo、Ag、Cu、Au、Al、Mg、W、Co、Zn、Ni及びこれらの合金、セラミックス、シリコン等を母材とし、これにドーパントを添加した材料を、板状などの形状に成形したもの、(3)ソーダライムガラス基板等のドーパントを含有する基板等が挙げられる。   The type of the second material 2 including the dopant 5 is not particularly limited. For example, (1) soda is applied to the surface of a heat-resistant substrate such as a glass substrate, a metal substrate, a polyamide substrate, a polyimide substrate, or a ceramic substrate. A thin film containing a dopant such as a lime glass thin film or NaF thin film, (2) Mo, Ag, Cu, Au, Al, Mg, W, Co, Zn, Ni and alloys thereof, ceramics, silicon, etc. Examples of the base material include a material obtained by adding a dopant to the base material and formed into a plate shape or the like, and (3) a substrate containing a dopant such as a soda lime glass substrate.

第2材料2の接触側の面の寸法は、第1材料1の接触側の面の寸法と同じか、あるいはそれよりも大きいことが好ましい。これによれば、第1材料1の接触側の面の全面に、第2材料2を接触させることができるので、第1材料1の面方向にドーパントを均一に添加できる。   The dimension of the contact side surface of the second material 2 is preferably the same as or larger than the dimension of the contact side surface of the first material 1. According to this, since the 2nd material 2 can be made to contact the whole surface of the contact side of the 1st material 1, a dopant can be uniformly added to the surface direction of the 1st material 1.

次に、図1(b)に示すように、第1材料1に第2材料2を接触させた状態を維持しつつ、加熱処理を行う。こうすることで、第2材料2の結晶粒界に多く存在するドーパントが、熱によって第1材料1側に粒界拡散して移行し、第1材料1にドーパント5が添加される。   Next, as shown in FIG. 1B, heat treatment is performed while maintaining the state in which the second material 2 is in contact with the first material 1. By doing so, a large amount of the dopant existing in the crystal grain boundary of the second material 2 is diffused and transferred to the first material 1 side by heat, and the dopant 5 is added to the first material 1.

加熱条件は、第1材料1の種類により異なるが、一般的には100〜600℃で、10〜60分行うことが好ましい。特に、第1材料1の最表層が、Moを含む金属層で形成されている場合、100〜600℃で、10〜60分行うことが好ましく、300〜450℃で、10〜30分行うことがより好ましい。加熱温度が100℃未満であると、ドーパントの拡散速度が遅く、加熱時間を長めに設定する必要性が生じる。加熱温度が600℃を超えると、第1材料1が熱的損傷を受けることがある。加熱時間が10分未満であると、第1材料1にドーパントを十分に添加できないことがある。加熱時間が60分を超えると、生産性が低下する傾向にある。   Although heating conditions change with kinds of the 1st material 1, generally it is preferable to carry out at 100-600 degreeC for 10 to 60 minutes. In particular, when the outermost layer of the first material 1 is formed of a metal layer containing Mo, it is preferably performed at 100 to 600 ° C. for 10 to 60 minutes, and at 300 to 450 ° C. for 10 to 30 minutes. Is more preferable. When the heating temperature is less than 100 ° C., the diffusion rate of the dopant is slow, and it is necessary to set the heating time longer. If the heating temperature exceeds 600 ° C., the first material 1 may be thermally damaged. If the heating time is less than 10 minutes, the dopant may not be sufficiently added to the first material 1. When the heating time exceeds 60 minutes, productivity tends to decrease.

加熱処理は、大気雰囲気、真空雰囲気、不活性ガス雰囲気のいずれの雰囲気で行ってもよい。好ましくは、ドーパントを含む材料の表面酸化を低減できるという理由から真空雰囲気または不活性ガス雰囲気で加熱処理を行う。   The heat treatment may be performed in any of an air atmosphere, a vacuum atmosphere, and an inert gas atmosphere. Preferably, the heat treatment is performed in a vacuum atmosphere or an inert gas atmosphere because surface oxidation of the material containing the dopant can be reduced.

加熱処理を行った後、図1(c)に示すように、第1材料1から第2材料2を離反させる。こうして、ドーパント5が添加された第1材料1が得られる。   After performing the heat treatment, the second material 2 is separated from the first material 1 as shown in FIG. Thus, the first material 1 to which the dopant 5 is added is obtained.

なお、第1材料1のドーパント含有量が不十分な場合は、第1材料1に第2材料2を接触させ、加熱処理を行った後、第1材料1から第2材料2を離反させる操作を繰り返し行ってもよい。また、加熱処理時間を長めに設定してもよい。   When the dopant content of the first material 1 is insufficient, the second material 2 is brought into contact with the first material 1 and heat treatment is performed, and then the second material 2 is separated from the first material 1. May be repeated. Further, the heat treatment time may be set longer.

本発明のドーパントの拡散方法の第2の実施形態について、図2を用いて説明する。   A second embodiment of the dopant diffusion method of the present invention will be described with reference to FIG.

図2(a)〜(c)の工程までは、上記実施形態と同様である。すなわち、図2(a)に示すように、第1材料1に、ドーパント5を含む第2材料2を接触させる。次に、図2(b)に示すように、両者を接触させた状態を維持しつつ、加熱処理を行う。次に、加熱処理を行った後、図2(c)に示すように、第1材料1から第2材料2を離反させる。   The steps up to the steps of FIGS. 2A to 2C are the same as in the above embodiment. That is, as shown in FIG. 2A, the second material 2 containing the dopant 5 is brought into contact with the first material 1. Next, as shown in FIG.2 (b), heat processing is performed, maintaining the state which made both contact. Next, after the heat treatment, the second material 2 is separated from the first material 1 as shown in FIG.

この実施形態では、第1材料1から第2材料2を離反させた後、図2(d)に示すように、第1材料1上に、第3材料3を積層し、加熱処理を行う。加熱処理は、第3材料3の積層と同時に行ってもよく、積層後に行ってもよい。こうすることで、図2(e)に示すように、第1材料1の結晶粒界に多く存在するドーパントが熱によって第3材料3側に粒界拡散して移行し、第3材料3にドーパント5を添加できる。このように、この実施形態では、第2材料2から第1材料1にドーパント5を移行させた後、第1材料1に添加されたドーパント5を第3材料3に移行させるので、第2材料2を第3材料3に直接接触させることなく、第2材料2に含まれるドーパント5を第3電極3に添加できる。このため、半導体等のように、損傷や特性の劣化などを考慮して、電子デバイスの構成部材以外の部材などを接触させることを控えた方が好ましい材料に対して、電子デバイスの構成部材以外の材料等を接触させることなくドーパントを添加できる。   In this embodiment, after separating the second material 2 from the first material 1, as shown in FIG. 2D, the third material 3 is laminated on the first material 1 and heat treatment is performed. The heat treatment may be performed simultaneously with the lamination of the third material 3, or may be performed after the lamination. By doing so, as shown in FIG. 2 (e), a large amount of dopant present at the grain boundaries of the first material 1 diffuses and migrates to the third material 3 side due to heat and moves to the third material 3. Dopant 5 can be added. As described above, in this embodiment, the dopant 5 added to the first material 1 is transferred to the third material 3 after the dopant 5 is transferred from the second material 2 to the first material 1. The dopant 5 contained in the second material 2 can be added to the third electrode 3 without directly contacting 2 with the third material 3. For this reason, it is preferable to refrain from contacting members other than electronic device components, such as semiconductors, in consideration of damage, deterioration of characteristics, etc. The dopant can be added without contacting the material.

第3材料3は、半導体、電極が挙げられ、半導体が好ましい。半導体としては、CuInSe、CuInS、CuGaSe、CuGaS、Cu(In,Ga)Se、Cu(In,Ga)S、Cu(In,Ga)(S,Se)等の、Cuと、In及び/又はGaと、Se及び/又はSとを少なくとも含むカルコパイライト構造の半導体や、CuZnSnS、CuZnSnSe、CuZnSn(S,Se)等の、Cuと、Znと、Snと、Se及び/又はSとを少なくとも含むスタナイト構造又はケステライト構造の半導体が好ましく挙げられる。これらの半導体は、ドーパントを添加することで、太陽電池の変換効率が向上するなど、電子デバイスの特性が向上する。 Examples of the third material 3 include a semiconductor and an electrode, and a semiconductor is preferable. As the semiconductor, CuInSe 2 , CuInS 2 , CuGaSe 2 , CuGaS 2 , Cu (In, Ga) Se 2 , Cu (In, Ga) S 2 , Cu (In, Ga) (S, Se) 2, etc. A semiconductor having a chalcopyrite structure containing at least In and / or Ga and Se and / or S, Cu 2 ZnSnS 4 , Cu 2 ZnSnSe 4 , Cu 2 ZnSn (S, Se) 4 , Cu, A semiconductor having a stannite structure or a kesterite structure containing at least Zn, Sn, Se and / or S is preferred. In these semiconductors, the addition of a dopant improves the characteristics of the electronic device, such as improving the conversion efficiency of the solar cell.

この実施形態において、第1材料1は、電極が好ましく、第3材料3側にMoを含む金属層(以下、Mo層ともいう)が配置された電極が特に好ましい。これによれば、Se等に対する腐食耐性が得られ、第1材料1上に半導体層を形成する際における、第1材料1の腐食劣化を防止できる。   In this embodiment, the first material 1 is preferably an electrode, and an electrode in which a metal layer containing Mo (hereinafter also referred to as Mo layer) is disposed on the third material 3 side is particularly preferable. According to this, corrosion resistance to Se or the like can be obtained, and corrosion degradation of the first material 1 can be prevented when the semiconductor layer is formed on the first material 1.

また、Mo層は、Moよりも電気抵抗率が小さい導電材料を含む金属層(以下、低抵抗金属層ともいう)上に積層されていることが好ましい。Moよりも電気抵抗率が小さい導電材料としては、20℃における電気抵抗率が、5.3×10−8Ω・m未満の導電材料が好ましい。こうすることで、電極の電気抵抗率を、Mo単独で構成した場合よりも小さくできる。低抵抗導電材料の具体例としては、Ag、Cu、Au、Al、Mg、W及びこれらの合金が挙げられ、これらの1種又は2種以上を好ましく用いることができる。 Moreover, it is preferable that the Mo layer is laminated | stacked on the metal layer (henceforth a low resistance metal layer) containing the electrically-conductive material whose electric resistivity is smaller than Mo. As the conductive material having an electrical resistivity smaller than that of Mo, a conductive material having an electrical resistivity at 20 ° C. of less than 5.3 × 10 −8 Ω · m is preferable. By carrying out like this, the electrical resistivity of an electrode can be made smaller than the case where it comprises Mo alone. Specific examples of the low-resistance conductive material include Ag, Cu, Au, Al, Mg, W, and alloys thereof, and one or more of these can be preferably used.

Mo層の膜厚は、70nm以上が好ましく、200nm以上がより好ましい。Mo層の膜厚が薄過ぎると、第3材料3側に最表層にMo層を配置しても、Se等に対する腐食耐性が低下する等、電子デバイスの製造に支障が生じることがある。また、Mo層の膜厚は1000nm以下が好ましく、600nm以下がより好ましい。Mo層が厚過ぎると、形成に時間がかかる等生産性が悪くなり、更には、基板材料との応力差により剥離が生じやすくなる傾向にある。   The film thickness of the Mo layer is preferably 70 nm or more, and more preferably 200 nm or more. If the film thickness of the Mo layer is too thin, even if the Mo layer is disposed on the outermost layer on the third material 3 side, the corrosion resistance to Se or the like may be reduced, which may hinder the manufacture of the electronic device. The film thickness of the Mo layer is preferably 1000 nm or less, and more preferably 600 nm or less. If the Mo layer is too thick, it will take a long time to form, resulting in poor productivity, and further, peeling tends to occur due to a stress difference with the substrate material.

次に、本発明の電子デバイスの製造方法について説明する。   Next, the manufacturing method of the electronic device of this invention is demonstrated.

本発明の電子デバイスの製造方法において、電子デバイスの種類は特に限定はない。基板と、該基板上に積層された、第1電極と、半導体層と、第2電極とを含み、第1電極と第2電極との間に半導体層が配置されたものであればよい。具体的には、太陽電池、光センサ等が挙げられる。以下、図3を用い、太陽電池の製造方法を例に挙げて、本発明の電子デバイスの製造方法について詳しく説明する。なお、この実施形態において、裏面電極12が本発明における「第1電極」に相当し、光電変換層14が本発明における「半導体層」に相当し、透明電極16が本発明における「第2電極」に相当する。   In the electronic device manufacturing method of the present invention, the type of electronic device is not particularly limited. What is necessary is just to include a substrate, a first electrode, a semiconductor layer, and a second electrode laminated on the substrate, and the semiconductor layer is disposed between the first electrode and the second electrode. Specifically, a solar cell, an optical sensor, etc. are mentioned. Hereinafter, the method for manufacturing an electronic device of the present invention will be described in detail with reference to FIG. In this embodiment, the back electrode 12 corresponds to the “first electrode” in the present invention, the photoelectric conversion layer 14 corresponds to the “semiconductor layer” in the present invention, and the transparent electrode 16 corresponds to the “second electrode” in the present invention. Is equivalent to.

まず、図3(a)に示すように、基板11上に、裏面電極12を形成する。裏面電極12の形成方法は、特に限定は無い。スパッタ法、蒸着法など従来公知の方法で形成できる。   First, as shown in FIG. 3A, the back electrode 12 is formed on the substrate 11. The method for forming the back electrode 12 is not particularly limited. It can be formed by a conventionally known method such as sputtering or vapor deposition.

裏面電極12は、最表層がMoを含む金属層(Mo層)で形成されていることが好ましく、上述した低抵抗金属層にMo層が積層されていることがより好ましい。これによれば、Se等に対する腐食耐性が得られ、裏面電極12上に光電変換層14を形成する際における、裏面電極12の腐食劣化を防止できる。そして、Mo層を上述した低抵抗金属層に積層することで、電極の電気抵抗をより小さくできる。   As for the back electrode 12, it is preferable that the outermost layer is formed with the metal layer (Mo layer) containing Mo, and it is more preferable that the Mo layer is laminated | stacked on the low resistance metal layer mentioned above. According to this, corrosion resistance with respect to Se or the like is obtained, and corrosion degradation of the back electrode 12 when the photoelectric conversion layer 14 is formed on the back electrode 12 can be prevented. And the electrical resistance of an electrode can be made smaller by laminating | stacking Mo layer on the low-resistance metal layer mentioned above.

次に、図3(b)に示すように、裏面電極12の表面に、ドーパントを含有する材料(以下、ドーパント含有材料という)13を接触させる。ドーパント含有材料13は、上述したドーパントの拡散方法で説明した第2材料2と同様のものを用いることができる。   Next, as shown in FIG. 3B, a material containing a dopant (hereinafter referred to as a dopant-containing material) 13 is brought into contact with the surface of the back electrode 12. As the dopant-containing material 13, the same material as the second material 2 described in the above-described dopant diffusion method can be used.

次に、裏面電極12とドーパント含有材料13とが接触した状態を維持しつつ、加熱処理を行う。このように加熱処理することで、ドーパント含有材料13の結晶粒界に多く存在するドーパントが、熱によって裏面電極12側に粒界拡散する。   Next, heat treatment is performed while maintaining the state in which the back electrode 12 and the dopant-containing material 13 are in contact with each other. By performing the heat treatment in this manner, a large amount of dopant existing in the crystal grain boundary of the dopant-containing material 13 is diffused to the back electrode 12 side by heat.

加熱処理条件は、裏面電極12の材質により異なるが、例えば、裏面電極12の最表層が、Moを含む金属層で形成されている場合、真空雰囲気または不活性ガス雰囲気下にて、300〜450℃で、10〜30分行うことが好ましい。このように加熱処理することで、裏面電極12にドーパントを効率よく添加できる。   Although the heat treatment conditions vary depending on the material of the back electrode 12, for example, when the outermost layer of the back electrode 12 is formed of a metal layer containing Mo, 300 to 450 in a vacuum atmosphere or an inert gas atmosphere. It is preferable to carry out at 10 degreeC for 10 to 30 minutes. By performing the heat treatment in this manner, the dopant can be efficiently added to the back electrode 12.

次に、図3(c)に示すように、裏面電極12から第2材料13を離反させる。   Next, as shown in FIG. 3C, the second material 13 is separated from the back electrode 12.

そして、図3(d)に示すように、裏面電極12上に、光電変換層14、バッファー層15、透明電極16を順次形成する。上記各層の成膜温度が高い場合は、各層の形成時に、光電変換層14が加熱処理される。その結果、裏面電極12の結晶粒界に多く存在するドーパントが熱拡散により光電変換層14に移行し、光電変換層14にドーパントが添加される。なお、各層の成膜温度が低く、各層の形成時に光電変換層14を十分に加熱することが困難な場合は、光電変換層14を形成した後、加熱処理を行って、裏面電極12に含まれるドーパントを、光電変換層14に移行させる。   Then, as illustrated in FIG. 3D, the photoelectric conversion layer 14, the buffer layer 15, and the transparent electrode 16 are sequentially formed on the back electrode 12. When the film formation temperature of each of the above layers is high, the photoelectric conversion layer 14 is heat-treated at the time of forming each layer. As a result, a large amount of dopant present in the crystal grain boundary of the back electrode 12 moves to the photoelectric conversion layer 14 by thermal diffusion, and the dopant is added to the photoelectric conversion layer 14. In addition, when the film-forming temperature of each layer is low and it is difficult to sufficiently heat the photoelectric conversion layer 14 at the time of forming each layer, the photoelectric conversion layer 14 is formed, and then heat treatment is performed so that the layer is included in the back electrode 12. The dopant to be transferred is transferred to the photoelectric conversion layer 14.

光電変換層14を構成する半導体は、特に限定はないが、Cuと、In及び/又はGaと、Se及び/又はSとを少なくとも含むカルコパイライト構造の半導体や、Znと、Snと、Se及び/又はSとを少なくとも含むスタナイト構造又はケステライト構造の半導体が好ましい。これらの半導体を光電変換層に用いることで、変換効率の高い太陽電池が得られる。また、これらの半導体は成膜温度が比較的高温であるため、加熱処理を別途行わなくても、光電変換層14の成膜中に、裏面電極12に含まれるドーパントを光電変換層14側に拡散させることができる。   The semiconductor constituting the photoelectric conversion layer 14 is not particularly limited, but a chalcopyrite structure semiconductor including at least Cu, In and / or Ga, Se and / or S, Zn, Sn, Se and A semiconductor having a stannite structure or a kesterite structure containing at least S and / or S is preferable. By using these semiconductors for the photoelectric conversion layer, a solar cell with high conversion efficiency can be obtained. In addition, since these semiconductors have a relatively high film formation temperature, the dopant contained in the back electrode 12 is moved to the photoelectric conversion layer 14 side during the film formation of the photoelectric conversion layer 14 without performing a separate heat treatment. Can be diffused.

Cuと、In及び/又はGaと、Se及び/又はSとを少なくとも含むカルコパイライト構造の半導体としては、CuInSe、CuInS、CuGaSe、CuGaS、Cu(In,Ga)Se、Cu(In,Ga)S、Cu(In,Ga)(S,Se)等が挙げられる。この半導体は、セレン化法、多元同時蒸着法等の方法で形成できる。Cu(In,Ga)Seを例に挙げて説明すると、セレン化法では、裏面電極12上に、スパッタ法、蒸着法等の方法でCu、In、Gaを含むプリカーサ膜を形成し、該プリカーサ膜をHSeガス及び/又はHSガス雰囲気下で熱処理することで形成できる。また、多元同時蒸着法では、裏面電極12上に、Cu、In、Ga、Seを含む原料を、同時蒸着することで形成できる。 As a semiconductor having a chalcopyrite structure including at least Cu, In and / or Ga, and Se and / or S, CuInSe 2 , CuInS 2 , CuGaSe 2 , CuGaS 2 , Cu (In, Ga) Se 2 , Cu ( In, Ga) S 2, Cu (In, Ga) (S, Se) 2 , and the like. This semiconductor can be formed by a method such as a selenization method or a multi-element simultaneous vapor deposition method. To describe Cu (In, Ga) Se 2 as an example, in the selenization method, a precursor film containing Cu, In, and Ga is formed on the back electrode 12 by a method such as sputtering or vapor deposition. The precursor film can be formed by heat treatment in an atmosphere of H 2 Se gas and / or H 2 S gas. In the multi-source simultaneous vapor deposition method, a raw material containing Cu, In, Ga, and Se can be formed on the back electrode 12 by simultaneous vapor deposition.

Cuと、Znと、Snと、Se及び/又はSとを少なくとも含むスタナイト構造又はケステライト構造の半導体としては、CuZnSnS、CuZnSnSe、CuZnSn(S,Se)等が挙げられる。この半導体は、硫化法、多元同時蒸着法等、従来公知の方法で成膜できる。CuZnSnSを例に挙げて説明すると、硫化法では、裏面電極12上に、スパッタ法、蒸着法等の方法でCu、Zn、Snを含むプリカーサ膜を形成し、該プリカーサ膜をHSガス雰囲気下で熱処理することで形成できる。また、多元同時蒸着法では、裏面電極12上に、Cu、Zn、Sn、Sを含む原料を、同時蒸着することで形成できる。 Examples of the semiconductor having a stannite structure or a kesterite structure containing at least Cu, Zn, Sn, Se, and / or S include Cu 2 ZnSnS 4 , Cu 2 ZnSnSe 4 , and Cu 2 ZnSn (S, Se) 4. It is done. This semiconductor can be formed by a conventionally known method such as a sulfidation method or a multi-source co-evaporation method. To describe Cu 2 ZnSnS 4 as an example, in the sulfurization method, a precursor film containing Cu, Zn, and Sn is formed on the back electrode 12 by a method such as sputtering or vapor deposition, and the precursor film is formed as H 2. It can be formed by heat treatment in an S gas atmosphere. In the multi-source simultaneous vapor deposition method, a raw material containing Cu, Zn, Sn, and S can be formed on the back electrode 12 by simultaneous vapor deposition.

光電変換層14の膜厚は、種類により異なる。例えば、カルコパイライト構造の半導体の場合、1.2〜2.0μmが好ましい。スタナイト構造又はケステライト構造の半導体の場合、1.0〜3.0μmが好ましい。   The film thickness of the photoelectric conversion layer 14 varies depending on the type. For example, in the case of a semiconductor having a chalcopyrite structure, 1.2 to 2.0 μm is preferable. In the case of a semiconductor having a stannite structure or a kesterite structure, 1.0 to 3.0 μm is preferable.

バッファー層15は、禁止帯幅の広いn型の透明導電膜で構成される。具体的な化合物としては、CdS、ZnO、ZnS、Zn(OH)、ZnInSe、ZnMgO、In、In等が挙げられる。バッファー層15の形成方法は、特に限定は無く、スパッタ法、蒸着法など従来公知の方法で形成できる。 The buffer layer 15 is composed of an n-type transparent conductive film having a wide forbidden band. Specific compounds, CdS, ZnO, ZnS, Zn (OH) 2, ZnInSe 2, ZnMgO, In 2 O 3, In 2 S 3 , and the like. The method for forming the buffer layer 15 is not particularly limited, and can be formed by a conventionally known method such as sputtering or vapor deposition.

透明電極16は、ZnO、SnO、In、ITO、CdO、CdSnO、CdSなどの透明性導電材料で構成される。透明電極16の形成方法は、特に限定は無く、スパッタ法、蒸着法など従来公知の方法で形成できる。 The transparent electrode 16 is, ZnO, SnO 2, In 2 O 3, ITO, CdO, formed of a transparent conductive material such as Cd 2 SnO 4, CdS. The method for forming the transparent electrode 16 is not particularly limited, and can be formed by a conventionally known method such as a sputtering method or a vapor deposition method.

なお、光電変換層14を形成した後、バッファー層15を形成する前に、光電変換層14の表面にドーパント含有材料13を接触させて加熱処理を行い、次いで、光電変換層14からドーパント含有材料13を離反させた後、光電変換層14上に、バッファー層15、透明電極16を順次形成してもよい。このようにすることで、光電変換層14の上下両面から光電変換層14にドーパントを添加できるので、光電変換層14により多くのドーパントを短時間で添加できる。   In addition, after forming the photoelectric converting layer 14, before forming the buffer layer 15, the dopant containing material 13 is made to contact the surface of the photoelectric converting layer 14, and it heat-processes, and then the dopant containing material from the photoelectric converting layer 14 is made. After separating 13, the buffer layer 15 and the transparent electrode 16 may be sequentially formed on the photoelectric conversion layer 14. By doing in this way, since a dopant can be added to the photoelectric converting layer 14 from the upper and lower surfaces of the photoelectric converting layer 14, many dopants can be added to the photoelectric converting layer 14 in a short time.

また、基板11上に、裏面電極12、光電変換層14を順次形成した後、バッファー層15を形成する前に、光電変換層14の表面にドーパント含有材料13を接触させて加熱処理を行い、次いで、光電変換層14からドーパント含有材料13を離反させた後、光電変換層14上に、バッファー層15、透明電極16を順次形成してもよい。   In addition, after the back electrode 12 and the photoelectric conversion layer 14 are sequentially formed on the substrate 11, before the buffer layer 15 is formed, the dopant-containing material 13 is brought into contact with the surface of the photoelectric conversion layer 14, and heat treatment is performed. Next, after separating the dopant-containing material 13 from the photoelectric conversion layer 14, the buffer layer 15 and the transparent electrode 16 may be sequentially formed on the photoelectric conversion layer 14.

(実施例1)
Moをスパッタリングターゲットとして用い、基板とスパッタリングターゲットとが平行に配置された状態でマグネトロンスパッタリング法により、無アルカリガラス基板上にMo薄膜を500nm成膜した。Mo薄膜の成膜時の基板温度は室温、スパッタリングターゲットと基板との間隔は10cm、スパッタ装置に供給するアルゴンガス流量は50sccm、スパッタ装置内の圧力は0.4Pa、成膜速度7.7nm/minとした。スパッタリングターゲットの電力投入にはRF電源を用い、300Wの電力を投入した。成膜したMo薄膜を二次イオン質量分析法(SIMS)により元素分析したところ、Na、Kは検出されなかった。
次に、Naを5at%含有するMo板(以下、「MoNa板」と記載する)を、Mo薄膜のMo成膜面に接触させ、9.8kPaの圧接力で圧接した。そして、この状態を維持しながら真空加熱装置に入れ、装置に具備されている基板加熱用ヒーターを用いて、30分間、Mo膜を400℃に加熱した。加熱処理後、真空加熱装置から取出し、MoNa板を、Mo薄膜から離反させた。MoNa板を離反させたMo薄膜を二次イオン質量分析法(SIMS)で元素分析したところ、Naを含有していることが確認できた。
次に、Mo薄膜の表面に、スパッタリング法で、In/(Cu,Ga)積層膜を形成し、In/(Cu,Ga)積層膜を、HSeガス雰囲気下にて550℃でアニールしてセレン化を行い、Cu(In,Ga)Seで構成される光電変換層を2.0μm成膜した。この光電変換層を二次イオン質量分析法(SIMS)で元素分析したところ、Naを含有していることが確認できた。
次に、光電変換層上に、溶液成長法でCdS膜を30〜50nm成膜してバッファー層を形成した。
そして、バッファー層上に、ガリウムをドープしたZnO層をスパッタ法により300nm成膜して、透明電極を形成し、CIGS系太陽電池を製造した。
Example 1
Mo was used as a sputtering target, and a Mo thin film having a thickness of 500 nm was formed on an alkali-free glass substrate by a magnetron sputtering method in a state where the substrate and the sputtering target were arranged in parallel. The substrate temperature during deposition of the Mo thin film is room temperature, the distance between the sputtering target and the substrate is 10 cm, the flow rate of argon gas supplied to the sputtering apparatus is 50 sccm, the pressure in the sputtering apparatus is 0.4 Pa, and the deposition rate is 7.7 nm / It was set to min. An RF power source was used to power on the sputtering target, and 300 W power was applied. Na and K were not detected when the Mo thin film formed was subjected to elemental analysis by secondary ion mass spectrometry (SIMS).
Next, a Mo plate containing 5 at% Na (hereinafter referred to as “MoNa plate”) was brought into contact with the Mo film-forming surface of the Mo thin film, and was pressed with a pressing force of 9.8 kPa. And while maintaining this state, it put into the vacuum heating apparatus and heated the Mo film | membrane to 400 degreeC for 30 minutes using the heater for a substrate heating with which the apparatus was equipped. After the heat treatment, it was taken out from the vacuum heating device, and the MoNa plate was separated from the Mo thin film. When the Mo thin film separated from the MoNa plate was subjected to elemental analysis by secondary ion mass spectrometry (SIMS), it was confirmed that it contained Na.
Next, an In / (Cu, Ga) laminated film is formed on the surface of the Mo thin film by sputtering, and the In / (Cu, Ga) laminated film is annealed at 550 ° C. in an H 2 Se gas atmosphere. Then, selenization was performed, and a photoelectric conversion layer made of Cu (In, Ga) Se 2 was formed to a thickness of 2.0 μm. Elemental analysis of this photoelectric conversion layer by secondary ion mass spectrometry (SIMS) confirmed that it contained Na.
Next, a CdS film having a thickness of 30 to 50 nm was formed on the photoelectric conversion layer by a solution growth method to form a buffer layer.
Then, a ZnO layer doped with gallium was formed to a thickness of 300 nm on the buffer layer by a sputtering method, a transparent electrode was formed, and a CIGS solar cell was manufactured.

(実施例2)
無アルカリガラス基板上に、実施例1と同様の条件でMo薄膜を500nm成膜した。
次に、Kを5at%含有するMo板(以下、「MoK板」と記載する)を、実施例1と同様の条件で、Mo薄膜のMo成膜面に接触させて加熱処理を行った。加熱処理後、MoK板をMo薄膜から離反させた。MoK板を離反させたMo薄膜を二次イオン質量分析法(SIMS)で元素分析したところ、Kを含有していることが確認できた。
次に、実施例1と同様の条件で、Mo薄膜上に光電変換層、バッファー層、透明電極を形成し、CIGS系太陽電池を製造した。
(Example 2)
On an alkali-free glass substrate, a Mo thin film having a thickness of 500 nm was formed under the same conditions as in Example 1.
Next, heat treatment was performed by bringing a Mo plate containing 5 at% K (hereinafter referred to as “MoK plate”) into contact with the Mo film-forming surface of the Mo thin film under the same conditions as in Example 1. After the heat treatment, the MoK plate was separated from the Mo thin film. Elemental analysis of the Mo thin film separated from the MoK plate by secondary ion mass spectrometry (SIMS) confirmed that it contained K.
Next, a photoelectric conversion layer, a buffer layer, and a transparent electrode were formed on the Mo thin film under the same conditions as in Example 1 to manufacture a CIGS solar cell.

(実施例3)
無アルカリガラス基板上に、実施例1と同様の条件でMo薄膜を500nm成膜した。
次に、ソーダライムガラス板を、実施例1と同様の条件で、Mo薄膜のMo成膜面に接触させて加熱処理を行った。加熱処理後、ソーダライムガラス板をMo薄膜から離反させた。ソーダライムガラス板を離反させたMo薄膜を二次イオン質量分析法(SIMS)で元素分析したところ、Naを含有していることが確認できた。
次に、実施例1と同様の条件で、Mo薄膜上に光電変換層、バッファー層、透明電極を形成し、CIGS系太陽電池を製造した。
(Example 3)
On an alkali-free glass substrate, a Mo thin film having a thickness of 500 nm was formed under the same conditions as in Example 1.
Next, the soda-lime glass plate was subjected to heat treatment under the same conditions as in Example 1 by bringing it into contact with the Mo film-forming surface of the Mo thin film. After the heat treatment, the soda lime glass plate was separated from the Mo thin film. Elemental analysis of the Mo thin film separated from the soda lime glass plate by secondary ion mass spectrometry (SIMS) confirmed that it contained Na.
Next, a photoelectric conversion layer, a buffer layer, and a transparent electrode were formed on the Mo thin film under the same conditions as in Example 1 to manufacture a CIGS solar cell.

(実施例4)
無アルカリガラス基板上に、実施例1と同様の条件でMo薄膜を500nm成膜した。このMo薄膜上に、実施例1と同様の条件で光電変換層を形成した。この光電変換層を二次イオン質量分析法(SIMS)で元素分析したところ、Naは検出されなかった。
次に、MoNa板を光電変換層に接触させ、9.8kPaの圧接力で圧接した。そして、この状態を維持しながら真空加熱装置に入れ、装置に具備されている基板加熱用ヒーターを用いて、30分間、光電変換層を400℃に加熱した。加熱処理後、真空加熱装置から取出し、MoNa板を光電変換層から離反させた。MoNa板を離反させた光電変換層を二次イオン質量分析法(SIMS)で元素分析したところ、Naを含有していることが確認できた。
次に、実施例1と同様の条件で、光電変換層上にバッファー層、透明電極を形成し、CIGS系太陽電池を製造した。
Example 4
On an alkali-free glass substrate, a Mo thin film having a thickness of 500 nm was formed under the same conditions as in Example 1. A photoelectric conversion layer was formed on the Mo thin film under the same conditions as in Example 1. When this photoelectric conversion layer was subjected to elemental analysis by secondary ion mass spectrometry (SIMS), Na was not detected.
Next, the MoNa plate was brought into contact with the photoelectric conversion layer and pressed with a pressing force of 9.8 kPa. And while maintaining this state, it put into the vacuum heating apparatus and heated the photoelectric converting layer to 400 degreeC for 30 minutes using the heater for substrate heating with which the apparatus was equipped. After the heat treatment, it was taken out from the vacuum heating device, and the MoNa plate was separated from the photoelectric conversion layer. When the elemental analysis of the photoelectric conversion layer from which the MoNa plate was separated was performed by secondary ion mass spectrometry (SIMS), it was confirmed that Na was contained.
Next, a CIGS solar cell was manufactured by forming a buffer layer and a transparent electrode on the photoelectric conversion layer under the same conditions as in Example 1.

(実施例5)
無アルカリガラス基板上に、実施例1と同様の条件でMo薄膜を500nm成膜した。
次に、MoNa板を、実施例1と同様の条件でMo薄膜のMo成膜面に接触させて加熱処理を行った。加熱処理後、MoNa板を、Mo薄膜から離反させた。
次に、Mo薄膜上に、実施例1と同様の条件で、光電変換層を形成した。
次に、MoNa板を、実施例4と同様の条件で光電変換層に接触させて加熱処理を行った。加熱処理後、MoNa板を、光電変換層から離反させた。MoNa板から離反した光電変換層を二次イオン質量分析法(SIMS)で元素分析したところ、Naを含有していることが確認できた。
次に、実施例1と同様の条件で、光電変換層上にバッファー層、透明電極を形成し、CIGS系太陽電池を製造した。
(Example 5)
On an alkali-free glass substrate, a Mo thin film having a thickness of 500 nm was formed under the same conditions as in Example 1.
Next, heat treatment was performed by bringing the MoNa plate into contact with the Mo film-forming surface of the Mo thin film under the same conditions as in Example 1. After the heat treatment, the MoNa plate was separated from the Mo thin film.
Next, a photoelectric conversion layer was formed on the Mo thin film under the same conditions as in Example 1.
Next, the MoNa plate was brought into contact with the photoelectric conversion layer under the same conditions as in Example 4, and heat treatment was performed. After the heat treatment, the MoNa plate was separated from the photoelectric conversion layer. Elemental analysis of the photoelectric conversion layer separated from the MoNa plate by secondary ion mass spectrometry (SIMS) confirmed that it contained Na.
Next, a CIGS solar cell was manufactured by forming a buffer layer and a transparent electrode on the photoelectric conversion layer under the same conditions as in Example 1.

(比較例1)
無アルカリガラス基板上に、実施例1と同様の条件でMo薄膜を500nm成膜した。このMo薄膜上に、実施例1と同様の条件で、光電変換層、バッファー層、透明電極を形成し、CIGS系太陽電池を製造した。
(Comparative Example 1)
On an alkali-free glass substrate, a Mo thin film having a thickness of 500 nm was formed under the same conditions as in Example 1. On this Mo thin film, the photoelectric conversion layer, the buffer layer, and the transparent electrode were formed on the same conditions as Example 1, and the CIGS type solar cell was manufactured.

実施例1〜5及び比較例1のCIGS系太陽電池に、擬似太陽光(AM1.5)を照射して、変換効率を調べた。結果を表1にまとめて記す。   The CIGS solar cells of Examples 1 to 5 and Comparative Example 1 were irradiated with simulated sunlight (AM1.5) to examine the conversion efficiency. The results are summarized in Table 1.

表1に示すように、実施例1〜5は、比較例1に比べて変換効率が高かった。この理由は、光電変換層にNaが添加された影響によるものであると考えられる。   As shown in Table 1, Examples 1 to 5 had higher conversion efficiency than Comparative Example 1. This reason is considered to be due to the effect of adding Na to the photoelectric conversion layer.

また、実施例2に比べて、実施例1の方が変換効率が高かったが、この理由は、NaがKよりもCIGS系太陽電池の変換効率を向上させる効果が高いためであると考えられる。   Moreover, although the conversion efficiency of Example 1 was higher than Example 2, it is thought that this is because Na is more effective in improving the conversion efficiency of the CIGS solar cell than K. .

また、実施例5がもっとも高い変換効率を有していたが、Mo薄膜、光電変換層の両方にMoNa板を接触させたので、光電変換層により多くのNaが添加されたためであると考えられる。   Moreover, although Example 5 had the highest conversion efficiency, since the MoNa plate was brought into contact with both the Mo thin film and the photoelectric conversion layer, it is considered that a large amount of Na was added to the photoelectric conversion layer. .

1:第1材料
2:第2材料
3:第3材料
5:ドーパント
11:基板
12:裏面電極
13:ドーパント含有材料
14:光電変換層
15:バッファー層
16:透明電極
1: first material 2: second material 3: third material 5: dopant 11: substrate 12: back electrode 13: dopant-containing material 14: photoelectric conversion layer 15: buffer layer 16: transparent electrode

Claims (7)

半導体及び電極から選ばれた第1材料に、ドーパントを含む第2材料を接触させ、両者を接触させた状態で加熱処理を行って前記第2材料に含まれる前記ドーパントを前記第1材料に移行させた後、前記第1材料から前記第2材料を離反させることを特徴とするドーパントの拡散方法。   A first material selected from a semiconductor and an electrode is brought into contact with a second material containing a dopant, and heat treatment is performed in a state in which both materials are in contact with each other, so that the dopant contained in the second material is transferred to the first material. Then, the second material is separated from the first material, and then the dopant diffusion method. 前記第1材料から前記第2材料を離反させた後、第1材料上に、半導体及び電極から選ばれた第3材料を積層し、加熱処理を行う、請求項1に記載のドーパントの拡散方法。   The dopant diffusion method according to claim 1, wherein after the second material is separated from the first material, a third material selected from a semiconductor and an electrode is stacked on the first material, and heat treatment is performed. . 前記第1材料が電極であり、前記第3材料が半導体である、請求項2に記載のドーパントの拡散方法。   The dopant diffusion method according to claim 2, wherein the first material is an electrode and the third material is a semiconductor. 前記第1材料が、前記第3材料側にMoを含む金属層が配置された電極であり、前記第3材料が、Cuと、In及び/又はGaと、Se及び/又はSとを少なくとも含有する半導体、又は、Cuと、Znと、Snと、Se及び/又はSとを少なくとも含む半導体である、請求項3に記載のドーパントの拡散方法。   The first material is an electrode in which a metal layer containing Mo is arranged on the third material side, and the third material contains at least Cu, In and / or Ga, and Se and / or S. The dopant diffusion method according to claim 3, wherein the semiconductor is a semiconductor that includes at least Cu, Zn, Sn, Se, and / or S. 5. 前記ドーパントが、アルカリ金属である、請求項1〜4のいずれか1項に記載のドーパントの拡散方法。   The dopant diffusion method according to claim 1, wherein the dopant is an alkali metal. 基板と、該基板上に積層された、第1電極と、半導体層と、第2電極とを含み、前記第1電極と前記第2電極との間に前記半導体層が配置された電子デバイスの製造方法において、
前記第1電極に、ドーパントを含む材料を接触させ、両者を接触させた状態で加熱処理を行って前記材料に含まれるドーパントを前記第1電極に移行させたのち、前記第1電極から前記材料を離反させ、次いで、前記第1電極上に、前記半導体層を形成し、前記半導体層の形成中又は形成後に加熱処理を行うことを特徴とする電子デバイスの製造方法。
An electronic device comprising: a substrate; a first electrode stacked on the substrate; a semiconductor layer; and a second electrode, wherein the semiconductor layer is disposed between the first electrode and the second electrode. In the manufacturing method,
A material containing a dopant is brought into contact with the first electrode, heat treatment is performed in a state where both are brought into contact, and the dopant contained in the material is transferred to the first electrode, and then the material is transferred from the first electrode to the material. Then, the semiconductor layer is formed on the first electrode, and heat treatment is performed during or after the formation of the semiconductor layer.
前記第1電極が、前記半導体層側にMoを含む金属層が配置された電極であり、
前記半導体層を、Cuと、In及び/又はGaと、Se及び/又はSとを少なくとも含有する半導体、又は、Cuと、Znと、Snと、Se及び/又はSとを少なくとも含む半導体で形成する、請求項6に記載の電子デバイスの製造方法。
The first electrode is an electrode in which a metal layer containing Mo is disposed on the semiconductor layer side,
The semiconductor layer is formed of a semiconductor containing at least Cu, In and / or Ga, Se and / or S, or a semiconductor containing at least Cu, Zn, Sn, Se and / or S. The method of manufacturing an electronic device according to claim 6.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016100458A (en) * 2014-11-21 2016-05-30 セイコーエプソン株式会社 Method of manufacturing photoelectric conversion device and method of manufacturing electronic apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016100458A (en) * 2014-11-21 2016-05-30 セイコーエプソン株式会社 Method of manufacturing photoelectric conversion device and method of manufacturing electronic apparatus

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