JP2014110110A5 - Thin film device and manufacturing method thereof - Google Patents
Thin film device and manufacturing method thereof Download PDFInfo
- Publication number
- JP2014110110A5 JP2014110110A5 JP2012262994A JP2012262994A JP2014110110A5 JP 2014110110 A5 JP2014110110 A5 JP 2014110110A5 JP 2012262994 A JP2012262994 A JP 2012262994A JP 2012262994 A JP2012262994 A JP 2012262994A JP 2014110110 A5 JP2014110110 A5 JP 2014110110A5
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- pair
- discharge
- electrode portion
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Description
本発明は、静電気等の異常電圧から半導体素子や電子機器等を保護するための薄膜ディバイス及びその製造方法に関する。 The present invention relates to a thin film device for protecting a semiconductor element, an electronic device, and the like from an abnormal voltage such as static electricity, and a manufacturing method thereof .
請求項1に記載の薄膜ディバイスは、 基板と、この基板に形成され、所定の間隔を有して配置された一対の電極部と、放電間隙を有して対向配置された一対の放電電極部と、これら電極部及び放電電極部に導通経路を介して接続されるとともに、外部の配線と電気的に接続される端子電極部とを有し、この端子電極部と前記電極部とは間隔を空けて形成されていて、前記端子電極部と前記電極部とを接続する導通経路は、前記間隔の領域において、前記端子電極部の一端側から前記電極部の他端側に延出して迂回するように形成され、前記端子電極部から電極部までの導通経路の長さ寸法をPとし、前記端子電極部から放電電極部までの導通経路の長さ寸法をpとした場合、P>pの関係となるように設定されている導電層と、前記一対の電極部に接続された薄膜素子層と、前記一対の放電電極部における放電間隙に少なくとも対向する空洞部を有して前記薄膜素子層及び一対の放電電極部を被覆する保護絶縁層とを具備することを特徴とする。
薄膜素子層としては、感熱薄膜を好適に用いることができるが、これに限定されるものではない。他の素子層を適用することができる。
The thin film device according to claim 1 includes a substrate, a pair of electrode portions formed on the substrate and disposed with a predetermined interval, and a pair of discharge electrode portions disposed to face each other with a discharge gap. And a terminal electrode part that is connected to the electrode part and the discharge electrode part through a conduction path and electrically connected to an external wiring, and the terminal electrode part and the electrode part are spaced apart from each other. A conduction path that is formed to be open and connects the terminal electrode portion and the electrode portion extends from one end side of the terminal electrode portion to the other end side of the electrode portion and detours in the space region. When the length dimension of the conduction path from the terminal electrode part to the electrode part is P and the length dimension of the conduction path from the terminal electrode part to the discharge electrode part is p, P> p A conductive layer set to have a relationship, and the pair of electric A thin film element layer connected to the pole part, and a protective insulating layer that has a cavity at least facing the discharge gap in the pair of discharge electrode parts and covers the thin film element layer and the pair of discharge electrode parts. It is characterized by that.
As the thin film element layer, a heat sensitive thin film can be preferably used, but is not limited thereto. Other device layers can be applied.
請求項2に記載の薄膜ディバイスは、請求項1に記載の薄膜ディバイスにおいて、前記電極部における所定の間隔をDとし、前記放電電極部における放電間隙をdとした場合、D>dの関係となるように設定されていることを特徴とする。 The thin film device according to claim 2 is the thin film device according to claim 1 , wherein D is a predetermined interval in the electrode portion and d is a discharge gap in the discharge electrode portion. It is set so that it may become.
請求項3に記載の薄膜ディバイスは、請求項1又は請求項2に記載の薄膜ディバイスにおいて、前記端子電極部から電極部までの導通経路のパターンがミアンダ形状に形成されていることを特徴とする。 The thin film device according to claim 3 is the thin film device according to claim 1 or 2 , wherein a pattern of a conduction path from the terminal electrode portion to the electrode portion is formed in a meander shape. .
請求項4に記載の薄膜ディバイスは、請求項1乃至請求項3のいずれか一に記載の薄膜ディバイスにおいて、前記一対の電極部及び一対の放電電極部は、結晶化した白金又はその合金であることを特徴とする。 The thin film device according to claim 4 is the thin film device according to any one of claims 1 to 3 , wherein the pair of electrode portions and the pair of discharge electrode portions are crystallized platinum or an alloy thereof. It is characterized by that.
請求項5に記載の薄膜ディバイスは、請求項1乃至請求項4のいずれか一に記載の薄膜ディバイスにおいて、前記一対の放電電極部における放電間隙は、レーザ加工によって形成されていることを特徴とする。 The thin film device according to claim 5 is the thin film device according to any one of claims 1 to 4 , wherein the discharge gap in the pair of discharge electrode portions is formed by laser processing. To do.
請求項6に記載の薄膜ディバイスは、請求項1乃至請求項5のいずれか一に記載の薄膜ディバイスにおいて、保護絶縁層は、第1層と第2層との2層構成であって、第2層がガラス層によって形成されていることを特徴とする。 The thin film device according to claim 6 is the thin film device according to any one of claims 1 to 5 , wherein the protective insulating layer has a two-layer structure of a first layer and a second layer, Two layers are formed of a glass layer.
請求項7に記載の薄膜ディバイスの製造方法は、基板に所定の間隔を有して配置された一対の電極部と、放電間隙を有して対向配置された一対の放電電極部と、これら電極部及び放電電極部に導通経路を介して接続されるとともに、外部の配線と電気的に接続される端子電極部とを有し、この端子電極部と前記電極部とを間隔を空けて形成し、前記端子電極部と前記電極部とを接続する導通経路を、前記間隔の領域において、前記端子電極部の一端側から前記電極部の他端側に延出して迂回するように形成し、前記端子電極部から電極部までの導通経路の長さ寸法をPとし、前記端子電極部から放電電極部までの導通経路の長さ寸法をpとした場合、P>pの関係となるように導電層を形成する工程と、前記一対の電極部に接続される薄膜素子層を形成する工程と、前記放電間隙に対向して犠牲層を形成する工程と、前記薄膜素子層及び一対の放電電極部を被覆する保護絶縁層を形成する工程と、前記犠牲層を除去して保護絶縁層に空洞部を形成する工程とを具備することを特徴とする。The method of manufacturing a thin film device according to claim 7 includes a pair of electrode portions disposed on the substrate with a predetermined interval, a pair of discharge electrode portions disposed to face each other with a discharge gap, and the electrodes. And a terminal electrode part electrically connected to an external wiring, and the terminal electrode part and the electrode part are formed with a space therebetween. A conductive path connecting the terminal electrode part and the electrode part is formed to extend from one end side of the terminal electrode part to the other end side of the electrode part in the region of the interval, When the length dimension of the conduction path from the terminal electrode part to the electrode part is P and the length dimension of the conduction path from the terminal electrode part to the discharge electrode part is p, the conduction is performed so that P> p. Forming a layer and a thin film element connected to the pair of electrode portions Forming a layer, forming a sacrificial layer opposite to the discharge gap, forming a protective insulating layer covering the thin film element layer and the pair of discharge electrode portions, and removing the sacrificial layer. And a step of forming a cavity in the protective insulating layer.
請求項8に記載の薄膜ディバイスの製造方法は、基板に所定の間隔を有して配置された一対の電極部と、放電間隙を有して対向配置された一対の放電電極部と、これら電極部及び放電電極部に導通経路を介して接続された端子電極部とを備えた導電層を形成する工程と、前記一対の電極部に接続される薄膜素子層を形成する工程と、前記放電間隙に対向して金属酸化物からなる犠牲層を形成する工程と、前記薄膜素子層及び一対の放電電極部を被覆する保護絶縁層を形成する工程と、前記犠牲層を除去して保護絶縁層に空洞部を形成する工程とを具備することを特徴とする。The method of manufacturing a thin film device according to claim 8 includes a pair of electrode portions disposed on the substrate with a predetermined interval, a pair of discharge electrode portions disposed to face each other with a discharge gap, and the electrodes. Forming a conductive layer comprising a terminal electrode portion connected to the electrode portion and the discharge electrode portion via a conduction path, forming a thin film element layer connected to the pair of electrode portions, and the discharge gap Forming a sacrificial layer made of a metal oxide facing the substrate, forming a protective insulating layer covering the thin film element layer and the pair of discharge electrode portions, and removing the sacrificial layer to form a protective insulating layer And a step of forming a cavity.
本発明によれば、放電電極部を被覆する保護絶縁層に空洞部が形成されているので、構成が簡素化でき、しかも空洞部によって放電空間が確保され、気中放電が円滑に行われるようになるので、効果的に静電気に対する耐性を高めることができ、信頼性を向上することが可能な薄膜ディバイス及びその製造方法を提供することができる。 According to the present invention, since the cavity is formed in the protective insulating layer covering the discharge electrode part, the configuration can be simplified, and the discharge space is secured by the cavity so that air discharge can be performed smoothly. Therefore, it is possible to provide a thin film device capable of effectively increasing resistance to static electricity and improving reliability and a method for manufacturing the same .
端子電極部33a及び33bは、外部の配線と電気的に接続される部分であり、電極部31a及び31bより広い面積を有して略矩形状をなし、基板2の両端側に形成されている。この端子電極部33a及び33bと電極部31a及び31bとは、間隔を空けて形成されている。 The terminal electrode portions 33 a and 33 b are portions that are electrically connected to external wiring, have a larger area than the electrode portions 31 a and 31 b, have a substantially rectangular shape, and are formed on both ends of the substrate 2. . The terminal electrode portions 33a and 33b and the electrode portions 31a and 31b are formed with a space therebetween.
この端子電極部33a及び33bの一端側からは、端子電極部33a及び33bと電極部31a及び31bとを接続する導通経路34a及び34bが導出されている。具体的には、端子電極部33a及び33bの一端側から電極部31a及び31bの他端側に延出して迂回するように形成され、図示上、垂下するように形成されている。 Conductive paths 34a and 34b connecting the terminal electrode portions 33a and 33b and the electrode portions 31a and 31b are led out from one end side of the terminal electrode portions 33a and 33b. Specifically, it is formed to extend from one end side of the terminal electrode portions 33a and 33b to the other end side of the electrode portions 31a and 31b so as to make a detour, and is formed to hang down in the drawing.
この犠牲層Sを除去した後は、排出口Seの部分は開口し、保護絶縁層5によって被覆された状態にはなっていない。そのため、保護絶縁層5を600℃以上で熱処理し焼成する。これにより、第2層の保護ガラス層52が溶解し若干の流動性を伴って排出口Seの開口を閉塞することとなる。したがって、保護絶縁層5は、犠牲層Sが除去された後に外気と遮断された空洞部Ctを形成して、薄膜素子層4、電極部31a及び31b、放電電極部32a及び32b、導通経路34a及び34b並びに導通経路35a及び35bを確実に被覆するようになる。 After removing the sacrificial layer S, the portion of the discharge port Se is opened and is not covered with the protective insulating layer 5. Therefore, the protective insulating layer 5 is heat-treated at 600 ° C. or higher and fired. Thereby, the protective glass layer 52 of the second layer is dissolved and the opening of the discharge port Se is closed with some fluidity. Therefore, the protective insulating layer 5 forms a cavity Ct that is cut off from the outside air after the sacrificial layer S is removed, and the thin film element layer 4, the electrode portions 31a and 31b, the discharge electrode portions 32a and 32b, and the conduction path 34a. And 34b and the conduction paths 35a and 35b are reliably covered.
Claims (8)
この基板に形成され、所定の間隔を有して配置された一対の電極部と、放電間隙を有して対向配置された一対の放電電極部と、これら電極部及び放電電極部に導通経路を介して接続されるとともに、外部の配線と電気的に接続される端子電極部とを有し、この端子電極部と前記電極部とは間隔を空けて形成されていて、前記端子電極部と前記電極部とを接続する導通経路は、前記間隔の領域において、前記端子電極部の一端側から前記電極部の他端側に延出して迂回するように形成され、前記端子電極部から電極部までの導通経路の長さ寸法をPとし、前記端子電極部から放電電極部までの導通経路の長さ寸法をpとした場合、P>pの関係となるように設定されている導電層と、
前記一対の電極部に接続された薄膜素子層と、
前記一対の放電電極部における放電間隙に少なくとも対向する空洞部を有して前記薄膜素子層及び一対の放電電極部を被覆する保護絶縁層と、
を具備することを特徴とする薄膜ディバイス。 A substrate,
A pair of electrode portions formed on the substrate and disposed with a predetermined gap, a pair of discharge electrode portions disposed to face each other with a discharge gap, and a conduction path between the electrode portions and the discharge electrode portion. And a terminal electrode portion electrically connected to an external wiring, and the terminal electrode portion and the electrode portion are formed with an interval between the terminal electrode portion and the terminal electrode portion. The conduction path connecting the electrode part is formed to extend from one end side of the terminal electrode part to the other end side of the electrode part so as to detour in the region of the interval, from the terminal electrode part to the electrode part A conductive layer set to have a relationship of P> p, where P is a length dimension of the conduction path of P and p is a length dimension of the conduction path from the terminal electrode portion to the discharge electrode portion;
A thin film element layer connected to the pair of electrode portions;
A protective insulating layer covering the thin film element layer and the pair of discharge electrode portions by having a cavity at least facing the discharge gap in the pair of discharge electrode portions;
A thin film device comprising:
前記一対の電極部に接続される薄膜素子層を形成する工程と、
前記放電間隙に対向して犠牲層を形成する工程と、
前記薄膜素子層及び一対の放電電極部を被覆する保護絶縁層を形成する工程と、
前記犠牲層を除去して保護絶縁層に空洞部を形成する工程と、
を具備することを特徴とする薄膜ディバイスの製造方法。 A pair of electrode portions disposed on the substrate at a predetermined interval, a pair of discharge electrode portions disposed opposite to each other with a discharge gap, and connected to the electrode portions and the discharge electrode portion through a conduction path. And a terminal electrode portion electrically connected to an external wiring , the terminal electrode portion and the electrode portion are formed with a space therebetween, and the terminal electrode portion and the electrode portion are connected to each other A conduction path is formed to extend from one end side of the terminal electrode part to the other end side of the electrode part in the interval region so as to bypass, and the length of the conduction path from the terminal electrode part to the electrode part When the dimension is P and the length dimension of the conduction path from the terminal electrode part to the discharge electrode part is p, a step of forming a conductive layer so that P> p is satisfied,
Forming a thin film element layer connected to the pair of electrode portions;
Forming a sacrificial layer opposite the discharge gap;
Forming a protective insulating layer covering the thin film element layer and the pair of discharge electrode portions;
Removing the sacrificial layer to form a cavity in the protective insulating layer;
A method of manufacturing a thin film device, comprising:
前記一対の電極部に接続される薄膜素子層を形成する工程と、
前記放電間隙に対向して金属酸化物からなる犠牲層を形成する工程と、
前記薄膜素子層及び一対の放電電極部を被覆する保護絶縁層を形成する工程と、
前記犠牲層を除去して保護絶縁層に空洞部を形成する工程と、
を具備することを特徴とする薄膜ディバイスの製造方法。 A pair of electrode portions disposed on the substrate at a predetermined interval, a pair of discharge electrode portions disposed opposite to each other with a discharge gap, and connected to the electrode portions and the discharge electrode portion through a conduction path. Forming a conductive layer provided with a terminal electrode portion;
Forming a thin film element layer connected to the pair of electrode portions;
Forming a sacrificial layer made of a metal oxide facing the discharge gap;
Forming a protective insulating layer covering the thin film element layer and the pair of discharge electrode portions;
Removing the sacrificial layer to form a cavity in the protective insulating layer;
A method of manufacturing a thin film device, comprising:
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012262994A JP5725669B2 (en) | 2012-11-30 | 2012-11-30 | Thin film device and manufacturing method thereof |
PCT/JP2013/081732 WO2014084197A1 (en) | 2012-11-30 | 2013-11-26 | Thin film surge absorber, thin film device, method for producing thin film surge absorber, and method for manufacturing thin film device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012262994A JP5725669B2 (en) | 2012-11-30 | 2012-11-30 | Thin film device and manufacturing method thereof |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2014110110A JP2014110110A (en) | 2014-06-12 |
JP2014110110A5 true JP2014110110A5 (en) | 2015-01-29 |
JP5725669B2 JP5725669B2 (en) | 2015-05-27 |
Family
ID=50827833
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012262994A Active JP5725669B2 (en) | 2012-11-30 | 2012-11-30 | Thin film device and manufacturing method thereof |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP5725669B2 (en) |
WO (1) | WO2014084197A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10501003B2 (en) * | 2015-07-17 | 2019-12-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, lighting device, and vehicle |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5636107Y2 (en) * | 1978-01-19 | 1981-08-25 | ||
JP3812382B2 (en) * | 2001-08-02 | 2006-08-23 | 日本電気株式会社 | Oxide thin film for bolometer, method for producing the same, and infrared sensor |
JP4871548B2 (en) * | 2005-08-29 | 2012-02-08 | Semitec株式会社 | Thin film thermistor |
JP4798496B2 (en) * | 2006-11-09 | 2011-10-19 | 宇部興産株式会社 | Thin film piezoelectric device and manufacturing method thereof |
-
2012
- 2012-11-30 JP JP2012262994A patent/JP5725669B2/en active Active
-
2013
- 2013-11-26 WO PCT/JP2013/081732 patent/WO2014084197A1/en active Application Filing
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10241094B2 (en) | Micro heater, micro sensor and micro sensor manufacturing method | |
JP5777811B2 (en) | Measuring shunt including safety frame | |
JP2016011964A5 (en) | ||
TWI503856B (en) | Metal film surface mount fuse | |
US9722418B2 (en) | Complex protection device | |
TW201618129A (en) | Varistor device | |
CN104919670A (en) | Protection element | |
JP2009520368A5 (en) | ||
JP6770238B2 (en) | Humidity sensor | |
JP6805084B2 (en) | Semiconductor type gas detection element | |
US8664744B2 (en) | Anti-fuse element without defective opens | |
KR20170094677A (en) | Complex electronic component | |
KR101686123B1 (en) | Micro heater and Micro sensor | |
JP2009264803A (en) | Planar temperature detection sensor | |
JP2014110110A5 (en) | Thin film device and manufacturing method thereof | |
TWI427647B (en) | Electrostatic protection parts and manufacturing methods thereof | |
US20190064094A1 (en) | Gas sensor and gas sensor package having the same | |
CN207217500U (en) | Integrated circuit and IC system | |
JP5725669B2 (en) | Thin film device and manufacturing method thereof | |
JP2010098024A (en) | Circuit protecting component | |
WO2017124793A1 (en) | Circuit protection device | |
TWI574369B (en) | Semiconductor device and method for manufacturing semiconductor device | |
JP2011159410A (en) | Circuit protection element | |
JP2021086837A (en) | Chip resistor | |
KR20150085774A (en) | Temperature sensor and manufacturing method for temperature sensor |