JP2014107482A - Electronic device - Google Patents

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JP2014107482A
JP2014107482A JP2012260949A JP2012260949A JP2014107482A JP 2014107482 A JP2014107482 A JP 2014107482A JP 2012260949 A JP2012260949 A JP 2012260949A JP 2012260949 A JP2012260949 A JP 2012260949A JP 2014107482 A JP2014107482 A JP 2014107482A
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housing
electronic device
lead frame
noise current
casing
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JP5861621B2 (en
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Shunsuke Harada
峻丞 原田
Kei Shimakura
啓 島倉
Hisato Kato
久登 加藤
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Denso Corp
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Denso Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PROBLEM TO BE SOLVED: To provide an electronic device which allows for enhancement of immunity/ESD tolerance without causing the up-sizing, even when an electronic component is housed in a conductive housing.SOLUTION: An insulating adhesive 20 is interposed between a lead frame 14 and the inner surface at the insertion part 11b of a housing 11. In order to protect an electronic component housed in the lead frame 14 from a noise current resulting from electrostatic discharge applied to the lead frame 14, an ESD diode 16 for connection with the lead frame 14 is housed in the housing 11. The lead frame 14 is formed so that the path length Lb of a coating part 14a covered with the insulating adhesive 20, where the noise current flows, is longer than the length La of the insulating adhesive 20 in the insertion direction.

Description

本発明は、導電性の筐体に電子部品が収容されてなる電子装置に関するものである。   The present invention relates to an electronic device in which an electronic component is accommodated in a conductive casing.

従来、筐体内に半導体デバイス等の電子部品が1または2以上収容されて構成される電子装置では、リードフレームや信号ピン等の外部接続端子に印加された静電気放電に起因して生じた電流(以下、ノイズ電流という)から電子部品を保護する必要がある場合に、筐体内にて外部接続端子に電気的に接続される静電気放電保護回路が設けられている。しかしながら、導電性の筐体、例えば、金属製筐体では、ノイズ電流が外部接続端子を介して筐体自体に流れ込むと、筐体を接地している場合でも一部のノイズ電流が筐体内の設置面を介して筐体内の電子部品に到達してしまう場合がある。この場合、ノイズ電流のために電子部品に静電破壊や誤動作等が生じる可能性がある。   2. Description of the Related Art Conventionally, in an electronic apparatus configured by housing one or more electronic components such as a semiconductor device in a casing, current generated due to electrostatic discharge applied to external connection terminals such as lead frames and signal pins ( An electrostatic discharge protection circuit that is electrically connected to the external connection terminal in the housing is provided when it is necessary to protect the electronic component from the noise current (hereinafter referred to as noise current). However, in a conductive housing, for example, a metal housing, if noise current flows into the housing itself via the external connection terminal, a part of the noise current is generated in the housing even when the housing is grounded. In some cases, the electronic component in the housing may be reached via the installation surface. In this case, electrostatic breakdown or malfunction may occur in the electronic component due to noise current.

このような問題を解決する技術として、下記特許文献1に開示される半導体装置が知られている。この半導体装置は、ガリウム砒素(GaAs)を用いた電解効果トランジスタ(FET)を備えており、このGaAsFETのゲート電極に接続されるリードフレームの端部にスパイラルコイル形状のスパイラルコイル部が形成されている。このスパイラルコイル部が高周波ノイズに対して高リアクタンスとなるため、イミュニティ・ESD耐性を向上させて半導体デバイスへのノイズ伝播を抑制している。   As a technique for solving such a problem, a semiconductor device disclosed in Patent Document 1 below is known. This semiconductor device includes a field effect transistor (FET) using gallium arsenide (GaAs), and a spiral coil portion having a spiral coil shape is formed at the end of a lead frame connected to the gate electrode of the GaAsFET. Yes. Since this spiral coil portion has high reactance with respect to high frequency noise, immunity / ESD resistance is improved and noise propagation to the semiconductor device is suppressed.

特許3130809号公報Japanese Patent No. 3130809

しかしながら、上述のようにイミュニティ・ESD耐性を向上させる構成では、筐体内に収容されるリードフレームにスパイラル部を設ける必要があり、装置自体が大型化してしまう。特に、抑制すべきノイズ電流が大きくなるほどスパイラル部を大きくする必要があり、装置の小型化が困難になるという問題がある。   However, in the configuration for improving the immunity / ESD resistance as described above, it is necessary to provide a spiral portion in the lead frame accommodated in the housing, and the device itself becomes large. In particular, as the noise current to be suppressed increases, the spiral portion needs to be enlarged, which makes it difficult to reduce the size of the device.

本発明は、上述した課題を解決するためになされたものであり、その目的とするところは、導電性の筐体に電子部品が収容される場合でも大型化を招くことなくイミュニティ・ESD耐性を向上させ得る電子装置を提供することにある。   The present invention has been made to solve the above-described problems, and the object of the present invention is to improve immunity / ESD resistance without causing an increase in size even when an electronic component is housed in a conductive casing. It is to provide an electronic device that can be improved.

上記目的を達成するため、特許請求の範囲の請求項1に記載の発明は、導電性の筐体(11)内に電子部品(12a〜12d)が収容される電子装置(10,10a,10b)において、前記電子部品と前記筐体外の電子機器とを電気的に接続するための端子であって前記筐体に形成される挿通部(11b)を当該筐体に接触することなく挿通するように配置される外部接続端子(14)と、前記外部接続端子と前記挿通部の内面との間に介在する誘電体(20)と、前記外部接続端子に印加された静電気放電に起因して生じたノイズ電流から前記電子部品を保護するために前記筐体内に収容されて前記外部接続端子に接続される静電気放電保護回路(16)と、を備え、前記外部接続端子は、前記誘電体に覆われる被覆部位(14a,14b)の前記ノイズ電流が流れる経路長さ(Lb)が当該誘電体の挿通方向の長さ(La)よりも長くなるように形成されることを特徴とする。
なお、特許請求の範囲および上記手段の括弧内の符号は、後述する実施形態に記載の具体的手段との対応関係を示すものである。
In order to achieve the above-mentioned object, the invention according to claim 1 of the present invention is an electronic device (10, 10a, 10b) in which electronic components (12a-12d) are accommodated in a conductive casing (11). ), A terminal for electrically connecting the electronic component and an electronic device outside the casing, and the insertion portion (11b) formed in the casing is inserted without contacting the casing. It is caused by the external connection terminal (14) arranged on the dielectric, the dielectric (20) interposed between the external connection terminal and the inner surface of the insertion portion, and electrostatic discharge applied to the external connection terminal. An electrostatic discharge protection circuit (16) housed in the housing and connected to the external connection terminal to protect the electronic component from the noise current. The external connection terminal covers the dielectric. Covered parts (14a, 14 The noise current flows path length of) (Lb) is being formed to be longer than the length of the insertion direction of the dielectric (La).
In addition, the code | symbol in the parenthesis of a claim and the said means shows a corresponding relationship with the specific means as described in embodiment mentioned later.

請求項1の発明では、外部接続端子と筐体の挿通部の内面との間に誘電体が介在しており、外部接続端子に印加された静電気放電に起因して生じたノイズ電流から筐体内に収容される電子部品を保護するために、外部接続端子に接続される静電気放電保護回路が筐体内に収容される。そして、外部接続端子は、誘電体に覆われる被覆部位のノイズ電流が流れる経路長さが当該誘電体の挿通方向の長さよりも長くなるように形成される。   In the first aspect of the present invention, a dielectric is interposed between the external connection terminal and the inner surface of the insertion portion of the housing, and the noise current generated due to the electrostatic discharge applied to the external connection terminal In order to protect the electronic components housed in the housing, an electrostatic discharge protection circuit connected to the external connection terminal is housed in the housing. The external connection terminal is formed such that the path length through which the noise current of the covering portion covered with the dielectric flows is longer than the length in the insertion direction of the dielectric.

これにより、筐体と外部接続端子との間の相互インダクタンスが、被覆部位のノイズ電流が流れる経路長さが当該誘電体の挿通方向の長さと同じとなる従来の構成と比較して、大きくなるので、ノイズ電流が外部接続端子および誘電体を介して筐体自体に流れ込みにくくなる。このため、ノイズ電流が筐体の収容空間内の外部接続端子を流れるが、このノイズ電流から静電気放電保護回路により筐体内に収容される電子部品が保護される。このように、ノイズ電流が筐体自体に流れ込みにくくなり、特に筐体内部にスパイラルコイル部等を設ける必要もないので、導電性の筐体に電子部品が収容される場合でも大型化を招くことなく電子装置のイミュニティ・ESD耐性を向上させることができる。   As a result, the mutual inductance between the housing and the external connection terminal is larger than that in the conventional configuration in which the length of the path through which the noise current in the covering portion flows is the same as the length in the insertion direction of the dielectric. Therefore, it becomes difficult for noise current to flow into the housing itself via the external connection terminal and the dielectric. For this reason, noise current flows through the external connection terminals in the housing space of the housing, and the electronic components housed in the housing are protected from this noise current by the electrostatic discharge protection circuit. In this way, noise current is less likely to flow into the housing itself, and it is not necessary to provide a spiral coil portion or the like inside the housing, which leads to an increase in size even when electronic components are housed in a conductive housing. Thus, the immunity / ESD resistance of the electronic device can be improved.

第1実施形態に係る電子装置の概略構成を示す断面図である。It is sectional drawing which shows schematic structure of the electronic device which concerns on 1st Embodiment. ESDダイオードとその保護対象の素子との配置を示す説明図である。It is explanatory drawing which shows arrangement | positioning with an ESD diode and the element of the protection object. 筐体内に収容される電子部品に対する外部接続端子を介したノイズ電流の影響を説明するための説明図である。It is explanatory drawing for demonstrating the influence of the noise current via the external connection terminal with respect to the electronic component accommodated in a housing | casing. 自己インダクタンスごとの相互インダクタンスと印加電圧比率との関係を示すグラフである。It is a graph which shows the relationship between the mutual inductance for every self-inductance, and an applied voltage ratio. 誘電体を介して筐体に保持されるリードフレームの被覆部位を拡大して示す断面図である。It is sectional drawing which expands and shows the coating | coated part of the lead frame hold | maintained at a housing | casing through a dielectric material. 第1実施形態の変形例に係る電子装置の要部を示す断面図である。It is sectional drawing which shows the principal part of the electronic device which concerns on the modification of 1st Embodiment. 第2実施形態に係る電子装置の要部を示す断面図である。It is sectional drawing which shows the principal part of the electronic device which concerns on 2nd Embodiment. 第2実施形態の変形例に係る電子装置の要部を示す断面図である。It is sectional drawing which shows the principal part of the electronic device which concerns on the modification of 2nd Embodiment. 第3実施形態に係る電子装置の要部を示す断面図である。It is sectional drawing which shows the principal part of the electronic device which concerns on 3rd Embodiment. 第3実施形態の変形例に係る電子装置の要部を示す断面図である。It is sectional drawing which shows the principal part of the electronic device which concerns on the modification of 3rd Embodiment. 絶縁性接着剤にNi−Zn系のフェライト粉を含有させたときの透磁率の周波数依存性を示すグラフである。It is a graph which shows the frequency dependence of the magnetic permeability when a Ni-Zn type ferrite powder is contained in an insulating adhesive.

[第1実施形態]
以下、本発明に係る電子装置を具現化した第1実施形態について、図面を参照して説明する。
図1に示すように、本実施形態に係る電子装置10は、金属材料等からなる導電性の筐体11内に複数の電子部品が収容されて構成されている。本実施形態では、筐体11内には、例えば、4つの半導体デバイス12a〜12dが接着剤等の絶縁物13を介して底壁11a上に配置されて収容されている。なお、上記半導体デバイス12a〜12dとしては、例えば、ロジック回路,センサ,パワーデバイス,SRAMやフラッシュメモリ等がある。なお、図1では、便宜上、筐体11内に収容される他の電子部品等の図示を省略している。
[First Embodiment]
Hereinafter, a first embodiment of an electronic device according to the present invention will be described with reference to the drawings.
As shown in FIG. 1, an electronic device 10 according to the present embodiment is configured by housing a plurality of electronic components in a conductive casing 11 made of a metal material or the like. In the present embodiment, for example, four semiconductor devices 12a to 12d are arranged and accommodated on the bottom wall 11a via an insulator 13 such as an adhesive. Examples of the semiconductor devices 12a to 12d include a logic circuit, a sensor, a power device, an SRAM, and a flash memory. In FIG. 1, illustration of other electronic components and the like housed in the housing 11 is omitted for convenience.

各半導体デバイス12a〜12dや他の電子部品の少なくとも一部は、筐体11外の電子機器と電気的に接続するための外部接続端子として構成される複数のリードフレーム14のいずれかにそれぞれボンディングワイヤ15等を介して電気的に接続されている。各半導体デバイス12a〜12dのうち、リードフレーム14に印加された静電気放電に起因して生じたノイズ電流から保護する必要がある半導体デバイスには、静電気放電保護回路が設けられている。例えば、半導体デバイス12aには、図2に示すように、静電気放電保護回路として、ESDダイオード16がリードフレーム14に接続される入力端子17に接続されるようにチップ上に設けられている。また、入力端子17には、ESDダイオード16の保護対象である素子18(例えば、PolyCapa)が所定の抵抗19を介して接続されている。   At least a part of each of the semiconductor devices 12a to 12d and other electronic components is bonded to any one of a plurality of lead frames 14 configured as external connection terminals for electrical connection with an electronic device outside the housing 11. It is electrically connected via a wire 15 or the like. Among the semiconductor devices 12a to 12d, an electrostatic discharge protection circuit is provided in a semiconductor device that needs to be protected from noise current generated due to electrostatic discharge applied to the lead frame 14. For example, as shown in FIG. 2, the semiconductor device 12 a is provided on the chip as an electrostatic discharge protection circuit so that the ESD diode 16 is connected to the input terminal 17 connected to the lead frame 14. Further, an element 18 (for example, PolyCapa) that is a protection target of the ESD diode 16 is connected to the input terminal 17 via a predetermined resistor 19.

各リードフレーム14は、その一部が筐体11の側壁等に挿通部として形成される挿通穴11bを挿通して外部にそれぞれ露出している。各挿通穴11bは、例えば、筐体11が上下ケースの組み付けにより構成される場合に、下ケースの上縁と上ケースの下縁とにそれぞれ形成される凹部同士を組み合わせることで構成される。   A part of each lead frame 14 is exposed to the outside through a through hole 11 b formed as an insertion part on the side wall of the housing 11. Each insertion hole 11b is comprised by combining the recessed parts formed in the upper edge of a lower case, and the lower edge of an upper case, respectively, when the housing | casing 11 is comprised by the assembly | attachment of an upper and lower case, for example.

リードフレーム14の中間部位と挿通穴11bの内面(内周面)との間には、リードフレーム14と筐体11との導通を抑制するとともにリードフレーム14を保持するために、絶縁性を有するエポキシ樹脂からなる絶縁性接着剤20がそれぞれ介在しており、各リードフレーム14と筐体11とが直接接触しないように構成されている。絶縁性接着剤20およびこの絶縁性接着剤20により覆われるリードフレーム14の中間部位(以下、被覆部位14aという)との詳細構成については後述する。なお、リードフレーム14は、その一部が円筒面状の内周面を有する挿通穴11bに対して絶縁性接着剤20を介在させて挿通することに限らず、他の形状の挿通部に対して絶縁性接着剤20を介在させて挿通してもよい。なお、接着剤20は、特許請求の範囲に記載の「誘電体」の一例に相当し得る。   Between the intermediate portion of the lead frame 14 and the inner surface (inner peripheral surface) of the insertion hole 11b, insulation is provided to suppress conduction between the lead frame 14 and the housing 11 and to hold the lead frame 14. Insulating adhesives 20 made of an epoxy resin are interposed, and the lead frames 14 and the casing 11 are not in direct contact with each other. The detailed configuration of the insulating adhesive 20 and the intermediate part of the lead frame 14 (hereinafter referred to as the covering part 14a) covered with the insulating adhesive 20 will be described later. The lead frame 14 is not limited to being inserted through the insertion hole 11b having a cylindrical inner peripheral surface with the insulating adhesive 20 interposed therebetween, but to other shapes of insertion portions. Then, the insulating adhesive 20 may be inserted therethrough. The adhesive 20 can correspond to an example of a “dielectric” recited in the claims.

次に、筐体11内に収容される各半導体デバイス12a〜12dに対する外部接続端子14を介したノイズ電流の影響について、図3および図4を用いて詳細に説明する。図3は、筐体11内に収容される電子部品12に対するリードフレーム14を介したノイズ電流の影響を説明するための説明図である。図4は、自己インダクタンスLkごとの相互インダクタンスMとデバイス印加電圧比率との関係を示すグラフである。   Next, the influence of the noise current through the external connection terminal 14 on each of the semiconductor devices 12a to 12d accommodated in the housing 11 will be described in detail with reference to FIGS. FIG. 3 is an explanatory diagram for explaining the influence of noise current through the lead frame 14 on the electronic component 12 accommodated in the housing 11. FIG. 4 is a graph showing the relationship between the mutual inductance M for each self-inductance Lk and the device applied voltage ratio.

通常、上述のように生じるノイズ電流は、リードフレーム14と電子部品12との電流経路を流れる際にESDダイオード16により低減される(図3の矢印α参照)。しかしながら、導電性の筐体11を採用しているため、絶縁性接着剤20と筐体11との間の容量カップリングにより、ノイズ電流の一部がリードフレーム14および絶縁性接着剤20を介して筐体11自体に流れ込む場合がある(図3の矢印β参照)。このように筐体11自体に流れ込んだノイズ電流は、筐体11が接地されており筐体11の内面と電子部品12との間に絶縁物13を介在させている場合でも、その一部が上記絶縁物13を介して電子部品12に到達してしまう場合がある。   Normally, the noise current generated as described above is reduced by the ESD diode 16 when flowing through the current path between the lead frame 14 and the electronic component 12 (see arrow α in FIG. 3). However, since the conductive housing 11 is employed, a part of the noise current is passed through the lead frame 14 and the insulating adhesive 20 due to capacitive coupling between the insulating adhesive 20 and the housing 11. May flow into the housing 11 itself (see arrow β in FIG. 3). The noise current that has flowed into the housing 11 itself as described above is partially lost even when the housing 11 is grounded and the insulator 13 is interposed between the inner surface of the housing 11 and the electronic component 12. The electronic component 12 may be reached through the insulator 13.

そこで、本実施形態では、上述のようなノイズ電流が筐体11自体に流れ込むことを確実に抑制するため、リードフレーム14と筐体11との間の相互インダクタンスMを増加させるようにリードフレーム14が形成される。相互インダクタンスMを増加させることで、ノイズ電流が筐体11自体に流れ込みにくくなるからである。この相互インダクタンスMは、μをリードフレーム14の透磁率、lをリードフレーム14の被覆部位14aのノイズ電流が流れる経路長さ、dをリードフレーム14間距離とするとき、以下に示す式(1)の関係が成立する。

Figure 2014107482
Therefore, in the present embodiment, the lead frame 14 is configured to increase the mutual inductance M between the lead frame 14 and the housing 11 in order to reliably suppress the noise current as described above from flowing into the housing 11 itself. Is formed. This is because increasing the mutual inductance M makes it difficult for noise current to flow into the casing 11 itself. This mutual inductance M is expressed by the following equation, where μ 1 is the magnetic permeability of the lead frame 14, l 1 is the length of the path through which the noise current flows in the covering portion 14 a of the lead frame 14, and d is the distance between the lead frames 14. The relationship (1) is established.
Figure 2014107482

また、図4に示すように、筐体11の自己インダクタンスLkにかかわらず、相互インダクタンスMが大きくなるほど筐体11内に配置される電子部品に印加される電圧の比率(デバイス印加電圧比率)が低減することがわかる。例えば、図4に示す条件では、デバイス印加電圧比率が0.3で電子部品が破壊すると仮定すると、自己インダクタンスLk=1.0×10−12(H)である場合には、相互インダクタンスMがおよそ6.0(H)を超えると電子部品の破壊が防止され、自己インダクタンスLk=1.0×10−9(H)である場合には、相互インダクタンスMがおよそ1.0(H)を超えると電子部品の破壊が防止される。なお、自己インダクタンスLk=1.0×10−6(H)である場合には、相互インダクタンスMの値にかかわらず電子部品の破壊が防止される。 As shown in FIG. 4, regardless of the self-inductance Lk of the housing 11, the ratio of the voltage applied to the electronic components arranged in the housing 11 (device applied voltage ratio) increases as the mutual inductance M increases. It turns out that it reduces. For example, under the conditions shown in FIG. 4, assuming that the device applied voltage ratio is 0.3 and the electronic component is destroyed, if the self-inductance Lk = 1.0 × 10 −12 (H), the mutual inductance M is If it exceeds about 6.0 (H), the electronic components are prevented from being destroyed. If the self-inductance Lk = 1.0 × 10 −9 (H), the mutual inductance M is about 1.0 (H). If exceeded, destruction of the electronic components is prevented. When the self-inductance Lk = 1.0 × 10 −6 (H), the electronic component is prevented from being destroyed regardless of the value of the mutual inductance M.

次に、上述のように相互インダクタンスMを増加させるための具体的な構成について、図5を用いて説明する。図5は、絶縁性接着剤20を介して筐体11に保持されるリードフレーム14の被覆部位14aを拡大して示す断面図である。
図5に示すように、リードフレーム14の被覆部位14aは、そのノイズ電流が流れる経路長さ(図5の一点鎖線参照)Lbが絶縁性接着剤20の挿通方向の長さLaよりも長くなるように、折り畳まれるようにして形成されている。
Next, a specific configuration for increasing the mutual inductance M as described above will be described with reference to FIG. FIG. 5 is an enlarged cross-sectional view showing the covering portion 14 a of the lead frame 14 held by the housing 11 via the insulating adhesive 20.
As shown in FIG. 5, in the covered portion 14 a of the lead frame 14, the path length (see the dashed line in FIG. 5) Lb through which the noise current flows is longer than the length La in the insertion direction of the insulating adhesive 20. Thus, it is formed so as to be folded.

すなわち、本実施形態に係る電子装置10では、リードフレーム14と筐体11の挿通穴11bの内面との間に絶縁性接着剤20が介在しており、リードフレーム14に印加された静電気放電に起因して生じたノイズ電流から筐体11内に収容される電子部品を保護するために、リードフレーム14に接続されるESDダイオード16が筐体11内に収容される。そして、リードフレーム14は、絶縁性接着剤20に覆われる被覆部位14aのノイズ電流が流れる経路長さLbが当該絶縁性接着剤20の挿通方向の長さLaよりも長くなるように形成される。   That is, in the electronic device 10 according to the present embodiment, the insulating adhesive 20 is interposed between the lead frame 14 and the inner surface of the insertion hole 11 b of the housing 11, and electrostatic discharge applied to the lead frame 14 is prevented. An ESD diode 16 connected to the lead frame 14 is housed in the housing 11 in order to protect the electronic components housed in the housing 11 from noise current caused by the noise. The lead frame 14 is formed such that the path length Lb through which the noise current of the covering portion 14 a covered with the insulating adhesive 20 flows is longer than the length La in the insertion direction of the insulating adhesive 20. .

これにより、筐体11とリードフレーム14との間の相互インダクタンスMが、被覆部位14aのノイズ電流が流れる経路長さLbが絶縁性接着剤20の挿通方向の長さLaと同じとなる従来の構成と比較して、大きくなるので、ノイズ電流がリードフレーム14および絶縁性接着剤20を介して筐体11自体に流れ込みにくくなる。このため、ノイズ電流が筐体11の収容空間内のリードフレーム14を流れるが、このノイズ電流からESDダイオード16により筐体11内に収容される電子部品が保護される。このように、ノイズ電流が筐体11自体に流れ込みにくくなり、特に筐体11内部にスパイラルコイル部等を設ける必要もないので、導電性の筐体11に電子部品が収容される場合でも大型化を招くことなく電子装置10のイミュニティ・ESD耐性を向上させることができる。   As a result, the mutual inductance M between the housing 11 and the lead frame 14 is such that the path length Lb through which the noise current of the covering portion 14a flows is the same as the length La of the insulating adhesive 20 in the insertion direction. Since it becomes larger than the configuration, it is difficult for noise current to flow into the housing 11 itself via the lead frame 14 and the insulating adhesive 20. For this reason, noise current flows through the lead frame 14 in the housing space of the housing 11, and the electronic components housed in the housing 11 are protected from the noise current by the ESD diode 16. Thus, it becomes difficult for noise current to flow into the housing 11 itself, and it is not particularly necessary to provide a spiral coil portion or the like inside the housing 11, so that even when an electronic component is accommodated in the conductive housing 11, the size is increased. It is possible to improve the immunity / ESD resistance of the electronic device 10 without incurring any damage.

図6は、第1実施形態の変形例に係る電子装置10の要部を示す断面図である。
リードフレーム14の被覆部位として、そのノイズ電流が流れる経路長さLbを絶縁性接着剤20の挿通方向の長さLaよりも長くするために、折り畳まれるようにして形成される被覆部位14aを採用することに限らず、他の形状の被覆部位を採用してもよい。具体的には、例えば、図6に示すように、山型形状の被覆部位14bを採用することで、被覆部位14bの経路長さLbを絶縁性接着剤20の挿通方向の長さLaよりも長く形成することができる。
FIG. 6 is a cross-sectional view illustrating a main part of an electronic device 10 according to a modification of the first embodiment.
As the covering portion of the lead frame 14, a covering portion 14a formed so as to be folded is employed in order to make the path length Lb through which the noise current flows longer than the length La in the insertion direction of the insulating adhesive 20. However, the present invention is not limited to this, and other shapes of covering portions may be employed. Specifically, for example, as shown in FIG. 6, by adopting a mountain-shaped covering portion 14 b, the path length Lb of the covering portion 14 b is made longer than the length La in the insertion direction of the insulating adhesive 20. Can be formed long.

[第2実施形態]
次に、本発明の第2実施形態に係る電子装置について図7を参照して説明する。図7は、第2実施形態に係る電子装置10aの要部を示す断面図である。
本第2実施形態に係る電子装置10aは、さらにイミュニティ・ESD耐性を向上させるため、高透磁率部材21を新たに採用する点が、上記第1実施形態に係る電子装置と異なる。したがって、第1実施形態の電子装置と実質的に同一の構成部分には、同一符号を付し、その説明を省略する。
[Second Embodiment]
Next, an electronic device according to a second embodiment of the present invention will be described with reference to FIG. FIG. 7 is a cross-sectional view illustrating a main part of the electronic device 10a according to the second embodiment.
The electronic device 10a according to the second embodiment is different from the electronic device according to the first embodiment in that a high magnetic permeability member 21 is newly employed in order to further improve immunity / ESD resistance. Therefore, substantially the same components as those of the electronic device of the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

本実施形態では、図7に示すように、上述したリードフレーム14の被覆部位14aの周囲に絶縁性接着剤20よりも透磁率の高い高透磁率部材21を絶縁性接着剤20との間に巻き付けて介在させている。ここで、高透磁率部材21としては、例えば、コバールTM,42アロイ,インバーコア,42アロイコア,パーマロイB,SUS430,パーマロイC等を採用することができる。   In the present embodiment, as shown in FIG. 7, a high permeability member 21 having a higher permeability than the insulating adhesive 20 is provided between the insulating adhesive 20 around the covering portion 14 a of the lead frame 14 described above. It is wound and interposed. Here, as the high magnetic permeability member 21, for example, Kovar TM, 42 alloy, Invar core, 42 alloy core, Permalloy B, SUS430, Permalloy C or the like can be employed.

このようにしても、筐体11とリードフレーム14との間の相互インダクタンスMが大きくなるので、ノイズ電流がリードフレーム14および絶縁性接着剤20を介して筐体11自体に流れ込みにくくなり、導電性の筐体11に電子部品が収容される場合でも大型化を招くことなく電子装置10のイミュニティ・ESD耐性を向上させることができる。   Even in this case, since the mutual inductance M between the housing 11 and the lead frame 14 is increased, it is difficult for noise current to flow into the housing 11 itself via the lead frame 14 and the insulating adhesive 20. Even when an electronic component is accommodated in the flexible casing 11, the immunity / ESD resistance of the electronic device 10 can be improved without causing an increase in size.

図8は、第2実施形態の変形例に係る電子装置10aの要部を示す断面図である。
図8に示すように、ノイズ電流が流れる経路長さLbが絶縁性接着剤20の挿通方向の長さLaと等しい従来の被覆部位14cに対して、高透磁率部材21を巻き付けることで、被覆部位14cと絶縁性接着剤20との間に高透磁率部材21を介在させてもよい。このようにしても、筐体11とリードフレーム14との間の相互インダクタンスMが大きくなるので、ノイズ電流がリードフレーム14および絶縁性接着剤20を介して筐体11自体に流れ込みにくくなり、導電性の筐体11に電子部品が収容される場合でも大型化を招くことなく電子装置10のイミュニティ・ESD耐性を向上させることができる。
FIG. 8 is a cross-sectional view showing a main part of an electronic device 10a according to a modification of the second embodiment.
As shown in FIG. 8, a high magnetic permeability member 21 is wound around a conventional covering portion 14c in which the path length Lb through which the noise current flows is equal to the length La in the insertion direction of the insulating adhesive 20. A high magnetic permeability member 21 may be interposed between the portion 14 c and the insulating adhesive 20. Even in this case, since the mutual inductance M between the housing 11 and the lead frame 14 is increased, it is difficult for noise current to flow into the housing 11 itself via the lead frame 14 and the insulating adhesive 20. Even when an electronic component is accommodated in the flexible casing 11, the immunity / ESD resistance of the electronic device 10 can be improved without causing an increase in size.

また、相互インダクタンスMを増加させるため、高透磁率部材21を、上述した被覆部位14aや被覆部位14cと絶縁性接着剤20との間に介在させることに限らず、被覆部位14bと絶縁性接着剤20との間に介在させてもよいし、ノイズ電流が流れる経路長さLbを絶縁性接着剤20の挿通方向の長さLaよりも長くするように形成されるリードフレーム14の被覆部位と絶縁性接着剤20との間に介在させてもよい。   Further, in order to increase the mutual inductance M, the high permeability member 21 is not limited to being interposed between the covering portion 14a or the covering portion 14c and the insulating adhesive 20, and the covering portion 14b is insulatively bonded. The lead frame 14 may be interposed between the adhesive 20 and the length of the path Lb through which the noise current flows is longer than the length La in the insertion direction of the insulating adhesive 20. It may be interposed between the insulating adhesive 20.

[第3実施形態]
次に、本発明の第3実施形態に係る電子装置について図9を参照して説明する。図9は、第3実施形態に係る電子装置10bの要部を示す断面図である。
本第3実施形態に係る電子装置10bは、さらにイミュニティ・ESD耐性を向上させるため、筐体11がその自己インダクタンスLkを増加させるように形成される点が、上記第1実施形態に係る電子装置と異なる。したがって、第1実施形態の電子装置と実質的に同一の構成部分には、同一符号を付し、その説明を省略する。
[Third Embodiment]
Next, an electronic device according to a third embodiment of the present invention will be described with reference to FIG. FIG. 9 is a cross-sectional view showing a main part of an electronic device 10b according to the third embodiment.
In the electronic device 10b according to the third embodiment, in order to further improve the immunity / ESD resistance, the electronic device according to the first embodiment is formed such that the housing 11 increases its self-inductance Lk. And different. Therefore, substantially the same components as those of the electronic device of the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

本実施形態では、ノイズ電流が筐体11自体に流れ込むことを確実に抑制するため、筐体11がその自己インダクタンスLkを増加させるように形成される。自己インダクタンスLkを増加させることで、ノイズ電流が筐体11自体に流れ込みにくくなるからである。この自己インダクタンスLkは、μを筐体11の透磁率、lをノイズ電流伝搬方向の筐体11の長さ、aをノイズ電流伝搬方向の筐体11の厚さとするとき、以下に示す式(2)の関係が成立する。

Figure 2014107482
In the present embodiment, the housing 11 is formed so as to increase its self-inductance Lk in order to reliably suppress noise current from flowing into the housing 11 itself. This is because increasing the self-inductance Lk makes it difficult for noise current to flow into the housing 11 itself. This self-inductance Lk is shown below when μ 2 is the magnetic permeability of the casing 11, l 2 is the length of the casing 11 in the noise current propagation direction, and a is the thickness of the casing 11 in the noise current propagation direction. The relationship of Formula (2) is materialized.
Figure 2014107482

そこで、本実施形態では、図9に示すように、筐体11の挿通穴11bの内面には、その表面積を大きくするように凹凸部11cが形成されている。これにより、ノイズ電流伝搬方向の筐体11の長さlを大きくすることができ、自己インダクタンスLkを増加させることができる。 Therefore, in the present embodiment, as shown in FIG. 9, an uneven portion 11 c is formed on the inner surface of the insertion hole 11 b of the housing 11 so as to increase the surface area. As a result, the length l 2 of the casing 11 in the noise current propagation direction can be increased, and the self-inductance Lk can be increased.

また、本実施形態では、図9に示すように、各半導体デバイス12a〜12dが配置される底壁11aには、その厚さが他の壁部よりも薄くなるように凹部11dが形成されている。これにより、ノイズ電流伝搬方向の筐体11の厚さaを小さくすることができ、自己インダクタンスLkを増加させることができる。   In the present embodiment, as shown in FIG. 9, a recess 11 d is formed on the bottom wall 11 a where the semiconductor devices 12 a to 12 d are arranged so that the thickness thereof is thinner than the other walls. Yes. Thereby, the thickness a of the housing | casing 11 of a noise current propagation direction can be made small, and the self inductance Lk can be increased.

このように、筐体11の自己インダクタンスLkを増加させることで、ノイズ電流がリードフレーム14および絶縁性接着剤20を介して筐体11自体に流れ込みにくくなり、大型化を招くことなく電子装置10のイミュニティ・ESD耐性を向上させることができる。   Thus, by increasing the self-inductance Lk of the housing 11, it becomes difficult for noise current to flow into the housing 11 itself via the lead frame 14 and the insulating adhesive 20, and the electronic device 10 does not increase in size. Immunity / ESD resistance can be improved.

図10は、第3実施形態の変形例に係る電子装置10bの要部を示す断面図である。
図10に示すように、上述した被覆部位14cが採用される場合に、筐体11の挿通穴11bの内面に凹凸部11cを形成してもよい。このようにしても、筐体11の自己インダクタンスLkが大きくなるので、ノイズ電流がリードフレーム14および絶縁性接着剤20を介して筐体11自体に流れ込みにくくなり、大型化を招くことなく電子装置10のイミュニティ・ESD耐性を向上させることができる。
FIG. 10 is a cross-sectional view showing a main part of an electronic device 10b according to a modification of the third embodiment.
As shown in FIG. 10, when the above-described covering portion 14 c is employed, the uneven portion 11 c may be formed on the inner surface of the insertion hole 11 b of the housing 11. Even in this case, since the self-inductance Lk of the housing 11 is increased, it is difficult for noise current to flow into the housing 11 itself via the lead frame 14 and the insulating adhesive 20, and the electronic device is not increased in size. The immunity / ESD resistance of 10 can be improved.

なお、凹凸部11cおよび凹部11dの少なくともいずれか一方は、イミュニティ・ESD耐性を向上させるための構成として、上述した他の実施形態およびその変形例等の筐体11に採用することができる。   In addition, at least any one of the uneven | corrugated | grooved part 11c and the recessed part 11d can be employ | adopted as the structures for improving immunity / ESD tolerance to the housing | casing 11 of other embodiment mentioned above and its modification.

なお、本発明は上記各実施形態や変形例に限定されるものではなく、例えば、以下のように具体化してもよい。
(1)図11は、絶縁性接着剤20にNi−Zn系のフェライト粉を含有させたときの透磁率μiの周波数依存性を示すグラフである。
上記各実施形態およびその変形例において、相互インダクタンスMを増加させるため、絶縁性接着剤20に対して透磁率の比較的高い粉末、例えば、Ni−Zn系のフェライト粉を含有させてもよい。例えば、図11に例示するように、絶縁性接着剤20に対して、80wt%(質量百分率),85wt%,88wt%にてNi−Zn系のフェライト粉を含有させると、88wt%のものが最も透磁率μiを高めることができる。
In addition, this invention is not limited to said each embodiment and modification, For example, you may actualize as follows.
(1) FIG. 11 is a graph showing the frequency dependence of the magnetic permeability μi when the insulating adhesive 20 contains Ni—Zn ferrite powder.
In each of the above embodiments and modifications thereof, in order to increase the mutual inductance M, the insulating adhesive 20 may contain a powder having a relatively high magnetic permeability, for example, a Ni—Zn ferrite powder. For example, as illustrated in FIG. 11, when Ni—Zn-based ferrite powder is contained at 80 wt% (mass percentage), 85 wt%, and 88 wt% with respect to the insulating adhesive 20, 88 wt% is obtained. The magnetic permeability μi can be increased most.

(2)ノイズ電流から電子部品を保護するために筐体11内に収容されてリードフレーム14に接続される静電気放電保護回路として、ESDダイオード16が採用されることに限らず、他の静電気放電保護回路が採用されてもよい。 (2) The ESD diode 16 is not limited to the ESD protection circuit that is housed in the housing 11 and connected to the lead frame 14 in order to protect the electronic components from noise current. A protection circuit may be employed.

(3)リードフレーム14の中間部位と挿通部(11b)の内面との間には、絶縁性を有するエポキシ樹脂が絶縁性接着剤20として介在することに限らず、他の誘電体が介在することで、各リードフレーム14を筐体11に対して直接接触させないようにそれぞれ保持してもよい。 (3) Between the intermediate portion of the lead frame 14 and the inner surface of the insertion portion (11b), not only the insulating epoxy resin is interposed as the insulating adhesive 20, but also another dielectric is interposed. Thus, each lead frame 14 may be held so as not to be in direct contact with the housing 11.

10,10a,10b…電子装置
11…筐体 11a…底壁 11b…挿通穴(挿通部) 11c…凹凸部
12a〜12d…半導体デバイス(電子部品)
14…リードフレーム(外部接続端子)
14a,14b…被覆部位
16…ESDダイオード(静電気放電保護回路)
20…絶縁性接着剤(誘電体)
21…高透磁率部材
DESCRIPTION OF SYMBOLS 10, 10a, 10b ... Electronic device 11 ... Housing 11a ... Bottom wall 11b ... Insertion hole (insertion part) 11c ... Uneven part 12a-12d ... Semiconductor device (electronic component)
14 ... Lead frame (external connection terminal)
14a, 14b ... Covering part 16 ... ESD diode (electrostatic discharge protection circuit)
20 ... Insulating adhesive (dielectric)
21 ... High permeability member

Claims (4)

導電性の筐体(11)内に電子部品(12a〜12d)が収容される電子装置(10,10a,10b)において、
前記電子部品と前記筐体外の電子機器とを電気的に接続するための端子であって前記筐体に形成される挿通部(11b)を当該筐体に接触することなく挿通するように配置される外部接続端子(14)と、
前記外部接続端子と前記挿通部の内面との間に介在する誘電体(20)と、
前記外部接続端子に印加された静電気放電に起因して生じたノイズ電流から前記電子部品を保護するために前記筐体内に収容されて前記外部接続端子に接続される静電気放電保護回路(16)と、を備え、
前記外部接続端子は、前記誘電体に覆われる被覆部位(14a,14b)の前記ノイズ電流が流れる経路長さ(Lb)が当該誘電体の挿通方向の長さ(La)よりも長くなるように形成されることを特徴とする電子装置。
In the electronic device (10, 10a, 10b) in which the electronic components (12a to 12d) are accommodated in the conductive casing (11),
It is a terminal for electrically connecting the electronic component and an electronic device outside the casing, and is arranged so as to pass through an insertion portion (11b) formed in the casing without contacting the casing. An external connection terminal (14),
A dielectric (20) interposed between the external connection terminal and the inner surface of the insertion portion;
An electrostatic discharge protection circuit (16) housed in the casing and connected to the external connection terminal to protect the electronic component from noise current caused by electrostatic discharge applied to the external connection terminal; With
In the external connection terminal, the path length (Lb) through which the noise current flows in the covering portions (14a, 14b) covered with the dielectric is longer than the length (La) in the insertion direction of the dielectric. An electronic device formed.
前記被覆部位の少なくとも一部と前記誘電体との間に前記誘電体よりも透磁率の高い高透磁率部材(21)を介在させることを特徴とする請求項1に記載の電子装置。   The electronic device according to claim 1, wherein a high permeability member (21) having a permeability higher than that of the dielectric is interposed between at least a part of the covering portion and the dielectric. 前記誘電体と接触する前記挿通部の内面に凹凸部(11c)が形成されることを特徴とする請求項1または2に記載の電子装置。   The electronic device according to claim 1, wherein an uneven portion (11 c) is formed on an inner surface of the insertion portion that contacts the dielectric. 前記筐体を構成する壁部のうち前記電子部品が配置される壁部(11a)は、その厚さが他の壁部よりも薄くなるように形成されることを特徴とする請求項1〜3のいずれか一項に記載の電子装置。   The wall portion (11a) in which the electronic component is disposed among the wall portions constituting the housing is formed so that the thickness thereof is thinner than other wall portions. 4. The electronic device according to any one of 3.
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