JP2014107298A5 - Printed wiring board, printed circuit board, and electronic equipment - Google Patents
Printed wiring board, printed circuit board, and electronic equipment Download PDFInfo
- Publication number
- JP2014107298A5 JP2014107298A5 JP2012256794A JP2012256794A JP2014107298A5 JP 2014107298 A5 JP2014107298 A5 JP 2014107298A5 JP 2012256794 A JP2012256794 A JP 2012256794A JP 2012256794 A JP2012256794 A JP 2012256794A JP 2014107298 A5 JP2014107298 A5 JP 2014107298A5
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- signal
- conductor layer
- ground
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims 11
- 230000037250 Clearance Effects 0.000 claims 1
- 230000035512 clearance Effects 0.000 claims 1
Description
本発明は、半導体パッケージが実装される、アレイ状に配置された複数の接続用電極パッドを備えたプリント配線板、プリント配線板を備えたプリント回路板、及び電子機器に関する。 The present invention relates to a semiconductor package is mounted, the printed wiring board having a plurality of connecting electrode pads arranged in an array, a printed circuit board having a print wiring board, and an electronic apparatus.
そこで、本発明は、少ない数のグラウンドパッドでも効果的にリターン電流によって発生する信号波形のリンギングを抑制することができるプリント配線板、プリント配線板を備えたプリント回路板、及び電子機器を提供することを目的とするものである。
Accordingly, the present invention is a printed wiring board which can suppress the ringing signal waveform generated by effectively return current even with a small number of ground pads, a printed circuit board having a print wiring board, and an electronic apparatus It is intended to do.
Claims (8)
前記第１導体層に格子状に配置された接合用の複数の電極パッドと、
前記第１導体層に配置された複数の第１信号配線と、
前記第２導体層に配置された複数の第２信号配線と、
前記第３導体層に配置されたグラウンドプレーンと、を備え、
前記複数の電極パッドには、
外側から内側に向かって１列目及び２列目に配置され、前記複数の第１信号配線に接続された複数の第１信号パッドと、
３列目以降に配置され、複数の信号ヴィアを介して前記複数の第２信号配線に接続された複数の第２信号パッドと、
前記２列目に配置され、複数のグラウンドヴィアを介して前記グラウンドプレーンに接続された複数の第１グラウンドパッドと、が含まれており、
光速度をＣ０、信号の立ち上がり時間をｔｒ、前記絶縁層の比誘電率をεとしたとき、前記複数の第１グラウンドパッドは、前記各第１グラウンドパッドの間隔が（Ｃ０×ｔｒ）／（２×√ε）以下となるように配置されていることを特徴とするプリント配線板。 In the printed wiring board formed by arranging the first conductor layer, the second conductor layer, and the third conductor layer via the insulating layer,
A plurality of electrode pads for bonding arranged in a grid pattern on the first conductor layer;
A plurality of first signal wires disposed in the first conductor layer;
A plurality of second signal wires arranged in the second conductor layer;
A ground plane disposed on the third conductor layer,
The plurality of electrode pads include
A plurality of first signal pads arranged in a first row and a second row from the outside to the inside and connected to the plurality of first signal wires;
A plurality of second signal pads arranged in the third row and thereafter and connected to the plurality of second signal wirings via a plurality of signal vias;
A plurality of first ground pads arranged in the second row and connected to the ground plane via a plurality of ground vias;
When the light velocity is C0, the signal rise time is tr, and the relative dielectric constant of the insulating layer is ε, the intervals between the first ground pads are (C0 × tr) / ( 2. A printed wiring board, wherein the printed wiring board is arranged to be 2 × √ε) or less.
前記２列目の第１信号パッドに接続される前記第１信号配線は、前記１列目の第１信号パッドの間を通過して配線されていることを特徴とする請求項１に記載のプリント配線板。 The electrode pads in the first row are all the first signal pads;
The first signal line connected to the first signal pad of the second column is wired passing through between the first signal pads of the first column. Printed wiring board.
前記グラウンドプレーンには、前記複数の信号ヴィアを分けてグループ化した際に各グループの信号ヴィアの束が前記グラウンドプレーンとクリアランスを有して貫通する開口部が、互いに間隔をあけて複数形成されていることを特徴とする請求項１又は２に記載のプリント配線板。 The third conductor layer is disposed between the first conductor layer and the second conductor layer;
In the ground plane, when the plurality of signal vias are divided and grouped, a plurality of openings through which the bundle of signal vias of each group penetrates the ground plane with clearance are formed at intervals. The printed wiring board according to claim 1, wherein the printed wiring board is provided.
前記３列目に前記第１グラウンドパッドに隣接して配置され、隣接する前記第１グラウンドパッドに接続された第２グラウンドパッドが含まれていることを特徴とする請求項１乃至４のいずれか１項に記載のプリント配線板。 The plurality of electrode pads include
5. The second ground pad arranged adjacent to the first ground pad in the third row and connected to the adjacent first ground pad is included in the third row. The printed wiring board according to item 1.
前記プリント配線板の前記第１導体層に実装された半導体パッケージと、を備えたことを特徴とするプリント回路板。 The printed wiring board according to any one of claims 1 to 5,
And a semiconductor package mounted on the first conductor layer of the printed wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012256794A JP6039380B2 (en) | 2012-11-22 | 2012-11-22 | Printed wiring board, printed circuit board, and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012256794A JP6039380B2 (en) | 2012-11-22 | 2012-11-22 | Printed wiring board, printed circuit board, and electronic equipment |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014107298A JP2014107298A (en) | 2014-06-09 |
| JP2014107298A5 true JP2014107298A5 (en) | 2016-01-14 |
| JP6039380B2 JP6039380B2 (en) | 2016-12-07 |
Family
ID=51028558
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012256794A Active JP6039380B2 (en) | 2012-11-22 | 2012-11-22 | Printed wiring board, printed circuit board, and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP6039380B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102262073B1 (en) * | 2018-07-26 | 2021-06-08 | 교세라 가부시키가이샤 | Wiring substrate |
| CN111741600B (en) * | 2020-06-30 | 2023-09-29 | 新华三技术有限公司 | Circuit board and electronic equipment |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3787409B2 (en) * | 1997-04-25 | 2006-06-21 | キヤノン株式会社 | Multi-layer board with array connection IC |
| JPH10303562A (en) * | 1997-04-30 | 1998-11-13 | Toshiba Corp | Printed wiring board |
| US8853001B2 (en) * | 2003-11-08 | 2014-10-07 | Stats Chippac, Ltd. | Semiconductor device and method of forming pad layout for flipchip semiconductor die |
| JP2008227168A (en) * | 2007-03-13 | 2008-09-25 | Elpida Memory Inc | Method for arranging via, and method for manufacturing wiring substrate |
-
2012
- 2012-11-22 JP JP2012256794A patent/JP6039380B2/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2012069984A5 (en) | ||
| JP4746770B2 (en) | Semiconductor device | |
| JP2009239318A5 (en) | ||
| JP5522077B2 (en) | Semiconductor device | |
| US9203008B2 (en) | Multilayered LED printed circuit board | |
| JP2011151185A5 (en) | Semiconductor device | |
| JP6452270B2 (en) | Printed circuit boards and electronic equipment | |
| JP2013225610A5 (en) | ||
| JP2011029236A5 (en) | ||
| WO2018026511A8 (en) | Heterogeneous ball pattern package | |
| JP5919558B2 (en) | Multilayer printed circuit board | |
| JP2012069618A5 (en) | ||
| EP2493273A4 (en) | Device-mounting structure and device-mounting method | |
| JP2014103236A5 (en) | Printed wiring board, printed circuit board, and electronic equipment | |
| JP2009110983A5 (en) | ||
| JP2014150102A5 (en) | ||
| JP2018107267A5 (en) | ||
| JP2011023528A5 (en) | ||
| JP2014107298A5 (en) | Printed wiring board, printed circuit board, and electronic equipment | |
| JP2013149758A5 (en) | ||
| JP2013251303A5 (en) | Semiconductor package, stacked semiconductor package, and printed circuit board | |
| JP2014090170A5 (en) | ||
| JP2017076754A5 (en) | ||
| JP2020088139A5 (en) | ||
| JP6039380B2 (en) | Printed wiring board, printed circuit board, and electronic equipment |