JP2014096891A - Overcurrent detection circuit and switching power supply device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To protect a switch element of a switching power supply device from an overcurrent even if an input voltage changes.SOLUTION: A duty detection circuit 41 detects the ratio of an on time of a switch element Q1 to the sum of the on time and an off time, and generates a duty detection voltage Vrc proportional to the detected ratio. An overcurrent detecting reference voltage generation circuit 42 generates an overcurrent detecting reference voltage V42 proportional to the duty detection voltage Vrc. A comparator 4 compares a switching current detection voltage Vd with the overcurrent detecting reference voltage V42, and if the switching current detection voltage Vd is higher than the overcurrent detecting reference voltage V42, generates a high level overcurrent detection signal S4. A control circuit 100 turns off the switch element Q1 in response to the high level overcurrent detection signal S4.

Description

  The present invention relates to an overcurrent detection circuit that detects an overcurrent flowing through a switch element of a switching power supply device, and a switching power supply device including the overcurrent detection circuit.

  Generally, a switching power supply device has an overcurrent protection function that shuts off a switch element when a current flowing through the switch element (hereinafter referred to as a switching current) is larger than a predetermined overcurrent detection threshold. Here, there is a delay time from when the switching current becomes larger than the predetermined overcurrent detection threshold until the switch element is actually shut off. When the input voltage is relatively low, the increase rate of the switching current is relatively small, so that the difference between the switching current when the switch element is cut off and the overcurrent detection threshold is relatively small. However, as the input voltage increases, the increase rate of the switching current increases, and there is a problem that the difference between the switching current when the switching element is cut off and the overcurrent detection threshold value increases.

  In order to solve this problem, the switching power supply described in Patent Document 1 detects current change detection that detects the slope of the current flowing through the switching element based on the current detection signal of the current detection circuit that detects the current flowing through the switching element. The circuit includes an overcurrent detection point correction circuit that corrects an overcurrent detection point of a current flowing through the switching element based on an output signal of the current change detection circuit. Here, the current change detection circuit determines whether the current value flowing through the switching element is smaller than a predetermined reference value after a lapse of a predetermined time after the switching element control circuit starts outputting an ON signal to the switching element. And a means for outputting a signal for correcting the overcurrent detection point when it is smaller than a predetermined reference value. The overcurrent detection point correction circuit includes means for setting the reference value of the overcurrent detection point higher by a predetermined value when a signal for correcting the overcurrent detection point is received from the current change detection circuit. Therefore, the reference value of the overcurrent detection point can be reduced as the input voltage is higher.

  Further, the switching power supply device described in Patent Document 2 uses the tertiary winding of the transformer and inputs based on the voltage determined by the ratio of the primary winding and the tertiary winding appearing in the tertiary winding when the switch element is on. The voltage is detected, and the reference voltage used for overcurrent detection is corrected according to the detected input voltage.

  Furthermore, the switching power supply device described in Patent Document 3 generates a correction signal that increases with the lapse of the ON time of the switching element, and subtracts the correction signal from the current detection signal having a voltage value corresponding to the current flowing through the switching element. Then, a correction current detection signal for comparison with a predetermined overcurrent threshold is generated.

  However, in the switching power supply device described in Patent Document 1, the timing for determining whether or not the switching current is smaller than a predetermined reference value is the timing after a predetermined time has elapsed since the output of the ON signal was started. . Depending on the time setting of the timer circuit for measuring the predetermined time, the level of the input voltage may not be detected.

  In addition, in the case of the switching power supply device described in Patent Document 2, in addition to the tertiary winding of the transformer, a diode connected in series to the tertiary winding, and a capacitor connected in parallel to the tertiary winding, In order to detect the input voltage, a diode, a capacitor, and an external resistor are required, leading to an increase in the number of components.

  Furthermore, in the switching power supply device described in Patent Document 3, the correction current detection signal is also used as a control signal for controlling the switching element, so that PWM (Pulse Width Modulation) control in the current mode is performed. In this case, since the control is not performed based on the actual switching current value, the operation may become unstable. In addition, when the duty ratio is 50% or more, a current for preventing abnormal oscillation due to subharmonic oscillation is added to the correction current detection signal, which causes a problem that a deviation occurs from a desired overcurrent detection value.

  An object of the present invention is to solve the above problems and provide an overcurrent detection circuit capable of protecting a switch element from an overcurrent even when an input voltage changes, and a switching power supply device including the overcurrent detection circuit. It is in.

  The overcurrent detection circuit according to the present invention performs on / off control of the first switch element connected to the input terminal, thereby converting the input voltage input through the input terminal into a predetermined output voltage and outputting the predetermined output voltage. An overcurrent detection circuit for a switching power supply comprising a control circuit and a switching current detection circuit that detects a switching current flowing through the first switch element and generates a switching current detection voltage proportional to the detected current And detecting a ratio of the on-time to the sum of the on-time and off-time of the first switch element and generating a duty detection voltage proportional to the detected ratio, and proportional to the duty detection voltage An overcurrent detection reference voltage generating circuit for generating an overcurrent detection reference voltage, and the switching current detection voltage Compared to the flow detecting reference voltage, characterized in that the switching current sensing voltage and a comparator for generating an overcurrent detection signal when greater than the reference voltage for detecting the overcurrent.

  According to the overcurrent detection circuit and the switching power supply device according to the present invention, the ratio of the on time to the sum of the on time and the off time of the first switch element is detected, and the duty detection voltage proportional to the detected ratio is detected. Since it has a duty detection circuit that generates and an overcurrent detection reference voltage generation circuit that generates an overcurrent detection reference voltage proportional to the duty detection voltage, the smaller the input voltage, the smaller the overcurrent detection reference voltage. The switch element can be protected from overcurrent even if the input voltage changes.

1 is a circuit diagram showing a configuration of a switching power supply apparatus 200 according to a first embodiment of the present invention. FIG. 2 is a circuit diagram showing configurations of a duty detection circuit 41 and an overcurrent detection reference voltage generation circuit 42 in FIG. 1. 3 is a timing chart showing control signals EXT and EXTB in FIG. 2. FIG. 6 is a circuit diagram showing configurations of a duty detection circuit 41 and an overcurrent detection reference voltage generation circuit 42A according to a second embodiment of the present invention. It is a circuit diagram which shows the structure of 41 A of duty detection circuits and the reference voltage generation circuit 42 for an overcurrent detection which concern on the 3rd Embodiment of this invention. FIG. 10 is a circuit diagram showing configurations of a duty detection circuit 41A and an overcurrent detection reference voltage generation circuit 42A according to a fourth embodiment of the present invention.

  Hereinafter, embodiments according to the present invention will be described with reference to the drawings. In addition, in each following embodiment, the same code | symbol is attached | subjected about the same component.

First embodiment.
FIG. 1 is a circuit diagram showing a configuration of a switching power supply apparatus 200 according to the first embodiment of the present invention, and FIG. 2 shows a configuration of a duty detection circuit 41 and an overcurrent detection reference voltage generation circuit 42 in FIG. FIG. In FIG. 1, a switching power supply apparatus 200 inputs an input voltage VIN from a DC power supply 1 via a primary winding W1 of a transformer T and an input terminal DRAIN. Then, the switching power supply device 200 converts the input voltage VIN to a predetermined output voltage VOUT by performing on / off control of the switch element Q1 connected to the input terminal DRAIN, and outputs it to the load 22 via the transformer T.

  In FIG. 1, a switching power supply device 200 includes a switching element Q1, a control circuit 100 that controls on / off of the switching element Q1, a starting circuit 7, an undervoltage lockout circuit (hereinafter referred to as a UVLO circuit) 8, and a power supply circuit. 17, a delay circuit 16, a switching current detection circuit 3, a feedback circuit 30, a light load detection circuit 20, a PWM comparator 2, an adder 19, an oscillator and slope compensation circuit 6, and an overcurrent detection circuit. 40, an input terminal DRAIN, a ground terminal COM, a feedback terminal FB, and a power supply terminal VCC. The light load detection circuit 20 includes a comparator 13 that is a hysteresis comparator, and a voltage source 131 that generates a predetermined light load detection reference voltage V1 and outputs it to the inverting input terminal of the comparator 13. The Further, the feedback circuit 30 includes diodes D31 and D32 and resistors R1, R2, and R3. Here, the diodes D31 and D32 are connected in reverse series to the feedback terminal FB. The resistor R1 is connected between the anodes of the diodes D31 and D32 and the power supply circuit 17, and the resistors R2 and R3 are connected in series between the cathode of the diode D32 and the ground terminal COM. Further, the overcurrent detection circuit 40 includes a duty detection circuit 41, an overcurrent detection reference voltage generation circuit 42, and a comparator 4. Further, the control circuit 100 includes RS latch circuits 10 and 15, a NAND gate 11, inverters 12 and 14, and an OR gate 18.

  Here, the positive electrode of the DC power source 1 is connected to the drain of the switch element Q1 via the primary winding W1 of the transformer T and the input terminal DRAIN, while the negative electrode is connected to the ground terminal COM. Furthermore, one end of the tertiary winding W3 of the transformer T is connected to the ground terminal COM and one electrode of the capacitor C2, while the other end of the tertiary winding W3 of the transformer T is connected to the other end of the capacitor C2 via the diode D2. And the power supply terminal VCC. Here, the tertiary winding W3, the capacitor C2, and the diode D2 constitute an external power supply circuit for supplying a current to the switching power supply device 200 via the power supply terminal VCC every time the switch element Q1 is turned on / off. . Further, one end of the secondary winding W2 of the transformer T is connected to one electrode of the load 22 and the smoothing capacitor C21 via the diode D21, while the other end of the secondary winding W2 is connected to the load 22 and the smoothing capacitor C21. Connected to the other electrode.

  When the power supply of the switching power supply device 200 is turned on, a current flows through the starting circuit 7 via the primary winding W1 and the input terminal DRAIN. On the other hand, when the voltage at the power supply terminal VCC is lower than the predetermined threshold voltage, the UVLO circuit 8 turns on the switch SW to charge the capacitor C2. Further, when the voltage at the power supply terminal VCC becomes equal to or higher than a predetermined threshold voltage, the UVLO circuit 8 turns off the switch SW. The power supply circuit 17 is a regulator that generates a predetermined constant voltage based on an input voltage from the power supply terminal VCC and supplies the constant voltage to each circuit in the Fordback circuit 30 and the switching power supply device 200.

  When the switch element Q1 is turned on, a current flows from the DC power source 1 through the primary winding W1, the input terminal DRAIN, and the switch element Q1, and magnetic energy is accumulated in the transformer T. Next, when the switch element Q1 is turned off, the energy accumulated in the transformer T is transmitted to the load 22 side via the secondary winding W2. A current flows through the secondary winding W2 and the diode D21, is smoothed by the smoothing capacitor C21, and the output voltage VOUT is supplied to the load 22.

  In FIG. 1, an output voltage detection circuit 21 detects an output voltage VOUT and outputs a signal indicating the detection result to a feedback circuit 30 via a photocoupler PC and a feedback terminal FB. The feedback circuit 30 generates a feedback voltage VFB corresponding to the output voltage VOUT and outputs it to the inverting input terminal of the PWM comparator 2 and the non-inverting input terminal of the comparator 13. The comparator 13 generates a high-level light load detection signal S20 when the feedback voltage VFB is higher than the light load detection reference voltage V1. On the other hand, when the feedback voltage VFB is equal to or lower than the light load detection reference voltage V1, the comparator 13 generates a low level light load detection signal S20 and outputs it to the first input terminal of the NAND gate 11.

  The delay circuit 16 delays the control signal EXT output from the control circuit 100 to the gate of the switch element Q1 by a predetermined delay time and outputs the delayed signal to the switching current detection circuit 3. The switching current detection circuit 3 detects the drain current (switching current) when the switch element Q1 is turned on in accordance with the delayed control signal EXT from the delay circuit 16, and generates a switching current detection voltage Vd proportional to the detected drain current. Occur. Further, the switching current detection circuit 3 outputs the switching current detection voltage Vd to the adder 19 and the non-inverting input terminal of the comparator 4. Specifically, the switching current detection circuit 3 includes a switch element having one end connected to the input terminal DRAIN, and two resistors connected in series between the other end of the switch element and the ground terminal COM. It is prepared for. The delayed control signal EXT from the delay circuit 16 is output to the control terminal of the switching element of the switching current detection circuit 3, and the switching current detection circuit 3 converts the voltage at the connection point between the two resistors to the switching current detection voltage Vd. Output as. The delay circuit 16 is provided to prevent the switching current detection circuit 3 from malfunctioning due to noise generated when the switch element Q1 is turned on.

  The oscillator and slope compensation circuit 6 generates a clock CLK having a predetermined frequency and outputs the clock CLK to the set terminal S of the RS latch circuit 15, and also generates a predetermined slope signal slope for slope compensation and adds it. 19 output. The adder 19 adds the slope signal slope to the switching current detection voltage Vd, and outputs the slope voltage Vs after the addition to the non-inverting input terminal of the PWM comparator 2. The PWM comparator 2 generates a high-level PWM signal S2 when the slope voltage Vs is higher than the feedback voltage VFB. On the other hand, when the slope voltage Vs is equal to or lower than the feedback voltage VFB, the PWM comparator 2 generates a low-level PWM signal S2 and outputs it to the first input terminal of the OR gate 18.

  As will be described in detail later, the duty detection circuit 41 generates a duty detection voltage Vrc that is proportional to the ratio of the ON time of the switch element Q1, and outputs the duty detection voltage Vrc to the overcurrent detection reference voltage generation circuit. Further, the overcurrent detection reference voltage generation circuit 42 generates an overcurrent detection reference voltage V42 based on the duty detection voltage Vrc and outputs it to the inverting input terminal of the comparator 4. The comparator 4 generates a high-level overcurrent detection signal S4 when the switching current detection voltage Vd is larger than the overcurrent detection reference voltage V42. On the other hand, when the switching current detection voltage Vd is equal to or lower than the overcurrent detection reference voltage V42, the comparator 4 generates a low level overcurrent detection signal S4 and outputs it to the second input terminal of the OR gate 18. .

  An output signal from the OR gate 18 is output to the set terminal S of the RS latch circuit 10. In addition, the control signal EXT is output to the reset terminal R of the RS latch circuit 10 via the inverter 14. Further, the output signal from the RS latch circuit 10 is output to the reset terminal R of the RS latch circuit 15, and the output signal from the RS latch circuit 15 is output to the second input terminal of the NAND gate 11. An output signal from the NAND gate 11 is output to the switch element Q1, the inverter 14, and the duty detection circuit 41 as the control signal EXT via the inverter 12.

  Next, the operation of the control circuit 100 at a heavy load when the feedback voltage VFB is higher than the light load detection reference voltage V1 will be described. At heavy load, a high level light load detection signal S20 is generated. When the voltage level of the light load detection signal S20 is high, when the clock CLK from the oscillator and slope compensation circuit 6 becomes high level, the voltage level of the output signal from the RS latch circuit 15 becomes high level. A level control signal EXT is generated. In response to this, the switch element Q1 is turned on. When the switch element Q1 is turned on and a predetermined delay time set by the delay circuit 16 elapses, the switching current detection circuit 3 detects the drain current and generates the switching current detection voltage Vd. When the slope voltage Vs after compensation of the slope compensation of the switching current detection voltage Vd becomes larger than the feedback voltage VFB, the voltage level of the PWM signal S2 from the PWM comparator 2 becomes high level. In response to this, the RS latch circuit 10 outputs a high level output signal to the reset terminal R of the RS latch circuit 15. Accordingly, the voltage level of the output signal from the RS latch circuit 15 becomes low level, and the low level control signal EXT is generated. In response to this, the switch element Q1 is turned off. The control circuit 100 keeps the output voltage VOUT constant while repeating the operation described above.

  Next, the operation of the control circuit 100 at light load when the feedback voltage VFB is equal to or lower than the light load detection reference voltage V1 will be described. When the output voltage VOUT becomes higher than a predetermined set voltage, the current flowing through the light emitting portion of the photocoupler PC increases, and as a result, the voltage at the feedback terminal FD decreases. On the contrary, when the output voltage VOUT becomes smaller than the set voltage, the current flowing through the light emitting portion of the photocoupler PC becomes small, and as a result, the voltage at the feedback terminal FB rises. Therefore, when the current flowing through the load 22 becomes small (at light load), the feedback voltage VFB decreases. When the feedback voltage VFB is equal to or lower than a predetermined light load detection reference voltage V1, the comparator 13 generates a low level light load detection signal S20. In response to this, the output signal from the NAND gate 11 becomes high level, the low level control signal EXT is generated, and the switch element Q1 is turned off. Here, the comparator 13 has a hysteresis characteristic, and improves the efficiency by reducing the number of times of switching at a light load.

  Next, the operation at the time of overcurrent detection in which the switching current detection voltage Vd is larger than the overcurrent detection reference voltage V42 will be described. When the switching current detection voltage Vd becomes larger than the overcurrent detection reference voltage V42, the comparator 4 generates a high level overcurrent detection signal S4 and outputs it to the OR gate 18. Therefore, the RS latch circuit 10 outputs a high level output signal to the reset terminal R of the RS latch circuit 15. In response to this, the RS latch circuit 15 outputs a low level output signal to the NAND gate 11. Accordingly, the low level control signal EXT is generated, and the switch element Q1 is turned off. As a result, an excessive current larger than a predetermined overcurrent threshold corresponding to the overcurrent detection reference voltage V42 is prevented from flowing through the switch element Q1.

  In FIG. 2, a duty detection circuit 41 includes a non-overlap circuit 50, a low-pass filter 51 including a resistor R51 and a capacitor C51, a voltage source 61, and an N-channel MOS field effect transistor (hereinafter referred to as an nMOS transistor). The switch elements N1 and N2 are configured. The overcurrent detection reference voltage generation circuit 42 includes voltage-current conversion circuits 43 and 44, current mirror circuits CM1 and CM2, and a current-voltage conversion circuit 45.

  The voltage-current conversion circuit 43 includes an operational amplifier 52, a switch element N3 that is an nMOS transistor, and a resistor r1. The current mirror circuit CM1 includes switch elements P11 to P14 that are P-channel MOS field effect transistors (hereinafter referred to as pMOS transistors) and fuse elements F1 and F2, and the current mirror circuit CM2 includes It is configured to include switch elements P15 to P17 which are pMOS transistors and a fuse element F4. The voltage-current conversion circuit 44 includes an operational amplifier 54, a switch element N4 that is an nMOS transistor, a resistor r2, and a voltage source 62. Furthermore, the current-voltage conversion circuit 45 includes resistors r3 and r4 connected in series, and a fuse element F3 connected in parallel to the resistor r3. Each of the voltage sources 61 and 62 is, for example, a band gap reference circuit, and generates predetermined reference voltages VREF1 and VREF2 that are substantially independent of temperature. Further, the reference voltage VREF1 is set to 1 V, for example.

  In the duty detection circuit 41, one end of the switch element N1 is connected to the voltage source 61, while the other end of the switch element N1 is connected to one end of the switch element N2. The other end of the switch element N2 is connected to the ground terminal COM. Further, one end of the resistor R51 is connected to the connection point between the switch elements N1 and N2, while the other end of the resistor R51 is grounded via the capacitor C51 and connected to the non-inverting input terminal of the operational amplifier 52. Is done. The control signal EXT is output to the gate of the switch element N1 and the non-overlap circuit 50. Based on the control signal EXT, the non-overlap circuit 50 generates the control signal EXTB so that the switch element N2 is turned off during the ON period of the switch element N1 and the switch element N2 is not turned on simultaneously with the switch element N1. , Output to the gate of the switch element N2.

  FIG. 3 is a timing chart showing the control signals EXT and EXTB in FIG. As shown in FIG. 3, the falling timing of the control signal EXTB is controlled to precede the rising timing of the control signal EXT by a predetermined non-overlap time Tnon. Further, the rising timing of the control signal EXTB is controlled to be delayed by a predetermined non-overlap time Tnon from the falling timing of the control signal EXTB. Here, the non-overlap time Tnon is set to be sufficiently smaller than the off time Toff of the switch element Q1. Therefore, the switch element N1 is controlled to be turned on / off in conjunction with the switch element Q1. Further, the switch element N2 is controlled to be turned on / off complementarily with the switch element Q1, and is turned on substantially during the off period of the switch element Q1.

  In FIG. 2, when the switch element N1 is turned on, the switch element N2 is turned off. For this reason, the voltage source 61 is connected to the resistor R51 through the switch element N1, and the capacitor C51 is charged by the voltage source 61 through the switch element N1 and the resistor R51. On the other hand, when the switch element N1 is off and the switch element N2 is on, the capacitor C51 is grounded via the resistor R51 and the switch element N2 and discharged. At this time, when the switch elements N1 and N2 are repeatedly turned on and off and a predetermined time that is the product of the resistance value of the resistor R51 and the capacitance of the capacitor C51 elapses, the voltage Vrc across the capacitor C51 is equal to the on-time T1 of the switch element N1. And the on-time T2 of the switch element N2 is expressed by the following equation.

  Vrc = VREF1 × (T1 / (T1 + T2))

  Here, the ON time T1 of the switch element N1 is equal to the ON time Ton of the switch element Q1, and the ON time T2 of the switch element N2 is substantially equal to the OFF time Toff of the switch element Q1.

  Therefore, the both-ends voltage Vrc is expressed by the following equation using the ON duty ONDUTY (= Ton / (Ton + Toff)) of the switch element Q1.

  Vrc = VREF1 × ONDUTY

  Hereinafter, the voltage Vrc across the capacitor C51 is referred to as a duty detection voltage Vrc.

  The voltage-current conversion circuit 43 converts the duty detection voltage Vrc to a current I1 = Vrc / r1 proportional to the duty detection voltage Vrc by applying the duty detection voltage Vrc to the resistor r1 (where r1 is the resistance r1 Resistance value.)

  In the current mirror circuit CM1, one end of each of the switch elements P11 and P12 is connected to the power supply circuit 17, the other end of the switch element P11 is connected to the switch element N3 via the fuse element F1, and the other end of the switch element P12. Are directly connected to the switch element N3. Further, the gates of the switch elements P11, P12, P13, and P14 are connected to the gate of the switch element P13 and the switch element N3. One end of each of the switch elements P13 and P14 is connected to the power supply circuit 17, the other end of the switch element P13 is connected to the resistor r3, and the other end of the switch element P14 is connected to the resistor r3 via the fuse element F2. . The current mirror circuit CM1 converts the current I1 into a current Icm1 with a predetermined mirror ratio Rcm1 and outputs the current Icm1 to the current-voltage conversion circuit 45. Here, the mirror ratio Rcm1 can be switched between four mirror ratios by selectively cutting the fuse elements F1 and F2 by trimming.

  The voltage-current conversion circuit 44 converts the reference voltage VREF2 into a current I2 = VREF2 / r2 by applying the reference voltage VREF2 to the resistor r2 (where r2 is the resistance value of the resistor r2). The current I2 is the minimum switching current at the timing when the voltage level of the overcurrent detection signal S4 switches from the low level to the high level.

  Further, in the current mirror circuit CM2, one end of the switch element P17 is connected to the power supply circuit 17, and the other end is connected to the switch element N4. One end of each of the switch elements P15 and P16 is connected to the power supply circuit 17, the other end of the switch element P16 is connected to the resistor r3, and the other end of the switch element P15 is connected to the resistor r3 via the fuse element F4. . Furthermore, each gate of the switch elements P15 to P17 is connected to a connection point (node) between the switch element P17 and the switch element N4. The current mirror circuit CM2 converts the current I2 into the current Icm2 with a predetermined mirror ratio Rcm2, and outputs the current Icm2 to the resistor circuit 53. Here, the mirror ratio Rcm2 can be switched between two mirror ratios depending on whether or not the fuse element F4 is cut by trimming.

  The current-voltage conversion circuit 45 has a resistance value Rlim that is the resistance value of the resistor r4 or the sum of the resistance values of the resistors r3 and r4 depending on whether or not the fuse element F3 is cut by trimming. The current-voltage conversion circuit 45 converts the sum of the currents Icm1 and Icm2 into an overcurrent detection reference voltage V42 = (Icm1 + Icm2) × Rlim and outputs it. The overcurrent detection reference voltage V42 is expressed by the following equation.

V42 = (Icm1 + Icm2) × Rlim
= (Rcm1 × (Vrc / r1) + Rcm2 × (VREF2 / r2)) × Rlim
= (Rcm1 × (VREF1 × ONDUTY / r1) +
Rcm2 × (VREF2 / r2)) × Rlim

  Therefore, when the entire resistance value Rlim of the current-voltage conversion circuit 45 and the resistors r1 and r2 have positive temperature characteristics, the overcurrent detection reference voltage V42 that depends on the ON duty ONDUTY and does not substantially depend on the temperature is obtained. Generated. Also, when the entire resistance value Rlim of the current-voltage conversion circuit 45 and the resistors r1 and r2 have negative temperature characteristics, the reference voltage for overcurrent detection that depends on the on-duty ONDUTY and does not substantially depend on the temperature. V42 is generated. That is, when the overall resistance value Rlim of the current-voltage conversion circuit 45 and the resistors r1 and r2 have temperature characteristics of the same polarity, the overcurrent detection reference voltage V42 that depends on the on-duty ONDUTY and does not substantially depend on the temperature. Is generated.

  Therefore, according to the present embodiment, the overcurrent detection reference voltage V42 having the minimum value Rcm2 × (VREF2 / r2) × Rlim substantially independent of the temperature and proportional to the on-duty ONDUTY of the switch element Q1 is obtained. Can occur. In general, when the input voltage VIN increases, the on-duty ONDUTY decreases. Therefore, according to the present embodiment, the lower overcurrent detection reference voltage V42 can be generated as the input voltage VIN increases. According to the present embodiment, the overcurrent detection reference voltage V42 can be generated in an analog manner so that it becomes smaller as the input voltage VIN is higher. Therefore, the fluctuation of the maximum output current (the maximum value of the current flowing through the switch element Q1) due to the input voltage VIN can be reduced as compared with the prior art, and the switch element Q1 can be protected from overcurrent. Further, the diode, the capacitor, and the external resistor for detecting the input voltage required in the switching power supply device described in Patent Document 2 are unnecessary, and the entire device can be reduced in size.

  Further, fuse elements F1 and F2 for switching the mirror ratio Rcm1 of the current mirror circuit CM1 and a fuse element F3 for switching the conversion ratio Rlim of the current-voltage conversion circuit 45 are provided as trimming bits. Therefore, the increase rate with respect to the on-duty ONDUTY in the overcurrent detection reference voltage V42 can be adjusted by whether or not the fuse elements F1, F2, and F3 are disconnected. Further, a fuse element F4 for switching the mirror ratio Rcm2 of the current mirror circuit CM2 and a fuse element F3 for switching the conversion ratio Rlim of the current-voltage conversion circuit 45 are provided as trimming bits. Therefore, the minimum value of the overcurrent detection reference voltage V42 can be adjusted by whether or not the fuse elements F3 and F4 are cut. Therefore, for example, in the trimming at the time of manufacturing the switching power supply device 200, the variation in the element values of the elements constituting the overcurrent detection reference voltage generation circuit 42 is corrected by selectively cutting the fuse elements F1 to F4. it can.

  In the present embodiment, one fuse element F1, F2, F4, and F3 is provided on the input side and output side of the current mirror circuit CM1, the output side of the current mirror circuit CM2, and the current-voltage conversion circuit 45, respectively. The present invention is not limited to this. By increasing the number of fuse elements, the number of switching of the mirror ratios Rcm1 and Rcm2 of the current mirror circuits CM1 and CM2 and the resistance value Rlim of the current-voltage conversion circuit 45 can be increased.

  Further, in the present embodiment, the mirror ratios Rcm1 and Rcm2 of the current mirror circuits CM1 and CM2 and the resistance value Rlim of the current-voltage conversion circuit 45 are adjusted in advance by trimming, but the present invention is not limited to this. At least one of the mirror ratios Rcm1 and Rcm2 of the current mirror circuits CM1 and CM2 and the resistance value Rlim of the current-voltage conversion circuit 45 may be adjusted in advance by trimming.

Second embodiment.
In the first embodiment, the switching current detection circuit 3 includes a switch element having one end connected to the input terminal DRAIN, and two resistors connected in series between the other end of the switch element and the ground terminal COM. And configured with. Furthermore, the switching current detection circuit 3 outputs the voltage at the connection point between the two resistors as the switching current detection voltage Vd. In general, the on-resistance of the switch element Q1 has a positive temperature characteristic that increases in proportion to the operating temperature. Therefore, the drain voltage of the switch element Q1 and the switch element in the switching current detection circuit 3 increases as the temperature increases, and the switching current detection voltage Vd increases as the temperature increases. Therefore, when the overcurrent detection reference voltage V42 that does not substantially depend on the temperature is used when the rate of change of the ON resistance of the switch element Q1 with respect to the temperature is relatively large, the voltage level of the overcurrent detection signal S4 is Inverts at a switching current smaller than that at room temperature. On the other hand, at a low temperature, the voltage level of the overcurrent detection signal S4 is inverted by a switching current larger than that at the normal temperature.

  FIG. 4 is a circuit diagram showing configurations of the duty detection circuit 41 and the overcurrent detection reference voltage generation circuit 42A according to the second embodiment of the present invention. The overcurrent detection reference voltage generation circuit 42A differs from the overcurrent detection reference voltage generation circuit 42 of FIG. 2 in that a voltage / current conversion circuit 44A is provided instead of the voltage / current conversion circuit 44. Further, the voltage / current conversion circuit 44A is different from the voltage / current conversion circuit 44 in that a diode D1 is provided instead of the resistor r2. Only the differences from the first embodiment will be described below.

  In FIG. 2, since the threshold voltage of the diode D1 has a negative temperature characteristic, the current I2 flowing through the diode D1 has a positive temperature characteristic. In the present embodiment, the entire resistance value Rlim of the current-voltage conversion circuit 45 is set to have a positive temperature characteristic. As a result, an overcurrent detection reference voltage V42 having a positive temperature characteristic similar to the switching current detection voltage Vd is generated. Therefore, according to this embodiment, even if the switching current detection voltage Vd has a positive temperature characteristic due to the positive temperature characteristic of the switching element Q1, the switching element Q1 is overcurrent regardless of the input voltage VIN. Can be protected from.

  In the present embodiment, the diode D1 is used instead of the resistor r2 in FIG. 2, but the present invention is not limited to this. In place of the resistor r2 in FIG. 2, the temperature characteristic of the on-resistance of the transistor Q1 such as a series connection circuit of a resistor r2 having a negative temperature characteristic and a diode D1 or a resistor having a negative temperature characteristic is opposite to the temperature characteristic. You may use the resistor which has.

In the first and second embodiments, the overcurrent detection reference voltage generation circuits 42 and 42A include:
(A) a first voltage-current conversion circuit that includes a first resistor and converts the duty detection voltage Vrc to a first current I1 by applying the duty detection voltage Vrc to the first resistor;
(B) A second voltage-current converter that includes a second resistor and converts the first reference voltage VREF into the second current I2 by applying a predetermined first reference voltage VREF2 to the second resistor. Circuit,
(C) a first current mirror circuit that converts the first current I1 into a third current Icm1 at a predetermined first mirror ratio Rcm1,
(D) a second current mirror circuit that converts the second current I2 into a fourth current Icm2 at a predetermined second mirror ratio Rcm2,
(E) A third resistor is provided, and the sum of the third and fourth currents Icm1 and Icm2 is passed through the third resistor, whereby the sum of the third and fourth currents Icm1 and Icm2 is What is necessary is just to provide the current-voltage conversion circuit which converts into the overcurrent detection reference voltage V42. Here, the voltage-current conversion circuit 44 includes a first resistor and applies a predetermined reference voltage VREF2 that does not substantially depend on temperature to the first resistor, thereby converting the reference voltage VREF2 into a current I2. Good. The current-voltage conversion circuit 45 includes a second resistor, and the current Icm2 may be converted into a voltage by causing the current Icm2 corresponding to the current I2 to flow through the second resistor. Here, the reference voltage VREF2 does not substantially depend on the temperature, the second resistor has a temperature characteristic opposite to the temperature characteristic of the on-resistance of the switch element Q1, and the third resistor has the switch element Q1. It is only necessary to have temperature characteristics of the same polarity as the temperature characteristics of the on-resistance.

  Further, by using the resistor r1 having a temperature characteristic opposite to the temperature characteristic of the on-resistance of the switch element Q1, the same polarity as the temperature characteristic of the on-resistance of the switch element Q1 is proportional to the on-duty ONDUTY of the switch element Q1 Can be generated.

Third embodiment.
FIG. 5 is a circuit diagram showing configurations of the duty detection circuit 41A and the overcurrent detection reference voltage generation circuit 42 according to the third embodiment of the present invention. In each of the above embodiments, the reference voltage VREF1 is set to a relatively low value such as 1V. For this reason, switch elements N1 and N2 which are nMOS transistors are used. In FIG. 5, the duty detection circuit 41A according to the present embodiment is different from the duty detection circuit 41 of FIG. 2 in that a switch element P1 that is a pMOS transistor is provided instead of the switch element N1. Only the differences from the first embodiment will be described below.

  In FIG. 5, the voltage source 61 generates a predetermined reference voltage VREF1 that is higher than the sum of the threshold voltage of the switch element P1 and the threshold voltage of the switch element N2. The control signal EXT is inverted by the inverter 55 and output to the gates of the switch elements P1 and N2. Accordingly, the duty detection circuit 41A generates the duty detection voltage Vrc in the same manner as the duty detection circuit 41. The duty detection circuit 41A according to the present embodiment has the same operational effects as the duty detection circuit 41A according to the first embodiment.

Fourth embodiment.
FIG. 6 is a circuit diagram showing configurations of a duty detection circuit 41A and an overcurrent detection reference voltage generation circuit 42A according to the fourth embodiment of the present invention. As shown in FIG. 6, the duty detection circuit 41A according to the third embodiment and the overcurrent detection reference voltage generation circuit 42A according to the second embodiment may be used in combination. The present embodiment has the same function and effect as the second embodiment.

  In each of the above embodiments, at light load, the switch element Q1 is controlled to be intermittently turned on without being subjected to PWM control (burst operation). As a result, the on-duty ONDUTY is reduced, and in some cases, the overcurrent detection reference voltage V42 decreases to the minimum value Rcm2 × (VREF2 / r2) × Rlim. However, since it is not necessary to flow a large current through the switch element Q1 during the burst operation, there is no problem even if the overcurrent detection reference voltage V42 is lowered in this way.

  In each of the above embodiments, the present invention has been described by taking the switching power supply device 200 that is a peak current control type switching regulator as an example. However, the present invention is not limited to this, and may be a voltage control type switching regulator. .

  Further, the switching current detection circuit 3 includes a switching element having a drain connected to the drain of the switching element Q1 and a source connected to the ground terminal COM through two resistors connected in series. It was. However, the present invention is not limited to this. For example, a current detection resistor may be inserted between the source of the switch element Q1 and the ground terminal COM, and the voltage across the current detection resistor may be output as the switching current detection voltage Vd.

4 ... Comparator,
40: Overcurrent detection circuit,
41, 41A ... duty detection circuit,
42, 42A ... reference voltage generating circuit for detecting overcurrent,
43 ... Voltage-current conversion circuit,
44, 44A ... voltage-current conversion circuit,
45 ... Current-voltage conversion circuit,
CM1, CM2 ... current mirror circuit,
100: control circuit,
200: switching power supply,
Q1 is a switch element.

Japanese Patent No. 4848786 Japanese Patent No. 4064296 JP 2009-106038 A Japanese Patent No. 4066303

Claims (9)

A control circuit that converts the input voltage input through the input terminal into a predetermined output voltage and outputs it by controlling on / off of the first switch element connected to the input terminal;
In an overcurrent detection circuit for a switching power supply device comprising a switching current detection circuit that detects a switching current flowing through the first switch element and generates a switching current detection voltage proportional to the detected current,
A duty detection circuit for detecting a ratio of the on-time to the sum of the on-time and off-time of the first switch element and generating a duty detection voltage proportional to the detected ratio;
An overcurrent detection reference voltage generation circuit for generating an overcurrent detection reference voltage proportional to the duty detection voltage;
A comparator that compares the switching current detection voltage with the overcurrent detection reference voltage and generates an overcurrent detection signal when the switching current detection voltage is greater than the overcurrent detection reference voltage; Overcurrent detection circuit. The overcurrent detection reference voltage generation circuit is
A first voltage-current conversion circuit that includes a first resistor and converts the duty detection voltage into a first current by applying the duty detection voltage to the first resistor;
A second voltage-current conversion circuit comprising a second resistor and converting the first reference voltage into a second current by applying a predetermined first reference voltage to the second resistor;
A first current mirror circuit for converting the first current into a third current at a predetermined first mirror ratio;
A second current mirror circuit that converts the second current into a fourth current at a predetermined second mirror ratio;
A third resistor, and passing the sum of the third and fourth currents through the third resistor, whereby the sum of the third and fourth currents is converted into the overcurrent detection reference voltage. The overcurrent detection circuit according to claim 1, further comprising a current-voltage conversion circuit that converts the current to a current-voltage conversion circuit.   3. The process according to claim 2, wherein at least one of the first mirror ratio, the second mirror ratio, and the resistance value of the third resistor is adjusted in advance by trimming. Current detection circuit. The first reference voltage is substantially independent of temperature,
The second resistor has a temperature characteristic opposite in polarity to the temperature characteristic of the on-resistance of the first switch element,
4. The overcurrent detection circuit according to claim 2, wherein the third resistor has a temperature characteristic having the same polarity as the temperature characteristic of the on-resistance of the first switch element.   5. The overcurrent detection according to claim 2, wherein the first resistor has a temperature characteristic opposite in polarity to the temperature characteristic of the on-resistance of the first switch element. circuit.   6. The overcurrent detection according to claim 4, wherein the switching current detection circuit detects the switching current by utilizing a change in on-resistance of the first switch element according to a temperature change. circuit.   4. The overcurrent detection circuit according to claim 2, wherein the resistance values of the first to third resistors have temperature characteristics of the same polarity. The duty detection circuit is
A second switch element having one end connected to a voltage source for generating a predetermined second reference voltage and controlled to be turned on and off in conjunction with the first switch element;
A third switch element connected between the other end of the second switch element and the ground and controlled to be turned on / off in a complementary manner with the first switch element;
A fourth resistor having one end connected to a connection point of the second and third switch elements;
A capacitor connected between the other end of the fourth resistor and the ground,
The overcurrent detection circuit according to claim 1, wherein a voltage across the capacitor is output as the duty detection voltage. An overcurrent detection circuit according to any one of claims 1 to 8,
A switching power supply device comprising: a control circuit for turning off the first switch element in response to an overcurrent detection signal from the overcurrent detection circuit.

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