JP2014071554A - Power controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power controller that prevents heat generation in a switching element according to the maximum switching frequency of a specific switching element due to, in conventional power controllers, switching operation of consecutively shunting or open-circuiting a connection between a specific power source and the specific switching element that are optionally selected to determine an operating region for shunt or open circuit of each of the plurality of power sources.SOLUTION: The power controller includes: a plurality of backflow prevention elements respectively series-connected to a plurality of power sources for supplying power; a plurality of switching elements parallel-connected to the respective power sources, series-connected to the respective backflow prevention elements, and switching to shunt or open-circuit the connection to the respective power sources; an error amplifier outputting an error amplification signal indicating excess and shortage in a power supply state of the plurality of power sources; and a calculation drive part determining a ratio between power supply and shunt for each of the power sources by comparing the error amplification signal with a reference value to sequentially switch the respective switching elements.

Description

  The present invention relates to a power controller that controls a supply amount of power.

  In an artificial satellite, a power controller is used to supply a stabilized voltage of about 50V or 100V as a bus power source.

  As a conventional power controller for artificial satellites, the power generated from a plurality of solar cell arrays during sunlight is used as the power supplied to the load, and the surplus generated power short-circuits a specific solar cell array output (hereinafter referred to as a shunt). It is known to perform bus voltage control that suppresses an increase in bus voltage. This power controller is a satellite having various uses such as a technical test satellite (ETS series), a communication broadcasting technology satellite (eg COMETS), an earth observation satellite (eg JERS-1), and a meteorological satellite (eg MTSAT-2). Has been adopted.

  In this power controller, bus voltage control is performed by adjusting the total value of power or current generated from a plurality of solar cell arrays by shunting or opening the outputs of individual solar cell arrays. In this bus voltage control, each solar cell array is shunted or opened in a sequential manner according to the bus voltage variation, and each solar cell array is shunted or opened corresponding to the bus voltage variation range allowed in advance. The operating area is allocated. By this shunt or open operation and the operation of negative feedback oscillation control (commonly referred to as bang-bang control) composed of a capacitor bank provided to smooth the bus voltage, the bus voltage is stabilized within a specified fluctuation range. (For example, refer nonpatent literature 1).

S. Kuwajima, et al., “Digital sequential shunt regulator for solar power conditioning of engineering test satellite (ETS-V),” Power Electronics Specialists Conference 1988 (PESC '88), IEEE, April 1988

  In addition, instead of the capacitor bank, a battery is directly connected to a capacitor bank provided for smoothing the bus voltage, and instead of stabilizing the bus voltage, the charging current of the battery is stabilized by the same principle. There is a power controller. As a power controller of this system, each solar cell array corresponds to a battery charge current fluctuation range that is allowed in advance so that each solar cell array is shunted or opened sequentially according to the fluctuation of the battery charge current. A power controller (named battery bus system) has been devised in which a shunt or open operating area is allocated.

  In such a power controller, the number of constituent stages of the solar cell array is determined according to the required generated power. Conventionally, the number of stages of the solar cell array is 10 to 40, and the shunt or open operation area of each solar cell array is within the range of the allowable bus voltage or battery charge current fluctuation range. , And divided by this number of constituent stages.

  For this reason, only one stage in the solar cell array fixed on the shunt side or fixed on the open side performs a bang-bang control operation that repeats the shunt and open at an arbitrary time ratio. This repetition period is determined by the constants of the elements constituting the apparatus and the control target, and the maximum frequency is determined.

  In this bang-bang control operation, soft on / off drive that suppresses the rate of change of current to suppress the generation of harmful electromagnetic field noise to peripheral devices due to the steep current change during shunt or open operation of the solar cell array Accompanied by. This soft on / off drive is performed by driving a switch element composed of a field effect transistor for shunting or opening the solar cell array in an active region. Therefore, the switch element generates heat and is bang-banged at the maximum frequency. The maximum heat generation condition is during control operation.

  Since this bang-bang control operation is performed in an arbitrary solar cell array depending on the operating conditions of the power controller, it is necessary to select parts and design the heat dissipation so that all switch elements can withstand this maximum heat generation condition. For this reason, it has been impeded to reduce the size and weight of the apparatus.

  In addition, it is possible to reduce the calorific value of the switch element by changing the constants of the elements constituting the device and relaxing the control target to lower the maximum frequency. In this case, the main performance of the device (for example, bus voltage or battery charging current) This leads to a decrease in required performance for reducing the fluctuation range.

  As described above, the conventional power controller determines the shunt or open operating area of each solar array so that each solar array is shunted or opened sequentially in response to changes in bus voltage or battery charging current. To do. For this reason, only one stage of an arbitrary solar cell array performs bang-bang control operation, and the switch element for shunting or opening the solar cell array is accompanied by a large heat generation by this maximum repetition frequency and soft on / off drive. There was a problem. In addition, since all switch elements need to select components and design heat dissipation so as to withstand this maximum heat generation condition, it has been difficult to reduce the size and weight of the device.

  In addition, it is possible to reduce this heat generation by reducing the maximum frequency by changing the constants of the elements that make up the device and by reducing the control target. However, in this case, there is a problem that the main performance of the device is reduced. It was.

  The present invention has been made to solve such a problem, and is for shunting or opening individual power sources (for example, solar cell arrays) within a range of a bus voltage or a battery charging current fluctuation range that is allowed in advance. An object of the present invention is to provide a power controller that can suppress heat generation of a switch element and can be further miniaturized.

  The power controller according to the present invention is connected in series to a plurality of power supplies that supply power, and is connected in parallel to the plurality of backflow prevention elements for preventing a backflow of current to each of the power supplies. In addition, a plurality of switch elements connected in series with the respective backflow prevention elements and switching the connection with the respective power supplies to short circuit or open, and error amplification indicating the excess or deficiency of the power supply state by the plurality of power supplies An error amplifier that outputs a signal, and an arithmetic drive unit that sequentially switches each of the switch elements by determining a power supply and a shunt ratio for each of the power sources by comparing the error amplified signal with a reference value. And.

  According to the present invention, it becomes possible to reduce the heat generation of individual switch elements for shunting or opening a power source (for example, a solar cell array), and it is possible to reduce the selection of parts and the design of heat dissipation and to reduce the size of the power controller. It becomes possible to provide.

3 is a circuit diagram showing a configuration of a power controller according to Embodiment 1. FIG. 3 is a timing chart illustrating an operation of the power controller according to the first embodiment. It is a figure explaining the heat_generation | fever of a switch element of the power controller which concerns on Embodiment 1. FIG. 6 is a circuit diagram showing a configuration of a power controller according to Embodiment 2. FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
FIG. 1 is a circuit diagram showing a configuration of a power controller 1 according to Embodiment 1 of the present invention. In FIG. 1, a plurality of solar cell arrays SA <b> 1 to SAn (n is an integer of 3 or more) are connected in parallel to a load 6 and a battery 5 via a power bus 2. The plurality of solar cell arrays SA <b> 1 to SAn supply power to the load 6 and the battery 5. The power controller 1 short-circuits (shunts) surplus power of the solar cell arrays SA1 to SAn, and is connected to the solar cell arrays SA1 to SAn. The power controller 1 includes switching elements SW1 to SWn composed of field effect transistors, backflow prevention elements D1 to Dn composed of diodes, arithmetic drivers A1 to An, an error amplifier 3, and a timing signal generator. 4 and a current detection unit 8.

  The power controller 1 supplies power generated from the plurality of solar cell arrays SA1 to SAn during sunshine as supply power to the load 6 and charge power to the battery 5. Further, the power controller 1 shunts the output of the solar cell arrays SA1 to SAn at an arbitrary time interval for the surplus power generated by the solar cell arrays SA1 to SAn, thereby increasing the charging current Ichg of the battery 5. Charge current control is performed to suppress it.

  Each solar cell array SA1 to SAn is connected in parallel between the drain terminal and the source terminal of each switch element SW1 to SWn, and each connection circuit of each solar cell array SA1 to SAn and each switch element SW1 to SWn is connected to each other. Connected to the power bus 2.

  Further, the connection points on the positive terminals of the solar cell arrays SA1 to SAn and the drain terminals of the switch elements SW1 to SWn are connected in series to the anode terminal sides of the backflow prevention elements D1 to Dn, respectively. The cathode terminal side of the backflow prevention elements D1 to Dn is connected to the power bus 2. The output terminals of the arithmetic drive units A1 to An are connected to the gate terminals of the switch elements SW1 to SWn, respectively. The first input terminals of the arithmetic drive units A1 to An are connected to the output terminal of the error amplifier 3. An error amplification signal Drive that is an output signal of the error amplifier 3 is input to each of the arithmetic drive units A1 to An. The input terminal of the error amplifier 3 is connected to the current detector 8. The error amplifier 3 generates the error amplification signal Drive as a signal proportional to the fluctuation amount of the charging current Ichg detected by the current detection unit 8.

  The output terminal of the timing signal generator 4 is connected to the second input terminal of each of the arithmetic drivers A1 to An. Timing signals t1 to tn output from the timing signal generator 4 are input to the arithmetic drivers A1 to An with a period Tpe corresponding to each. Further, the third input terminals of the arithmetic drive units A1 to An are connected to a reference voltage. A reference value Vth of the reference voltage is defined for the arithmetic drive units A1 to An.

  The arithmetic drive units A1 to An perform arithmetic processing based on the error amplification signal Drive output from the error amplifier 3 and the reference value Vth. By this calculation processing, the calculation driving units A1 to An supply appropriate electric power from the corresponding solar cell arrays SA1 to SAn to the load 6, and the charging current Ichg falls within the control target value Ichg (max) and the control allowable error ΔIchg. Similarly, determine the ratio of supply and shunt. The arithmetic driving units A1 to An perform the arithmetic processing at timings according to the timing signals t1 to tn input from the timing signal generating unit 4, respectively, and switch elements SW1 to SWn corresponding to the timings The shunt time is determined from the ratio of the power supply and the shunt corresponding to the period Tpe in which the timing signals t1 to tn are generated, and the switch elements SW1 to SWn are respectively driven.

  Here, the timing signals t1 to tn have an equal phase difference tph, and the value of the phase difference tph is determined so as to ensure the maximum frequency determined from the main performance requirements of the power controller 1. The period Tpe is set to a value obtained by multiplying the value of the phase difference tph by n times the number of solar cell array constituent stages. The power controller 1 as a whole performs supply and shunt switching operations at the maximum frequency determined by the phase difference tph. In each of the switch elements SW1 to SWn, a switching operation is performed at a frequency determined by the cycle Tpe, which is 1 / n times the maximum frequency determined by the phase difference tph. Thus, the power supply to the load and the battery from the solar cell arrays SA1 to SAn respectively corresponding to the arithmetic driving units A1 to An and the switch elements SW1 to SWn is controlled.

  Solar cell arrays SA1 to SAn shown in the first embodiment are examples of power supplies that supply power, and may be replaced with other power supplies having similar functions. In the first embodiment, the solar cell arrays SA1 to SAn are mounted on the artificial satellite, but may be installed on a space station, a space base, the ground, or the like. The backflow prevention elements D1 to Dn are examples of backflow prevention elements that prevent backflow of current to the corresponding solar cell arrays SA1 to SAn, and may be replaced with other backflow prevention elements having a similar function. In the first embodiment, field effect transistors (FETs) are used as the switch elements SW1 to SWn, but other switch elements may be used.

Next, the operation of the power controller 1 according to the first embodiment will be described with reference to FIG.
In the power control operation in the sunlight mode of the artificial satellite, the generated power of the solar cell arrays SA1 to SAn composed of n stages (the number of the solar cell array constituent stages is n) passes through the corresponding backflow prevention elements D1 to Dn. The load 6 connected to the power bus 2 and the battery 5 are supplied. The error amplifier 3 detects the fluctuation in the constant fluctuation range of the charging current Ichg caused by the fluctuation of the load current Iload as the excess or deficiency of the power supply state, and converts the fluctuation into the error amplification signal Drive. To do.
The charging current Ichg is accompanied by a ripple current due to switching operation at the maximum frequency consisting of the phase difference tph, but the error amplifier 3 has an integral constant, and the error amplification signal Drive averages this ripple current. As a result.

  The error amplification signal Drive is expressed by Equation (1) in the constants A and B.

  The constants A and B in Expression (1) are expressed by Expressions (2) and (3) in the maximum value Drive (max) of the error amplification signal Drive.

  Drive (max) in Expression (1) is expressed by Expression (4) in the solar cell array generated currents Istr1 to n.

  Here, in formula (4), Σ (Istr1 to n) represents the total value of all the solar cell array generated currents Istr1 to n.

The error amplification signal Drive is transmitted from the error amplifier 3 to the arithmetic driving units A1 to An.
The arithmetic drive units A1 to An perform arithmetic processing based on the comparison between the error amplification signal Drive and the reference value Vth, and supply the charging current Ichg to the control target value Ichg (max) and the control allowance while supplying appropriate power to the load 6. The power supply rate ONduty is determined so as to be within the error ΔIchg.
The ratio ONduty of the power supply amount is expressed by Expression (5).

  This arithmetic processing is performed according to the timing signals t1 to tn supplied from the timing signal generator 4.

  The shunt time tshunt with respect to the generation period Tpe of the timing signals t1 to tn is determined from the ratio ONduty of the power supply amount based on the calculation processing result of Expression (5), and the switch elements SW1 to SWn are driven. During this time, the generated power of the corresponding solar cell arrays SA1 to SAn is short-circuited (shunted) by the switch elements SW1 to SWn, so that the generated power is not supplied to the power bus 2.

  The shunt time tshunt is expressed by equation (6).

  By these operations, the amount of power supplied from the solar cell arrays SA1 to SAn to the power bus 2 is adjusted, and the charging current Ichg is controlled within a certain fluctuation range.

  FIG. 2 is a diagram showing timings of operations of the timing signals t1 to tn and the switch elements SW1 to SWn. In FIG. 2, the power controller 1 as a whole performs a switching operation while the shunt time tshunt is determined and updated at the maximum frequency consisting of the phase difference tph of the timing signals t1 to tn. It shows that the switching operation is performed at a frequency having a period Tpe that is 1 / n of the maximum frequency.

  FIG. 3 is a diagram showing heat generation applied to the switch element in the switching operation for shunting or opening the solar cell arrays SA1 to SAn. FIG. 3A shows heat generation applied to the switch element during the soft-on drive time, and FIG. It shows the heat generated by the switch element during the soft-off drive time. In FIG. 3, the shunt current suppresses the rate of current change in order to suppress the generation of harmful electromagnetic noise to peripheral devices due to the steep current change during the shunt or open operation of the solar cell arrays SA1 to SAn. With soft on / off drive. During the soft on / off drive time, the switch element generates heat corresponding to the product of the shunt current and the voltage applied to the switch elements SW1 to SWn for each switching operation.

  The conventional power controller determines the shunt or open operating area of each of the solar cell arrays SA1 to SAn so that each solar cell array is shunted or opened sequentially according to the fluctuation of the charging current Ichg. Switching operations are concentrated on only one of the solar cell arrays SA1 to SAn. Since this heat generation occurs at the maximum frequency consisting of the constants and control targets of each element constituting the power controller, all switch elements must withstand the heat generated by switching at the maximum frequency. Since it is necessary to select parts and design heat dissipation, it has been impeded to reduce the size and weight of the power controller.

  Therefore, in the first embodiment, as shown in FIG. 2, the power controller 1 as a whole performs a switching operation at the maximum frequency, and the individual switching elements SW1 to SWn have 1 / n of the maximum frequency. Since the switching operation is performed at the frequency, the heat generation condition required for the switch element is suppressed.

  The equation (1) indicating the error amplification signal Drive used in the description of the first embodiment shows an example that is directly proportional to the change in the charging current Ichg, but the same applies when applied to an inversely proportional example. What is necessary is just to replace the form of a formula in principle.

  Further, the error amplifier 3, the timing signal generation unit 4, the arithmetic drive units A1 to n, and the reference value Vth in the description of the first embodiment are configured by a digital circuit program and corresponding operations are performed by digital signal processing. You may do it.

  Thus, in the first embodiment, in the power controller, from the error amplification signal for the control target value according to the common sampling period allocated with an equal phase difference with respect to the total number of stages of the solar cell array. By determining the shunt or open time ratio for each solar cell array and performing a shunt or open switching operation, it is determined from the constants and control targets of the elements that make up the device without degrading the main performance of the device The switching frequency of each solar cell array can be lowered until the maximum frequency is divided by the total number of stages of the solar cell array.

  Therefore, it is possible to reduce the heat generation of individual switch elements for shunting or opening the solar cell array, and it is possible to reduce the size of the power controller by relaxing the selection of parts and the heat radiation design.

  As described above, the power controller 1 according to the first embodiment is connected in series with the solar cell arrays SA1 to SAn, which are a plurality of power supplies that supply power, and is connected to each of the solar cell arrays SA1 to SAn. A plurality of backflow prevention elements D1 to Dn that prevent backflow of current are connected in parallel to the respective power supplies and connected in series to the respective backflow prevention elements, and the connection to each of the power supplies is short-circuited (shunted). ) Or a plurality of switch elements SW1 to SWn that are switched to open, an error amplifier 3 that outputs an error amplification signal Drive according to the excess or deficiency of the power supply state by the plurality of power supplies, and the error amplification signal as a reference value Vth Are provided with arithmetic drive units A1 to An that determine the ratio ONduty of the amount of power supplied from each power source, and the phase difference tph is determined for each power source. The switch element performs switching operation with a period Tpe, and the ratio of the power supply amount from each power source is controlled by the shunt or open time ratio based on the ratio of the power supply amount. The switching operation of the element is performed at the maximum frequency determined from the constants of the elements constituting the device and the control target for the entire power controller, while the individual switching elements are performed at the 1 / n frequency. Features.

  That is, the power controller 1 according to the first embodiment is connected in series with a plurality of power supplies (solar cell arrays SA1 to SAn) that supply power, and prevents a backflow of current to each of the power supplies. The backflow prevention elements (D1 to Dn) are connected in parallel with the respective power supplies and connected in series with the respective backflow prevention elements (D1 to Dn), and the connection with the respective power supplies is short-circuited or opened. A plurality of switching elements (SW1 to SWn) to be switched, an error amplifier (3) for outputting an error amplification signal indicating an excess or deficiency of the power supply state by the plurality of power supplies, the error amplification signal and a reference value (Vth) In comparison with the above, the power supply and the shunt ratio are determined for each of the respective power supplies, and the calculation driving for sequentially switching the respective switch elements (SW1 to SWn) And (A1~An), is equipped with a. In addition, a timing signal generator (4) is provided for outputting a timing signal for switching operation for each of the switching elements (SW1 to SWn) to the arithmetic driving units (A1 to An). Further, the timing signal is output with an equal phase difference (tph) to each of the plurality of switch elements (SW1 to SWn), and the timing signal generation period (in the individual switch elements (SW1 to SWn)) ( Tpe) is sufficiently longer than the phase difference, and the generation period is set by a value obtained by multiplying the phase difference by the number (n) of the power supplies. In addition, the connection with the whole of the plurality of power sources is switched at a frequency having a phase difference (tph) between the plurality of timing signals as a cycle, and the generation cycle of each timing signal of each of the switch elements (SW1 to SWn). With (Tpe), the connection with the respective power sources is switched at a frequency lower than the frequency having the phase difference between the timing signals as a cycle. In addition, a battery (5) is connected in parallel to a load to which power is supplied from each of the power sources, and the error amplifier (3) detects an excess of the power supply state from fluctuations in the charging current of the battery (5). The shortage is detected and an error amplification signal is output.

  As a result, the shunt or open time ratio for each solar cell array is calculated from the error amplification signal for the control target value in accordance with the sampling period allocated with an equal phase difference with respect to the total number of stages of the solar cell array. By performing a switching operation that determines or shunts or opens, the maximum frequency determined from the constants of the elements constituting the device and the control target is not affected by the total number of stages of the solar cell array, without causing deterioration in the main performance of the device. Since the maximum switching frequency of the individual solar cell array can be lowered to the value obtained by dividing, it is possible to reduce the heat generation of the individual switch elements for shunting or opening the solar cell array, and the selection of parts In addition, the heat dissipation design can be relaxed and a small power controller can be provided.

Embodiment 2. FIG.
FIG. 4 is a circuit diagram showing a configuration of the power controller 1 according to the second embodiment of the present invention. 4 differs from that shown in FIG. 1 in that the battery 5 is not directly connected to the power bus 2 and the bus voltage is smoothed to a position where the power bus 2 in FIG. 1 is connected. For this purpose, a capacitor bank 7 is provided. In FIG. 4, the same reference numerals as those in FIG. 1 are the same or equivalent.

  From the operation of supplying or shunting the outputs of the solar cell arrays SA1 to SAn to the load 6 and the accompanying increase / decrease of the bus voltage Vbus due to charging / discharging of the capacitor bank 7, the bus voltage Vbus falls within the specified fluctuation range. Bus voltage control is performed.

  The error amplifier 3 generates an error amplification signal Drive as a signal proportional to the fluctuation of the bus voltage Vbus, and the ratio of supply and shunt so that the bus voltage Vbus falls within the control target value Vbus (max) and the control allowable error ΔVbus. To decide.

  The error amplification signal Drive is expressed by Expression (7) in the constants A and B.

  Constants A and B in equation (7) are expressed by equations (8) and (9).

  The error amplification signal Drive is transmitted from the amplifier 3 to the arithmetic driving units A1 to An. The arithmetic driving units A1 to An perform arithmetic processing based on the comparison between the error amplification signal Drive and the reference value Vth, and supply the bus voltage Vbus to the control target value Vbus (max) and the control allowance while supplying appropriate power to the load 6. The power supply rate ONduty is determined so as to be within the error ΔVbus.

  The ratio ONduty of the power supply amount is expressed by the above formula (5) described in the first embodiment.

  The shunt time tshunt is expressed by the above equation (6) described in the first embodiment.

  By these operations, the amount of power supplied from the solar cell arrays SA1 to SAn to the power bus 2 is adjusted, and the bus voltage Vbus is controlled within a certain fluctuation range.

  The other components are the same as those of the power controller 1 shown in FIG. 1, and the bus voltage is controlled in the same manner as in FIG. The equation (7) indicating the error amplification signal Drive used in the description of the second embodiment shows an example that is directly proportional to the change of the bus voltage Vbus, but the same applies when applied to an inversely proportional example. What is necessary is just to replace the form of a formula in principle.

  The error amplification signal Drive and the arithmetic driving units A1 to An have the same characteristics as the power controller because the same effect as the operation described in the first embodiment can be obtained also in the second embodiment.

  In addition, the error amplifier 3, the timing signal generation unit 4, the arithmetic drive units A1 to An, and the reference value Vth in the description of the second embodiment are configured in the same manner as in the first embodiment by a digital circuit program. Alternatively, digital signal processing may be used.

  The power controller 1 according to the second embodiment is connected in series with a plurality of power supplies (solar cell arrays SA1 to SAn) that supply power, and a plurality of backflow preventions that prevent backflow of current to the respective power supplies. A plurality of switch elements (SW1) that are connected in parallel to the respective elements (D1 to Dn) and the respective power supplies and are connected in series to the respective backflow prevention elements, and for switching the connection to the respective power supplies to short circuit or open. To SWn), an error amplifier (3) that outputs an error amplification signal indicating an excess or deficiency of the power supply state by the plurality of power supplies, and a comparison between the error amplification signal and a reference value (Vth). A power supply and a shunt ratio are determined for each power source, and each of the switch elements is operated in turn to perform a switching operation (A1 to An). A capacitor bank (7) is connected in parallel to a load to which power is supplied from the sources (solar cell arrays SA1 to SAn), and the error amplifier (3) supplies the power from voltage fluctuations of the capacitor bank (7). An excess or deficiency in the state is detected and an error amplification signal is output. Thus, for example, the present invention can be applied to a power controller that controls the supply amount of power supplied via a power stabilization and non-stabilization bus of a solar cell mounted on an artificial satellite.

  DESCRIPTION OF SYMBOLS 1 Power controller, 2 Power bus, 3 Error amplifier, 4 Timing signal generation part, 5 Battery, 6 Load, 7 Capacitor bank, 8 Current detection part, A1-An calculation drive part, D1-Dn Backflow prevention element, Drive error Amplified signal, Istr1 to Istrn Solar cell array generated power, Iload load current, Ichg charging current, SA1 to SAn solar cell array, SW1 to SWn switch element, t1 to tn timing signal, tph phase difference, Tpe period, Vbus bus voltage, Vth reference value.

Claims (7)

A plurality of backflow prevention elements that are connected in series with a plurality of power supplies that supply power, and that prevent backflow of current to each of the power supplies,
A plurality of switch elements connected in parallel with the respective power sources and connected in series with the respective backflow prevention elements, and switching the connection with the respective power sources to short circuit or open;
An error amplifier that outputs an error amplification signal indicating an excess or deficiency of the power supply state by the plurality of power supplies;
Comparing the error amplification signal with a reference value, an arithmetic drive unit that determines the ratio of power supply and shunt for each power source and sequentially switches the switch elements;
With power controller.   2. The power controller according to claim 1, further comprising a timing signal generation unit that outputs a timing signal of a switching operation for each of the switching elements to the arithmetic driving unit.   The timing signal is output with an equal phase difference to each of the plurality of switch elements, and the generation period of the timing signal in the individual switch elements is sufficiently longer than the phase difference, and the generation period is the phase difference. The power controller according to claim 2, wherein the power controller is set by a value obtained by multiplying the number of power supplies by the number of power supplies. The connection with the whole of the plurality of power supplies is switched at a frequency having a phase difference between the plurality of timing signals as a period
The connection with each of the power supplies is switched at a frequency lower than a frequency having a phase difference between the timing signals as a period depending on a generation period of each timing signal of each of the switch elements. The power controller according to any one of claims 1 to 3. A battery is connected in parallel to the load supplied with power from each of the power sources,
5. The error amplifier according to claim 1, wherein the error amplifier detects an excess / deficiency of the power supply state from a change in a charging current of the battery and outputs an error amplification signal. 6. The power controller described. A capacitor bank is connected in parallel to the load supplied with power from each of the power sources,
5. The error amplifier according to claim 1, wherein the error amplifier detects an excess or deficiency of the power supply state from a voltage fluctuation of the capacitor bank and outputs an error amplification signal. 6. Power controller.   The power controller according to any one of claims 1 to 6, wherein the power source is a solar battery.

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