JP2014063905A - Semiconductor device manufacturing method and semiconductor device - Google Patents

Semiconductor device manufacturing method and semiconductor device Download PDF

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JP2014063905A
JP2014063905A JP2012208584A JP2012208584A JP2014063905A JP 2014063905 A JP2014063905 A JP 2014063905A JP 2012208584 A JP2012208584 A JP 2012208584A JP 2012208584 A JP2012208584 A JP 2012208584A JP 2014063905 A JP2014063905 A JP 2014063905A
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resin
substrate
semiconductor device
semiconductor element
support member
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Michikazu Tomita
道和 冨田
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Fujikura Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features

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  • Pressure Sensors (AREA)
  • Die Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing method which can easily manufacture a semiconductor device capable of easily controlling a thickness of a support member, and stably reducing a stress due to thermal strain, and improving output characteristics.SOLUTION: A manufacturing method of a semiconductor device in which a semiconductor element is mounted on a substrate via a support member comprises: a process of forming at least three recesses independent from each other on the substrate 10 in a region for mounting a semiconductor element 20; a process of coating a liquid first resin composed of a material different from that of the substrate on the recesses; a process of filling the recesses by hardening the first resin and forming in respective recesses, at least three first support members 12 which are independent from each other and each has a dome-like shape raised from a substrate surface; a process of coating a liquid second resin so as to cover all of the first support members arranged in respective recesses; a process of mounting a semiconductor element on the second resin; and a process of hardening the second resin to form a second support member 13.

Description

本発明は、圧力センサなどの半導体素子に関して、支持部材の厚みをコントロールすることによって、半導体素子に加わる応力を安定的に低減させ、その出力特性を向上させるものである。   The present invention relates to a semiconductor element such as a pressure sensor, and controls the thickness of a support member to stably reduce the stress applied to the semiconductor element and improve its output characteristics.

半導体素子、特に拡散抵抗の抵抗値変化から出力値を得る圧力センサや温度センサなどの半導体素子においては、素子自体と基板との間の熱膨張係数差により生じる歪みが、素子の出力特性に影響を及ぼす。詳細には、半導体素子に形成された拡散抵抗の抵抗値がピエゾ抵抗効果により変化するので、半導体素子の出力特性が悪化する。
特許文献1では、第一の樹脂層(接着剤硬化層)を周知の厚膜印刷法を用いて形成、熱硬化後に、第二の樹脂層(接着剤硬化層)をさらに形成して半導体素子を接着することにより、半導体素子下に形成する応力緩和のための樹脂層を形成し、その厚さをコントロールする工法が記されている。半導体素子下に形成される樹脂層は、応力緩和層としての役割を担うものであり、その樹脂層の厚さは重要である。
In a semiconductor element, particularly a semiconductor element such as a pressure sensor or a temperature sensor that obtains an output value from a change in resistance value of a diffused resistor, distortion caused by a difference in thermal expansion coefficient between the element itself and the substrate affects the output characteristics of the element Effect. Specifically, since the resistance value of the diffused resistor formed in the semiconductor element changes due to the piezoresistance effect, the output characteristics of the semiconductor element deteriorate.
In Patent Document 1, a first resin layer (adhesive cured layer) is formed using a known thick film printing method, and after heat curing, a second resin layer (adhesive cured layer) is further formed to form a semiconductor element. A method of forming a resin layer for stress relaxation formed under the semiconductor element by bonding and controlling the thickness is described. The resin layer formed under the semiconductor element plays a role as a stress relaxation layer, and the thickness of the resin layer is important.

また、特許文献2では、低弾性率(例えば1MPa以下)の樹脂を用いた場合、特許文献2中図2が示すようにチップが傾いてしまい、ワイヤボンダビリティが低下するということが開示されており、その対策としてレジスト、ガラスなどから成るスペーサを形成する方法が紹介されている。   Patent Document 2 discloses that when a resin having a low elastic modulus (for example, 1 MPa or less) is used, the chip is tilted as shown in FIG. 2 in Patent Document 2 and wire bondability is reduced. As a countermeasure, a method of forming a spacer made of resist, glass or the like has been introduced.

特許文献1では、第一の樹脂層を周知の厚膜印刷法を用いて形成するとしているが、平坦な面に対して厚い樹脂膜を均一に形成するためには、樹脂の粘度やチキソ性、印刷条件等の調整を綿密に調整する必要があり、安定的に同じ膜厚を得ることは困難である。また、印刷後の経時変化により樹脂が流動したり、熱硬化させる際に熱ダレしたりするなど、形状変化が起こりやすいことも構造的、プロセス的な課題であると言える。   In Patent Document 1, the first resin layer is formed using a well-known thick film printing method. However, in order to form a thick resin film uniformly on a flat surface, the viscosity and thixotropy of the resin are used. Therefore, it is necessary to carefully adjust the printing conditions and the like, and it is difficult to stably obtain the same film thickness. In addition, it can be said that the structural and process problems are that shape changes are likely to occur, for example, the resin may flow due to a change with time after printing, or may be thermally sag when thermally cured.

また、特許文献1では、第一の樹脂層を一箇所に形成しているが、第一の樹脂層を一箇所に形成してしまうと、第二の樹脂層を塗布した際に第一の樹脂層の外側に大きく第二の樹脂層が濡れ広がってしまい、その濡れ広がった樹脂が例えば半導体素子を搭載する基板側のボンディングパッドまで濡れ広がるなどの不良が発生し易い。樹脂がボンディングパッドまで濡れ広がると、ボンディングパッドの表面が汚染され、ワイヤボンドができなくなるなどの不具合が発生する。さらには、第一の樹脂層が一箇所だと、搭載したチップが傾いて固着してしまう不具合が起こりやすく、チップが傾いた状態だと前記した特許文献2中図2が示す課題と同様に、ワイヤボンダビリティの低下が問題となってくる。   Moreover, in patent document 1, although the 1st resin layer is formed in one place, if the 1st resin layer is formed in one place, when the 2nd resin layer is applied, the first resin layer is formed in one place. The second resin layer is largely spread outside the resin layer, and defects such as spreading of the wet spread resin to the bonding pad on the substrate side on which the semiconductor element is mounted are likely to occur. When the resin spreads wet to the bonding pad, the surface of the bonding pad is contaminated, and problems such as the inability to wire bond occur. Furthermore, if the first resin layer is in one place, the mounted chip is liable to be tilted and fixed, and the chip is tilted in the same manner as the problem shown in FIG. In addition, a decrease in wire bondability becomes a problem.

特許文献2では、スペーサを形成してワイヤボンダビリティを改善しているが、レジストやガラスのような高弾性率の材料をスペーサとして使用すると、素子自体と基板などとの間の熱膨張係数差により生じる熱歪による応力の緩和効果が小さくなってしまい、その結果デバイス(センサなど)の特性が悪化してしまうため、不適である。   In Patent Document 2, the wire bondability is improved by forming a spacer. However, when a high elastic modulus material such as a resist or glass is used as the spacer, a difference in thermal expansion coefficient between the element itself and the substrate is caused. The effect of relieving stress due to the generated thermal strain is reduced, and as a result, the characteristics of the device (sensor, etc.) are deteriorated.

特許第2800463号公報Japanese Patent No. 2800463 特開2012−73233号公報JP 2012-73233 A

本発明は、このような従来の実情に鑑みて考案されたものであり、支持部材の厚みを容易にコントロールすることができ、熱歪による応力を安定的に低減させ、出力特性を向上した半導体装置を容易に製造できる、半導体を装置の製造方法を提供することを第一の目的とする。
また、本発明は、支持部材の厚みをコントロールすることで、熱歪による応力を安定的に低減させ、出力特性を向上した半導体装置を提供することを第二の目的とする。
The present invention has been devised in view of such a conventional situation, a semiconductor capable of easily controlling the thickness of a support member, stably reducing stress due to thermal strain, and improving output characteristics. It is a first object of the present invention to provide a method of manufacturing a semiconductor device that can easily manufacture the device.
A second object of the present invention is to provide a semiconductor device in which the stress due to thermal strain is stably reduced and the output characteristics are improved by controlling the thickness of the support member.

本発明の請求項1に記載の半導体装置の製造方法は、基板上に、支持部材を介して半導体素子が搭載されてなる半導体装置の製造方法であって、前記基板において、前記半導体素子を搭載する領域内に、少なくとも3つの互いに独立した凹部を形成する工程と、前記基板とは異なる材料からなる液状の第一樹脂を、前記凹部に塗布する工程と、前記第一樹脂を硬化させることにより、前記基板表面から略ドーム状に盛り上がった形状の、少なくとも3つの独立した第一支持部材を前記凹部ごとに形成する工程と、前記凹部ごとに設けた前記第一支持部材をすべて覆うように、前記基板上に液状の第二樹脂を塗布する工程と、前記第二樹脂上に半導体素子を搭載する工程と、前記第二樹脂を硬化させて第二支持部材を形成する工程と、を含むことを特徴とする。
本発明の請求項2に記載の半導体装置の製造方法は、前記基板と、前記第一樹脂及び前記第二樹脂とは、ヤング率の異なる材料からなることを特徴とする。
本発明の請求項3に記載の半導体装置の製造方法は、請求項1または2において、前記第一樹脂を塗布する工程において、ディスペンス法を用いることを特徴とする。
本発明の請求項4に記載の半導体装置の製造方法は、請求項1乃至3のいずれか一項において、前記第一樹脂及び前記第二樹脂が、シリコーン樹脂であることを特徴とする。
本発明の請求項5に記載の半導体装置の製造方法は、請求項1乃至4のいずれか一項において、前記基板が、セラミック基板であることを特徴とする。
本発明の請求項6に記載の半導体装置の製造方法は、請求項1乃至5のいずれか一項において、前記半導体素子が、内部に拡散抵抗が形成された、圧力センサまたは温度センサであることを特徴とする。
本発明の請求項7に記載の半導体装置は、請求項1乃至6のいずれか一項に記載の方法によって製造されたことを特徴とする。
A method for manufacturing a semiconductor device according to claim 1 of the present invention is a method for manufacturing a semiconductor device in which a semiconductor element is mounted on a substrate via a support member, and the semiconductor element is mounted on the substrate. A step of forming at least three mutually independent recesses in a region to be formed, a step of applying a liquid first resin made of a material different from the substrate to the recesses, and curing the first resin. A step of forming at least three independent first support members for each of the recesses in a shape that rises in a substantially dome shape from the substrate surface, and so as to cover all the first support members provided for each of the recesses, Applying a liquid second resin on the substrate; mounting a semiconductor element on the second resin; and curing the second resin to form a second support member. The features.
The method for manufacturing a semiconductor device according to claim 2 of the present invention is characterized in that the substrate, the first resin, and the second resin are made of materials having different Young's moduli.
According to a third aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the first or second aspect, wherein the dispensing method is used in the step of applying the first resin.
According to a fourth aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to any one of the first to third aspects, wherein the first resin and the second resin are silicone resins.
According to a fifth aspect of the present invention, there is provided a semiconductor device manufacturing method according to any one of the first to fourth aspects, wherein the substrate is a ceramic substrate.
A method of manufacturing a semiconductor device according to a sixth aspect of the present invention is the method for manufacturing a semiconductor device according to any one of the first to fifth aspects, wherein the semiconductor element is a pressure sensor or a temperature sensor in which a diffusion resistance is formed. It is characterized by.
A semiconductor device according to a seventh aspect of the present invention is manufactured by the method according to any one of the first to sixth aspects.

本発明では、支持部材を、基板に形成された凹部に液状の第一樹脂を塗布し、前記基板表面からドーム状に盛り上がった形状の、少なくとも3つの独立した第一支持部材を形成している。そして、前記第一支持部材をすべて覆うように、液状の第二樹脂を塗布することで、支持部材の厚みを容易にコントロールすることができる。これにより歪みによる応力を安定的に低減させ、出力特性を向上した半導体装置を容易に製造可能な、半導体装置の製造方法を提供することができる。また、本発明では、基板に形成した凹部内に液状の第一樹脂を塗布しているので、第一樹脂の濡れ広がりが抑えられ、良好にワイヤボンディングを行うことができる。
また、本発明では、支持部材を、前記基板表面からドーム状に盛り上がった形状の、少なくとも3つの独立した第一支持部材と、前記第一支持部材をすべて覆うように、形成した第二支持部材とから構成することで、支持部材の厚みを容易にコントロールすることができる。これにより歪みによる応力を安定的に低減させ、出力特性を向上した半導体装置を提供することができる。
In the present invention, the support member is formed by applying a liquid first resin to the concave portion formed on the substrate, and forming at least three independent first support members having a dome-like shape from the surface of the substrate. . And the thickness of a support member can be easily controlled by apply | coating liquid 2nd resin so that all said 1st support members may be covered. Accordingly, it is possible to provide a method for manufacturing a semiconductor device, in which stress due to strain can be stably reduced, and a semiconductor device with improved output characteristics can be easily manufactured. Moreover, in this invention, since the liquid 1st resin is apply | coated in the recessed part formed in the board | substrate, the wetting spread of 1st resin is suppressed and wire bonding can be performed favorably.
In the present invention, the support member is formed so as to cover all of the first support member and at least three independent first support members having a shape bulging from the surface of the substrate. The thickness of the support member can be easily controlled. Accordingly, it is possible to provide a semiconductor device in which stress due to strain is stably reduced and output characteristics are improved.

半導体装置の製造方法を工程順に示す図であり、(a)は断面図、(b)は平面図。It is a figure which shows the manufacturing method of a semiconductor device in order of a process, (a) is sectional drawing, (b) is a top view. 図1の次工程を示す図であり、(a)は断面図、(b)は平面図。It is a figure which shows the next process of FIG. 1, (a) is sectional drawing, (b) is a top view. 図2の次工程を示す図であり、(a)は断面図、(b)は平面図。It is a figure which shows the next process of FIG. 2, (a) is sectional drawing, (b) is a top view. 図3の次工程を示す図であり、(a)は断面図、(b)は平面図。It is a figure which shows the next process of FIG. 3, (a) is sectional drawing, (b) is a top view. 図4の次工程を示す図であり、(a)は断面図、(b)は平面図。It is a figure which shows the next process of FIG. 4, (a) is sectional drawing, (b) is a top view.

以下、本発明に係る半導体装置の一実施形態について、図面に基づいて説明する。   Hereinafter, an embodiment of a semiconductor device according to the present invention will be described with reference to the drawings.

図1〜図5は、本発明に係る半導体装置の製造方法を工程順に示す図であり、(a)は平面図、(b)は断面図である。
本発明の半導体装置の製造方法は、基板10上に、支持部材を介して半導体素子20が搭載されてなる、半導体装置の製造方法である。
そして、本発明の半導体装置の製造方法は、前記基板10において、前記半導体素子20を搭載する領域α内に、少なくとも3つの互いに独立してなる凹部11を形成する工程と、前記基板10とは異なる材料からなる液状の第一樹脂12aを、前記凹部11に塗布する工程と、前記第一樹脂12aを硬化させることにより、前記凹部11内を満たすとともに前記基板10表面から略ドーム状に盛り上がった形状の、少なくとも3つの独立した第一支持部材12を前記凹部11ごとに形成する工程と、前記凹部11ごとに設けた前記第一支持部材12をすべて覆うように、前記基板10上に液状の第二樹脂13aを塗布する工程と、前記第二樹脂13a上に半導体素子20を搭載する工程と、前記第二樹脂13aを硬化させて第二支持部材13を形成する工程と、を含む。
以下、工程順に説明する。
1 to 5 are views showing a method of manufacturing a semiconductor device according to the present invention in the order of steps, where (a) is a plan view and (b) is a cross-sectional view.
The method for manufacturing a semiconductor device of the present invention is a method for manufacturing a semiconductor device in which a semiconductor element 20 is mounted on a substrate 10 via a support member.
In the method for manufacturing a semiconductor device according to the present invention, in the substrate 10, the step of forming at least three mutually independent recesses 11 in the region α in which the semiconductor element 20 is mounted, The liquid first resin 12a made of a different material was applied to the recess 11 and the first resin 12a was cured to fill the recess 11 and rise from the surface of the substrate 10 into a substantially dome shape. Forming at least three independent first support members 12 in the shape of each of the recesses 11 and forming a liquid on the substrate 10 so as to cover all of the first support members 12 provided for each of the recesses 11. A step of applying the second resin 13a, a step of mounting the semiconductor element 20 on the second resin 13a, and the second support member 1 by curing the second resin 13a. And forming a.
Hereinafter, it demonstrates in order of a process.

(1)まず、図1に示すようなパッケージ基板10を作製する。
パッケージ基板10の材料としては、本実施形態ではアルミナのようなセラミック基板を想定する。基板材料としては、他に、エポキシやポリイミドのような樹脂を用いることもできる。セラミック基板は、本実施形態では、基板10a,10b,10cが積層されてなる三層構造の積層基板となっており、三層を重ね合わせて焼成することにより作製する。
(1) First, a package substrate 10 as shown in FIG. 1 is produced.
As a material of the package substrate 10, a ceramic substrate such as alumina is assumed in this embodiment. As the substrate material, other resins such as epoxy and polyimide can be used. In this embodiment, the ceramic substrate is a laminated substrate having a three-layer structure in which the substrates 10a, 10b, and 10c are laminated, and is manufactured by stacking and firing the three layers.

パッケージ基板10には、機能部品とパッケージ基板10を接続するためのボンディングパッド2と、パッケージ基板10を実装する際に使用する外部接続電極3を少なくとも形成する。ボンディングパッド2と外部接続電極3は、図示しないが、パッケージ基板10のいずれかの部位で接続される。また、ボンディングパッドと外部接続電極は一体化されていても良い。ボンディングパッド及び外部接続電極は、例えばNi、Cr、Cu、Ti、Pt、Auなどの金属材料を組み合わせた積層体を用いることができる。ボンディングパッドや外部接続電極は、印刷法、電界または無電界めっき法により形成する。   At least a bonding pad 2 for connecting the functional component and the package substrate 10 and an external connection electrode 3 used when the package substrate 10 is mounted are formed on the package substrate 10. Although not shown, the bonding pad 2 and the external connection electrode 3 are connected at any part of the package substrate 10. Further, the bonding pad and the external connection electrode may be integrated. As the bonding pad and the external connection electrode, for example, a laminate in which metal materials such as Ni, Cr, Cu, Ti, Pt, and Au are combined can be used. The bonding pad and the external connection electrode are formed by a printing method, an electric field or an electroless plating method.

(2)基板10において、半導体素子20を搭載する領域α内に、少なくとも3つの互いに独立してなる凹部11を形成する。
そして図1に示すように、三層構造の最上層10cに、後で半導体素子20を搭載する領域α内に、少なくとも3つの凹部11を形成する。図1に示す例では4つの凹部11を形成している。これらの凹部11は、互いに独立している。
(2) In the substrate 10, at least three recesses 11 that are independent of each other are formed in the region α on which the semiconductor element 20 is mounted.
As shown in FIG. 1, at least three recesses 11 are formed in the region α where the semiconductor element 20 will be mounted later in the uppermost layer 10c having a three-layer structure. In the example shown in FIG. 1, four recesses 11 are formed. These recesses 11 are independent of each other.

凹部11の形成方法としては、特に限定されるものではないが、例えば、具体的には、積層基板を焼成する前の段階で最上層の凹部11を打ち抜き加工等により形成しておき、その後焼成する方法を挙げることができる。
本実施形態では、各基板10a,10b,10cの厚さは100μm程度とし、三層合わせて300μmほどの厚さとするが、層数や厚さは任意に選んで良い。凹部11の寸法は、第一支持部材12の盛り上がり部の高さをどの程度にしたいかによって任意に設計するが、本実施形態では、例えば200μm〜400μm程度とする。
The method for forming the recess 11 is not particularly limited. For example, specifically, the uppermost recess 11 is formed by punching or the like before firing the laminated substrate, and then fired. The method of doing can be mentioned.
In the present embodiment, the thickness of each of the substrates 10a, 10b, and 10c is about 100 μm, and the total of the three layers is about 300 μm. However, the number of layers and the thickness may be arbitrarily selected. Although the dimension of the recessed part 11 is designed arbitrarily according to how much the height of the raised part of the first support member 12 is desired, in this embodiment, it is about 200 μm to 400 μm, for example.

また、凹部11の形状は、図1では四角形状のものを示しているが、これに限定されるものではなく、円形であっても良いし、その他の形状であっても問題ない。ただし、凹部11はそれぞれ独立して形成されている必要がある。さらに、凹部11のそれぞれは、凹部の形状が(深さや幅)が同一に形成されている必要がある。
さらに、凹部11の数としても、本実施形態では4箇所に凹部11を形成したが、最低3点形成してあれば本発明の効果は得られる。また、5箇所以上であっても良く、各凹部11が独立して形成してあれば良い。
Moreover, although the shape of the recessed part 11 has shown the square-shaped thing in FIG. 1, it is not limited to this, A circular shape may be sufficient and it is satisfactory even if it is another shape. However, the recesses 11 need to be formed independently. Further, each of the recesses 11 needs to have the same shape (depth and width).
Furthermore, as for the number of the concave portions 11, the concave portions 11 are formed at four places in the present embodiment, but the effect of the present invention can be obtained if at least three points are formed. Moreover, five or more places may be sufficient and each recessed part 11 should just be formed independently.

(3)基板10とは異なる材料からなる液状の第一樹脂12aを、凹部11に塗布する。
次に、図2に示すように、基板10の4箇所に形成した凹部11に対して、第一樹脂12aを塗布する。第一樹脂12aの塗布方法としては、特に限定されるものではないが、例えばディスペンス法を用いることが好ましい。
(3) A liquid first resin 12 a made of a material different from that of the substrate 10 is applied to the recess 11.
Next, as shown in FIG. 2, the first resin 12 a is applied to the recesses 11 formed at four locations on the substrate 10. A method for applying the first resin 12a is not particularly limited, but for example, a dispensing method is preferably used.

第一樹脂12aには、基板10とヤング率の異なる材料を用いる。第一樹脂12aは応力緩和性が高くヤング率の小さいシリコーン樹脂が最も適する。
第一樹脂12aのヤング率としては、応力緩和効果とワイヤボンダビリティの両方を考慮すると、5MPa〜20MPa程度のものが好ましい。ヤング率が小さすぎるとワイヤボンドが困難となり、逆にヤング率が高すぎると応力緩和効果が小さくなってしまう。本実施形態においては、第一樹脂12aとして熱硬化性のシリコーン樹脂を用いている。
A material having a Young's modulus different from that of the substrate 10 is used for the first resin 12a. As the first resin 12a, a silicone resin having a high stress relaxation property and a small Young's modulus is most suitable.
The Young's modulus of the first resin 12a is preferably about 5 MPa to 20 MPa considering both the stress relaxation effect and the wire bondability. If the Young's modulus is too small, wire bonding becomes difficult. Conversely, if the Young's modulus is too high, the stress relaxation effect becomes small. In the present embodiment, a thermosetting silicone resin is used as the first resin 12a.

第一樹脂12aをディスペンス塗布する際、凹部11の体積よりも十分大きく、かつ凹部11から樹脂が流れ出ない量の樹脂を調整して流し込むことが好ましい。さらに、凹部11ごとにディスペンス塗布する第一樹脂12aの塗布量は同一であるとよい。これにより凹部11の縁からドーム状に盛り上がった樹脂形状を得ることができる。これは、液状樹脂の表面張力の効果によるもので、表面張力により形状が維持され易く、経時変化や熱ダレなどの不具合を抑制することが可能である。   When dispensing the first resin 12a, it is preferable to adjust and pour in an amount of resin that is sufficiently larger than the volume of the recess 11 and does not flow out of the recess 11. Furthermore, the application amount of the first resin 12a to be dispense-applied for each recess 11 is preferably the same. Thereby, the resin shape which rose from the edge of the recessed part 11 in the shape of a dome can be obtained. This is due to the effect of the surface tension of the liquid resin, the shape is easily maintained by the surface tension, and it is possible to suppress problems such as changes over time and thermal sag.

(4)第一樹脂12aを硬化させることにより、凹部11内を満たすとともに基板10表面から略ドーム状に盛り上がった形状の、少なくとも3つの独立した第一支持部材12を凹部11ごとに形成する。
このように塗布した第一樹脂12aに対して所定の熱(例えば150℃1hrなど)を印加することで、第一樹脂12aを硬化させる。これにより、凹部11内を満たすとともに基板10表面から略ドーム状に盛り上がった形状の、少なくとも3つの独立した第一支持部材12が凹部11ごとに形成される。この凹部11ごとに形成される第一支持部材12は、凹部11のサイズが同一であり、凹部11に塗布する樹脂の量が同一であるため、硬化後における第一支持部材12のサイズ(高さや径)は揃った状態で形成される。
(4) By curing the first resin 12a, at least three independent first support members 12 are formed for each of the recesses 11 so as to fill the recesses 11 and rise from the surface of the substrate 10 into a substantially dome shape.
The first resin 12a is cured by applying predetermined heat (for example, 150 ° C. for 1 hr) to the first resin 12a applied in this way. As a result, at least three independent first support members 12 that fill the inside of the concave portion 11 and rise from the surface of the substrate 10 in a substantially dome shape are formed for each concave portion 11. Since the first support member 12 formed for each recess 11 has the same size of the recess 11 and the same amount of resin applied to the recess 11, the size (high) of the first support member 12 after curing is high. The sheath diameter is formed in a uniform state.

なお、第一支持部材12の盛り上がりの高さは、基板10の最上層の表面から10μm〜50μm程度の範囲であることが望ましい。   The raised height of the first support member 12 is preferably in the range of about 10 μm to 50 μm from the surface of the uppermost layer of the substrate 10.

(5)凹部11ごとに設けた前記第一支持部材12をすべて覆うように、基板10上に第二期脂を塗布する。
次に、図3に示すように、熱硬化させた第一支持部材12の上に、さらに液状の第二樹脂13aを塗布する。第二樹脂13aの塗布方法は、第一樹脂12aと同様にディスペンス法が適するが、転写ピンを用いた転写法を用いても良い。
(5) The second phase fat is applied on the substrate 10 so as to cover all the first support members 12 provided for each recess 11.
Next, as shown in FIG. 3, a liquid second resin 13 a is further applied on the thermally cured first support member 12. As the coating method of the second resin 13a, the dispensing method is suitable similarly to the first resin 12a, but a transfer method using a transfer pin may be used.

第二樹脂13aには、基板10とヤング率の異なる材料を用いる。第二樹脂13aについても、第一樹脂12aと同様、応力緩和性が高くヤング率の小さいシリコーン樹脂が最も適する。
第二樹脂13aのヤング率としては、応力緩和効果とワイヤボンダビリティの両方を考慮すると、5MPa〜20MPa程度のものが好ましい。ヤング率が小さすぎるとワイヤボンドが困難となり、逆にヤング率が高すぎると応力緩和効果が小さくなってしまうためである。なお、第一樹脂12aと第二樹脂13aは同じ材料を用いても良い。
A material having a Young's modulus different from that of the substrate 10 is used for the second resin 13a. As for the second resin 13a, similarly to the first resin 12a, a silicone resin having a high stress relaxation property and a small Young's modulus is most suitable.
The Young's modulus of the second resin 13a is preferably about 5 MPa to 20 MPa considering both the stress relaxation effect and the wire bondability. If the Young's modulus is too small, wire bonding becomes difficult. Conversely, if the Young's modulus is too high, the stress relaxation effect is reduced. Note that the same material may be used for the first resin 12a and the second resin 13a.

(6)第二樹脂13a上に半導体素子20を搭載する。そして、第二樹脂13aを硬化させて第二支持部材13を形成する。
さらに、図4に示すように、第二樹脂13aの上に半導体素子20を接着させる。これにより、第二支持部材13上に半導体素子20を接着し固定する。第一支持部材12の高さが揃って形成されているため、第二支持部材13の上に固定される半導体素子20は、基板10に対して水平な状態で固定されている。
半導体素子20は、特に限定されるものではなく、例えば圧力センサや温度センサなど、拡散抵抗を有しており、その拡散抵抗値の変化量から出力値を得る半導体素子であれば、本発明の作用効果を得ることができる。例えば、圧力センサと、圧力センサの温度特性を補正するための温度センサを有する信号処理ICとを、同一基板上に設置した圧力センサパッケージにおいて、圧力センサと信号処理ICとの両方に対して本発明を適用しても良い。
(6) The semiconductor element 20 is mounted on the second resin 13a. Then, the second support member 13 is formed by curing the second resin 13a.
Furthermore, as shown in FIG. 4, the semiconductor element 20 is bonded onto the second resin 13a. Thereby, the semiconductor element 20 is bonded and fixed on the second support member 13. Since the first support member 12 is formed with the same height, the semiconductor element 20 fixed on the second support member 13 is fixed in a horizontal state with respect to the substrate 10.
The semiconductor element 20 is not particularly limited, and may be any semiconductor element that has a diffusion resistance such as a pressure sensor or a temperature sensor and obtains an output value from the amount of change in the diffusion resistance value. An effect can be obtained. For example, in a pressure sensor package where a pressure sensor and a signal processing IC having a temperature sensor for correcting the temperature characteristics of the pressure sensor are installed on the same substrate, the present invention is applied to both the pressure sensor and the signal processing IC. The invention may be applied.

ここで、第一支持部材12が半導体素子20の四隅に各々独立して設けてあることにより、半導体素子20の直下と半導体素子20の外部とを繋ぐ通路が形成され、これにより第二樹脂13aが半導体素子20の各辺を跨いで流動できる状態となる。
このような構造に対して、第二樹脂13aを塗布し、その上に半導体素子20を搭載すると、四隅の第一支持部材12をスペーサとして半導体素子20と基板10が作るわずかな隙間に第二樹脂13aが流れ込む(一種の毛細管現象)ため、さらに樹脂厚が安定できると共に、半導体素子20の外部に第二樹脂13aがはみ出す不具合を抑制することができる。
Here, since the first support member 12 is provided independently at each of the four corners of the semiconductor element 20, a passage connecting the area immediately below the semiconductor element 20 and the outside of the semiconductor element 20 is formed, whereby the second resin 13 a is formed. Is in a state where it can flow across each side of the semiconductor element 20.
When the second resin 13a is applied to such a structure and the semiconductor element 20 is mounted on the second resin 13a, the second support 13 at the four corners is used as a spacer, and the second gap 13 is formed in a slight gap created by the semiconductor element 20 and the substrate 10. Since the resin 13a flows (a kind of capillary phenomenon), the resin thickness can be further stabilized, and a problem that the second resin 13a protrudes outside the semiconductor element 20 can be suppressed.

また、各凹部11に形成されている第一支持部材12はドーム状に形成されるが、その上に搭載される半導体素子20を、傾き無く高さを安定させるためには、最低3点の凹部11に対して第一支持部材12が形成されている必要がある。
このような状態でさらに所定の熱(例えば150℃、1hrなど)を印加し、第二樹脂13bを硬化させることで、半導体素子20と基板10とを接着させる。
The first support member 12 formed in each recess 11 is formed in a dome shape. In order to stabilize the height of the semiconductor element 20 mounted on the first support member 12 without inclination, at least three points are required. The first support member 12 needs to be formed with respect to the recess 11.
In this state, predetermined heat (for example, 150 ° C., 1 hr) is further applied to cure the second resin 13b, thereby bonding the semiconductor element 20 and the substrate 10 together.

(7)次に、図5に示すように、ワイヤボンドを行う。
半導体素子20のAlパッド21と、パッケージ基板10のボンディングパッド2とを、Auワイヤ4を用いてワイヤボンディングにより、電気的に接続する。
この際、第二樹脂13aが、パッケージ基板10側のボンディングパッド2まで濡れ広がっているとワイヤの接着不良が発生してしまうという問題があるが、本発明の構造と工程を経ることにより、樹脂を塗布する際の液ダレが抑制されるので、良好にワイヤボンディングを行うことができ不良が低減される。
以上のようにして、半導体装置1が作製される。
(7) Next, wire bonding is performed as shown in FIG.
The Al pad 21 of the semiconductor element 20 and the bonding pad 2 of the package substrate 10 are electrically connected by wire bonding using the Au wire 4.
At this time, if the second resin 13a spreads to the bonding pad 2 on the package substrate 10 side, there is a problem in that a poor bonding of the wire occurs. Since the dripping at the time of applying is suppressed, wire bonding can be performed satisfactorily and defects are reduced.
The semiconductor device 1 is manufactured as described above.

なお、図示しないが、半導体素子20を覆うように保護基板を貼り付けることにより、半導体素子20を保護しても良い。また、半導体素子20のみでなく、同一パッケージ内に信号処理ICを配しても良い。さらに、半導体素子20内部に信号処理回路が形成されていても良い。   Although not shown, the semiconductor element 20 may be protected by attaching a protective substrate so as to cover the semiconductor element 20. Further, not only the semiconductor element 20 but also a signal processing IC may be arranged in the same package. Further, a signal processing circuit may be formed inside the semiconductor element 20.

このように、本発明では、支持部材を、基板10に形成された凹部11に第一樹脂12aを塗布し、当該凹部11内を満たすとともに前記基板10表面から略ドーム状に盛り上がった形状の、少なくとも3つの独立した第一支持部材12を形成している。そして、前記第一支持部材12をすべて覆うように、第二樹脂13aを塗布することで、支持部材の厚みを容易にコントロールすることができる。これにより熱歪による応力を安定的に低減させ、出力特性を向上した半導体装置を容易に製造することができる。また、本発明では、基板10に形成した凹部11内に樹脂を塗布しているので、樹脂の液ダレもなく、良好にワイヤボンディングを行うことができる。   As described above, in the present invention, the support member has a shape in which the first resin 12a is applied to the concave portion 11 formed in the substrate 10, fills the concave portion 11, and rises from the surface of the substrate 10 in a substantially dome shape. At least three independent first support members 12 are formed. And the thickness of a support member can be easily controlled by apply | coating 2nd resin 13a so that all said 1st support members 12 may be covered. As a result, it is possible to easily manufacture a semiconductor device in which stress due to thermal strain is stably reduced and output characteristics are improved. Moreover, in this invention, since resin is apply | coated in the recessed part 11 formed in the board | substrate 10, there is no dripping of resin, and wire bonding can be performed favorably.

以上、本発明の半導体装置の製造方法および半導体装置について説明してきたが、本発明はこれに限定されるものではなく、発明の趣旨を逸脱しない範囲で、適宜変更が可能である。   The method for manufacturing a semiconductor device and the semiconductor device of the present invention have been described above. However, the present invention is not limited to this, and can be appropriately changed without departing from the spirit of the invention.

本発明は、半導体装置の製造方法および半導体装置に広く適用可能である。   The present invention is widely applicable to semiconductor device manufacturing methods and semiconductor devices.

10 基板、11 凹部、12a 第一樹脂、12 第一支持部材、13a 第二樹脂、13 第二支持部材、20 半導体素子。   DESCRIPTION OF SYMBOLS 10 board | substrate, 11 recessed part, 12a 1st resin, 12 1st support member, 13a 2nd resin, 13 2nd support member, 20 semiconductor element.

Claims (7)

基板上に、支持部材を介して半導体素子が搭載されてなる半導体装置の製造方法であって、
前記基板において、前記半導体素子を搭載する領域内に、少なくとも3つの互いに独立してなる凹部を形成する工程と、
前記基板とは異なる材料からなる液状の第一樹脂を、前記凹部に塗布する工程と、
前記第一樹脂を硬化させることにより、前記凹部内を満たすとともに前記基板表面から略ドーム状に盛り上がった形状の、少なくとも3つの独立した第一支持部材を前記凹部ごとに形成する工程と、
前記凹部ごとに設けた前記第一支持部材を全て覆うように、前記基板上に液状の第二樹脂を塗布する工程と、
前記第二樹脂上に半導体素子を搭載する工程と、
前記第二樹脂を硬化させて第二支持部材を形成する工程と、を含むことを特徴とする半導体装置の製造方法。
A method of manufacturing a semiconductor device in which a semiconductor element is mounted on a substrate via a support member,
Forming, in the substrate, at least three recesses independent of each other in a region where the semiconductor element is mounted;
Applying a liquid first resin made of a material different from that of the substrate to the recess;
Forming the at least three independent first support members for each of the recesses in a shape that fills the recesses and rises in a substantially dome shape from the substrate surface by curing the first resin;
Applying a liquid second resin on the substrate so as to cover all of the first support member provided for each of the recesses;
Mounting a semiconductor element on the second resin;
A step of curing the second resin to form a second support member.
前記基板と、前記第一樹脂及び前記第二樹脂とは、ヤング率の異なる材料からなること、を特徴とする請求項1に記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 1, wherein the substrate, the first resin, and the second resin are made of materials having different Young's moduli. 前記第一樹脂を塗布する工程において、ディスペンス法を用いることを特徴とする請求項1または2に記載の半導体装置の製造方法。   3. The method of manufacturing a semiconductor device according to claim 1, wherein a dispensing method is used in the step of applying the first resin. 前記第一樹脂及び前記第二樹脂が、シリコーン樹脂であることを特徴とする請求項1乃至3のいずれか一項に記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 1, wherein the first resin and the second resin are silicone resins. 前記基板が、セラミック基板であることを特徴とする請求項1乃至4のいずれか一項に記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 1, wherein the substrate is a ceramic substrate. 前記半導体素子が、内部に拡散抵抗が形成された、圧力センサまたは温度センサであること、を特徴とする請求項1乃至5のいずれか一項に記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor element is a pressure sensor or a temperature sensor in which a diffusion resistance is formed. 請求項1乃至6のいずれか一項に記載の方法によって製造されたことを特徴とする半導体装置。   A semiconductor device manufactured by the method according to claim 1.
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JP2016188763A (en) * 2015-03-30 2016-11-04 株式会社フジクラ Semiconductor package and pressure sensor package

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