JP2014053355A - Wafer processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wafer processing method capable of processing a rear surface of a wafer to a highly-accurate flat surface.SOLUTION: A wafer processing method for dividing a wafer which includes a chamfering part in an outer peripheral edge and in which each device is formed in each of the regions partitioned by a plurality of division schedule lines formed in a lattice shape on a surface of the wafer and a plurality of embedded electrodes reaching a depth not less than a finishing thickness of the wafer are buried from each device into individual devices includes the steps of: arranging a carrier plate on the surface of the wafer via a resin (carrier plate arranging step); detecting depths of tips of the plurality of embedded electrodes from a rear surface of the wafer (embedded electrode detection step); thinning the wafer by grinding the rear surface of the wafer to such an extent that the embedded electrodes are not exposed to the rear surface (rear surface grinding step); and bringing a polishing pad arranged with a plurality of independent ring-shaped air bags into contact with the rear surface of the wafer, supplying slurry while properly controlling a pressure of each air bag, and polishing the rear surface of the wafer to such an extent that the embedded electrodes are not exposed to the rear surface (grinding step).

Description

  The present invention relates to a method for processing a wafer such as a semiconductor wafer.

  In recent years, in order to achieve high integration, high density, miniaturization, and thinning of semiconductor devices, a stacked type in which a plurality of semiconductor chips such as MCP (multi-chip package) and SIP (system in package) are stacked. Semiconductor packages have been proposed.

  Such a stacked semiconductor package is formed by stacking a plurality of semiconductor chips on a package substrate called an interposer. In general, the interposer and the semiconductor chip electrodes, or the electrodes of the stacked semiconductor chips are electrically connected with a gold wire, and then the semiconductor chip is molded and sealed with resin to the interposer. A semiconductor package is manufactured.

  However, in this method, since the gold wire bonded to the electrode of the semiconductor chip protrudes to the outer peripheral surplus region of the semiconductor chip, there is a problem that the package size becomes larger than the semiconductor chip.

  In addition, when the mold is sealed with the resin, the wire wire is deformed to cause a disconnection or a short circuit, or the air remaining in the mold resin expands upon heating and causes damage to the semiconductor package. .

  Therefore, a technique of providing a through electrode (via electrode) that penetrates the semiconductor chip in the thickness direction and connects to the electrode of the semiconductor chip in the semiconductor chip, stacking the semiconductor chips and joining the through electrodes and electrically connecting the electrodes. Have been proposed (see, for example, Japanese Patent Application Laid-Open Nos. 2004-207606 and 2004-241479).

  In this method, a plurality of semiconductor devices are formed on the surface of the silicon wafer, and from each semiconductor device, a plurality of embedded copper electrodes (copper posts) that are connected to the electrodes of the semiconductor device and extend to the back side of the silicon wafer are formed. A so-called TSV (Through Silicon Via) wafer is used.

  The embedded copper electrode has a height equal to or higher than the finished thickness of the semiconductor chip, and the back surface of the wafer is ground and polished by a grinding device to thin the wafer to a thickness just before the embedded copper electrode is exposed from the back surface. Thereafter, by selectively etching only the silicon wafer, the tip of the buried copper electrode protrudes from the back surface of the wafer to form a through electrode.

JP 2004-207606 A JP 2004-241479 A

  The wafer processing method as described above includes many steps, but it is extremely difficult to grind the back surface of the wafer to such an extent that the through electrode is not exposed on the back surface. If the through electrode is exposed on the back side, metal ions such as copper forming the electrode may elute and adhere to the wafer device, adversely affecting the function of the device. Control and uniform flatness are required.

  In addition, since the depth from the back surface of the wafer on which the through electrode is formed varies, there is a difficulty in that the amount of grinding is strictly different depending on the individual wafer, and it must be dealt with.

  The present invention has been made in view of these points, and an object of the present invention is to provide a wafer processing method capable of processing the back surface of a wafer into a highly accurate flat surface.

  According to the present invention, a plurality of embedded electrodes each having a device formed in each region partitioned by a plurality of scheduled division lines formed in a lattice pattern on the surface and reaching a depth equal to or greater than the finished thickness of the wafer. Is a wafer processing method in which a wafer having a chamfered portion on the outer peripheral edge is divided into individual devices, and a cutting blade is positioned on the outer peripheral edge of the wafer so that the wafer exceeds the finished thickness from the surface side. A chamfered portion removing step of cutting the wafer into a circular shape or completely cutting the wafer into a circular shape from the back side to remove the chamfered portion, and a carrier plate via a resin on the wafer surface before or after the chamfered portion removing step is performed And a carrier plate disposing step for disposing the plurality of embedded electrodes from the back surface of the wafer after the carrier plate disposing step. Embedded electrode detection step for detecting the depth of the tip of the wafer, and after performing the embedded electrode detection step, a back surface grinding step for grinding and thinning the back surface of the wafer to such an extent that the embedded electrode is not exposed on the back surface, After carrying out the back surface grinding step, a polishing pad in which a plurality of independent air bags are arranged in a ring shape is brought into contact with the back surface of the wafer, and slurry is supplied while appropriately controlling the pressure of each air bag, thereby the embedded electrode A polishing step for polishing the back surface of the wafer to such an extent that the back surface is not exposed to the back surface, and after performing the polishing step, etching the wafer from the back surface of the wafer so that the embedded electrode protrudes from the back surface of the wafer to form a through electrode And after performing the etching step, the insulating film coating step of covering the back surface of the wafer with the insulating film, and the insulating film coating step. C) removing the through electrode protruding from the back surface of the insulating film to expose the insulating film and finishing the head of the through electrode on the same surface as the insulating film; and after performing the finishing step, the through electrodes A bump disposing step of disposing a bump on the head of the wafer, and after performing the bump disposing step, a dicing tape is attached to the back surface of the wafer, the carrier plate is removed from the front surface of the wafer, and the wafer is removed from the dicing tape. There is provided a wafer processing method characterized by including a transfer step of transferring to a wafer and a dividing step of dividing the wafer into individual devices after the transfer step is performed.

  According to the wafer processing method of the present invention, the air bag structure polishing pad capable of applying a predetermined pressure to a predetermined portion of the polishing pad used when polishing the back surface of each wafer is employed. Even in an apparatus state that is likely to become small, it is possible to finely adjust the polishing amount by applying a predetermined pressure to a predetermined position, so that a flat polishing surface can be obtained.

FIG. 1A is a front perspective view of a semiconductor wafer having a buried copper electrode with bumps, and FIG. 1B is a cross-sectional view thereof. It is a partial cross section side view which shows a chamfer part removal process. It is sectional drawing of the semiconductor wafer after a chamfer part removal process implementation. It is sectional drawing explaining a carrier plate arrangement | positioning process. It is sectional drawing which shows an embedded copper electrode detection process. It is a partial cross section side view which shows a back surface grinding process. It is a partial cross section side view which shows a grinding | polishing process. It is a top view of the grinding wheel of a state where the polishing pad was removed. It is sectional drawing of the wafer after grinding | polishing process implementation. It is sectional drawing of the wafer after an etching process implementation. It is sectional drawing of the wafer after insulating film coating process implementation. It is sectional drawing of the wafer after finishing process implementation. It is sectional drawing of the wafer after bump provision process implementation. It is sectional drawing explaining a transfer process.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to FIG. 1A, a perspective view of a semiconductor wafer 11 having embedded copper electrodes with bumps to be processed by the processing method of the present invention is shown. FIG. 1B is a longitudinal sectional view thereof.

  A semiconductor wafer 11 shown in FIG. 1 is made of, for example, a silicon wafer having a thickness of 700 μm, and a plurality of division lines (streets) 13 are formed in a lattice shape on the surface 11a, and a plurality of division lines 13 are formed. A device 15 such as an IC or an LSI is formed in each of the areas partitioned by.

  As shown in FIG. 1B, from each semiconductor device 15 formed on the semiconductor wafer 11, a plurality of embedded copper electrodes 21 embedded at a depth equal to or larger than the finished thickness t1 of the device extend toward the back surface 11b. ing. A bump 23 is bonded to the upper end of each embedded electrode 21. The electrode 21 may be formed from other conductor materials.

  As shown in FIG. 1 (A), the semiconductor wafer 11 thus configured (hereinafter sometimes simply referred to as a wafer) 11 includes a device region 17 in which a plurality of semiconductor devices 15 are formed, An outer peripheral surplus area 19 surrounding the device area 17 is provided on the surface 11a. Further, as shown in FIG. 1B, an arc-shaped chamfered portion 11 e is formed on the outer peripheral portion of the wafer 11.

  In the wafer processing method of the present invention, first, a chamfered portion removing step for removing the chamfered portion 11e of the wafer 11 is performed. In this chamfered portion removing step, as shown in FIG. 2, the wafer 11 is sucked and held by the chuck table 10 of the cutting apparatus.

  In FIG. 2, reference numeral 12 denotes a cutting unit of a cutting apparatus. A spindle 16 is rotatably supported in a spindle housing 14, and a cutting blade 18 is attached to the tip of the spindle 16.

  In this chamfered portion removing step, the cutting blade 18 of the cutting unit 12 rotating at high speed is cut into the chamfered portion 11e of the wafer 11 by a predetermined depth from the surface 11a side, and the chuck table 10 is rotated at a low speed, as shown in FIG. As described above, a circular step portion 11 f is formed on the outer peripheral portion of the wafer 11.

  The cutting depth of the cutting blade 18 in this chamfered portion removing step is at least a depth exceeding the finished thickness of the wafer 11 from the surface 11a of the wafer 11, and forms a circular step portion 11f having a depth of about 100 μm, for example. As the cutting blade 18, for example, a washer blade having a thickness of about 1 to 2 mm is preferably used.

  The chamfered portion removing step shown in FIG. 2 is performed by cutting the cutting blade 18 into the chamfered portion 11e of the wafer 11, and grinding is performed by bringing the grinding wheel of the grinding wheel into contact with the chamfered portion 11e of the wafer 11. Thus, part or all of the chamfered portion 11e may be removed.

  All of the chamfered portions may be removed by complete cutting (full cutting). In that case, the chamfered portion removing step is performed after the carrier plate arranging step. The full cut may be performed from the back surface 11 b side of the wafer 11.

  A cross-sectional view of the wafer 11 after the chamfered portion removing step is shown in FIG. The circular step portion 11f is at least a depth exceeding the finished thickness of the wafer 11 from the surface 11a of the wafer 11, and has a depth of about 100 μm from the surface 11a of the wafer 11, for example.

  After performing the chamfered portion removing step, as shown in FIG. 4, a carrier plate disposing step of disposing the carrier plate 25 on the surface 11a of the wafer 11 via the resin 27 having adhesiveness is performed. The resin 27 acts as an adhesive, and the carrier plate 25 is adhered to the surface 11 a of the wafer 11 with the resin 27.

  The carrier plate 25 is made of, for example, a silicon wafer having a uniform thickness or glass. In the present embodiment, the carrier plate 25 is illustrated as being formed of glass. The thickness of the resin 27 is preferably about 20 μm, for example.

  After the carrier plate placement step, a buried copper electrode detection step for detecting the depth of the tip of the buried copper electrode 21 from the back surface 11b of the wafer 11 is performed. In this embedded copper electrode detection step, for example, as shown in FIG. 5, the carrier plate 25 is sucked and held by the chuck table 20 of the grinding apparatus, and the wafer 11 is imaged from the back surface 11b side by the infrared camera (IR camera) 22. To implement.

  Since infrared rays pass through the silicon wafer 11, the focal point of the IR camera 22 is changed to focus on the front surface 11a of the wafer 11, the tip of the embedded copper electrode 21, and the back surface 11b of the wafer 11 to detect the focal length. Thus, the height of the front surface 11a of the wafer 11, the front end of the embedded copper electrode 21 and the back surface 11b of the wafer 11 can be detected, and the depth of the front end of the embedded copper electrode 21 from the back surface 11b of the wafer can be detected. it can.

  The wafer 11 is imaged while moving the IR camera 21 in the direction of arrow A, the depth of all or a plurality of embedded copper electrodes 21 is detected, and the detected values are stored in a memory provided in the controller of the grinding apparatus. To do.

  After performing the embedded copper electrode detection process, a back surface grinding process is performed in which the back surface 11b of the wafer 11 is ground and thinned so that the embedded copper electrode 21 is not exposed on the back surface 11b of the wafer 11. In this back surface grinding step, the carrier plate 25 is sucked and held by the chuck table 20 of the grinding device, and the back surface 11b of the wafer 11 is exposed.

  In FIG. 6, the grinding unit 24 of the grinding apparatus includes a spindle 26 that is rotationally driven by a motor (not shown), a wheel mount 28 that is fixed to the tip of the spindle 26, and a grinding wheel 30 that is detachably attached to the wheel mount 28. Including. The grinding wheel 30 includes an annular wheel base 32 and a plurality of grinding wheels 34 fixed to the outer periphery of the lower end of the wheel base 32.

  In this back grinding process, while rotating the chuck table 20 in the direction indicated by the arrow a at 300 rpm, for example, the grinding wheel 30 is rotated in the direction indicated by the arrow b at, for example, 6000 rpm, and a grinding unit feed mechanism (not shown) is driven. The grinding wheel 34 of the grinding wheel 30 is brought into contact with the back surface 11 b of the wafer 11.

  Then, the grinding wheel 30 is ground and fed downward by a predetermined amount at a predetermined grinding feed speed. While measuring the thickness of the wafer 11 with a contact-type or non-contact-type thickness measurement gauge, the wafer 11 is ground to a thickness just before the tip of the embedded copper electrode 21 is exposed on the back surface 11b of the wafer 11, as shown in FIG. To do.

  After performing the back surface grinding process, a polishing process is performed to polish the ground surface of the wafer 11 and remove grinding distortion. In the present embodiment, this polishing step is performed using a polishing wheel 40 having a polishing pad 42 as shown in FIG.

  The grinding wheel 40 includes a first frame 44 having a large cylindrical side and upper surface, a second frame 46 having a medium diameter cylindrical side and upper surface housed in the first frame 44, and A third frame 48 having a small cylindrical side surface and an upper surface housed in the second frame 46 is included.

  A polishing pad 42 is adhered to the lower surfaces of the first to third frames 44, 46, 48. The polishing pad 42 is made of, for example, a nonwoven fabric. The slurry supply path 39 formed in the spindle 38 is connected to a slurry supply source including floating abrasive grains such as silica.

  A slurry supply path 49 that passes through the first to third frames 44, 46, 48 and the polishing pad 42 and is connected to the slurry supply path 39 of the spindle 38 is formed. A ring-shaped first airbag 50 is accommodated between the first frame 44 and the second frame 46, and a ring-shaped second airbag 52 is accommodated between the second frame 46 and the third frame 48, A ring-shaped third airbag 54 is accommodated in the third frame 48.

  In the polishing process of the present embodiment, the polishing pad 42 is brought into contact with the grinding surface of the wafer 11 while supplying the slurry via the slurry supply paths 39 and 49, and the chuck table 20 is moved in the direction of arrow a. By rotating the wafer 11 and the polishing pad 42 relatively at different speeds in the b direction, the grinding surface of the wafer 11 is ground to remove grinding distortion.

  At the time of this polishing, the first to third airbags 50, 52, 54, which are independent of each other in a ring shape, are disposed on the back surface of the polishing pad 42. Since polishing can be performed while appropriately controlling the contact pressure, a flat polished surface can be obtained.

  That is, since the airbags 50, 52, and 54 are independently provided, a predetermined pressure can be applied to a predetermined position of the polishing pad 42, and the polishing amount can be finely adjusted. In this embodiment, the polishing amount is 2 to 3 μm.

  After performing the back surface polishing process, the wafer 11 is selectively etched from the back surface 11b of the wafer 11, and as shown in FIG. 10, an embedded copper electrode 21 is projected from the back surface 11b of the wafer 11 to form a through electrode. carry out. This etching step is preferably performed by plasma etching, for example.

  After performing the etching process, as shown in FIG. 11, an insulating film coating process for coating the back surface 11b of the wafer 11 with the insulating film 29 is performed. By this insulating film coating step, the insulating film 29 is coated not only on the back surface 11 b of the wafer 11 but also on the tip surface of the through electrode 21.

  After performing the insulating film coating step, the portion of the through electrode 21 protruding from the back surface 11 b of the wafer 11 is removed to expose the through electrode 21 from the insulating film 29 and finish the head of the through electrode 21 on the same surface as the insulating film 29. Perform the process.

  In the present embodiment, this finishing step is performed by a chemical mechanical polishing method, so-called CMP (Chemical Mechanical Polishing). CMP is performed by supplying a polishing liquid (slurry) between the polishing pad and the object to be polished and sliding the polishing pad and the object to be rotated while rotating each other. A non-woven fabric is generally used as the polishing pad, and the surface of the object to be polished is polished with the polishing pad while supplying a polishing liquid (slurry) containing floating abrasive grains such as silica.

  In the present embodiment, the polishing film (slurry) is supplied while the polishing pad is brought into contact with the insulating film 29 and the wafer 11 and the polishing pad are slid relative to each other so that the insulating film covered with the through electrode 21 is provided. 29 and the protruding portion of the through electrode 21 are selectively polished to expose the through electrode 21 from the insulating film 29 and finish the head of the through electrode 21 on the same plane as the insulating film 29 as shown in FIG.

  After performing the finishing process by CMP, as shown in FIG. 13, a bump disposing process for disposing the bump 21 on the head of the through electrode 21 is performed. The bump 31 is made of, for example, solder, and the bump 31 made of solder is joined to the head of the through electrode 21.

  After the bump placement step, as shown in FIG. 14, the dicing tape T is adhered to the back surface 11b of the wafer 11, the carrier plate 25 is removed from the front surface 11a of the wafer 11, and the wafer 11 is transferred to the dicing tape T. Perform the transfer process. The outer peripheral portion of the dicing tape T is attached to the annular frame F. As a result, the wafer 11 is supported by the annular frame F via the dicing tape T.

  In this form, the wafer 11 is sucked and held via a dicing tape T on a chuck table of a cutting apparatus (not shown), and the wafer 11 is cut by the cutting blade along the planned dividing line 13 until reaching the dicing tape T. Are divided into individual devices 15. Each device 15 includes a plurality of through electrodes 21 having bumps 23 and 31 bonded to both ends.

  According to the wafer processing method of the above-described embodiment, since the airbag structure that can apply a predetermined pressure to a predetermined portion as a polishing pad used when polishing the back surface of the wafer is adopted, the amount of polishing can be finely adjusted and flattened. A polished surface can be obtained.

11 Semiconductor Wafer 11e Chamfer 13 Divided Line 15 Device 18 Cutting Blade 21 Embedded Copper Electrode (Penetration Electrode)
22 IR camera 23, 31 Bump 25 Carrier plate 29 Insulating film 30 Grinding wheel 34 Grinding wheel 36 Polishing unit 40 Polishing wheel 42 Polishing pad 50 First airbag 52 Second airbag 54 Third airbag T Dicing tape F Annular frame

Claims (1)

A device is formed in each region partitioned by a plurality of division lines formed in a lattice pattern on the surface, and a plurality of embedded electrodes extending from each device to a depth greater than the finished thickness of the wafer are embedded. A wafer processing method for dividing a wafer having a chamfered portion on the outer peripheral edge into individual devices,
A chamfered portion removing step in which a cutting blade is positioned on the outer peripheral edge of the wafer and the wafer is cut into a circle beyond the finish thickness from the surface side, or the wafer is completely cut into a circle from the back side to remove the chamfered portion;
Before or after performing the chamfered portion removing step, a carrier plate disposing step of disposing a carrier plate via a resin on the surface of the wafer;
After performing the carrier plate placement step, embedded electrode detection step of detecting the depth of the tip of the plurality of embedded electrodes from the back surface of the wafer;
After performing the embedded electrode detection step, a back surface grinding step of grinding and thinning the back surface of the wafer to such an extent that the embedded electrode is not exposed on the back surface;
After carrying out the back surface grinding step, a polishing pad in which a plurality of independent airbags are arranged in a ring shape is brought into contact with the back surface of the wafer, and slurry is supplied while appropriately controlling the pressure of each air bag to embed it. A polishing step of polishing the back surface of the wafer to such an extent that the electrode is not exposed on the back surface;
After performing the polishing step, etching the wafer from the back surface of the wafer, the etching step to project the embedded electrode from the back surface of the wafer to a through electrode, and
After performing the etching step, an insulating film coating step of coating an insulating film on the back surface of the wafer;
After performing the insulating film coating step, the through electrode protruding from the back surface of the wafer is removed and exposed from the insulating film, and the finishing step of finishing the head of the through electrode on the same surface as the insulating film;
After performing the finishing step, a bump disposing step of disposing a bump on the head of each through electrode;
After carrying out the bump arranging step, a dicing tape is attached to the back surface of the wafer and the carrier plate is removed from the front surface of the wafer, and a transferring step for transferring the wafer to the dicing tape;
A division step of dividing the wafer into individual devices after performing the transfer step;
A method for processing a wafer, comprising:

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