JP2014042209A - Distortion compensation device, distortion compensation method, distortion compensation program, transmitter and 1-bit audio device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve a signal characteristic of an analog signal represented by pulses.SOLUTION: A distortion compensation device 50 performs distortion compensation on an analog signal represented by a 1-bit pulse train output from a ΔΣ modulator 25. As to the signal represented by the 1-bit pulse train, a pulse rise waveform has a first distortion component relative to an ideal pulse rise waveform, and a pulse fall waveform has a second distortion component relative to an ideal pulse fall waveform. The distortion compensation device 50 outputs a distortion compensation signal that can make the first distortion component and the second distortion component substantially axisymmetric about a time axis when added to the analog signal represented by the 1-bit pulse train.

Description

  The present invention relates to a distortion compensation apparatus, a distortion compensation method, a distortion compensation program, a transmitter, and a 1-bit audio apparatus.

  As a technique for generating a 1-bit pulse train (1 bit plus train) representing an analog waveform, for example, there is ΔΣ modulation (Delta Sigma Modulation) (see Non-Patent Document 1).

  ΔΣ modulation is a type of oversampling modulation. The ΔΣ modulator includes a loop filter and a quantizer. The quantizer can output a 1-bit pulse train as a quantized signal.

  The 1-bit pulse train output from the ΔΣ modulator simply passes through the analog filter and becomes the original analog waveform. In other words, the 1-bit pulse train output from the ΔΣ modulator is a digital signal, but represents an analog waveform, and has both a digital signal property and an analog signal property.

Takao Wabo, Akira Yasuda (original author Richard Schreier, Gabor C. Temes) Introduction to ΔΣ analog / digital converters (Understanding Delta-Sigma Data Converters), Maruzen Co., Ltd., 2007, pp1-17 Joon Hyung Kim, Sung Jun Lee, Jae Ho Jung, and Chul Soon Park, "60% High-Efficiency 3G LTE Power Amplifier with Three-level Delta Sigma Modulation Assisted By Dual Supply Injection", Microwave Symposium Digest (MTT), 2011 IEEE MTT-S International, June 2011 Woo-Young Kim, J. Rode, A. Scuderi, Hyuk-Su Son, Chul Soon Park, and Peter. M. Asbeck, "An Efficient Voltage-Mode Class-D Power Amplifier for Digital Transmitters with Dlta-Sigma Modulation", Microwave Symposium Digest (MTT), 2011 IEEE MTT-S International, June 2011

  In Non-Patent Documents 2 and 3, the adjacent channel leakage power ratio (ACLR) of the signal output from the ΔΣ modulator was 30 [dB] and 43 [dB], respectively. Have been described.

  Here, in the case of an analog waveform, it is often required to reduce the adjacent channel leakage power (Adjacent Channel Leakage Power). Adjacent channel leakage power refers to power that leaks out of the used frequency band. If the adjacent channel leakage power is small, the ACLR becomes high.

As described above, the 1-bit pulse train output from the ΔΣ modulator is a digital signal, but also represents an analog waveform.
Therefore, it is desirable that the adjacent channel leakage power is small for the 1-bit pulse train output from the ΔΣ modulator, in other words, the ACLR is high.

However, Non-Patent Documents 2 and 3 do not describe the reason why ACLR is so low.
The inventor made a hypothesis that the pulse waveform has an influence on the ACLR, and performed a numerical simulation. As a result, it was confirmed that the hypothesis was correct, that is, the pulse waveform had an influence on ACLR.

  The present invention is based on the novel finding that the pulse waveform affects the signal characteristics of analog signals such as ACLR. An object of the present invention is to improve the signal characteristics of an analog signal represented by a pulse.

Until now, the pulse waveform and the signal characteristics as an analog signal represented by the pulse waveform have not been considered. In general, it is important for a digital signal to express High and Low. Therefore, it is important that the pulse as a digital signal is stable in the vicinity of the center of the pulse in the time axis direction, and the rise and fall of the pulse are not a problem.
However, the present inventor has considered that in the case of a pulse that also has characteristics as an analog signal, the rising and falling waveforms of the pulse may be important factors that affect the signal characteristics.
Therefore, the inventor paid attention to the relationship between the pulse waveform and the performance deterioration, and clarified the relationship by simulation. As a result, it was discovered that the asymmetry between the rising waveform and the falling waveform is the cause of signal characteristic degradation as an analog signal.

That is, when the input signal is converted into a 1-bit pulse train representing an analog signal, the 1-bit pulse train has a first distortion component with respect to an ideal pulse rise waveform, and the pulse rise waveform The falling waveform has a second distortion component with respect to the ideal pulse falling waveform.
Then, based on the first distortion component and the second distortion component, the component affecting the frequency band of the signal is suppressed and asymptotically made substantially symmetrical with respect to the time axis. Thus, it has been found that signal characteristic deterioration can be prevented.
The present inventor has completed the present invention based on the above findings.

(1) That is, the present invention is a distortion compensation device that performs distortion compensation of a signal represented by a 1-bit pulse train, and the signal represented by the 1-bit pulse train has an ideal pulse rise waveform. On the other hand, it has a first distortion component, and the falling waveform of the pulse has a second distortion component with respect to an ideal pulse falling waveform, and is added to the signal expressed by the 1-bit pulse train. Thus, a distortion compensation signal capable of making the first distortion component and the second distortion component substantially line-symmetric with respect to the time axis is output.

  According to the distortion compensation apparatus configured as described above, the distortion compensation signal is added to the signal represented by a 1-bit pulse train in which the rising waveform and falling waveform of the pulse are substantially asymmetric with respect to the time axis. can do. Thereby, the first distortion component and the second distortion component can be made asymptotically substantially symmetric with respect to the time axis, and distortion compensation can be suitably performed. As a result, signal characteristic deterioration can be suppressed.

(2) In the distortion compensation apparatus, the first distortion component and the second distortion component reduce line symmetry with respect to a time axis between the first distortion component and the second distortion component. When an asymmetric component is included, it is preferable that a signal generation unit that generates the distortion compensation signal based on the asymmetric component is provided.
In this case, the distortion compensation signal can be effectively compensated by making the distortion compensation signal a signal capable of suppressing the asymmetric component.

(3) The distortion compensation signal is preferably a 1-bit pulse train.
In this case, since the distortion compensation signal can be generated by digital processing, it is possible to generate a distortion compensation signal with high accuracy capable of performing distortion compensation with high accuracy, and effectively suppressing signal characteristic deterioration. Can do.

(4) The distortion compensation apparatus further includes a supply unit that supplies the asymmetric component as a digital signal to the signal generation unit, and the signal generation unit performs ΔΣ modulation on the supplied asymmetric component, and a 1-bit pulse train. It is preferable to provide a modulator that generates the expressed asymmetric component as the distortion compensation signal.
In this case, the supply unit supplies the asymmetric component as a digital signal to the signal generation unit, and the modulator performs ΔΣ modulation on the asymmetric component of the digital signal to generate a distortion compensation signal. A highly accurate distortion compensation signal corresponding to the signal represented by the pulse train can be generated by digital processing.

(5) When the distortion compensation apparatus further includes a storage unit that stores information indicating the asymmetric component as a digital signal, the supply unit stores the information stored in the storage unit. By referring to the information, the asymmetric component to be supplied to the signal generation unit may be acquired.

(6) In the distortion compensation apparatus, the signal generation unit is provided in a preceding stage of the modulator and is expressed by a 1-bit pulse train by an amplifier that amplifies the asymmetric component and outputs the amplified asymmetric component to the modulator. An attenuator that attenuates the asymmetric component with an attenuation factor corresponding to the amplification factor of the amplifier may be provided.
In this case, the asymmetric component before the 1-bit pulse train is amplified by the amplifier, and after the asymmetric component is converted into the 1-bit pulse train by the modulator, the asymmetric component expressed by the 1-bit pulse train is attenuated by the attenuator. The distortion component added to the asymmetric component at the time of conversion can be relatively suppressed. As a result, an asymmetric component in which unnecessary distortion components are suppressed can be obtained, and a more accurate distortion compensation signal can be generated.

(7) It is preferable to further include a filter provided before the modulator and outputting a bandwidth component necessary for distortion compensation to the modulator from among the asymmetric components.
In this case, by performing band limitation so that the asymmetric component has a bandwidth necessary for distortion compensation, the asymmetric component and the signal to be compensated for distortion can be made a signal having the same bandwidth. it can. As a result, it is possible to perform modulation of the asymmetric component under substantially the same conditions as the signal to be subjected to distortion compensation, and to ensure sufficient accuracy for performing distortion compensation.

(8) The distortion compensation apparatus may further include an extraction unit that extracts an asymmetric component from the signal represented by the 1-bit pulse train to which the distortion compensation signal is added, and the supply unit is extracted by the extraction unit. It is preferable to update the asymmetric component to be supplied to the signal generator based on the asymmetric component.
In this case, since the asymmetric component included in the signal expressed by the 1-bit pulse train after distortion compensation can be reflected in the asymmetric component to be supplied to the signal generation unit, the signal expressed by the current 1-bit pulse train is added. A distortion compensation signal with high accuracy can be generated.

(9) The distortion compensation signal based on the asymmetric component needs to be added to the asymmetric component included in the rising waveform and falling waveform of the pulse in the signal. Therefore, it is preferable that the supply unit supplies the asymmetric component according to a change in the pulse waveform of the signal expressed by the 1-bit pulse train. In this case, a distortion compensation signal is generated at an appropriate timing, and the 1-bit pulse train is generated. It can be added to the represented signal.

(10) The distortion compensation signal based on the asymmetric component needs to be added to the asymmetric component included in the rising waveform and falling waveform of the pulse in the signal expressed by the 1-bit pulse train.
On the other hand, since a period for generating the distortion compensation signal is required, there is a possibility that a delay occurs with respect to the signal expressed by the 1-bit pulse train.
For this reason, it is preferable to further include a delay processing unit for eliminating a delay generated in the distortion compensation signal added to the signal expressed by the 1-bit pulse train.

(11) Further, it is preferable that the signal expressed by the 1-bit pulse train is an output by a bandpass ΔΣ modulator.

(12) The present invention is a distortion compensation method for performing distortion compensation of a signal expressed by a 1-bit pulse train, and the signal expressed by the 1-bit pulse train has a pulse rising waveform that is ideal for a pulse rising waveform. The first distortion component has a second distortion component with respect to an ideal pulse falling waveform, and the first distortion component and the second distortion component have a first distortion component. An addition step of adding a distortion compensation signal that can be substantially line symmetric with respect to the time axis as a 1-bit pulse train to a signal expressed by the 1-bit pulse train is included.

(13) The present invention is a distortion compensation program for performing distortion compensation of a signal expressed by a 1-bit pulse train. The signal expressed by the 1-bit pulse train has a pulse rising waveform that is ideal for a pulse rising waveform. The first distortion component and the falling waveform of the pulse has a second distortion component with respect to an ideal pulse falling waveform, and the computer has the first distortion component and the second distortion component. An addition step of adding a distortion compensation signal capable of making the distortion component substantially line symmetric with respect to the time axis as a 1-bit pulse train to a signal expressed by the 1-bit pulse train is executed.

(14) (15) Moreover, the transmitter of this invention is provided with the transmission part which transmits the signal expressed with 1 bit pulse train, and the distortion compensation apparatus in any one of said (1)-(11). It is characterized by that.
The 1-bit audio apparatus of the present invention includes a signal output unit that outputs an audio signal expressed by a 1-bit pulse train, and the distortion compensation apparatus according to any one of the above (1) to (11). It is said.

  According to the transmitter and the 1-bit audio device configured as described above, it is possible to accurately perform distortion compensation of an output signal, and it is possible to suppress signal characteristic deterioration.

It is a block diagram of a system that outputs an RF signal expressed by a 1-bit pulse train. It is a block diagram of a ΔΣ modulator. This is a primary low-pass type ΔΣ modulator. This is a secondary band-pass ΔΣ modulator obtained by converting from a primary low-pass ΔΣ modulator. It is a block diagram of the apparatus for simulation. It is a wave form diagram of a symmetrical waveform. It is a wave form diagram of an asymmetrical waveform. It is explanatory drawing of a simulation parameter. It is a power spectrum with a symmetrical waveform. It is a power spectrum of an asymmetric waveform. It is a figure which shows a measurement result. It is the graph which showed an example of the relationship between the electric power of an output signal with respect to the electric power of the input signal input into a delta-sigma modulator, and adjacent channel leakage power. It is a block diagram of the apparatus used for the verification test regarding ACLR which employ | adopted feedforward type distortion compensation. It is a block diagram which shows the distortion compensation apparatus which concerns on 1st Embodiment. It is a figure which shows an example of the pulse waveform of 1 bit pulse train expressing the analog signal which the delta-sigma modulator 25 outputs, (a) is an eye pattern of the pulse waveform containing an asymmetric component, (b) is (a). (C) is a pulse waveform obtained by removing an asymmetric component from the pulse waveform shown in (b), and (d) is an asymmetric component f extracted from the pulse waveform shown in (b). It is a figure which shows _Asym (t). And the inverted signal of the distortion compensating the asymmetric component _{f dist} (t) by the signal generator is a diagram showing the relationship between the asymmetrical component is added to the inverted signal _{f'Asym (t), (a} ) is strain An inversion signal of the compensation asymmetric component f _dist (t) and an RF signal expressed by a 1-bit pulse train output from the ΔΣ modulator 25 are shown. (B) shows the state when the inverted signal of the distortion compensation asymmetric component _fdist (t) is amplified, and (c) shows the state when the inverted signal of the distortion compensation asymmetric component _fdist (t) is attenuated. Show. It is a graph which shows the signal waveform of the time domain when RF signal is output by the system shown in FIG. 14, (a) is the signal waveform of RF signal before distortion compensation, (b) is the signal waveform of distortion compensation signal, (C) shows the signal waveform of the RF signal after distortion compensation. It is a figure which shows the power spectrum of RF signal before distortion compensation shown in FIG. 17, and RF signal after distortion compensation. It is a block diagram which shows the distortion compensation apparatus which concerns on 2nd Embodiment. It is a block diagram which shows the 1-bit audio apparatus provided with the distortion compensation apparatus of this embodiment.

Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.
The distortion compensation apparatus according to the present embodiment performs distortion compensation on a signal expressed by a 1-bit pulse train. First, a system that outputs a signal expressed by a 1-bit pulse train and an asymmetric component included in the signal expressed by a 1-bit pulse train will be described.

[1. About the system]
[1.1 Overall system configuration]
FIG. 1 is a block diagram of a system that outputs an RF signal expressed by a 1-bit pulse train. The system 1 includes a digital signal processing unit 21 including a signal conversion device 70 and an analog filter 32.

  The digital signal processing unit 21 outputs a digital signal (1-bit pulse train) that represents an RF (Radio Frequency) signal that is an analog signal. The RF signal is a signal to be radiated to the space as a radio wave, for example, an RF signal for mobile communication and an RF signal for broadcasting services such as television / radio.

The RF signal output from the digital signal processing unit 21 is given to an analog filter (bandpass filter or lowpass filter) 32. The analog signal expressed by the 1-bit pulse train includes noise components other than the RF signal. The noise component is removed by the analog filter.
The 1-bit pulse train simply passes through the analog filter 32 and becomes a pure analog signal.

  As described above, the digital signal processing unit 21 can substantially generate an RF signal by generating a 1-bit pulse train by digital signal processing. Therefore, if a 1-bit pulse train representing an RF signal is given to a circuit that processes the RF signal (for example, an RF signal receiver such as a wireless communication device or a television receiver), the circuit uses the 1-bit pulse train as an analog signal. Can be processed. In this case, the analog filter 32 may be provided in a circuit that processes the RF signal.

Whether the analog filter 32 is a band-pass filter or a low-pass filter is appropriately determined depending on the frequency of the RF signal.
Note that when the signal conversion device 70 performs signal conversion by band-pass ΔΣ modulation, a band-pass filter is used as the analog filter 32, and when signal conversion by the low-pass ΔΣ modulation is performed, the analog filter 32 A low pass filter is used.

  The signal transmission path 4 between the digital signal processing unit 21 and the analog filter 32 may be a signal wiring formed on a circuit board, or a transmission line such as an optical fiber or an electric cable. The signal transmission path 4 does not have to be a dedicated line for transmitting a 1-bit pulse train, and may be a communication network that performs packet communication such as the Internet. When a communication network that performs packet communication is used as the signal transmission path 4, the transmission side (digital signal processing unit 21 side) converts a 1-bit pulse string into a bit string, transmits it to the signal transmission path 4, and receives it on the reception side (analog filter). 32 side) may restore the received bit string to the original 1-bit pulse string.

The digital signal processing unit 21 can be regarded as a transmitter that transmits a 1-bit pulse train to the signal transmission path 4. In this case, the device having the analog filter 32 becomes an RF signal receiver.
Further, the entire system 1 may be the transmitter 1. For example, the transmitter 1 may be configured to amplify the signal output from the digital signal processing unit 21 with an amplifier and output the signal from an antenna. In this case, the analog filter 32 may be provided between the digital signal processing unit 21 and the antenna, or the antenna may function as the analog filter 32.

  The digital signal processing unit 21 includes a baseband unit 23 that outputs a baseband signal (IQ signal) that is a transmission signal, a modulator (orthogonal modulator) 24a that modulates the baseband signal, a processing unit 24b, and a signal conversion And a device (signal conversion unit) 70.

The baseband unit 23 outputs IQ baseband signals (I signal and Q signal) as digital data.
The modulator 24a converts the IQ baseband signal into an intermediate frequency signal. The modulator 24a is configured as a digital quadrature modulator that performs quadrature modulation by digital signal processing. Therefore, a signal (digital IF signal) in a digital signal format expressed by multi-bit digital data (discrete values) is output from the quadrature modulator 24a.
Note that the modulator 24a that generates the modulated wave is not limited to the quadrature modulator, and may be a modulator of another type for generating the modulated wave.

  The IF signal output from the modulator 24 a is given to the processing unit 24 b in the digital signal processing unit 21. The processing unit 24b performs various digital signal processing such as DPD (Digital Pre-distortion), CFR (Crest Factor Reduction), and DUC (Digital Up Conversion) on the IF signal. The processing unit 24b outputs an RF signal generated by digital signal processing.

  The signal conversion unit 70 only needs to be provided with the digital RF signal generated by the above-described various digital processes, and the various digital processes performed by the processing unit 24b are performed before the quadrature modulation by the quadrature modulator 24a. You may go.

  The digital RF signal output from the processing unit 24 b is given to the signal conversion unit 70. The signal conversion unit 70 of the present embodiment includes a bandpass type ΔΣ modulator (converter) 25. Note that the converter 25 may be a low-pass type ΔΣ modulator or a PWM modulator.

The ΔΣ modulator 25 performs ΔΣ modulation on the input RF signal and outputs a 1-bit quantized signal (1-bit pulse train). The 1-bit pulse train output from the ΔΣ modulator 25 is a digital signal, but represents an analog RF signal.
The 1-bit pulse train output from the ΔΣ modulator 25 is output from the digital signal processing unit 21 to the signal transmission path 4 as an output signal of the digital signal processing unit 21.

[1.2 ΔΣ modulation]
As shown in FIG. 2, the ΔΣ modulator 25 includes a loop filter 27 and a quantizer 28 (see Non-Patent Document 1).
In the ΔΣ modulator 25 shown in FIG. 2, an input U (RF signal in the present embodiment) U is given to the loop filter 27. The output Y of the loop filter 27 is given to a quantizer (1 bit quantizer) 28. The output (quantized signal) V of the quantizer 28 is given as another input to the loop filter 27.

The characteristic of the delta-sigma modulator 25 can be represented by a signal transfer function (STF) and a noise transfer function (NTF; Noise Transfer Function).
That is, when the input of the ΔΣ modulator 25 is U, the output of the ΔΣ modulator 25 is V, and the quantization noise is E, the characteristics of the ΔΣ modulator 25 are expressed in the z region as follows. is there.

  Therefore, given the desired NTF and STF, the transfer function of the loop filter 27 can be obtained.

FIG. 3 shows a block diagram of the linear z-domain model of the first-order low-pass ΔΣ modulator 125. Reference numeral 127 represents a loop filter portion, and reference numeral 128 represents a quantizer. When the input to the ΔΣ modulator 125 is U (z), the output is V (z), and the quantization noise is E (z), the characteristics of the ΔΣ modulator 125 are expressed in the z region. It is as follows.
V (z) = U (z) + (1-z ⁻¹ ) E (z)

That is, in the first-order low-pass ΔΣ modulator 125 shown in FIG. 3, the signal transfer function STF (z) = 1 and the noise transfer function NTF (z) = 1−z ⁻¹ .

According to Non-Patent Document 1, a low pass type ΔΣ modulator can be converted into a band pass type ΔΣ modulator by performing the following conversion on the low pass type ΔΣ modulator.

By replacing z in the z region model of the low-pass ΔΣ modulator 125 with z ′ = − z ² in accordance with the above conversion formula, a band-pass ΔΣ modulator can be obtained.

  Using the above conversion equation, an n-order low-pass ΔΣ modulator (n is an integer of 1 or more) can be converted to a 2n-order band-pass Σ modulator.

The inventor has found a conversion formula for obtaining a bandpass type ΔΣ modulator having a desired frequency f ₀ (θ = θ ₀ ) as a center frequency f ₀ from a low pass type ΔΣ modulator. The conversion formula is as shown in the following formula (3), for example.

here,
θ ₀ = 2π × (f ₀ / fs) fs is the sampling frequency of the ΔΣ modulator.

The conversion formula of Formula (2) relates to a specific frequency θ ₀ = π / 2, but the conversion formula of Formula (3) is generalized to an arbitrary frequency (θ ₀ ).

FIG. 4 shows a second-order band-pass ΔΣ modulator 25 obtained by converting the first-order low-pass ΔΣ modulator 125 shown in FIG. 3 using the conversion equation (3).
In the conversion from FIG. 3 to FIG. 4, for the convenience of notation, the following conversion equation with a = cos θ ₀ in Equation (3) was used.

  The conversion to the band-pass type ΔΣ modulator can be applied to other high-order low-pass type ΔΣ modulators (for example, the CIFB structure, the CRFF structure, the CIFF structure, etc. described in Non-Patent Document 1).

[2. Relationship between signal characteristics and 1-bit pulse train waveform]
FIG. 5 shows an apparatus configuration used for examining the relationship between the signal characteristic of the RF signal expressed by the 1-bit pulse train output from the ΔΣ modulator (converter) 25 and the analog waveform of the 1-bit pulse train. ing.
The actual band-pass ΔΣ modulator 25 shown in FIG. 1 has at least a part of hardware such as a flip-flop in order to output a quantized signal as a pulse.

However, as the ΔΣ modulator of FIG. 5, a band-pass type ΔΣ modulator 25a configured by software is used. The quantized signal d _k output from the bandpass ΔΣ modulator 25a configured by software is supplied to a pulse pattern generator (PPG) 25b. The pulse pattern generator 25b can output a 1-bit pulse train S _out (t) distorted into an arbitrary shape with respect to an ideal waveform (perfect rectangular wave) based on the quantized signal d _k . The distorted 1-bit pulse train S _out (t) corresponds to a 1-bit pulse train output from the actual bandpass type ΔΣ modulator 25.

Further, the output circuit of the pulse pattern generator 25b has sufficient high-speed response performance so that a waveform that can be regarded as an ideal waveform can be generated. Therefore, the pulse pattern generator 25b can also output a 1-bit pulse train S _out (t) having an ideal waveform.
As described above, an ideal (pulse) waveform is a waveform when forming a complete rectangular wave, and an ideal pulse rising waveform is a rising waveform when forming a complete rectangular wave. It refers to substantially the same waveform, and an ideal pulse falling waveform refers to a waveform that is substantially the same as the falling waveform when forming a complete rectangular wave.

  The signal output from the pulse pattern generator 25b passes through the analog bandpass filter 32 and is provided to the measuring device 25c.

The output S _out (t) of the pulse pattern generator 25b is defined as the following formula (A).

S _ideal , which is the first term in equation (A), represents the quantized signal d _k (= ± 1) with an ideal rectangular wave, and is defined as equation (B). The quantized signal d _k takes +1 as a value corresponding to the high level of the pulse, and takes −1 as a value corresponding to the low level of the pulse. U (t) is a unit step function.

The second term of the equation (A) indicates the difference between S _out (t) corresponding to the actual waveform and the ideal waveform S _ideal . F (t−kt) in the second term is defined as the following formula (C). Sign is a sign function.

In formula (C), (C-1 ) , the sign of the value that indicates the difference between the value d _k-1 value d _k and temporally previous quantized signal is quantized signal is plus This is the case where the quantized signal d _k is the rising _edge of a pulse.
(C-2), if the sign of the value that indicates the difference between the value d _k-1 value d _k and temporally previous quantized signal is quantized signal is negative, i.e., quantization This is a case where the signal d _k is the falling edge of the pulse.
(C-3) is a case where a value indicating a difference between a quantized signal value d _k and a temporally previous quantized signal value d _k−1 is zero, that is, a pulse value. This is the case when there is no change.

f _rise (t) and f _fall (t) are a rising waveform and a falling waveform, respectively. The rising waveform f _rise (t) and the falling waveform f _fall (t) are set to arbitrary shapes for simulation.

Furthermore, f _rise (t) and f _fall (t) can be decomposed into a symmetric component f _sym (t) and an asymmetric component f _Asym (t), as shown in equation (D).
The asymmetric component f _Asym (t) can be obtained from the following formula (E) from the formula (D).

Equation (E) shows that the asymmetric component f _Asym (t) disappears when the rising waveform f _rise (t) and the falling waveform f _fall (t) have the relationship of the following equation F). Show.

When Expression (F) is satisfied, the rising waveform f _rise (t) and the falling waveform f _fall (t) are axisymmetric with respect to the time axis. That is, when the pulse waveform satisfying the formula (F) is represented by an eye pattern, the eye pattern is line symmetric with respect to the time axis.

FIG. 6 shows a pulse waveform (symmetric waveform) that satisfies the equation (F). FIG. _6A shows an eye pattern of a symmetric waveform S _out (t). This eye pattern is line-symmetric with respect to the time axis. It is assumed that the time axis is in the middle (0) between the low level (−1) and the high level (+1) of the pulse (the same applies hereinafter).
FIG. 6B shows a time axis waveform of the symmetric waveform S _out (t), FIG. 6C shows an ideal waveform S _Ideal (t) for the symmetric waveform, and FIG. ) _{Shows the} rising waveform f _rise (t) in the symmetric waveform and the symmetric component f _sym (t) in the falling waveform f _fall (t), and FIG. _6E shows the rising waveform f _rise (t) in the symmetric waveform. And an asymmetric component f _Asym (t) in the falling waveform f _fall (t).

As shown in FIG. 6, the symmetrical waveform is distorted with respect to the ideal waveform S _Ideal (t) and has a distortion component. Specifically, the pulse rising waveform f _rise (t) has a distortion component (first distortion component), and the pulse falling waveform f _fall (t) has a distortion component (second distortion component). .

When Expression (F) is satisfied, the distortion component has a symmetric component f _sym (t) (see FIG. _6D ), but does not have an asymmetric component f _Asym (t) (FIG. 6 ( e)).

In the symmetrical waveform, when the rising waveform f _rise (t) and the falling waveform f _fall (t) are overlapped with the rising start time and the falling start time matched on the time axis like an eye pattern, Since the rising waveform f _rise (t) and the falling waveform f _fall (t) have the same transition time (rise time, fall time), they are symmetrical with respect to the time axis.
In other words, the distortion component (first distortion component) in the rising waveform f _rise (t) and the distortion component (second distortion component) in the falling waveform f _fall (t) are axisymmetric with respect to the time axis. The asymmetric component f _Asym (t) is zero.

FIG. 7 shows a pulse waveform (asymmetric waveform) that does not satisfy Formula (F). FIG. 7A shows an eye pattern of the asymmetric waveform S _out (t). This eye pattern is asymmetric with respect to the time axis. Specifically, the asymmetric waveform shown in FIG. 7 is a waveform in which the pulse fall time is longer than the pulse rise time.

7B shows a time axis waveform of the asymmetric waveform S _out (t), FIG. 6C shows an ideal waveform S _Ideal (t) for the symmetric waveform, and FIG. FIG. _6E shows the symmetric component f _sym (t) in the rising waveform f _rise (t) and the falling waveform f _fall (t) in the asymmetric waveform, and FIG. _6E shows the rising waveform f _rise (t) in the asymmetric waveform and the rising waveform f _rise (t). The asymmetric component f _Asym (t) in the falling waveform f _fall (t) is shown.

As shown in FIG. 7, the asymmetric waveform is also distorted with respect to the ideal waveform S _Ideal (t) and has a distortion component. Specifically, the pulse rising waveform f _rise (t) has a distortion component (first distortion component), and the pulse falling waveform f _fall (t) has a distortion component (second distortion component). .

When Expression (F) is not satisfied, the distortion component has an asymmetric component f _Asym (t) together with a symmetric component f _sym (t) (see FIGS. _{7D and 7E} ).

[3. _{Effect of} Asymmetric Component f _Asym (t) on Signal Characteristics]
In order to investigate the influence of the pulse waveform on the signal characteristics (ACLR) as an analog signal, a simulation was performed. The results are shown below.
In this simulation, a bandpass type ΔΣ modulator having a 6th-order CRFB structure was used as the ΔΣ modulator 25. The test signal input to the bandpass ΔΣ modulator 25 is an LTE (Long Term Evolution) RF signal, which has a carrier frequency of 800 MHz, a band of 5 MHz, and four carriers. That is, the entire band as the RF signal is 20 MHz.

  In the simulation, as a pulse waveform, an ideal waveform “Ideal” whose transition time (rise time α and fall time β) is zero, a waveform “exp (x)” whose rising waveform and falling waveform are exponential functions, and a rising waveform The waveform “tanh (x)” whose falling waveform is a hyperbolic tangent function was used.

  For exp (x) and tanh (x), a rising waveform and a falling waveform are symmetrical with respect to the time axis (Symm.), and an asymmetric waveform with non-linear symmetry with respect to the time axis. (Asymm.) Was used.

For waveforms that are line symmetric, the rise time α and the fall time β are the same (α = β), and α = β = 0.2 and α = β = 0.4. A simulation was performed.
For non-axisymmetric waveforms, the rise time α and fall time β are made different (α ≠ β), and α = 0.2, β = 0.4, and α = 0.4, β = Simulations were performed for two cases of 0.2.

In FIG. 8, the definitions of the simulation parameters (waveforms and transition times α, β) are shown in FIG. In FIG. 8, the rising waveform and falling waveform of exp (x) are indicated by solid lines, and the rising waveform and falling waveform of tanh (x) are indicated by dotted lines.
The transition times α and β are expressed as a ratio to a unit interval (UI). The unit section is a section of one pulse corresponding to one quantized signal, and its length is 1 / fs.
The rise time is the time from the pulse low level (−1) to the high level (+1), and the fall time is the time from the pulse high level (+1) to the low level (−1). It is.

In the simulation results of Table 1, ACLR1 indicates the adjacent channel leakage power ratio, and ACLR2 indicates the next adjacent channel leakage power ratio. ACLR1 ′ and ACLR2 ′ are the adjacent channel leakage power ratio and the next adjacent channel leakage power ratio when the asymmetric component f _Asym (t) is removed from the asymmetric waveform (Asymm.), _Respectively .

According to the simulation results in Table 1, ACLR1 and ACRL2 similar to the ideal waveform were obtained for exp (x) and tanh (x) which are not ideal waveforms for the symmetric waveform (Symm.). Further, in the symmetric waveform (Symm.), The difference between the transition times α and β had no effect on ACLR1 and ACRL2.
Therefore, it is considered that the lengths of the transition times α and β are not important for the signal characteristics ACLR1, 2). That is, even if the pulse waveform is distorted from the ideal waveform, as long as it is a symmetrical waveform, ACLR1 and ACRL2 do not decrease. Therefore, it is considered that the distortion itself in the pulse waveform does not adversely affect the signal characteristics. .

On the other hand, in the case of the asymmetric waveform (Asymm.), ACLR1 and ACLR2 were lower than in the case of the symmetric waveform (Symm.). However, when the asymmetric component f _Asym (t) was removed from each asymmetric waveform (Asymm.), ACLR1 ′ and ACLR2 ′ became the same as ACLR1 and ACLR2 of the symmetrical waveform (Symm.).
Therefore, it can be seen that the deterioration of ACLR1 and ACLR2 is caused by the asymmetric component f _Asym (t).

  9 shows a power spectrum when the pulse waveform “exp (x)” is a symmetric waveform (Symm.), And FIG. 10 shows a case where the pulse waveform “exp (x)” is an asymmetric waveform (Asymm.). Shows the power spectrum.

  FIG. 9A shows the power spectrum of a 1-bit pulse train Sout (t) with α = β = 0.2, and FIG. 9B shows a 1-bit pulse train Sout (t) with α = β = 0 (ideal waveform). The power spectrum is shown. According to FIG. 9, the power spectrum is almost the same both when α = β = 0.2 and when α = β = 0 (ideal waveform). That is, even when α = β = 0.2, no deterioration from α = β = 0 (ideal waveform) is observed.

  FIG. 10A shows the power spectrum of the pulse waveform “exp (x)” where α = 0.2 and β = 0.3, and FIG. 10B shows α = 0.2 and β = 0. 3 shows the power spectrum when the asymmetric component is removed from the pulse waveform “exp (x)” of .3.

  Before removing the asymmetric component (power spectrum in FIG. 10A), leakage power is recognized outside the RF signal band (790 MHz to 810 MHz). On the other hand, when the asymmetric component is removed (power spectrum in FIG. 10B), the leakage power outside the band is reduced, and the same power spectrum as in FIG. 9B is obtained.

For tahn (x), the same measurement results as in FIGS. 9 and 10 were obtained.
Further, when other waveforms other than exp (x) and tahn (x) were also confirmed, similar results were obtained.

According to the simulation result, good values can be obtained for ACLR1 and ACLR2 if the waveform is an ideal waveform that is a perfect rectangular wave. However, an attempt to generate a more complete rectangular wave increases the cost of the device. Further, the rectangular wave is not preferable because it has many harmonic components, and power consumption is also increased.
Therefore, it is preferable that the actual signal conversion unit 70 (ΔΣ modulator 25) can be configured to output a pulse waveform having a distortion component instead of an ideal waveform that is a perfect rectangular wave.

In this regard, according to the simulation results, even if the pulse waveform has a distortion component, the signal characteristics are not deteriorated if the pulse waveform is line symmetric with respect to the time axis, that is, if there is no asymmetric component.
Therefore, the signal conversion unit 70 (ΔΣ modulator 25) can be configured to output a pulse waveform having a distortion component. In this case, even if the pulse waveform output from the signal converter 70 (ΔΣ modulator 25) has a distortion component, the distortion components of the rising waveform and the falling waveform are substantially line-symmetric with respect to the time axis. In other words, in other words, if there is substantially no asymmetric component, it is possible to suppress the deterioration of signal characteristics.

  Note that that the distortion component is substantially line symmetric with respect to the time axis means that the distortion component does not need to be completely line symmetric. For example, it is sufficient that the distortion component has line symmetry so that ACLR (adjacent channel leakage power ratio) is 45 [dB] or more. More preferably, it is 46 [dB] or more, more preferably 48 [dB] or more, still more preferably 50 [dB] or more, still more preferably 55 [dB] or more. It is sufficient that the distortion component has line symmetry so that it is more preferably 60 [dB] or more.

  Further, it is not necessary to consider the symmetry of the distortion component by paying attention to individual pulses for the unit interval (UI), and it is sufficient to consider the distortion component average in a large number of unit intervals (UI).

  FIG. 11 shows the result of actual measurement of the 1-bit pulse train output from the ΔΣ modulator 25 of FIG. FIG. 11A shows an actually measured eye pattern, and FIG. 11B shows an actually measured power spectrum. The actually measured pulse waveform (eye pattern in FIG. 11A) contains an asymmetric component, and the ACLR was 46.1 [dB].

The trajectory of the eye pattern in FIG. 11A was digitized to extract a rising waveform f _rise (t) and a falling waveform f _fall (t). From the extracted rising waveform f _rise (t) and falling waveform f _fall (t), an asymmetric component f _Asym (t) was calculated based on the equation (E).
When the calculated asymmetric component f _Asym (t) was removed from the measured pulse waveform and the ACLR was recalculated, the ACLR was improved to 52.3 [dB].

[4. About distortion compensation device]
The inventor has studied and studied a method for suppressing the above-described asymmetric component f _Asym (t). Among them, the inventors have found that the asymmetric component described above is not intermodulation distortion caused by intersymbol interference of an analog waveform.

FIG. 12 is a graph showing an example of the relationship between the power of the output signal and the adjacent channel leakage power with respect to the power of the input signal input to the ΔΣ modulator 25.
In the figure, the horizontal axis indicates the input power of the ΔΣ modulator 25 and the vertical axis indicates the output power from the ΔΣ modulator 25.
As shown in the figure, the power of the output signal output from the ΔΣ modulator 25 increases as the power of the input signal increases, whereas the adjacent channel leakage power increases as the power of the input signal increases. Almost no increase.

In general, it is known that leakage power caused by intermodulation distortion is correlated with the power of an input signal. On the other hand, from the graph of FIG. 12, the adjacent channel leakage power by the ΔΣ modulator hardly shows any correlation with the power of the input signal.
From this, it can be said that the asymmetric component f _Asym (t) generated by ΔΣ modulation is not intermodulation distortion.

With intermodulation distortion, distortion compensation is performed by modeling distortion caused by a power series and feeding it back to an input signal.
However, the asymmetric component f _Asym (t) generated by ΔΣ modulation has no correlation with the power of the input signal, and the distortion compensation cannot be suitably performed by the feedback method.
Therefore, the present inventor paid attention to a feedforward technique as a technique for preferably compensating for the asymmetric component f _Asym (t) generated by ΔΣ modulation.

FIG. 13 is a configuration diagram of an apparatus used for a verification test related to the ACLR that employs feedforward distortion compensation. This apparatus shows a basic configuration for suppressing the asymmetric component f _Asym (t) generated by ΔΣ modulation by feedforward distortion compensation.
In the figure, an asymmetric component supply unit 40 uses an analog signal as a distortion compensation asymmetric component f _dist (t) for canceling out and removing the asymmetric component f _Asym (t) included in the 1-bit pulse train output from the ΔΣ modulator 25. It has the function to supply as. The distortion compensation asymmetric component f _dist (t) uses a calculation result obtained by previously calculating the asymmetric component f _Asym (t) included in the 1-bit pulse train.

The distortion compensating asymmetric component f _dist (t) supplied from the asymmetric component supply unit 40 is inverted by the inverting amplifier 41.

The inverted distortion compensation asymmetric component f _dist (t) is added by the adder 43 to the analog signal expressed by the 1-bit pulse train output from the bandpass filter 32 of the system 1.

As a result of performing the verification test on the ACLR using the apparatus having the configuration shown in FIG. 13, as described above, the asymmetric component f _Asym (t) included in the 1-bit pulse train expressing the analog signal can be suppressed, and the ACLR It has been confirmed that an analog RF signal with improved can be obtained.

As described above, the apparatus shown in FIG. 13 adds the distortion compensation asymmetric component f _dist (t) to the signal output from the system 1, so that the distortion component of the rising waveform f _rise (t) The distortion component of the waveform f _fall (t) can be made asymptotically substantially symmetrical with respect to the time axis. That is, the line symmetry between the distortion component of the rising waveform f _rise (t) and the distortion component of the falling waveform f _fall (t) can be increased, and the ACLR as an analog signal can be improved.
As described above, the asymmetric component f _Asym (t) included in the 1-bit pulse train can be preferably removed by feedforward type distortion compensation, and signal characteristic deterioration can be suppressed.

By the way, when the above-described system 1 is used to configure a transmitter that transmits an RF signal represented by a 1-bit pulse train as an analog signal, the analog characteristics of the transmitted RF signal are digital signal processing units that output the RF signal. 21.
If an extremely high-precision digital chip is used for the digital signal processing unit 21, the line symmetry of the distortion component included in the 1-bit pulse train can be maintained, and the analog characteristics of the RF signal can be appropriately maintained. There is.

  However, the required level of analog characteristics as a transmission signal is relatively high, and it is not preferable to use a high-performance digital chip capable of satisfying such a relatively high required level because the manufacturing cost of the apparatus increases. .

  On the other hand, as shown in FIG. 13, if distortion compensation (feedforward type distortion compensation) is performed on the RF signal expressed by the 1-bit pulse train output from the digital signal processing unit 21, the performance of the digital chip is greatly improved. Without depending on the analog characteristics of the RF signal, the analog characteristics of the RF signal can be improved.

On the other hand, the distortion compensation asymmetric component _fdist (t) added for distortion compensation to the RF signal represented by the 1-bit pulse train as the transmission signal must be an analog signal.
When the distortion compensation asymmetric component _fdist (t) is to be output as an analog signal, the carrier wave for generating the carrier wave for transmitting the distortion compensation asymmetric component _fdist (t) as an analog signal is modulated. For this reason, many analog devices such as a modulator are required, which raises the problem of cost increase and difficulty in increasing accuracy.

  In view of this, the present inventor has completed a distortion compensation device that can suppress deterioration of signal characteristics with high accuracy and low cost for an analog signal expressed by a 1-bit pulse train.

[4.1 Overall configuration of distortion compensation apparatus]
FIG. 14 is a block diagram illustrating the distortion compensation apparatus according to the first embodiment. FIG. 14 shows a case where the distortion compensation device 50 is provided in the subsequent stage of the ΔΣ modulator 25 (FIG. 1) of the system 1.

  As described above, the ΔΣ modulator 25 performs ΔΣ modulation on the digital RF signal supplied from the processing unit 24b to generate a 1-bit pulse train that represents the RF signal. In the 1-bit pulse train by the ΔΣ modulator 25, the band including the frequency band of the input RF signal is noise-shaped. In the analog signal represented by the 1-bit pulse train, in addition to the input RF signal, the quantization noise moved by the noise shape is present at a relatively high power ratio outside the noise-shaped quantization noise stop band. doing.

The ΔΣ modulator 25 is set so that the quantization noise stop band includes the frequency band of the RF signal input to the ΔΣ modulator 25 (signal band of the RF signal).
Note that the ΔΣ modulator 25 can be configured such that the quantization noise stop band (the center frequency of the bandpass ΔΣ modulator 25) can be changed according to the frequency band of the input RF signal.

  The ΔΣ modulator 25 can convert the value of z based on the above equation (3). That is, the ΔΣ modulator 25 can change the center frequency of the quantization noise stop band. In other words, the quantization noise stop band can be changed.

The distortion compensation device 50 adds the distortion component of the rising waveform f _rise (t) and the falling waveform f _fall (t) by adding to the RF signal expressed by the 1-bit pulse train output from the ΔΣ modulator 25. It has a function of outputting a distortion compensation signal capable of making the distortion component substantially line-symmetric as a 1-bit pulse train.

The distortion compensation apparatus 50 of this embodiment includes an asymmetric component supply unit 51 and a signal generation unit 52.
The signal generator 52 _converts the distortion component of the rising waveform f _rise (t) and the distortion component of the falling waveform f _fall (t) into an asymmetric component f _Asym (t) that reduces the line symmetry with respect to the time axis. Based on this, it has a function of generating a distortion compensation signal.
The distortion compensation signal is a signal that can suppress the asymmetric component f _Asym (t) included in the 1-bit pulse train output from the ΔΣ modulator 25. More specifically, the distortion compensation signal is obtained by inverting the distortion compensation asymmetric component f _dist (t) obtained by extracting the asymmetric component f _Asym (t) included in the 1-bit pulse train, and further inverting the inverted distortion compensation. The asymmetric component _fdist (t) for use is converted into a 1-bit pulse train.

The signal generation unit 52 outputs the generated distortion compensation signal to an adder 65 provided at the subsequent stage of the ΔΣ modulator 25.
Thereby, the distortion compensation signal is added to the analog signal expressed by a 1-bit pulse train. As described above, the distortion compensation device 50 according to the present embodiment is configured to perform feedforward distortion compensation.

The analog signal to which the distortion compensation signal is added is subjected to distortion compensation by suppressing the asymmetric component f _Asym (t) included in the band of the RF signal.
As a result, the RF signal represented by the 1-bit pulse train is substantially line-symmetric with respect to the time axis with respect to the distortion component of the rising waveform f _rise (t) and the distortion component of the falling waveform f _fall (t). Can be asymptotic.
Also, the RF component expressed by the 1-bit pulse train is obtained by making the distortion component of the rising waveform f _rise (t) and the distortion component of the falling waveform f _fall (t) asymptotically substantially symmetrical with respect to the time axis. Components that affect the frequency band of the signal can be suppressed, and signal characteristic deterioration as an analog signal is suppressed.

[4.2 Asymmetric component supply section]
The asymmetric component supply unit 51 supplies the distortion compensation asymmetric component f _dist (t) to the signal generation unit 52 as a digital signal. The distortion compensation asymmetric component f _dist (t) supplied by the asymmetric component supply unit 51 is stored in a LUT (Lock Up Table) stored in the LUT storage unit 53. The LUT stores information indicating the distortion compensation asymmetric component _fdist (t) as a digital signal.
The asymmetric component supply unit 51 refers to the LUT in the LUT storage unit 53 as necessary, and acquires the distortion compensation asymmetric component f _dist (t) to be supplied to the signal generation unit 52.
The asymmetric component supply unit 51 supplies the acquired distortion compensation asymmetric component f _dist (t) to the signal generation unit 52 as a digital signal.

The distortion compensation asymmetric component _fdist (t) stored in the LUT storage unit 53 measures the eye pattern of a 1-bit pulse train representing an analog signal output from the ΔΣ modulator 25, and converts it into a 1-bit pulse train extracted from the eye pattern. It is determined based on the asymmetric component f _Asym (t) included.
The asymmetric component f _Asym (t) can be extracted by applying the above-described formula (E) based on the eye pattern of the 1-bit pulse train measured by the ΔΣ modulator 25 measured in advance.
The asymmetric component f _Asym (t) extracted from the 1-bit pulse train is converted into digital data and then stored in the LUT of the LUT storage unit 53 as the distortion compensation asymmetric component f _dist (t).
That is, the distortion compensation asymmetric component f _dist (t) is obtained by converting the asymmetric component f _Asym (t) extracted from the measured eye pattern into digital data.

FIG. 15 is a diagram illustrating an example of a pulse waveform of a 1-bit pulse train expressing an analog signal output from the ΔΣ modulator 25. FIG. 15A is an eye pattern of a pulse waveform including an asymmetric component, and FIG. It is a figure which shows the rising and falling waveform of the pulse waveforms shown to (a).
In the pulse waveforms shown in FIGS. 15A and 15B, the falling time is longer than the rising time of the pulse, and the rising waveform and the falling waveform are asymmetric in the time axis direction. ing.

15C shows a pulse waveform obtained by removing the asymmetric component from the pulse waveform shown in FIG. 15B, and FIG. 15D shows an asymmetric component f _Asym (extracted from the pulse waveform shown in FIG. 15B. It is a figure which shows t).
The rising waveform and falling waveform of the pulse averaged based on the eye pattern are acquired. By applying the above equation (E) to the acquired waveform, the asymmetry shown in FIG. The component f _Asym (t) can be extracted.

Referring to FIG. 14, the asymmetric component supply unit 51 is given a 1-bit pulse train output from the ΔΣ modulator 25 via a branch path 54 connected to the subsequent stage of the ΔΣ modulator 25. Based on the given 1-bit pulse train, the asymmetric component supply unit 51 acquires the rise and fall timings of the pulses in the 1-bit pulse train.
The asymmetric component supply unit 51 supplies a distortion compensation asymmetric component f _dist (t) to the signal generation unit 52 in accordance with the rise and fall timings of the 1-bit pulse train output from the ΔΣ modulator 25. The signal generation unit 52 generates a distortion compensation signal in response to the supply of the distortion compensation asymmetric component f _dist (t).

The asymmetric component f _Asym (t) in the analog signal expressed by a 1-bit pulse train is included in the rising waveform and falling waveform of the pulse.
The distortion compensation signal is a signal for suppressing the asymmetric component f _Asym (t). Therefore, in order to perform distortion compensation with high accuracy, it is necessary to add the distortion compensation signal to the asymmetric component included in the rising waveform and falling waveform of the pulse in the 1-bit pulse train.

In this regard, in the present embodiment, the asymmetric component supply unit 51 supplies the distortion compensation asymmetric component _fdist (t) to the signal generation unit 52 in accordance with the rising and falling timings of the pulses of the 1-bit pulse train. The signal generation unit 52 can generate and output a distortion compensation signal in accordance with the rise and fall timing of the pulse in the signal.

As described above, the asymmetric component supply unit 51 supplies the distortion compensation asymmetric component f _dist (t) in accordance with the change in the pulse waveform of the 1-bit pulse train from the ΔΣ modulator 25, so that the distortion compensation signal can be obtained at an appropriate timing. Can be generated and added to the 1-bit pulse train from the ΔΣ modulator 25. As a result, distortion compensation can be performed effectively.

Incidentally, FIG. 7 (d) and, as shown in FIG. 15 (d), the asymmetric component _{f Asym} contained in the rising waveform (t), and the asymmetric component _{f Asym} contained in falling waveform (t), substantially It is the same component. For this reason, the asymmetric component supply unit 51 uses the same distortion compensation asymmetric component f _dist (t) for both the rising and falling timings of the pulse.

[4.3 Signal generation unit]
As described above, the signal generation unit 52 has a function of generating, as a distortion compensation signal, an inverted signal of the distortion compensation asymmetric component f _dist (t) expressed by a 1-bit pulse train.

As shown in FIG. 14, the signal generation unit 52 includes an inverting amplifier 55, a bandpass filter 56, an amplifier 57, and ΔΣ modulation to which the distortion compensation asymmetric component f _dist (t) is supplied from the asymmetric component supply unit 51. A device 58 and an ATT (attenuator) 59 are provided. The inverting amplifier 55, the band pass filter 56, the amplifier 57, and the ΔΣ modulator 58 are provided in the digital signal processing unit 21 that performs digital signal processing.

The inverting amplifier 55 inverts the distortion compensation asymmetric component f _dist (t) given as a digital signal. The inverting amplifier 55 gives an inverted signal obtained by inverting the distortion compensation asymmetric component _fdist (t) to the band-pass filter 56 connected to the subsequent stage.
The band-pass filter 56 passes the bandwidth component necessary for distortion compensation out of the inverted distortion compensation asymmetric component _fdist (t) and supplies the passed component to the amplifier 57 at the subsequent stage.

The necessary bandwidth is the bandwidth of the RF signal that is output from the ΔΣ modulator 25 and expressed as a 1-bit pulse train.
In the analog signal expressed by the 1-bit pulse train output from the ΔΣ modulator 25, only the bandwidth of the RF signal needs to be compensated for distortion.
In this regard, in the present embodiment, by providing the band-pass filter 56, it is possible to remove a component of a band that is not necessary for distortion compensation from the distortion compensation asymmetric component _fdist (t), thereby reducing the amount of subsequent processing. be able to.

The amplifier 57 amplifies an inverted signal (hereinafter also simply referred to as an inverted signal) of the distortion compensation asymmetric component f _dist (t) that has passed through the bandpass filter 56 at a predetermined amplification factor G. The amplifier 57 gives the amplified inverted signal to the ΔΣ modulator 58.

The ΔΣ modulator 58 has the same configuration as the ΔΣ modulator 25 described above. Similar to the ΔΣ modulator 25 described above, the ΔΣ modulator 58 is set to include the frequency band of the RF signal.
The ΔΣ modulator 58 converts the analog inverted signal into a signal (quantized signal) expressed by a 1-bit pulse train by performing ΔΣ modulation on the inverted signal that is a digital signal, and supplies the signal to the attenuator 59.

The attenuator 59 attenuates an analog inverted signal expressed by a 1-bit pulse train. The attenuator 59 is set to an attenuation factor W that can attenuate the gain amplified by the amplifier 57. The attenuator 59 outputs an inverted signal expressed by a 1-bit pulse train after attenuation to the adder 65.
That is, the signal generation unit 52 outputs the analog inverted signal expressed by the 1-bit pulse train after being attenuated by the attenuator 59 to the adder 65 as a distortion compensation signal.

Here, the signal generation unit 52 converts the inverted signal into a signal (quantized signal) expressed by a 1-bit pulse train by the ΔΣ modulator 58. Accordingly, in the inverted signal expressed by a 1-bit pulse train, the asymmetric component f ′ _Asym (t) generated by ΔΣ modulation is included as a noise component, as in the 1-bit pulse train expressing an RF signal. For this reason, there is a possibility that the distortion compensation of the 1-bit pulse train representing the RF signal cannot be appropriately performed only by performing the ΔΣ modulation.

In this regard, in this embodiment, the inverted signal before ΔΣ modulation is amplified by the amplifier 57, and after the inverted signal is converted into a 1-bit pulse train by the ΔΣ modulator 58, the inverted signal represented by the 1-bit pulse train is converted by the attenuator 59. Since it attenuates, the asymmetric component f ′ _Asym (t) (distortion component) added to the inverted signal when converting to a 1-bit pulse train can be relatively suppressed, and a more accurate distortion compensation signal is generated. be able to.

FIG. 16 is a diagram illustrating the relationship between the inverted signal of the distortion compensation asymmetric component f _dist (t) by the signal generator 52 and the asymmetric component f ′ _Asym (t) added to the inverted signal. a) shows an inverted signal of the distortion compensation asymmetric component f _dist (t) and an RF signal expressed by a 1-bit pulse train output from the ΔΣ modulator 25. (B) shows the state when the inverted signal of the distortion compensation asymmetric component _fdist (t) is amplified, and (c) shows the state when the inverted signal of the distortion compensation asymmetric component _fdist (t) is attenuated. Show.

In FIG. 16A, it is assumed that the power ratio of the RF signal S expressed by a 1-bit pulse train with respect to the quantization error Q1 is, for example, 60 dB. Also, _{assuming that} the power ratio of the asymmetric component f _Asym (t) included in the RF signal S to the RF signal S is −40 _dB , the power of the inverted signal Er1 of the distortion compensation asymmetric component f _dist (t) with respect to the RF signal S. The ratio is also −40 dB. This is because the distortion compensation asymmetric component f _dist (t) is required to be substantially the same based on the asymmetric component f _Asym (t).

At this time, as shown in FIG. 16B, the inverted signal Er1 is amplified at a predetermined amplification factor G, and the power ratio of the inverted signal Er1 to the quantization error Q2 is set to 60 dB, for example. Assume that ΔΣ modulation is performed.
Here, the inverted signal Er1 (expressed by a 1-bit pulse train) after ΔΣ modulation includes the asymmetric component f ′ _Asym (t) generated by ΔΣ modulation as described above.
As shown in FIG. _16B , the power of the signal _Er2 indicating the asymmetric component f ′ _Asym (t) included in the inverted signal Er1 after ΔΣ modulation is larger than the quantization error Q2 and smaller than the inverted signal Er1. appear.

When the inverted signal Er1 after Σ modulation shown in FIG. 16B is attenuated at a predetermined attenuation factor W so as to be about the power before amplification (FIG. 16A), as shown in FIG. An inversion signal Er1 substantially the same as that before amplification is obtained. Further, the quantization error Q1, the signal Er2, and the quantization error Q2 with respect to the inverted signal Er1 and the RF signal S have the relationship shown in the following formula (4).
Er1 <Q1 <Er2 <Q2 (4)

That is, the asymmetric component f ′ _Asym (t) (signal _Er2 ) generated in the inverted signal Er1 by ΔΣ modulation can be suppressed to be smaller than the quantization error Q1 by being attenuated by the attenuator 59. , And can be substantially removed from the inverted signal Er1.
As a result, the signal generation unit 52 can suppress error components such as the asymmetric component f ′ _Asym (t) due to ΔΣ modulation included in the inverted signal expressed by the 1-bit pulse train output from the attenuator 59, and has high accuracy. A distortion compensation signal can be obtained.

[4.4 Distortion compensation]
The distortion compensation signal output from the signal generator 52 is supplied to the adder 65. As a result, the distortion compensation signal is added to the RF signal expressed by the 1-bit pulse train from the ΔΣ modulator 25.

As described above, the distortion compensation signal needs to be added in accordance with the rise and fall timings of the pulses in the 1-bit pulse train representing the RF signal. For this reason, the asymmetric component supply unit 51 supplies the distortion compensation asymmetric component f _dist (t) to the signal generation unit 52 in _{synchronization} with the rise and fall timings of the pulse.

However, the signal generation unit 52 to which the distortion compensation asymmetric component _fdist (t) is given requires a predetermined period in order to generate the distortion compensation signal. For this reason, even when the timing is adjusted when the asymmetric component supply unit 51 supplies the distortion compensation asymmetric component _fdist (t), when the distortion compensation signal is output to the adder 65, 1 bit from the ΔΣ modulator 25 is supplied. There is a possibility that a delay occurs with respect to the RF signal expressed by the pulse train.

Therefore, the distortion compensation device 50 further includes a delay processing unit 61 disposed between the ΔΣ modulator 25 and the adder 65. When an RF signal expressed by a 1-bit pulse train is given from the ΔΣ modulator 25, the delay processing unit 61 performs a process of delaying the 1-bit pulse train by a period required for the signal generator 52 to generate a distortion compensation signal. Do.
As a result, the delay caused by the period required to generate the distortion compensation signal can be eliminated, and distortion compensation can be performed with high accuracy.

The adder 65 adds the RF signal expressed by the 1-bit pulse train from the ΔΣ modulator 25 and the distortion compensation signal from the signal generation unit 52.
As a result, the asymmetric component f _Asym (t) included in the RF signal expressed by the 1-bit pulse train from the ΔΣ modulator 25 is canceled by the distortion compensation signal. The RF signal expressed by a 1-bit pulse train has improved line symmetry between the distortion component of the rising waveform f _rise (t) and the distortion component of the falling waveform f _fall (t), and the signal characteristics as an analog signal Deterioration is suppressed.

Here, when an analog signal expressed by a 1-bit pulse train before distortion compensation output from the ΔΣ modulator 25 is D _out , an amplification factor of the amplifier 57 is G, and an attenuation factor of the attenuator 59 is W, an adder The analog signal D ′ _out expressed by the 1-bit pulse train after distortion compensation output from 65 can be expressed as the following equation (5).
D ′ _out = D _out + W × f _dist (G) (5)

Note that f _dist that is an asymmetric component for distortion compensation is expressed as a function of G. This is because in the conversion by the ΔΣ modulator, the power is not linear before and after the conversion, and the gain G and the attenuation rate W are not linear.

Furthermore, as described above, D _out includes an ideal waveform component f _ideal , a symmetric component f _sym , and an asymmetric component f _Asym as components that define a rectangular wave, as shown in the following formula (6). .
D _out = f _ideal + f _sym + f _Asym (6)

Thus, the _{D out} of the formula (5) and substituting equation _{(6), D'out} is expressed by the following equation (7).
D ′ _out = f _ideal + f _sym + f _Asym + W × f _dist (G)
= F _ideal + f _sym + (f _Asym + W × f _dist (G))
... (7)

In the above formula (7), that the closer to the extent possible the parts in parenthesis including the asymmetric component f _Asym "0", can be the to offset the asymmetric component f _Asym suppressed.
The sum of f _ideal remaining after the suppression of the asymmetric component f _Asym and f _sym includes a symmetrical component that is a distortion component in an ideal rectangular wave, but does not include the asymmetric component f _Asym. Deterioration of signal characteristics when using a signal is suppressed. That is, if the asymmetric component f _Asym is not included, the deterioration of the signal characteristics can be suppressed without using an ideal rectangular wave.
For this reason, distortion compensation can be performed more easily than in the case of distortion compensation so that an ideal rectangular wave can be obtained.

The portion in the parenthesis is adjusted as close to “0” as possible by adjusting the amplification factor G and the attenuation factor W.
In this case, the attenuator 59 (FIG. 14) is configured by a resistor having a predetermined resistance value, for example, and the amplification factor of the amplifier 57 can be adjusted after the resistance value of this resistor is fixed.
The attenuator 59 is a device for processing an analog signal and has low accuracy for adjustment. Therefore, by adjusting the amplification factor G of the amplifier 57 that processes the digital signal by fixing the attenuation value W with the resistance value constant, the adjustment is performed in more detail so that the portion in the parenthesis approaches “0”. Can do. As a result, optimum values of the amplification factor G and attenuation factor W that are not linear with each other can be obtained.

FIG. 17 is a graph showing signal waveforms in the time domain when an RF signal is output by the system 1 shown in FIG. 14, where (a) is the signal waveform of the RF signal before distortion compensation, and (b) is distortion compensation. The signal waveform of the signal, (c) shows the signal waveform of the RF signal after distortion compensation. The horizontal axis indicates the number of samples.
FIG. 17B shows the signal waveform of the distortion compensation signal before attenuation by the attenuator 59 and the signal waveform of the distortion compensation signal after attenuation.

The result of adding the signal waveform of the attenuated distortion compensation signal shown in FIG. 17B to the RF signal having the signal waveform shown in FIG. 17A is the signal waveform shown in FIG.
Referring to FIG. 17C, the signal waveform of the RF signal after distortion compensation is slightly changed corresponding to the portion where the signal waveform of the distortion compensation signal is displaced. However, there is no significant change in the signal waveform of the RF signal after distortion compensation.

  FIG. 18 is a diagram showing the power spectrum of the RF signal before distortion compensation and the RF signal after distortion compensation shown in FIG. In the figure, the RF signal before distortion compensation is indicated by a solid line. Further, the RF signal after distortion compensation is shown by plotting stars.

This RF signal is set to a center frequency of 300 MHz and a bandwidth of 5 MHz.
As shown in FIG. 18, the RF signal after distortion compensation is in good agreement with the RF signal before distortion compensation for the signal portion.
On the other hand, in the adjacent channel outside the band, the RF signal after distortion compensation has a greater reduction in power ratio. From this, it can be confirmed that ACLR is improved and deterioration of signal characteristics is suppressed.

  As described above, no significant change is observed in the signal waveform in the time domain, but the ACLR is significantly improved in the frequency domain.

[5. About effect]
The distortion compensation device 50 configured as described above is configured to perform feedforward distortion compensation, and adds a distortion compensation signal to an analog signal expressed by a 1-bit pulse train. Thereby, the distortion component of the rising waveform f _rise (t) and the distortion component of the falling waveform f _fall (t) can be made asymptotically substantially symmetrical with respect to the time axis, and distortion compensation is preferably performed. It can be performed.
In this embodiment, the distortion component of the rising waveform f _rise (t) and the distortion component of the falling waveform f _fall (t) are made asymptotically substantially symmetrical with respect to the time axis to compensate for the distortion. By doing so, it is possible to suppress components that affect the frequency band of the RF signal represented by the 1-bit pulse train.

As described above, according to the present embodiment, a 1-bit pulse train is expressed while improving the line symmetry between the distortion component of the rising waveform f _rise (t) and the distortion component of the falling waveform f _fall (t). It is possible to suppress a component that affects the frequency band of the RF signal to be transmitted, and to suppress signal characteristic deterioration.

Further, according to the distortion compensation device 50 of the present embodiment, the distortion component of the rising waveform f _rise (t) and the distortion of the falling waveform f _fall (t) are added to the analog signal expressed by a 1-bit pulse train. Since a distortion compensation signal whose components can be substantially line-symmetric with respect to the time axis is output as a 1-bit pulse train, the distortion compensation signal can be generated by digital processing. As a result, a highly accurate distortion compensation signal capable of performing distortion compensation with high accuracy can be generated, and signal characteristic deterioration can be suppressed.

In addition, the distortion compensation apparatus 50 according to the present embodiment extracts the asymmetric component f _Asym (t) included in the analog signal expressed by the 1-bit pulse train output from the ΔΣ modulator 25 and obtained as a distortion compensation asymmetric component f _dist. An asymmetric component supply unit 51 for supplying (t) as a digital signal to the signal generation unit 52 is provided, and the signal generation unit 52 performs ΔΣ modulation on the supplied distortion compensation asymmetric component f _dist (t) and outputs 1 bit. A ΔΣ modulator 58 that generates a distortion compensation asymmetric component f _dist (t) represented by a pulse train as a distortion compensation signal is provided.

As a result, the asymmetric component supply unit 51 supplies the distortion compensation asymmetric component _fdist (t) as a digital signal to the signal generation unit 52, and the ΔΣ modulator 58 uses the distortion compensation asymmetric component _fdist (t) of the digital signal. Therefore, the distortion compensation device 50 can generate a distortion compensation signal with high accuracy according to an analog signal expressed by a 1-bit pulse train by digital processing.

In the above configuration, the ΔΣ modulator 58 generates the analog distortion compensation asymmetric component f _dist (t) represented by a 1-bit pulse train as a distortion compensation signal. For example, for modulating a high-frequency oscillator or a carrier wave Compared to the case where a distortion compensation signal is generated using an analog device such as a modulator, an analog distortion compensation signal can be obtained with a simple configuration.
As a result, it is possible to obtain a distortion compensation apparatus that can suppress signal characteristic deterioration with high accuracy at low cost.

In the present embodiment, a bandpass is provided before the ΔΣ modulator 58 and outputs a bandwidth component necessary for distortion compensation to the ΔΣ modulator 58 from the distortion compensation asymmetric component _fdist (t). Since the filter 56 is provided, it is possible to remove a band component that is not necessary for distortion compensation from the distortion compensation asymmetric component _fdist (t), and to reduce the subsequent processing amount.

Assuming that ΔΣ modulation is performed on the distortion compensation asymmetric component f _dist (t) while including many components in a band that is not necessary for distortion compensation, the unnecessary band component is ahead of the necessary band. If the power level is saturated, an appropriate distortion compensation signal may not be obtained.
The reason is that among the distortion compensation asymmetric component _fdist (t), the component of the band that is not necessary for distortion compensation is the quantum of the quantization noise stopband of the analog signal expressed by the 1-bit pulse train from the ΔΣ modulator 25. This is because there are cases in which the power in the band that is not necessary is relatively larger than the power in the band that is necessary for distortion compensation because of the noise component.

In this respect, in the present embodiment, the band components that are not necessary for distortion compensation are removed, and therefore, when the distortion compensation asymmetric component _fdist (t) is converted by the ΔΣ modulator 58, it is unnecessary for distortion compensation. The influence of the band component on the necessary bandwidth component can be suppressed.

Furthermore, by performing band limitation such that the bandwidth required for distortion compensation for distortion compensation asymmetric component f _{dist (t),} a distortion compensating the asymmetric component f _{dist (t),} and the target of the distortion compensation The RF signal expressed by the 1-bit pulse train can be a signal having the same bandwidth. As a result, with respect to the oversampling rate of ΔΣ modulation, it is possible to perform modulation of an asymmetric component under substantially the same conditions as the signal to be subjected to distortion compensation, and it is possible to ensure sufficient accuracy for performing distortion compensation.

  In the present embodiment, the bandpass filter 56 is provided in front of the amplifier 57. However, if the bandpass filter 56 is in front of the ΔΣ modulator 58, the bandpass filter 56 removes a band component that is not necessary for distortion compensation. be able to. Therefore, the band pass filter 56 may be provided between the amplifier 57 and the ΔΣ modulator 58.

[6. About other embodiments]
FIG. 19 is a block diagram illustrating a distortion compensation apparatus according to the second embodiment. The present embodiment is different from the first embodiment in that an oscilloscope unit 66 connected to the subsequent stage of the adder 65 and an extraction unit 67 connected to the oscilloscope unit 66 are provided.

The oscilloscope unit 66 is provided in the digital signal processing unit 21 and is realized, for example, by a function called Built-In Oscilloscope mounted on a chip such as an FPGA. According to a function called Built-In Oscilloscope, when a digital signal is output from a chip having the function, the digital signal can be monitored.
The oscilloscope unit 66 acquires the 1-bit pulse train after the distortion compensation by the system 1 and measures the eye pattern of the acquired 1-bit pulse train after the distortion compensation by the above function.
The oscilloscope unit 66 gives the eye pattern of the analog signal expressed by the 1-bit pulse train after distortion compensation, which is the measurement result, to the extraction unit 67.

The extraction unit 67 has a function of extracting the asymmetric component f _Asym (t) included in the 1-bit pulse train after distortion compensation by applying the above formula (E) based on the eye pattern given from the oscilloscope unit 66. Have.
The extraction unit 67 gives the extracted asymmetric component f _Asym (t) to the asymmetric component supply unit 51.

The asymmetric component supply unit 51 has a function of updating the distortion compensation asymmetric component f _dist (t) stored in the LUT of the LUT storage unit 53 based on the asymmetric component f _Asym (t) given from the extraction unit 67. Have.
The asymmetric component supply unit 51 _adds the asymmetric component f _Asym (t) given from the extraction unit 67 and the distortion compensation asymmetric component f _dist (t), thereby _obtaining the distortion compensation asymmetric component f _dist (t). it may be updated, the extraction unit 67 asymmetric component given from _{f Asym} (t), the based on the difference between the distortion compensating the asymmetric component _{f dist} (t), asymmetric for distortion compensation component _{f dist} (t ) May be updated.

In this case, the asymmetric component f _Asym (t) included in the 1-bit pulse train after distortion compensation can be reflected in the asymmetric component f _dist (t) for distortion compensation stored in the LUT, and the current 1-bit pulse train The asymmetry component f _Asym (t) can be reflected in the distortion compensation asymmetric component f _dist (t). As a result, a distortion compensation signal with higher accuracy can be generated.

  The present invention is not limited to the above embodiment. In each of the above embodiments, the case where a distortion compensation device is used in a system that outputs an analog signal (RF signal) expressed by a 1-bit pulse train is exemplified. However, any device that outputs an analog signal expressed by a 1-bit pulse train may be used. In this case, a distortion compensation device can be preferably used.

FIG. 20 is a block diagram illustrating a 1-bit audio apparatus including the distortion compensation apparatus according to the present embodiment. In the figure, a 1-bit audio device 80 is connected to a speaker 90 and a recorder 91 as an output device for outputting sound.
The 1-bit audio device 80 includes a digital audio signal supply unit 81, a ΔΣ modulator 82, a distortion compensation device 50 of the present embodiment, and a switching unit 83, and converts an analog audio signal expressed by a 1-bit pulse train. It has a function of outputting to an output device.

  The switching unit 83 has a switching function for outputting an analog audio signal expressed by a 1-bit pulse train output from the 1-bit audio device 80 to one or both of the speaker 90 and the recorder 91.

  The digital audio signal supply unit 81 outputs a PCM signal converted into a digital signal by performing pulse code modulation on an analog signal such as audio. The digital audio signal supply unit 81 supplies the PCM signal to the subsequent ΔΣ modulator 82.

The ΔΣ modulator 82 converts the PCM signal into a 1-bit pulse train, and provides it to the subsequent distortion compensator 50.
As described above, the distortion compensation device 50 has a function of suppressing the asymmetric component f _Asym (t) added to the 1-bit pulse train by converting the PCM signal into the 1-bit pulse train by the ΔΣ modulator 82. .

For this reason, the distortion compensation apparatus 50 can suppress noise in an analog audio signal expressed by a 1-bit pulse train, and can suppress deterioration in signal characteristics as an analog signal.
As a result, the 1-bit audio device 80 can output an analog audio signal expressed by a 1-bit pulse train with high quality.

  As described above, the distortion compensation device according to the above embodiment can be suitably used for a device that outputs an analog signal expressed by a 1-bit pulse train.

[7. Addendum]
The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the meanings described above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

1 System 25 ΔΣ Modulator 50 Distortion Compensator 51 Asymmetric Component Supply Unit (Supply Unit)
52 Signal Generation Unit 53 LUT Storage Unit (Storage Unit)
56 Bandpass Filter 57 Amplifier 58 ΔΣ Modulator 59 Attenuator 61 Delay Processing Unit 67 Extraction Unit

Claims (15)

A distortion compensation device that performs distortion compensation of a signal expressed by a 1-bit pulse train,
The signal expressed by the 1-bit pulse train has a first distortion component with respect to an ideal pulse rising waveform in the rising waveform of the pulse, and a pulse falling waveform with respect to the ideal pulse falling waveform. And has a second distortion component,
A distortion compensation signal capable of making the first distortion component and the second distortion component substantially line-symmetric with respect to the time axis by adding to the signal expressed by the 1-bit pulse train is output. Distortion compensation device. The first distortion component and the second distortion component include an asymmetric component that reduces line symmetry with respect to a time axis between the first distortion component and the second distortion component,
The distortion compensation apparatus according to claim 1, further comprising a signal generation unit that generates the distortion compensation signal based on the asymmetric component.   The distortion compensation apparatus according to claim 1, wherein the distortion compensation signal is a 1-bit pulse train. A supply unit that supplies the asymmetric component to the signal generation unit as a digital signal;
The distortion compensation apparatus according to claim 3, wherein the signal generation unit includes a modulator that performs ΔΣ modulation on the supplied asymmetric component and generates the asymmetric component expressed by a 1-bit pulse train as the distortion compensation signal. . A storage unit storing information indicating the asymmetric component as a digital signal;
The distortion compensation apparatus according to claim 4, wherein the supply unit acquires an asymmetric component to be supplied to the signal generation unit by referring to the information stored in the storage unit. The signal generator is
An amplifier provided in a preceding stage of the modulator, amplifying the asymmetric component and outputting the amplified component to the modulator;
The distortion compensation apparatus according to claim 4, further comprising: an attenuator that attenuates the asymmetric component expressed by a 1-bit pulse train by the modulator with an attenuation rate corresponding to an amplification factor by the amplifier.   The filter according to any one of claims 4 to 6, further comprising a filter provided in a preceding stage of the modulator and outputting a bandwidth component necessary for distortion compensation to the modulator from among the asymmetric components. Distortion compensation device. An extraction unit that extracts an asymmetric component from the signal represented by the 1-bit pulse train to which the distortion compensation signal is added;
The distortion compensation apparatus according to claim 4, wherein the supply unit updates the asymmetric component to be supplied to the signal generation unit based on the asymmetric component extracted by the extraction unit.   The distortion compensation apparatus according to any one of claims 4 to 8, wherein the supply unit supplies the asymmetric component in accordance with a change in a pulse waveform of a signal represented by the 1-bit pulse train.   The distortion compensation apparatus according to any one of claims 1 to 9, further comprising a delay processing unit for eliminating a delay that occurs in the distortion compensation signal added to the signal expressed by the 1-bit pulse train.   The distortion compensation apparatus according to any one of claims 1 to 10, wherein the signal expressed by the 1-bit pulse train is an output from a bandpass ΔΣ modulator. A distortion compensation method for compensating distortion of a signal expressed by a 1-bit pulse train,
The signal expressed by the 1-bit pulse train has a first distortion component with respect to an ideal pulse rising waveform in the rising waveform of the pulse, and a pulse falling waveform with respect to the ideal pulse falling waveform. And has a second distortion component,
An addition step of adding a distortion compensation signal capable of making the first distortion component and the second distortion component substantially line-symmetric with respect to a time axis as a 1-bit pulse train to a signal expressed by the 1-bit pulse train. A characteristic distortion compensation method. A distortion compensation program for compensating distortion of a signal expressed by a 1-bit pulse train,
The signal expressed by the 1-bit pulse train has a first distortion component with respect to an ideal pulse rising waveform in the rising waveform of the pulse, and a pulse falling waveform with respect to the ideal pulse falling waveform. And has a second distortion component,
An adding step of adding a distortion compensation signal capable of making the first distortion component and the second distortion component substantially line-symmetric with respect to a time axis to a signal expressed by the 1-bit pulse train as a 1-bit pulse train; A distortion compensation program to be executed. A transmission unit for transmitting a signal represented by a 1-bit pulse train;
A transmitter comprising: the distortion compensation apparatus according to claim 1. A signal output unit that outputs an audio signal represented by a 1-bit pulse train;
A 1-bit audio apparatus comprising: the distortion compensation apparatus according to claim 1.