JP2014036236A - Video signal processing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable accurate YC separation with a simple configuration without using a PLL unit.SOLUTION: A delay unit for giving a temporal difference of one vertical period or two vertical periods to a composite video signal is configured with a delay unit 4 in which a delay time which is n times (n is a positive integer of 1 or more) as long as a cycle of a fixed frequency clock signal is set and a delay unit 5 in which any delay time α is set.

Description

  The present invention relates to a video signal processing apparatus, and in particular, includes a YC separation unit for accurately separating a composite video signal obtained by A / D conversion using a fixed frequency clock signal into a luminance signal and a color signal without using a PLL. The present invention relates to a video signal processing apparatus.

  There are, for example, the NTSC system and the PAL system as broadcasting radio wave systems, and a video signal in which a luminance signal Y and a color signal C are multiplexed is called a co-pository video signal. One of the video signal processes is YC separation for separating a luminance signal and a color signal. As a YC separation method, a method using horizontal correlation is generally used.

  A two-dimensional YC separation using horizontal correlation in the case of the NTSC system will be described as an example. In an image having no change in the vertical direction, the color signal is phase-shifted by 180 degrees for each horizontal period. Using this feature, a color signal can be obtained by subtracting the composite video signal of adjacent horizontal periods and halving the amplitude, and a luminance signal can be obtained by subtracting the color signal from the composite video signal. be able to. This YC separation method is based on the premise that there is a correlation in the image in the vertical direction. In order to perform YC separation with high accuracy, the sampling points at the time of A / D conversion are exactly the same in the vertical direction of the image. There is a need.

For this reason, a signal having a frequency that is an integral multiple of the horizontal synchronization frequency synchronized with the horizontal synchronization signal is used as the clock signal used in the A / D conversion unit. FIG. 12 is a diagram showing a configuration of a conventional video signal processing apparatus (Patent Document 1). A horizontal synchronization signal separated by the synchronization separation unit 16 from the composite video signal input to the input terminal 2 is input to the PLL unit 18, and a clock signal P _CLK that is synchronized with the horizontal synchronization signal and whose frequency is an integral multiple of the horizontal synchronization frequency is obtained. Generate. When the composite video signal is converted into a digital signal by the A / D converter 3 using the clock signal P _CLK as a sampling signal, the sampling points of the signal converted into the digital signal are exactly an integer within one horizontal period, Since the images coincide with each other in the vertical direction, the YC separation unit 6 can perform YC separation with high accuracy.

  In the case of the PAL method, since the color signal is phase-shifted by 180 degrees every two horizontal periods, the color signal is obtained from the difference between the composite video signals separated by two horizontal periods, and the color signal is subtracted from the composite video signal. A luminance signal is obtained. In this case as well, the sampling point at the time of A / D conversion needs to be exactly matched in the vertical direction of the image as in the NTSC system, and the PLL unit is used.

Japanese Patent Laying-Open No. 2004-007278 (FIG. 5)

  However, when the PLL unit is used as described above, there is a problem in that the circuit scale increases and the cost and mounting area increase. An object of the present invention is to solve the above-described problems and reduce the cost and mounting area by providing a simple configuration with a small circuit scale.

で表され、前記αは、

で表され、前記第１の遅延部の遅延時間を、

とし、前記第２の遅延部の遅延時間を前記αとした、ことを特徴とする。
請求項３にかかる発明は、請求項１又は２に記載の映像信号処理装置において、前記第１の遅延部をメモリまたはフリップフロップを用いて構成し、前記第２の遅延部をデジタルフィルタを用いて構成したことを特徴とする。
請求項４にかかる発明は、請求項１、２又は３に記載の映像信号処理装置において、前記コンポジット映像信号の放送方式を設定する放送方式設定部を備え、該放送方式設定部に設定された放送方式に応じて、前記第１の遅延部の遅延時間と前記第２の遅延部の遅延時間をそれぞれ設定することによって、複数の放送方式のＹＣ分離に対応可能としたことを特徴とする。
請求項５にかかる発明は、請求項４に記載の映像信号処理装置において、前記コンポジット映像信号の放送方式を自動的に検出する放送方式検出部を備え、該放送方式検出部の検出結果に応じて前記放送方式設定部が放送方式を設定することを特徴とする。 In order to achieve the above object, a video signal processing apparatus according to a first aspect of the present invention uses a horizontal correlation to convert a composite video signal sampled by a fixed frequency clock signal and converted into a digital signal into a luminance signal and a color signal. In a video signal processing apparatus including a YC separator for separating, a delay for giving a time difference N times a horizontal period (N is a positive integer of 1 or more) to the composite video signal in order to calculate the horizontal correlation At least one first delay unit in which a delay time of n times (n is a positive integer greater than or equal to 1) the period of the fixed frequency clock signal is set, and at least one in which an arbitrary delay time is set It is characterized by comprising two second delay units.
The invention according to claim 2 is the video signal processing device according to claim 1, wherein the relationship between the frequency f _CLK of the fixed frequency clock signal and the horizontal frequency f _H of the composite video signal is:

Where α is

The delay time of the first delay unit is expressed by

And the delay time of the second delay unit is α.
According to a third aspect of the present invention, in the video signal processing device according to the first or second aspect, the first delay unit is configured using a memory or a flip-flop, and the second delay unit is configured using a digital filter. It is characterized by being configured.
According to a fourth aspect of the present invention, in the video signal processing device according to the first, second, or third aspect, the broadcasting system setting unit that sets a broadcasting system of the composite video signal is provided, and the broadcasting system setting unit is set. According to the broadcasting system, by setting the delay time of the first delay unit and the delay time of the second delay unit, respectively, YC separation of a plurality of broadcasting systems can be supported.
According to a fifth aspect of the present invention, in the video signal processing device according to the fourth aspect of the present invention, the video signal processing device further includes a broadcast system detection unit that automatically detects a broadcast system of the composite video signal, and the detection is performed according to a detection result of the broadcast system detection unit. The broadcast system setting unit sets the broadcast system.

  According to the present invention, since a fixed frequency clock signal is used, YC separation can be accurately performed with a simple configuration without using a PLL section, and there is an advantage that cost and mounting area can be reduced. Furthermore, by setting the delay time of the delay unit using the broadcast system setting unit, there is an advantage that input signals of a plurality of broadcast systems can be accurately YC separated.

It is a block diagram which shows the structure of the video signal processing apparatus of 1st Example of this invention. It is a block diagram which shows the structure of the video signal processing apparatus of the 2nd Example of this invention. It is a block diagram which shows the structure of the video signal processing apparatus of the 3rd Example of this invention. It is a block diagram which shows the structure of the video signal processing apparatus of the 4th Example of this invention. It is a block diagram which shows the structure of the video signal processing apparatus of the 5th Example of this invention. It is a block diagram which shows the structure of the modification of the video signal processing apparatus of a 5th Example. It is a block diagram which shows the structure of the modification of the video signal processing apparatus of a 5th Example. It is a block diagram which shows the structure of the modification of the video signal processing apparatus of a 5th Example. It is a block diagram which shows the structure of the video signal processing apparatus of the 6th Example of this invention. It is a block diagram which shows the structure of the video signal processing apparatus of the 7th Example of this invention. It is a block diagram which shows the structure of the digital filter of the 8th Example of this invention. It is a block diagram which shows the structure of the conventional video signal processing apparatus. It is an operation | movement waveform diagram of the video signal processing apparatus of a 1st Example.

<First embodiment>
FIG. 1 shows the configuration of a video signal processing apparatus according to the first embodiment of the present invention. Reference numeral 1 denotes a fixed clock generation unit, 2 denotes a signal input terminal, 3 denotes an A / D conversion unit, 4 and 5 denote delay units, 6 denotes a YC separation unit, 7 denotes a luminance signal output terminal, and 8 denotes a color signal output terminal. The fixed clock generator 1 generates a fixed frequency clock signal having a frequency of f _CLK . The composite video signal input from the signal input terminal 2 is converted from an analog signal to a digital signal by a fixed frequency clock signal by the A / D converter 3, and the subsequent digital signal operates synchronously with the fixed frequency clock signal. The digital signal after A / D conversion is input to the YC separation unit 6 and the delay unit 4 whose delay time is determined by n times (n is a positive integer of 1 or more) the period of the fixed frequency clock signal. By the delay unit 4 and the delay unit 5 that can set an arbitrary delay time connected to the delay unit 4, the output signal of the A / D conversion unit 3 is N times the horizontal period (N is a positive value of 1 or more) A signal delayed by an integer) is generated and output to the YC separation unit 6. The YC separation unit 6 separates the luminance signal Y and the color signal C by the two-dimensional YC separation method using the composite video signal output from the A / D conversion unit 3 and the delay signal output from the delay unit 5, Output to the output terminal 7 and the color signal output terminal 8, respectively.

  In this embodiment, a delay unit 4 determined by n times the period of a fixed frequency clock signal generated by the fixed clock generator 1 and a delay unit 5 that can arbitrarily set a delay amount are connected in cascade. 5 constitutes delay means for delaying the composite video signal output from the A / D converter 3 by N times the horizontal period. Therefore, even in the analog / digital conversion in the A / D conversion unit 3 by the fixed frequency clock signal, A / D conversion is performed so that the sampling point in the horizontal period is fixed using the clock signal generated in the PLL unit. Therefore, YC separation can be performed with high accuracy.

また、第１の遅延部４の遅延時間は、

である。さらに、αは第２の遅延部５の遅延時間で、

で示される端数であり、任意に設定できる遅延時間である。 The relationship between the horizontal frequency f _H in the input composite video signal and the frequency f _CLK of the fixed frequency clock signal is expressed by the following equation (1).

The delay time of the first delay unit 4 is

It is. Furthermore, α is the delay time of the second delay unit 5,

The delay time can be arbitrarily set.

Next, the number of clocks in one horizontal period for each of the NTSC system and PAL system input signals is obtained. For example, when the frequency f _CLK of the fixed frequency clock signal is 30.4 MHz, and the input signal is NTSC, the horizontal frequency f _H is f _H = 15.734 kHz.
The color signal frequency f _SC is f _SC = 15.734 kHz × 455/2.
= 3.579545MHz
It is. For this reason, when the composite video signal of the NTSC system is A / D converted with a fixed frequency clock signal of frequency f _CLK , the number of clocks M in one horizontal period is
M = f _CLK / f _H = 19332.12
The sampling point after one horizontal period is shifted by 0.12 clocks. This shift amount S1 is expressed by the phase difference of the color signal.
S1 = 360 ° × (0.12 / 30.4 MHz) / (1 / 3.557945 MHz)
= 5.080
This shift amount S1 reduces the accuracy of YC separation.

Next, the number of clocks in one horizontal period when the input signal is the PAL system is obtained. Horizontal frequency f _H of the PAL system f _H = 15.625 kHz
The color signal frequency f _SC is
f _SC = 15.625 kHz × (1135/4 + 1/625)
= 4.433619MHz
It is. When A / D conversion is performed using a fixed frequency clock signal of 30.4 MHz, the number of clocks M in one horizontal period is
M = f _CLK / f _H = 1945.6
This 0.6 clock shift amount S2 is expressed by the phase difference of the color signal.
S2 = 3600 × (0.6 / 30.4 MHz) / (1 / 4.43619 MHz)
= 31.50
This displacement amount S2 reduces the accuracy of YC separation.

  As described above, when A / D conversion is performed using a fixed frequency clock signal, the number of samples in one horizontal period may not be an integer, and YC separation may not be performed with high accuracy.

FIG. 13 shows a waveform obtained by sampling a part of a composite video signal having no image change in the vertical direction with a fixed frequency clock signal. Here, for simplicity, one horizontal period is set to “7 × (1 / f _CLK ) + α”. A solid line waveform A in the lower right of FIG. 13 is a waveform obtained by delaying the waveform of the upper N-1 line by the delay unit 4 by the time of “7 × (1 / f _CLK )”, and a waveform B of the broken line further adds the waveform A. The waveform delayed by the time of α by the delay unit 5 is shown. A solid line and a dotted line are sampling points by a fixed frequency clock signal.

  If the fixed frequency clock signal is not synchronized with the horizontal synchronizing signal and the frequency is not an integral multiple of the horizontal synchronizing signal frequency, the vertical frequency is simply delayed by an integral multiple of the fixed frequency clock signal as in waveform A. The signal at the same sampling point in the direction is not inverted exactly 180 °.

  However, by generating the waveform B signal obtained by accurately delaying the N-1 line composite video signal by one horizontal period by the delay units 4 and 5 according to the present invention, the N line composite video signal is generated at the same sampling point. Since a signal inverted by 180 ° with respect to the signal can be generated, NTSC YC separation can be performed with high accuracy. If a signal delayed by two horizontal periods is generated by the delay units 4 and 5, PAL YC separation can be performed with high accuracy.

<Second embodiment>
FIG. 2 shows a video signal processing apparatus according to the second embodiment. In this embodiment, in addition to the delay units 4 and 5 described in FIG. 1, an output signal of the delay unit 5 is input, and a delay unit 9 in which a delay time of n times the period of the fixed frequency clock signal is set; An output signal of the delay unit 9 is input, and a delay unit 10 that can set an arbitrary delay time α is provided.

  In the present embodiment, the composite video signal output from the A / D conversion unit 3 is delayed by one horizontal period by the delay units 4, 5 and delayed by two horizontal periods by the delay units 4, 5, 9, 10. Then, the YC separation unit 6 performs NTSC YC separation using the output signal from the A / D conversion unit 3 and the output signal from the delay unit 5, and the output signal from the A / D conversion unit 3 and the delay unit 10. PAL YC separation can be performed by the output signal from. As described above, in this embodiment, YC separation can be performed with high accuracy in the NTSC system and the PAL system by the same effect as in the first embodiment.

<Third embodiment>
FIG. 3 shows a video signal processing apparatus according to the third embodiment. In this embodiment, the input side of the delay unit 9 is connected to the output side of the delay unit 4 in the embodiment of FIG.

  In this embodiment, the composite video signal output from the A / D conversion unit 3 is delayed by one horizontal period by the delay units 4 and 5 and delayed by two horizontal periods by the delay units 4, 9 and 10. The YC separation unit 6 performs NTSC YC separation based on the output signal from the A / D conversion unit 3 and the output signal from the delay unit 5, and the output signal from the A / D conversion unit 3 and the output from the delay unit 10. PAL YC separation can be performed by the output signal. As described above, in this embodiment, YC separation can be performed with high accuracy in the NTSC system and the PAL system by the same effect as in the first embodiment.

<Fourth embodiment>
FIG. 4 shows a video signal processing apparatus according to the fourth embodiment. In this embodiment, in the embodiment of FIG. 3, a delay unit 5 capable of arbitrarily setting the delay time α is connected between the A / D conversion unit 3 and the YC separation unit 6, and the period n of the fixed frequency clock signal is set. The delay unit 4 having a double delay time is connected and connected between the A / D conversion unit 3 and the YC separation unit 6.

  In this embodiment, the composite video signal output from the A / D converter 3 is delayed by an arbitrary time α by the delay unit 5 and delayed by n times the period of the fixed frequency clock signal by the delay unit 4. 4, 9, and 10 are delayed by n times + α of the period of the fixed frequency clock signal, the output signal of the delay unit 4 is delayed by one horizontal period with respect to the output signal of the delay unit 5, and the output signal of the delay unit 10 Is delayed by two horizontal periods with respect to the output signal of the delay unit 5, the YC separation unit 6 performs NTSC YC separation based on the output signal from the delay unit 5 and the output signal from the delay unit 4. The PAL YC separation can be performed by the output signal from the delay unit 5 and the output signal from the delay unit 10. As described above, in this embodiment, YC separation can be performed with high accuracy in the NTSC system and the PAL system by the same effect as in the first embodiment.

<Fifth Embodiment> FIG. 5 shows a video signal processing apparatus according to a fifth embodiment. In this embodiment, the memory 11 is used as the delay unit 4 whose delay time is determined by n times the period of the fixed frequency clock signal in FIG. 1, and the digital filter is used as the delay unit 5 in which an arbitrary delay time α can be set. It is. As the memory 11, a normal memory, a FIFO using a flip-flop, a shift register, and the like can be used. As the digital filter 12, an IIR filter capable of performing phase adjustment can be used. 6 to 8 show modified examples. The memory 13 is used as the delay unit 9 whose delay time is determined by n times the period of the fixed frequency clock signal in FIGS. 2 to 4, and a delay in which an arbitrary delay time α can be set. The digital filter 14 is used as the unit 10.

<Sixth embodiment>
FIG. 9 shows a video signal processing apparatus according to the sixth embodiment. In FIG. 9, 15 is a broadcast system setting unit. By setting the broadcast system of the input signal in the broadcast system setting unit 15 and changing the delay amounts of the delay unit 4 and the delay unit 5 according to the broadcast system, it is possible to support a plurality of broadcast systems.

A setting example of the delay amount when the frequency f _CLK of the fixed frequency clock signal is 30.4 MHz will be described. In the case of the NTSC system, as described above, since the number of clocks in one horizontal period is 1932.12 clocks, the delay amount of the delay unit 4 whose delay time is determined by n times the period of the fixed frequency clock signal is set to 1930 clocks. Then, the delay amount of the delay unit 5 that can arbitrarily set the delay time α is set to 69.74 ns for 2.12 clocks.

  In the case of the PAL system, the delay signal generated by the delay unit is a signal after two horizontal periods, and therefore the number of clock signals in two horizontal periods is 1945.6 × 2 = 3891.2 clocks. The delay amount of the delay unit 4 whose delay time is determined by n times the period of the fixed frequency clock signal is set to 3889 clocks, and the delay amount of the delay unit 5 that can arbitrarily set the delay time α is 72. Set to 37 ns. By switching the delay amount between the NTSC system and the PAL system by the broadcast system setting unit 15, YG separation can be performed with high accuracy for both broadcast systems.

  Although not shown in the embodiment, similarly to FIGS. 2 to 8, a delay time set at n times the period of the fixed frequency clock signal and an arbitrary delay time α may be set.

<Seventh embodiment>
FIG. 10 shows a video signal processing apparatus according to the seventh embodiment. Reference numeral 16 denotes a sync separator, and 17 denotes a broadcast system detector. The synchronization separation unit 16 separates the horizontal synchronization signal and the vertical synchronization signal from the composite video signal converted into a digital signal by the A / D conversion unit 3, and outputs the separated signal to the broadcast system detection unit 17. The number of horizontal periods in one vertical period is determined, and is 262.5 for the NTSC system and 312.5 for the PAL system. The broadcast system detection unit 17 counts the number of horizontal periods in one vertical period. If the count result is approximately 262, the broadcast system detection unit 17 determines that the system is the NTSC system, and if approximately 312 is the PAL system.

  Depending on the broadcasting system determined by the broadcasting system detection unit 17, the broadcasting system setting unit 15 sets the delay amount set by the delay units 4 and 5 to an optimum value, thereby achieving YC separation of both NTSC and PAL broadcasting systems. Can respond.

<Eighth embodiment>
FIG. 11 shows an embodiment of the digital filters 12 and 14. The digital filters 12 and 14 are IIR filters that constitute an APF (all pass filter). Reference numeral 21 is an input terminal, 22 is an output terminal, 23 to 26 are adders, 27 to 30 are multipliers, and 31 and 32 are 1 clock delay units. The digital filters 12 and 14 can set an arbitrary delay time α by setting the coefficients a0 and a1 of the multipliers 27 to 30.

In the case of the NTSC system, if the frequency f _CLK of the fixed frequency clock signal is 30.4 MHz, the setting for delaying 69.74 ns for the 2.12 clocks is the coefficient a0 = 0.0125, a1 = −0.0. It may be set to 0767. Similarly, the setting for delaying 72.37 ns of the 2.2 clock signal of the PAL method may be set to coefficients a0 = 0.0317 and a1 = −0.1456.

  For example, in the NTSC system, as shown in FIG. 13, the digital filter 12 generates a signal at a sample point (same as a sample point on the N line) indicated by a dotted line in the delay waveform B by interpolation. In the YC separation unit 6, an accurate difference between the composite video signals of the N line and the N-1 line can be obtained at each sample point.

  1: fixed clock generation unit, 2: input terminal, 3: A / D conversion unit, 4, 5: delay unit, 6: YC separation unit, 7: luminance signal output terminal, 8: color signal output terminal, 9, 10 : Delay unit, 11: Memory, 12: Digital filter, 13: Memory, 14: Digital filter, 15: Broadcast system setting unit, 16: Sync separation unit, 17: Broadcast system detection unit, 18: PLL unit

Claims (5)

In a video signal processing apparatus including a YC separation unit that separates a composite video signal sampled by a fixed frequency clock signal and converted into a digital signal into a luminance signal and a color signal using horizontal correlation,
In order to calculate the horizontal correlation, a delay unit for giving the composite video signal a time difference of N times the horizontal period (N is a positive integer of 1 or more) is set to n times the period of the fixed frequency clock signal ( n is a positive integer greater than or equal to 1) and includes at least one first delay unit in which a delay time is set and at least one second delay unit in which an arbitrary delay time is set, Video signal processing device. The video signal processing device according to claim 1,
The relationship between the frequency f _CLK of the fixed frequency clock signal and the horizontal frequency f _H of the composite video signal is

Where α is

The delay time of the first delay unit is expressed by

age,
The video signal processing apparatus according to claim 1, wherein the delay time of the second delay unit is α. The video signal processing apparatus according to claim 1 or 2,
A video signal processing apparatus, wherein the first delay unit is configured using a memory or a flip-flop, and the second delay unit is configured using a digital filter. The video signal processing device according to claim 1, 2, or 3,
A broadcasting system setting unit configured to set a broadcasting system of the composite video signal, and a delay time of the first delay unit and a delay of the second delay unit according to the broadcasting system set in the broadcasting system setting unit; A video signal processing apparatus capable of supporting YC separation of a plurality of broadcasting systems by setting each time. The video signal processing apparatus according to claim 4, wherein
A video signal processing comprising: a broadcast system detection unit that automatically detects a broadcast system of the composite video signal, wherein the broadcast system setting unit sets a broadcast system according to a detection result of the broadcast system detection unit apparatus.

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