JP2014014188A - Image forming apparatus, image forming method, image forming program, and recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent occurrence of banding.SOLUTION: An image forming apparatus comprises: a reference address generator 354a for determining a pixel position; a pattern recognizer 354c for performing pattern matching between a predetermined pattern and a prescribed pixel line of image data; an address translator 354b for shifting the determined pixel position in a sub scanning direction when the pixel line in the sub scanning direction including a pixel at the determined pixel position is matched with the pattern; and an image path selector 358 for performing magnification processing on the pixel line in the sub scanning direction including the pixel located at the shifted pixel position.

Description

  The present invention relates to image formation, and more particularly to an image forming apparatus, an image forming method, an image forming program, and a recording medium for forming a multi-beam latent image.

  As the functions of the image forming apparatus are improved, the image forming speed (PPM: Prints Per Minutes) per unit time of the image forming apparatus is also increasing. In recent years, an image forming apparatus that performs multi-beam exposure using a surface emitting laser (hereinafter referred to as a VCSEL) has been proposed in order to perform higher-speed and high-definition image formation. In addition, image forming apparatuses are also provided with models that perform duplex printing in response to requests for resource saving.

  For this reason, in the automatic double-sided apparatus, the time interval from the first side recording to the second side recording of the paper tends to be shortened as the image forming speed is improved. For example, as a high-speed model, there is a model that is performed within 10 seconds from the first side printing to the second side printing. This is also related to the downsizing of the image forming apparatus, and the conveyance distance from the thermal fixing corresponding to the recording on the first side of the paper to the recording on the second side tends to be short, so the paper comes off from the high temperature portion. In addition to the time interval, besides the time interval, the printing paper is placed in an environment that is thermally affected and is not easily cooled.

  When double-sided recording is performed in such a state, the images printed on the first and second sides corresponding to the front and back sides of the paper have heat and humidity fluctuations when high-quality paper having a thickness of about 80 μm is used as printing paper. It has been confirmed that a magnification difference of 0.2% to 0.4% occurs.

  Conventionally, with respect to the above-described problems, Japanese Patent No. 3373266 (Patent Document 1) provides a sub-scanning magnification changing function to an image forming apparatus, and reduction or subtraction of sub-scanning image data is performed. It was expanded by.

  Also by the method described in Patent Document 1, it is possible to eliminate the magnification difference. However, as the image to be formed becomes higher in definition, for example, in an image having periodicity in which one line is formed every five lines, density unevenness is obtained when lines are thinned out or added for magnification adjustment. There is a problem that global image defects such as moire occur remarkably.

  In addition, it is also necessary to prevent banding due to interference between the number of screen lines and the variable magnification along with the process of eliminating the magnification difference.

  The present invention has been made in view of the above, and realizes high-speed printing and high-definition image formation in consideration of double-sided correspondence without causing global image deterioration, and generation of banding. An object of the present invention is to provide an image forming apparatus, an image forming method, an image forming program, and a recording medium that can be prevented.

  In order to solve the above-described problems and achieve the object, an image forming apparatus according to the present invention is based on the position of the pixel in the main scanning direction, which serves as a reference for scaling image data composed of a plurality of pixels. A position determination unit that performs a position determination process for determining a pixel position of a correction pixel to be corrected; and a scaling unit that scales the image data by adding or deleting the correction pixel to or from the pixel position of the image data. A means for recognizing whether or not a pixel column in the sub-scanning direction including a pixel at the pixel position matches a predetermined pattern, and the pixel column and the pattern match And pixel position changing means for shifting the pixel position in the sub-scanning direction by an amount of shift determined according to the matching pattern.

  In the image forming method according to the present invention, the pixel position of the correction pixel to be corrected is determined based on the position in the main scanning direction of the pixel serving as a reference for scaling the image data composed of a plurality of pixels. A position determination step for performing position determination processing, a scaling step for scaling the image data by adding or deleting the correction pixel to or from the pixel position of the image data, and a sub-scan including the pixel at the pixel position A pattern recognition step for recognizing whether or not a pixel row in a direction matches a predetermined pattern, and a shift determined in accordance with the matching pattern when the pixel row and the pattern match And a pixel position changing step of shifting the pixel position in the sub-scanning direction by an amount.

  In addition, the image forming program according to the present invention enables a computer to correct a pixel of a correction pixel to be corrected based on a position in the main scanning direction of the pixel serving as a reference for scaling image data composed of a plurality of pixels. A position determining means for performing a position determining process for determining a position; a scaling means for scaling the image data by adding or deleting the correction pixel to or from the pixel position of the image data; and a pixel at the pixel position. A pattern recognition means for recognizing whether or not a pixel row in the sub-scanning direction and a predetermined pattern match; and when the pixel row and the pattern match, according to the matching pattern It functions as a pixel position changing means for shifting the pixel position in the sub-scanning direction by a predetermined shift amount.

  A recording medium according to the present invention is a computer-readable recording medium on which the image forming program is recorded.

  According to the present invention, the scaling process can be controlled at the level of the semiconductor laser element, and high-speed printing and high-definition can be achieved when considering both sides without causing global image deterioration such as moire caused by the scaling process. Image formation can be realized, and banding can be prevented from occurring.

FIG. 1 is a diagram illustrating an embodiment of an image forming apparatus. FIG. 2 is a diagram illustrating an example in which the light source unit is configured by a semiconductor laser array or a surface emitting laser. FIG. 3 is a schematic perspective view when the optical device including the VCSEL exposes the photosensitive drum. FIG. 4 is a schematic functional block diagram of the control unit of the image forming apparatus. FIG. 5 is a diagram showing a detailed functional block diagram of GAVD. FIG. 6 is a functional block diagram of the image processing unit according to the first embodiment. FIG. 7A is a schematic diagram illustrating an example of an image matrix. FIG. 7B is a schematic diagram illustrating an example of a recognized pixel column pattern. FIG. 8 is a schematic diagram for explaining the operation of the address conversion unit 354b. FIG. 9 is a schematic diagram for explaining the operation when the white pixel and the addition / deletion position by the scaling process coincide. FIG. 10A is a diagram illustrating an example of the operation of the image path selector when no pixel bit is added. FIG. 10B is a diagram illustrating an example of the operation of the image path selector (first to third scans) when pixel bits are added. FIG. 11A is a diagram illustrating an example of a relationship between image data, an R address, and an F address. FIG. 11B is a diagram illustrating an example of a relationship between a unit pixel and a laser spot. FIG. 12 is a diagram showing an example in which the image data is quadruple dense in the main scanning direction and the subscanning direction, or only quadruple dense in the subscanning direction. FIG. 13 is a flowchart illustrating the procedure of the scaling process according to the first embodiment. FIG. 14 is an explanatory diagram showing addition / deletion positions before pixel position correction and addition / deletion positions after position correction. FIG. 15 is an explanatory diagram illustrating an example of an image that has been subjected to scaling processing with respect to the addition / deletion position before pixel position correction and the addition / deletion position after position correction. FIG. 16 is a block diagram illustrating a functional configuration of the image processing unit according to the second embodiment. FIG. 17 is a block diagram illustrating a functional configuration of the image processing unit according to the third embodiment. FIG. 18 is a schematic diagram illustrating an example in which pixel deletion by the reduction process is applied to a 1200 dpi black 1 pixel portion and the pixel is thinned. FIG. 19 is a schematic diagram showing an example of image correction when pixel addition by enlargement processing is applied to a 1200 dpi black 1-pixel portion. FIG. 20 is a schematic diagram illustrating an example of pattern matching according to the third embodiment. FIG. 21 is a schematic diagram illustrating an example of pattern matching according to the third embodiment. FIG. 22 is a flowchart illustrating the procedure of the scaling process according to the third embodiment.

  Exemplary embodiments of an image forming apparatus, an image forming method, an image forming program, and a recording medium according to the present invention are explained in detail below with reference to the accompanying drawings. However, the present invention is not limited to these embodiments.

(Embodiment 1)
FIG. 1 is a schematic diagram illustrating a mechanical configuration of the image forming apparatus according to the first embodiment. An image forming apparatus 100 according to the present embodiment includes an optical device 102 including optical elements such as a VCSEL 200 (see FIGS. 2 and 3) and a polygon mirror 102a, and an image forming unit including a photosensitive drum, a charging device, a developing device, and the like. 112 and a transfer unit 122 including an intermediate transfer belt and the like. The optical device 102 includes a VCSEL 200 as a semiconductor laser. In the embodiment shown in FIG. 1, the light beam emitted from the VCSEL 200 (not shown in FIG. 1) is once condensed by a first cylindrical lens (not shown), and then reflected by the polygon mirror 102a to the reflection mirror 102b. Deflected.

  Here, the VCSEL (Vertical Cavity Surface Emitting Laser) 200 is a surface emitting semiconductor laser in which a plurality of light sources (semiconductor lasers) are arranged in a lattice pattern on the same chip. Various techniques are known as an image forming apparatus using such a VCSEL 200, and the VCSEL 200 is incorporated in the optical device 102 of the image forming apparatus 100 according to the present embodiment with the same configuration as those known techniques. It is. FIG. 2 is a configuration diagram of the VICSEL 200 incorporated in the optical device 102 according to the present embodiment. As shown in FIG. 2, the VCSEL 200 of the present embodiment forms a semiconductor laser array in which a plurality of light sources 1001 (a plurality of semiconductor lasers) are arranged in a lattice pattern. The arrangement direction of the plurality of light sources 1001 is provided to be inclined at a predetermined angle θ with respect to the rotation axis of the polygon mirror 102a as a deflector.

  In FIG. 2, the vertical arrangement direction of the light sources is a to c and the horizontal arrangement direction is 1 to 4. For example, the upper left light source 1001 in FIG. 2 is represented as a1. When the light source 1001 is arranged with the polygon mirror angle θ, the light source a1 and the light source a2 are exposed at different scanning positions, and one pixel (one pixel) is constituted by the two light sources, that is, in FIG. Consider a case where one pixel is realized with two light sources. For example, if one pixel is composed of two light sources a1 and a2, and one pixel is composed of two light sources a3 and a4, a pixel as shown at the right end of FIG. When the vertical direction in the figure is the sub-scanning direction, it is assumed that the distance between the centers of the pixels constituted by the two light sources is equivalent to 600 dpi. At this time, the center distance between the two light sources constituting one pixel is equivalent to 1200 dpi, and the light source density is twice the pixel density. Therefore, by changing the light quantity ratio of the light source constituting one pixel, the center of gravity of the pixel can be shifted in the sub-scanning direction, and high-precision image formation can be realized.

  The image forming apparatus 100 constitutes a post-object type optical device 102 that does not use an fθ lens. In the illustrated embodiment, a number of light beams L corresponding to each color of cyan (C), magenta (M), yellow (Y), and black (K) are generated, reflected by the reflecting mirror 102b, and second cylindrical. After being condensed again by the lens 102c, the photosensitive drums 104a, 106a, 108a, 110a are exposed.

  Since the irradiation of the light beam L is performed using a plurality of optical elements as described above, timing synchronization is performed in the main scanning direction and the sub-scanning direction. Hereinafter, the main scanning direction is defined as the light beam scanning direction, and the sub-scanning direction is defined as a direction orthogonal to the main scanning direction.

  Each of the photosensitive drums 104a, 106a, 108a, and 110a includes a photoconductive layer including at least a charge generation layer and a charge transport layer on a conductive drum such as aluminum. The photoconductive layer is disposed corresponding to each of the photosensitive drums 104a, 106a, 108a, and 110a, and is charged with a surface charge by the chargers 104b, 106b, 108b, and 110b including a corotron, a scorotron, or a charging roller. Is granted.

  The electrostatic charges imparted on the photosensitive drums 104a, 106a, 108a, 110a by the respective chargers 104b, 106b, 108b, 110b are imagewise exposed by the light beam L to form an electrostatic latent image. The electrostatic latent images formed on the photoconductive drums 104a, 106a, 108a, and 110a are developed by the developing devices 104c, 106c, 108c, and 110c including a developing sleeve, a developer supplying roller, a regulating blade, and the like. Is formed.

  The developer carried on the photosensitive drums 104a, 106a, 108a, and 110a is transferred onto the intermediate transfer belt 114 that moves in the direction of arrow A by the conveying rollers 114a, 114b, and 114c. The intermediate transfer belt 114 is conveyed to the secondary transfer unit while carrying C, M, Y, and K developers. The secondary transfer unit includes a secondary transfer belt 118 and conveying rollers 118a and 118b. The secondary transfer belt 118 is conveyed in the direction of arrow B by the conveyance rollers 118a and 118b. An image receiving material 124 such as high-quality paper or a plastic sheet is supplied to the secondary transfer portion from an image receiving material storage portion 128 such as a paper feed cassette by a conveying roller 126.

  The secondary transfer unit applies a secondary transfer bias to transfer the multicolor developer image carried on the intermediate transfer belt 114 onto the image receiving material 124 held by suction on the secondary transfer belt 118. The image receiving material 124 is supplied to the fixing device 120 along with the conveyance of the secondary transfer belt 118. The fixing device 120 includes a fixing member 130 such as a fixing roller including silicone rubber, fluorine rubber, and the like, pressurizes and heats the image receiving material 124 and the multicolor developer image, and forms the printed material 132 as the image forming apparatus 100. To the outside. After the multicolor developer image is transferred, the transfer belt 114 is supplied to the next image forming process after the transfer residual developer is removed by the cleaning unit 116 including a cleaning blade.

  FIG. 3 is a schematic perspective view when the optical device 102 including the VCSEL 200 exposes the photosensitive drum 104a. The light beam L emitted from the VCSEL 200 is collected by the first cylindrical lens 202 used for shaping the light beam bundle, passes through the reflection mirror 204 and the imaging lens 206, and is then deflected by the polygon mirror 102a. . The polygon mirror 102a is rotationally driven by a spindle motor that rotates several thousand to several tens of thousands. The light beam L reflected by the polygon mirror 102a is reflected by the reflection mirror 102b and then reshaped by the second cylindrical lens 102c to expose the surface of the photosensitive drum 104a.

  In order to synchronize the scanning start timing of the light beam L in the sub-scanning direction, a reflection mirror 208 is disposed. The reflection mirror 208 reflects the light beam L to the synchronization detection device 210 including a photodiode or the like before starting scanning in the sub-scanning direction. When detecting the light beam, the synchronization detection device 210 generates a synchronization signal to start sub-scanning, and synchronizes processing such as generation of a drive control signal to the VCSEL 200.

  The VCSEL 200 is driven by a pulse signal sent from a GAVD 310, which will be described later. As will be described later, the light beam L is exposed at a position corresponding to a predetermined image bit of the image data, and an electrostatic latent image is formed on the photosensitive drum 104a. Form.

  FIG. 4 is a schematic functional block diagram of the control unit 300 of the image forming apparatus 100. The control unit 300 is configured as a scanner unit 302, a printer unit 308, and a main control unit 330. The scanner unit 302 functions as a means for reading an image. A VPU 304 that performs A / D conversion on a signal read by the scanner to perform black offset correction, shading correction, and pixel position correction, and a mainly acquired image, An IPU 306 that performs image processing for digital conversion from image data in the RGB color system to the CMYK color system. The read image acquired by the scanner unit 302 is sent to the printer unit 308 as digital data.

  The printer unit 308 includes a GAVD 310 that functions as a control unit that performs drive control of the VCSEL 200, an LD driver 312 that supplies a current for driving the semiconductor laser element by a drive control signal generated by the GAVD 310, and a two-dimensional one. And a VCSEL 200 on which the semiconductor laser elements are arranged. The GAVD 310 according to the present embodiment performs high resolution processing on the image data sent from the scanner unit 302 by dividing the pixel data into pixel data so as to correspond to the spatial size of the semiconductor laser element emitted by the VCSEL 200. To do.

  The scanner unit 302 and the printer unit 308 are connected to the main control unit 330 via the system bus 316, and image reading and image formation are controlled by commands from the main control unit 330. The main control unit 330 includes a central processing unit (hereinafter referred to as a CPU) 320 and a RAM 322 that provides a processing space used by the CPU 320 for processing. The CPU 320 can be any CPU known so far, for example, CISC (Complex Instruction Set Computer) such as the PENTIUM (registered trademark) series or its compatible CPU, RISC (Reduced Instruction Set Computer) such as MIPS, etc. Can be used. The CPU 320 receives a command from the user via the interface 328, calls a program module that executes processing corresponding to the command, and executes processing such as copying, facsimile, scanner, and image storage. Further, the main control unit 330 includes a ROM 324, and stores initial setting data, control data, programs, and the like of the CPU 320 so that the CPU 320 can use them. The image storage 326 is configured as a fixed or detachable memory device such as a hard disk device, an SD card, or a USB memory. The image storage 326 stores the image data acquired by the image forming apparatus 100 and can be used for various processes by the user. It is said.

  When the printer unit 308 is driven for the image data acquired by the scanner unit 302 to output an image as an electrostatic latent image on the photosensitive drum 104a or the like, the CPU 320 controls the main scanning direction of an image receiving material such as fine paper or plastic film. And sub-scanning position control is executed. The CPU 320 outputs a start signal to the GAVD 310 when starting scanning in the sub-scanning direction. When the GAVD 310 receives the start signal, the IPU 306 starts the scanning process. Thereafter, the GAVD 310 receives the image data stored in the buffer memory or the like, thereafter processes the received image data, and outputs the processed image data to the LD driver 312. When the LD driver 312 receives image data from the GAVD 310, the LD driver 312 generates a drive control signal for the VCSEL 200. Thereafter, the LD driver 312 sends the drive control signal to the VCSEL 200, thereby turning on the VCSEL 200. The LD driver 312 drives the semiconductor laser element using PWM control or the like. The VCSEL 200 described in the present embodiment includes 8 channels of semiconductor laser elements, but the number of channels of the VCSEL 200 is not limited.

  FIG. 5 shows more detailed functional blocks of the GAVD 310. The GAVD 310 includes a memory 340 such as a FIFO buffer that receives the synchronization signal and stores and stores image data sent from the IPU 306, and performs image processing on the image data transmitted from the IPU 306 in a first-in / first-out manner. Part 342. The image processing unit 342 reads the image data from the memory 340, performs resolution conversion of the image data, assignment of the semiconductor laser element channel, and addition / deletion of image bits (that is, correction pixels for scaling the image data). Processing (that is, image data correction processing) is executed. In the image data, a position where the photosensitive drum 104a is exposed is defined by a main scanning line address value defined in the main scanning direction and a sub scanning line address value defined in the sub scanning direction. Hereinafter, in the present embodiment, the address coordinate is an address value that gives a specific image bit when image data is designated by a main scanning line address value (R address value) and a sub scanning line address value (F address value). Define as a set of Note that these address values are determined by an address generation unit 354 as will be described later. Further, these address coordinates are determined for each pixel (that is, a pixel column) arranged in a line in the main scanning direction and the sub-scanning direction. Then, the image path selector 358 (described later) applies, for each pixel column, a pixel located at the coordinate address (that is, the pixel position) designated by the address generation unit 354 described later with the R address value and the F address value. Then, correction processing such as inserting pixel bits is performed.

  The output data control unit 344 converts the output data, which is a write signal corresponding to the image data generated by the image processing unit 342, from the F address value and the sub-scanning speed into a time-series drive pulse, and further, a synchronization detection device A synchronization control signal for giving a synchronization signal to 210 is added and generated. The generated drive control signal is transmitted to the LD driver 312 to drive a VCSEL (not shown). The output data control unit 344 receives a synchronization signal from the synchronization detection device 210 and synchronizes transmission of the drive control signal to the LD driver 312. The processing of the memory 340, the image processing unit 342, and the output data control unit 344 is synchronized with the operation clock by the PLL 346.

  FIG. 6 is a functional block diagram of the image processing unit 342 shown in FIG. As shown in FIG. 6, the image processing unit 342 includes a resolution conversion unit 350, a sub-scanning scaling unit 352, and an address generation unit 354.

  The resolution conversion unit 350 divides the unit pixel of the image data acquired from the memory 340 in accordance with the number of channels and the size of the VCSEL 200 and creates divided pixels. Thereafter, a laser element channel for performing irradiation of the pixel is assigned to the divided pixel. In addition, the resolution conversion unit 350 selects 2n-fold density processing (n is a positive integer) or 2n line processing when determining resolution, and determines drive assignment of laser element channels.

  The address generation unit 354 determines an address value for adding or deleting an image bit by the sub-scanning scaling process. The address generation unit 354 includes a reference address generation unit 354a, an address conversion unit 354b, and a pattern recognition unit 354c.

  The reference address generation unit 354a determines an address value (F address) to be added or deleted. The address conversion unit 354b determines whether the image bit to be added or deleted is corrected by the match data (described later) output from the pattern recognition unit 354c, based on the address value to be added or deleted determined by the reference address generation unit 354a. If it is determined whether or not the correction target, the address value to be added or deleted is shifted in the sub-scanning direction.

  The pattern recognition unit 354c stores an image matrix, performs pattern matching between the image matrix and the pixel column, and outputs the matching result as match data. FIG. 7A is a schematic diagram illustrating an example of an image matrix. In the image matrix shown in FIG. 7A, a pixel surrounded by a central rectangle indicates a target pixel.

  In the present embodiment, pattern matching by the pattern recognition unit 354c is performed before the write resolution conversion process. However, the present invention is not limited to this, and pattern matching is performed after the write resolution conversion process. It may be configured.

  FIG. 7B is a schematic diagram illustrating an example of a recognized pixel column pattern. The pattern recognition unit 354c determines black and white in the image matrix, and outputs match data when they match the corresponding patterns. In the example illustrated in FIG. 7B, if there is one white pixel before and after the target pixel, match = 1 is output. If the pattern does not match any pattern, the pattern recognition unit 354c outputs match = 0.

  Next, details of the address conversion unit 354b will be described. FIG. 8 is a schematic diagram for explaining the operation of the address conversion unit 354b. A case will be described as an example where match = 1 and F address = 4n indicating the addition / deletion position are input to the address conversion unit 354b.

  The pattern matching of the pattern recognition unit 354c in the present embodiment is a main / sub 1200 dpi image immediately before the resolution conversion process. On the other hand, since the scaling process is a pixel unit after the resolution conversion process, the pattern matching data and the address have the relationship shown in FIG.

  That is, since addition / deletion position (F address) = 4n + 1 and match = 1, the address conversion unit 354b determines that the addition / deletion position is 1200 dpi 1 dot black, and “F address = F address + 4 = 4n + 5”. As shown in FIG.

  FIG. 9 is a schematic diagram for explaining the operation when the white pixel and the addition / deletion position by the scaling process coincide. When match = 4 represents a white pixel 1 dot and the F address = 4n is the addition / deletion position, the address conversion unit 354b shifts to the trailing end of the sub-scan as “F address = F address + 8 = 4n + 8”.

  Here, the amount of shift in the sub-scanning direction is determined and stored for each match value in advance. As an example, the relationship between the match data and the shift amount in the sub-scanning direction is as follows, but is not limited thereto.

match = 0: Sub-scanning shift amount = 0
match = 1: Sub-scanning shift amount = 4
match = 2: Sub-scanning shift amount = 4
match = 3: Sub-scanning shift amount = 8
match = 4: Sub-scanning shift amount = 8
match = 5: Sub-scanning shift amount = 8
match = 6: Sub-scanning shift amount = 12
Returning to FIG. 6, the sub-scanning scaling unit 352 includes an image path selector 358 and a shift holding memory 356. The sub-scan scaling unit 352 receives an F address and an R address used for forming an image from the address generation unit 354, and the address value to be processed adds an address value for adding or deleting an image bit. Judge whether to include. The sub-scanning scaling unit 352 generates, for example, a scaling command signal such as an addition flag or a deletion flag for the address at which the image bit is added / deleted, and passes it to the image path selector 358 and the shift holding memory 356. The shift holding memory 356 stores a shift amount for shifting an image bit, and counts and holds a scaling command signal. When the enlargement / magnification command signal is set at the time of image enlargement, the image path selector 358 sets the data of the image bit to white data, and shifts the subsequent image data by one bit. When the scaling command signal is not set, the input data from the resolution conversion unit 350 is selected and output based on the shift amount from the shift holding memory 356. In this embodiment, when the 8ch VCSEL 200 is used as a semiconductor laser, a signal indicating a position to be added / deleted and a signal indicating a shift amount are allocated for 8ch and used for driving the VCSEL 200. The calculation of addition / deletion of image bits can be configured as a dedicated module as long as it is an appropriate function unit of the image processing unit 342, or can be configured as a part of other modules. The reason for counting the magnification command signal is to specify the position at which the image bit is added at the beginning of the second scan after the image bit is added at the first scan, for example, when shifting the image bit. is there.

  The operation of the image path selector 358 will be described with reference to FIGS. The attention data 602 in FIGS. 10A and 10B represents a bit value for one pixel, and the data for one pixel is represented by sub-coordinates for 8ch. It is bit data assigned to a specific main scanning coordinate position. As the input data 600, the attention data 602 and the scaling data for designating the shift unit for sub-scanning scaling are always read from the memory 340 in the previous stage, and the same processing is performed for all the lines, and the resolution conversion unit 350 is input. When the variable magnification command signal shown in FIG. 10-1 is not changed, since the variable magnification command signal is not set, the shift amount (shift) from the shift holding memory 356 is set to 0, and as shown in FIG. The image data 602 is transferred as output data 604 which is a write signal in this embodiment.

  Next, the operation when the magnification command signal is set will be described with reference to FIG. FIG. 10B illustrates a case where white is added to the sub-coordinate 1 of the attention data 602 in the first scan (A). A signal indicating the addition of an image bit is set with an address value corresponding to CH1, and the bit data of CH1 is replaced so as to correspond to a white pixel and set as data in CH1 of output data 606. Then, the count value 1 corresponding to the addition corresponding to CH1 is registered in the shift holding memory 356.

  The data of CH2 to CH7 is shifted to the sub-coordinate value with the channel shift amount minus 1 as the sub-coordinate value of the output data 606. At this time, the image path selector 358 can add image bits by assigning bit data of the channel of interest data corresponding to the channel shift amount −1 to CH2 to CH7 of the output data 606. In the output data 606, image bits corresponding to white are added to the data of interest, and used as a write signal. The output data control unit 344 converts the write signal in time series to drive the VCSEL 200 drive pulse. And image formation is performed. The above-described processing is performed in units of main scanning, data about the next pixel in the main scanning direction is sequentially read from the memory 340, and image formation is performed in the main scanning direction.

  As described above, white pixels are added in the first scan (A) and the sub-coordinate values of CH1 to CH7 in the output data 606 are shifted, so that in the second scan (B), as shown in FIG. Even when no white pixel is added, the sub-coordinate values of the output data 606CH8 to CH15 are shifted by −1, and when the white pixel is added in the third scan (C) as in the first scan. As shown in FIG. 7D, the sub-coordinate values of the output data 606CH16 to CH23 are shifted by -2.

  11A and 11B illustrate the relationship between image data, R address, and F address, and the relationship between a unit pixel and a laser spot by the VCSEL 200. FIG. FIG. 11A illustrates the relationship between image data and each address, and FIG. 11B illustrates the relationship between a unit pixel and a laser spot. As shown in FIG. 11A, the R address 702 determines the pixel position in the main scanning direction in the image data 700, and has a value corresponding to the writable range in the feed direction of the image receiving material. The F address 704 is a value that determines the pixel position in the sub-scanning direction in the image data 700. Corresponding to these address values, feeding in the main scanning direction and lighting control of the VCSEL 200 are performed, and the light beam scans on the photosensitive drum to form an electrostatic latent image subjected to magnification control.

  FIG. 11B shows a laser spot 708 that irradiates the pixel region 706. In this embodiment, the VCSEL 200 includes an 8ch semiconductor laser element. The laser spot 702 of the semiconductor laser element is configured in two rows with 4 channels per row. Further, the laser spots 702 constituting the row are arranged at intervals of 2.4 μm in the sub-scanning direction and at intervals of 30 μm in the main scanning direction. That is, the laser spot 708 shown in FIG. 11B irradiates the pixel area 706 with a resolution that divides the pixel area 706 into four in the sub-scanning direction and also into four in the main scanning direction, and divides the unit pixel into sixteen. . In the embodiment of FIG. 11-2, the laser modulation pitch (beam pitch) in the sub-scanning direction is 1/4 of the pixel resolution to be read. Specifically, the pixel input resolution is 1200 dpi (dots per inch). In this case, as an effective resolution, a latent image can be formed with a beam pitch of 4800 dpi.

  FIG. 12A is a schematic diagram for explaining an example of the high resolution processing executed by the resolution conversion unit 350. The resolution conversion unit 350 converts the image data 808 having the input resolution of 1200 dpi and 2 bits of the unit pixel 800 into 16 pieces of 1-bit divided pixel data 802 having the output resolution of 4800 dpi shown in the example shown in FIG. By performing the conversion, high resolution processing is performed in which so-called quadruple density processing is executed in the main scanning direction and the sub-scanning direction. Each divided pixel data 802 is assigned with a channel of a semiconductor laser element in charge of exposure, and is used to generate a drive control signal.

  In this embodiment, the resolution is increased by converting the image data 808 having the input resolution 1200 dpi and 2 bits of the unit pixel 800 into the divided pixel data 808 shown in FIG. The high resolution processing is not limited to this. For example, the resolution conversion unit 350 is configured so as to perform a resolution enhancement process in which the image data 808 having the input resolution of 1200 dpi and 2 bits of the unit pixel 800 is converted into the divided pixel data shown in FIG. Also good.

  In the example shown in FIG. 12B, a resolution of 1,800 dpi is provided for the main scanning direction and 1,800 dpi for the sub-scanning direction, and the divided pixel data 804 is shown as four lines of 1200 dpi × 4 bits. . That is, the resolution conversion unit 350 is configured to perform a resolution enhancement process for converting the image data 808 having the input resolution of 1200 dpi and 2 bits of the unit pixel 800 into the divided pixel data 804 in the example shown in FIG. May be. Also in this case, a channel of the semiconductor laser element in charge of exposure of each divided pixel data is assigned and provided for generating a drive control signal. The high resolution processing for conversion into the divided pixel data shown in FIG. 12A or 12B is preferably used to eliminate global image defects such as moire in the sub-scanning direction and jagged edges. be able to. Further, in the case of high resolution processing for conversion into divided pixel data shown in FIG. 12B, the number of divided pixels can be reduced to ¼, so that the subsequent processing load can be reduced. it can.

  FIG. 13 is a flowchart illustrating the procedure of the scaling process performed by the image forming apparatus 100 according to the first embodiment. In the scaling process shown in FIG. 13, first, the reference address generator 354a sets an R address value (step S11). Then, the reference address generation unit 354a calculates the F address value to be added / deleted using the R address by the scaling method used by the image processing unit 342 (step S12).

  Next, the pattern recognition unit 354c determines whether or not the target pattern is the target pattern by performing pattern matching between the pixel column and the image matrix with the pixel indicated by the F address value and the R address value as the target pixel, as described above. The matching result is output as match data. Then, the address conversion unit 354b shifts and changes the F address value for adding / deleting a pixel based on the match data (step S13).

  Next, the image path selector 358 rewrites the R address value set in step S11 and the F address value after the F address calculated in step S13 by incrementing or deleting by one line, and sets the calculated F address to the calculated F address. An image bit is set in the pixel given by the address of the corresponding sub-scan line (R address value, F address value) (step S14). That is, the image path selector 358 performs a correction process on the pixels located at the R address value and the F address value. In addition, when adding a sub-scan line, the F address value is not rewritten in descending order corresponding to the insertion of the sub-scan line, but it can also correspond to the addition of the sub-scan line. It is also possible to generate additional F address values separately using the values of the two sub-scanning lines as indexes and pass them to the output data control unit 344.

  Next, the image path selector 358 reads the bit data in the F address range to be processed and transfers it to the output data control unit 344 (step S15). The output data control unit 344 generates a pulse signal at a timing corresponding to the pixel position and sends it to the LD driver 312 to drive the semiconductor laser element.

  In the process of step S14, a value corresponding to 1200 dpi can be assigned for one line, but an F address value corresponding to 4800 dpi, which is the resolution in the sub-scanning direction of the VCSEL 200, is assigned in advance to the F address. By controlling the driving of the semiconductor laser element of the VCSEL 200 at the 4800 dpi level, it becomes possible to execute a higher-definition zoom control.

  Then, the image path selector 358 determines whether or not the transfer of the pixel data in the default F address range assigned at 1200 dpi has been completed by comparing the F address value or receiving the end character bit (step S16), and the sub-scanning range. When it is determined that the scanning of (2) is completed (step S16: Yes), the reference address generation unit 354a sets the next R address value (step S17). Thereafter, the sub-scanning scaling unit 352 determines whether or not the scanning of the main scanning range has ended (step S18). When the scanning range in the main scanning direction has not ended (step S18: No), the process branches to step S12, and the processes from step S12 to S18 are repeated.

  On the other hand, if the image path selector 358 determines in step S16 that scanning of the sub-scanning range has not ended (step S16: No), the process branches to step S12 until the F-address value of the scanning range ends. The processes from step S12 to S16 are repeated. If the sub-scanning scaling unit 352 determines in step S18 that the address range to be processed for the image receiving material has finally ended (step S18: Yes), the processing ends.

  FIG. 14 is an explanatory diagram showing addition / deletion positions before pixel position correction and addition / deletion positions after position correction. In the example of FIG. 14, the pixels at coordinates (0, 16) and (4, 16) coincide with the black pixels, so that the scaling process pixel has moved to coordinates (0, 19) and (4, 19). Is shown.

  FIG. 15 is an explanatory diagram illustrating an example of an image that has been subjected to scaling processing with respect to the addition / deletion position before pixel position correction and the addition / deletion position after position correction. In FIG. 15, a portion where the black line becomes 3 pixels occurs as indicated by a circle before the position correction, but the black line width is 4 pixels in the image subjected to the scaling process at the addition / deletion position after the position correction. Side effects such as banding can be reduced.

  As described above, in the present embodiment, a thin black line or a thin white line is recognized by matching by the pattern recognition unit 354c, and the addition / deletion position by the scaling process matches the thin black line or the thin white line by the address conversion unit 354b. In this case, since the addition or deletion position is shifted, it is possible to reduce the thinning or thickening of thin black lines or thin white lines, and to prevent the occurrence of banding.

  In the present embodiment, since the pattern recognition unit 354c recognizes the pattern assuming dither, not only the lines but also side effects on dither can be reduced.

  In this embodiment, since a predetermined amount is written while being shifted in the sub-scanning, the circuit configuration can be simplified and the circuit scale can be reduced.

(Embodiment 2)
Next, a second embodiment will be described. The mechanical configuration of the image forming apparatus of the present embodiment is the same as that of the first embodiment. FIG. 16 is a block diagram illustrating a functional configuration of the image processing unit according to the second embodiment. As shown in FIG. 16, the image processing unit according to the present embodiment mainly includes a resolution conversion unit 356, a sub-scanning scaling unit 352, and an address generation unit 1654. Here, functions and configurations of the resolution conversion unit 356 and the sub-scanning scaling unit 352 are the same as those in the first embodiment.

  The address generation unit 1654 of this embodiment includes a reference address generation unit 354a, an address conversion unit 354b, a pattern recognition unit 354c, and a bit conversion unit 354d. Here, the functions and configurations of the reference address generation unit 354a, the address conversion unit 354b, and the pattern recognition unit 354c are the same as those in the first embodiment.

  The bit conversion unit 354d binarizes when the input image data is 2 bits. For example, the bit conversion unit 354d converts 11 (binary number) to 1, 10 (binary number) to 1, 01 (binary number) to 1, and 00 (binary number) to 0. In pattern matching by the pattern recognition unit 354c, it is determined as 1: black, 0: white.

  Further, the bit conversion unit 354d may be configured to convert multi-value data 2 bits into ternary values. In this case, the bit conversion unit 354d converts 11 (binary number) into 2, 10 (binary number) into 1, 01 (binary number) into 1, and 00 (binary number) into 0. In this case, in the pattern matching by the pattern recognition unit 354c, it is determined as 2: black, 1: halftone, 0: white.

  In the scaling process of the present embodiment, the bit conversion process by the bit conversion unit 354d is performed between step S12 and step S13 in the scaling process described with reference to FIG.

  As described above, in the present embodiment, the input image data is subjected to bit conversion processing before the pattern matching processing of the pattern recognition unit 354c for the input image of multi-value data. Side effects can be further reduced.

(Embodiment 3)
Next, Embodiment 3 will be described. The mechanical configuration of the image forming apparatus of the present embodiment is the same as that of the first embodiment. FIG. 17 is a block diagram illustrating a functional configuration of the image processing unit according to the third embodiment. As shown in FIG. 17, the image processing unit according to the present embodiment mainly includes a resolution conversion unit 356, a sub-scanning scaling unit 1758, a pattern recognition unit 1754c, and an image correction unit 360. Here, the function and configuration of the resolution conversion unit 356 are the same as those in the first embodiment.

  As shown in FIG. 17, the sub-scan scaling unit 1758 includes a reference address generation unit 1754a, a shift holding memory 356, and an image path selector 358.

  As in the first embodiment, the reference address generation unit 1754a determines an address value to which an image bit is added or deleted by the sub-scanning scaling process. The image path selector 358 adds and deletes images according to the address value determined by the reference address generation unit 1754a, and shifts and shifts the image data.

  The pattern recognition unit 1754c performs pattern matching on the image data on which the sub-scanning scaling process has been performed using the same image matrix as that in the first embodiment. When the pattern recognition unit 1754c matches a predetermined correction target pattern, the pattern recognition unit 1754c outputs the image data of the target pixel to the image correction unit 360, and the image correction unit 360 outputs the input image data to predetermined lighting data. Convert to

  FIG. 18 is a schematic diagram illustrating an example in which pixel deletion by the reduction process is applied to a 1200 dpi black 1 pixel portion and the pixel is thinned. When the pixel of interest matches the pattern shown on the left side of FIG. 18, the pattern recognition unit 1754c outputs match data = 1. When the match data = 1, the image correction unit 360 converts the target pixel into F [hex] representing a black pixel.

  Image conversion in the image correction unit 360 is performed as follows.

match = 0 → no correction match = 1 → F [hex] (black pixel)
match = 2 → 0 [hex] (white pixel)
FIG. 19 is a schematic diagram showing an example of image correction when pixel addition by enlargement processing is applied to a 1200 dpi black 1-pixel portion. If the line width correction is not performed, the white pixels added by the enlargement process are not resolved in the electrophotography, and the black pixels appear to be thick. In this embodiment, in order to perform image correction as shown in FIG. 19, pattern matching is performed by the pattern recognition unit 1754c as shown in FIGS. 20 and 21, and image data of the pixel of interest is corrected by the image correction unit 360, respectively. .

  FIG. 22 is a flowchart illustrating the procedure of the scaling process according to the third embodiment. Steps S31 and S32 are performed in the same manner as in the first embodiment.

  Then, the image path selector 358 rewrites the R address value set in step S31 and the F address value after the F address calculated in step S32 by incrementing or deleting by one line, and corresponds to the calculated F address. An image bit is set in a pixel given by an address (R address value, F address value) of the sub-scan line to be executed (step S33). That is, the image path selector 358 performs a correction process on the pixels located at the R address value and the F address value.

  Then, the pattern recognition unit 1754c performs pattern matching on the image data subjected to sub-scanning scaling, and if it is determined to be a target pattern, the image correction unit 360 converts the image data into predetermined image data (step S34).

  The subsequent processing from step S35 to S38 is performed in the same manner as the processing from step S15 to S18 of the scaling process of the first embodiment.

  As described above, in the present embodiment, after F pixels and R addresses are obtained and pixels are added / deleted, pattern matching is performed, and image correction is performed according to the result. Similarly, occurrence of banding can be prevented.

  In this embodiment, pattern matching is performed on binary image data and converted to F [hex] or 0 [hex]. However, pattern matching is performed on halftone image data for conversion. You may comprise.

  The image forming method described above is executed by a computer installed in the image forming apparatus, described in a programming language such as an assembler or C language, and can be a computer-readable program, or a computer-readable program for recording the program. It can be stored in a recording medium.

  The image forming apparatus has been described with reference to the embodiments shown in the drawings. However, the present invention is not limited to the embodiments, and other embodiments, additions, modifications, deletions, and the like will occur to those skilled in the art. It can be changed within the range that can be performed, and any embodiment is included in the scope of the present invention as long as the operation and effect of the present invention are exhibited.

100 Image forming apparatus 102 Optical apparatus 102a Polygon mirror 102b Reflecting mirror 102c Second cylindrical lenses 104a, 106a, 108a, 110a Photosensitive drums 104b, 106b, 108b, 110b Chargers 104c, 106c, 108c, 110c Developer 112 Image forming unit 114 Intermediate transfer belts 114a, 114b, 114c Conveying roller 118 Secondary transfer belt 120 Fixing device 122 Transfer unit 124 Image receiving material 130 Fixing member 132 Printed matter 200 VCSEL
201 Control Device 202 First Cylindrical Lens 204 Reflective Mirror 206 Imaging Lens 208 Reflective Mirror 210 Synchronization Detection Device 300 Control Unit 302 Scanner Unit 304 VPU
306 IPU
308 Printer unit 310 GAVD
312 LD driver 316 System bus 330 Main control unit 340 Memory 342 Image processing unit 344 Output data control unit 350 Resolution conversion unit 352, 1758 Sub-scan scaling unit 354, 1654 Address generation unit 354a, 1754a Reference address generation unit 354b Address conversion unit 354c, 1754c Pattern recognition unit 356 Shift holding memory 358 Image path selector 360 Image correction unit

Japanese Patent No. 3373266

Claims (9)

Position determining means for performing position determination processing for determining a pixel position of a correction pixel to be corrected based on a position in the main scanning direction of the pixel serving as a reference for scaling image data composed of a plurality of pixels;
Scaling means for scaling the image data by adding or deleting the correction pixels at the pixel positions of the image data;
Pattern recognition means for recognizing whether or not a pixel row in the sub-scanning direction including a pixel at the pixel position matches a predetermined pattern;
A pixel position changing means for shifting the pixel position in the sub-scanning direction by an amount of shift determined according to the matching pattern when the pixel column and the pattern match;
An image forming apparatus comprising: The pixel position indicates the position of a post-processing pixel that represents a pixel after double density processing that increases the pixel density of the pre-processing pixel that represents a pixel included in the image data,
The pattern is a pattern of a pixel column of the pre-processing pixels,
The pattern recognition unit recognizes whether or not the pixel pattern of the pre-processing pixel in the sub-scanning direction including the pre-processing pixel corresponding to the post-processing pixel indicated by the pixel position matches the pattern. ,
The image forming apparatus according to claim 1. The pattern is a pattern including black pixels and white pixels before and after the black pixels,
The pixel position changing means determines the pixel position by an amount corresponding to the shift amount corresponding to one or more of the pre-processing pixels, which is determined according to the matching pattern when the pixel column and the pattern match. Shift in the sub-scanning direction,
The image forming apparatus according to claim 2. The pattern is a pattern including white pixels and black pixels before and after the white pixels,
The pixel position changing means determines the pixel position by an amount corresponding to the shift amount corresponding to two or more pre-processing pixels, which is determined according to the matching pattern when the pixel column and the pattern match. Shift in the sub-scanning direction,
The image forming apparatus according to claim 2. The pixel position changing means further includes bit conversion means for binarizing the multi-value image data as the image data,
The pattern recognition means recognizes whether or not the pattern and a pixel row in the sub-scanning direction including a pixel at the pixel position of the binarized image data match. The image forming apparatus described. The pixel position changing means further includes bit conversion means for ternarizing the multi-value image data as the image data,
The pattern recognition means recognizes whether or not the pattern and a pixel row in a sub-scanning direction including a pixel at the pixel position of the ternary image data match each other. The image forming apparatus described. A position determining step for performing a position determining process for determining a pixel position of a correction pixel to be corrected based on a position in the main scanning direction of the pixel serving as a reference for scaling image data composed of a plurality of pixels;
A scaling step for scaling the image data by adding or deleting the correction pixel at the pixel position of the image data;
A pattern recognition step for recognizing whether or not a pixel row in the sub-scanning direction including a pixel at the pixel position matches a predetermined pattern;
A pixel position changing step of shifting the pixel position in the sub-scanning direction by an amount of shift determined according to the matched pattern when the pixel column and the pattern match;
An image forming method comprising: Computer
Position determining means for performing position determination processing for determining a pixel position of a correction pixel to be corrected based on a position in the main scanning direction of the pixel serving as a reference for scaling image data composed of a plurality of pixels;
Scaling means for scaling the image data by adding or deleting the correction pixels at the pixel positions of the image data;
Pattern recognition means for recognizing whether or not a pixel row in the sub-scanning direction including a pixel at the pixel position matches a predetermined pattern;
A pixel position changing means for shifting the pixel position in the sub-scanning direction by an amount of shift determined according to the matching pattern when the pixel column and the pattern match;
An image forming program for functioning as   A computer-readable recording medium on which the image forming program according to claim 8 is recorded.