JP2014011708A - Bidirectional communication system, semiconductor driving device, and power conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a transfer communication system that prevents the loss of information and generation of a short-circuit current at the interference of a transmission/reception pulse.SOLUTION: A bidirectional communication system performs communication between a first circuit and second circuit via a transformer. The first circuit includes: a first pulse driving unit that transmits a pulse to the second circuit; and a first pulse reception unit that receives a pulse from the second circuit. The second circuit includes: a second pulse driving unit that transmits a pulse to the first circuit; and a second pulse reception unit that receives a pulse from the first circuit. In addition, the first circuit or second circuit includes means that detects an interference of the transmission/reception pulse by determining a conductive current of the transformer or a terminal voltage.

Description

  The present invention relates to a bidirectional communication system that transmits and receives bidirectional pulse signals via a transformer, a semiconductor drive device using the bidirectional communication system, and a power conversion device using the semiconductor drive device.

In general, a bidirectional communication system applied to a large-scale industrial device needs to perform communication in a poor noise environment. Examples of such large industrial equipment include transportation devices such as high-speed railways, power generation equipment such as wind power generation, and power converters used in other factories.
A power conversion device such as an inverter required for such a device realizes power conversion by a switching operation of a semiconductor switching element.
A semiconductor driving device that controls the switching operation is between a semiconductor switching element and a higher-order logic unit that is a control circuit that generates a driving signal for the semiconductor switching element while being exposed to a noise environment generated when the semiconductor switching element is switched. Therefore, it is necessary to ensure communication with high insulation.
As a signal transmitted by the semiconductor drive device, there is a drive command signal transmitted from the higher-order logic unit side (referred to as the primary side) to the semiconductor switching element side (referred to as the secondary side). In addition, there is an on / off state signal of the semiconductor switching element transmitted from the semiconductor switching element side to the higher-order logic unit side. In addition, there are error signals and the like that indicate power supply abnormality and inverter arm short circuit. These signals need to be transmitted and received bidirectionally through insulation.
As such a communication circuit via insulation, a method of communicating via an insulation transformer using magnetic coupling is known. In this case, it is possible to reduce component costs by realizing bidirectional communication with a single insulating transformer. For example, Patent Document 1 discloses a method for realizing transmission / reception of the drive command signal and the on / off state signal by half-duplex communication.

International Publication No. 2011/018835 Pamphlet

However, in the method disclosed in Patent Document 1, when the synchronization of the clocks on the primary side and the secondary side, which are prerequisites for half-duplex communication under a more severe noise environment, cannot be maintained, interference between transmission and reception signals is caused. Occurs, and normal signal reception and transmission cannot be performed. Further, there is a possibility that element destruction may occur due to a short-circuit current generated at the time of interference.
In addition, since a signal cannot be transmitted at an arbitrary timing asynchronously, there is a problem that a delay occurs in transmission of a signal to be preferentially transmitted such as an error signal transmitted at the time of abnormality.

  The present invention was devised in view of the above-described problems, and is a bidirectional communication system that prevents the loss of information and the occurrence of a short-circuit current that occur at the time of interference between transmission and reception pulses, a semiconductor drive device using the communication system, and An object of the present invention is to provide a power converter using the semiconductor drive device.

In order to solve the above-described problems and achieve the object of the present invention, the present invention is configured as follows.
That is, the bidirectional communication system of the present invention includes a transformer, a first circuit that communicates via the transformer, and a second circuit. The first circuit applies a pulse to the second circuit. And a first pulse receiving unit for receiving a pulse from the second circuit, the second circuit transmitting a pulse to the first circuit. 2 pulse driving units and a second pulse receiving unit that receives pulses from the first circuit, and at least one of the first circuit and the second circuit includes the transformer. Means for detecting interference of the transmission / reception pulse by determining a conduction current or a terminal voltage.
In the semiconductor drive device of the present invention, the command signal output from the higher-order logic unit is input as an input signal to the first circuit connected to the primary side of the transformer, and connected to the secondary side of the transformer. The bidirectional communication system that uses the signal decoded by the second circuit is provided, and on / off of the semiconductor switching element is controlled based on the command signal.
The power conversion device of the present invention includes a plurality of upper and lower arms configured by connecting two semiconductor switching elements in series, and a plurality of the semiconductor drive devices that control on / off of the plurality of semiconductor switching elements. Is provided.
Other means will be described in the embodiment for carrying out the invention.

  As mentioned above, according to this invention, the bidirectional | two-way communication system which prevents the loss of the information which generate | occur | produces at the time of interference of a transmission / reception pulse and generation | occurrence | production of a short circuit current, the semiconductor drive device using the communication system, and the power conversion using the semiconductor drive device An apparatus can be provided.

It is a figure which shows the basic composition of the bidirectional | two-way communication system which concerns on 1st Embodiment of this invention. It is a figure which shows the basic composition of the bidirectional | two-way communication system which concerns on 2nd Embodiment of this invention. It is a figure which shows the basic composition of the bidirectional | two-way communication system which concerns on 3rd Embodiment of this invention. It is a figure which shows the 1st example of the specific structure of the pulse output stage contained in a transformer and a pulse drive circuit in the bidirectional | two-way communication system which concerns on 3rd Embodiment of this invention. It is a figure which shows the 2nd example of the specific structure of the pulse output stage contained in a transformer and a pulse drive circuit in the bidirectional | two-way communication system which concerns on 3rd Embodiment of this invention. It is a figure which shows the structure of the semiconductor drive device which concerns on 4th Embodiment using the bidirectional | two-way communication system of this invention. It is a figure which shows the structure of the semiconductor drive device which concerns on 5th Embodiment using the bidirectional | two-way communication system of this invention. It is a figure which shows the structure of the power converter device which concerns on 6th Embodiment using the semiconductor drive device of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<First Embodiment>
[Configuration of bidirectional communication system]
First, the basic configuration of the bidirectional communication system according to the first embodiment of the present invention will be described.
FIG. 1 is a diagram showing a basic configuration of a bidirectional communication system SY1 according to the first embodiment of the present invention.
In FIG. 1, the bidirectional communication system according to the first embodiment includes a primary circuit 101 (first circuit) and a secondary circuit 201 (second circuit) with a transformer 8 inserted.
The primary circuit 101 includes a transmission signal generation circuit 11, a decoded signal generation circuit 12, a pulse drive circuit 13 (first pulse drive unit), a pulse reception circuit 14 (first pulse reception unit), a current sensor 15, and an interference. A detection circuit 16 (means for detecting interference) and an output stage control circuit 17 are provided.
The secondary circuit 201 includes a pulse driving circuit 23 (second pulse driving unit), a pulse receiving circuit 24 (second pulse receiving unit), a synchronization control circuit 20 (synchronizing means), a transmission signal generating circuit 21, and a decoding circuit. A signal generation circuit 22 is provided.
Further, the primary side circuit 101 and the secondary side circuit 201 are connected via an electromagnetically coupled primary winding N1 and secondary winding N2 of the transformer 8.

In the primary side circuit 101, when the signal S _I1 is input, the transmission signal generation circuit 11 converts the signal S _I1 into a pulse signal sequence _SDP1 , and the pulse driving circuit 13 passes through the transformer 8 at a predetermined voltage level (pulse high). A pulse signal is transmitted to the secondary side circuit 201. In general, this pulse signal can be transmitted by multiplexing information by transmitting it at a plurality of voltage levels, widths, and periods.

During a period when the pulse driving circuit 13 is not transmitting a pulse, the pulse receiving circuit 14 receives the pulse signal transmitted from the secondary side circuit 201 and generates a reception signal S _RP1 . The generated reception signal S _RP1 is decoded by the decoded signal generation circuit 12 and the information transmitted from the secondary circuit 201 to generate an output signal S _O1 .
In order to prevent the pulse signal transmitted by the pulse drive circuit 13 from being directly received by the pulse reception circuit 14, the reception circuit control signal _SRE1 is transmitted from the pulse drive circuit 13 to the pulse reception circuit 14, and the pulse transmission period During reception, the reception function is stopped.
The functions and operations of the current sensor 15, the interference detection circuit 16, and the output stage control circuit 17 in the primary circuit 101 will be described later.

Similarly, the secondary side circuit 201 has the above-described configuration, and corresponds to the circuit included in the primary side circuit 101, the transmission signal generation circuit 21, the decoded signal generation circuit 22, the pulse drive circuit 23, and the pulse reception circuit. 24. In addition, a synchronization control circuit 20 for realizing half-duplex communication is provided.
The synchronization control circuit 20 generates, for example, a clock signal S _CK2 synchronized with the primary side from the reception signal S _RP2 generated by the pulse reception circuit 24, whereby the transmission signal generation circuit 21 causes the pulse drive circuit 23 to generate a pulse. It is possible to generate a pulse signal sequence S _DP2 to be transmitted at a timing at which transmission is not performed.
By using this pulse signal sequence S _DP2 , the pulse signal sequence S _DP1 which is the transmission signal of the primary side circuit and the pulse signal sequence S _DP2 which is the transmission signal of the secondary side circuit do not overlap with each other. Since it can be sent, half-duplex communication can be performed.

As described above, half-duplex communication is possible by the above-described method even with a circuit that does not include the current sensor 15, the interference detection circuit 16, and the output stage control circuit 17 in the primary circuit 101.
However, in the half duplex communication as it is, there is a possibility that the following problems occur.
That is, when the pulse receiving circuit 24 receives an error due to noise, for example, the clock signal _SCK2 becomes asynchronous with the primary clock, and the pulse driving circuit 23 is in a period during which the primary pulse driving circuit 13 is transmitting a pulse. May cause interference between transmission and reception pulses.
Similarly, when an error signal or the like at the time of abnormality is transmitted at an arbitrary timing asynchronous with the primary side clock, interference of transmission and reception pulses may occur in the same manner.
During the period in which the transmission / reception pulse interference is occurring, the reception function of the pulse reception circuit 14 and the pulse reception circuit 24 is stopped based on the reception circuit control signal S _RE1 and the reception circuit control signal S _RE2. Information loss occurs in both S _RP1 and received signal S _RP2 .

Alternatively, if there is a difference in the amplitude of the transmission / reception pulse, it is possible to operate the pulse reception circuit even during the pulse transmission period, but in this case as well, the pulse amplitude is increased because the conduction current of the transformer increases or decreases due to pulse interference. Changes, and the pulse receiving circuit cannot correctly determine the signal.
Furthermore, when increasing the drive current of the pulse drive circuit with the aim of improving noise resistance, the impedance of the circuit will be low during pulse transmission, so a short-circuit current may occur during pulse interference, causing element destruction. It is also a problem that this possibility arises.

In order to prevent such information loss and short-circuit current on both the primary side and the secondary side that occur during pulse interference, the communication system according to the first embodiment detects interference and stops transmitting pulses. Means are further provided. That is, as this means, the primary side circuit 101 includes the current sensor 15, the interference detection circuit 16, and the output stage control circuit 17.
Next, the method will be described.

[Characteristic functions and operations of bidirectional communication system]
The current sensor 15 shown in FIG. 1 is a means for monitoring the conduction current _IPL1 flowing through the primary winding of the transformer 8. The interference detection circuit 16 detects pulse interference from the difference in current (I _PL1 ) flowing through the current sensor 15, and generates an interference detection signal _STI1 .
Based on the interference detection signal S _TI1, output stage control circuit 17 sends an output stage stop signal S _BE1 to the pulse drive circuit 13, the transmission of the primary side of the pulse stops, capable of receiving a pulse receiving circuit 14 In this state, the signal transmitted from the secondary side can be received without interference.
Therefore, it is possible to preferentially receive information that requires real-time performance such as an error signal or information with higher priority without losing information on both the primary side and the secondary side.
In addition, the short circuit current can be stopped.

Also, the interference detection circuit 16, upon detecting a time interference, until no flow conduction current I _PL1 of the transformer 8, continues to generate an interference detection signal S _TI1. Thereby, even after the pulse drive circuit 13 is stopped, it can be detected that the pulse is transmitted from the secondary side, and the stop state of the pulse drive circuit 13 can be maintained.
Note that the method of determining by the interference detection circuit 16 based on the signal of the current sensor 15 is generally more resistant to noise than the method of determining by the interference detection circuit 16 based on the signal of the voltage determination circuit 18 shown in FIG. It is easy to ensure the sex.

The signal S _I1 input to the primary side circuit 101, the signal S _O1 output from the primary side circuit 101, the signal S _I2 input to the secondary side circuit 201, and the signal S _O2 output from the secondary side circuit 201. The use and function signals are selected and set according to the use of the equipment connected to the bidirectional communication system SY1.

Second Embodiment
[Configuration of bidirectional communication system]
Next, the basic configuration of the bidirectional communication system according to the second embodiment of the present invention will be described.
FIG. 2 is a diagram showing a basic configuration of a bidirectional communication system SY2 according to the second embodiment of the present invention.
In FIG. 2, the secondary side circuit 201 has the same configuration as the secondary side circuit 201 of the first embodiment shown in FIG. A duplicate description is omitted.
In the primary side circuit 102, the configuration of the transmission signal generation circuit 11, the decoded signal generation circuit 12, the pulse drive circuit 13, the pulse reception circuit 14, and the output stage control circuit 17 is substantially the same as that of the primary side circuit 101 of the first embodiment. It is the same configuration. A duplicate description is omitted.

The primary side circuit 102 differs from the primary side circuit 101 in that there is no current sensor 15, and instead, the voltage determination circuit 18 uses a differential voltage V _PL1 of the transformer 8 at both ends of the primary winding N 1 of the transformer 8. _Is detected and the voltage level signal _SDV1 is sent to the interference detection circuit 16 for control.
That is, two-way communication system SY1 according to the first embodiment shown in FIG. 1, while detecting the interference by monitoring the conduction current I _PL1 of the transformer 8, the of the present invention shown in FIG. 2 2 two-way communication system SY2 according to the embodiment, on the basis of the differential voltage V _PL1 of the transformer 8, which detects the interference pulse. Below, it demonstrates centering on difference with 1st Embodiment.

[Characteristic functions and operations of bidirectional communication system]
The voltage determination circuit 18 determines the differential voltage V _PL1 of the transformer 8 at a plurality of levels, and generates a voltage level signal S _DV1 .
Interference detection circuit 16, based on the voltage level signal _{S DV1,} in which detecting interference pulses from the change of the differential voltage _{V PL1} of the transformer 8, and generates an interference detection signal _{S TI1.}
In this case, once the interference detection circuit 16 detects interference, the interference detection circuit 16 continues to generate the interference detection signal _STI1 until the pulse reception circuit 14 _stops receiving the pulse signal. Thereby, the transmission of the pulse is stopped on the primary side, and the pulse signal transmitted from the secondary side is preferentially received.

As described above, the detection of interference between transmission and reception signals in the second embodiment is based on the differential voltage _VPL1 of the transformer 8 as described above, and in the detection of only the conduction current _IPL1 of the transformer 8 of the first embodiment. It is an example that there are various methods.
Note that the determination by the interference detection circuit 16 based on the signal of the voltage determination circuit 18 shown in FIG. 2 is more general than the determination by the interference detection circuit 16 based on the signal of the current sensor 15 shown in FIG. Has a feature of ensuring high accuracy.

<Third Embodiment>
[Configuration of bidirectional communication system]
Next, the basic configuration of a bidirectional communication system according to the third embodiment of the present invention will be described.
FIG. 3 is a diagram showing a basic configuration of a bidirectional communication system SY3 according to the third embodiment of the present invention.
In FIG. 3, the secondary side circuit 201 has the same configuration as the secondary side circuit 201 of the first embodiment shown in FIG. A duplicate description is omitted.
In the primary side circuit 103, the configuration of the transmission signal generation circuit 11, the decoded signal generation circuit 12, the pulse drive circuit 13, the pulse reception circuit 14, and the output stage control circuit 17 is substantially the same as that of the primary side circuit 102 of the second embodiment. The configuration is the same as that of the primary side circuit 101 of the first embodiment. A duplicate description is omitted.
The difference between the primary side circuit 103 in FIG. 3 of the third embodiment and the primary side circuit 102 in FIG. 2 of the second embodiment and the primary side circuit 101 in FIG. 1 of the first embodiment is interference. The detection circuit 16 detects the interference of the pulse of the transmission / reception signal without using the voltage determination circuit 18 (FIG. 2, second embodiment) or the current sensor 15 (FIG. 1, first embodiment).

[Configuration example, function and operation of interference detection circuit 16]
Hereinafter, how the interference detection circuit 16 in FIG. 3 detects the interference of the pulses of the transmission / reception signal will be described.
Interference detection circuit 16 obtains the information S _DI1 obtained by monitoring the conduction current I _PL1 of the transformer 8 at the output stage of the pulse driving circuit 13, detects the interference pulses from the difference, to generate an interference detection signal S _TI1 . The specific means or obtained by the how the information S _DI1 conduction current I _PL1 monitors the transformer 8 at the output stage, Fig. 4, described later with reference to FIG.
Once the interference detection circuit 16 detects interference, the interference detection circuit 16 continues to generate the interference detection signal _STI1 until the pulse reception circuit 14 _stops receiving the pulse signal.
Thereby, the transmission of the pulse is stopped on the primary side, and the pulse signal transmitted from the secondary side is preferentially received. Hereinafter, a method of monitoring the conduction current _IPL1 of the transformer 8 at the output stage of the pulse drive circuit 3 will be exemplified.

<< First example of pulse output stage >>
FIG. 4 shows a first example of a specific configuration of pulse output stages 41 and 42 included in the transformer 8 and the pulse drive circuit 13 in the bidirectional communication system SY3 according to the third embodiment of the present invention shown in FIG. FIG. Only the pulse output stages 41 and 42 are clearly shown, and other notations are omitted.
In FIG. 4, in the pulse output stage 41, a series circuit of a P-type semiconductor switch M1, an N-type semiconductor switch M2, and a resistor 31, each composed of a MOSFET, is connected between a DC power supply V _DD1 and the ground.
Further, to the gate of the P-type semiconductor switch M1 to the gate of the gate voltage V _{M1, N-type} semiconductor switch M2 of the control signal is inputted the gate voltage V _M2 of the control signal.
The drains of the P-type semiconductor switch M1 and the N-type semiconductor switch M2 are connected to each other, and this connection point is connected to one end on the primary side of the transformer 8.
Further, the signal of the terminal voltage V _IF1 is output from the connection point between the source of the N-type semiconductor switch M2 and the resistor 31.

In the pulse output stage 42, a series circuit of a P-type semiconductor switch M3, an N-type semiconductor switch M4, and a resistor 32 made of MOSFETs is connected between the DC power supply V _DD1 and the ground (ground potential, sink). ing.
Further, to the gate of the P-type semiconductor switch M3 in the gate of the gate voltage V _{M3, N-type} semiconductor switch M4 control signals are input gate voltage V _M4 control signals.
The drains of the P-type semiconductor switch M3 and the N-type semiconductor switch M4 are connected to each other, and this connection point is connected to the other end on the primary side of the transformer 8.
Further, a signal of the terminal voltage V _IF2 is output from the connection point between the source of the N-type semiconductor switch M4 and the resistor 32.
Since the source of the N-type semiconductor switch M4 and the source of the N-type semiconductor switch M2 are connected to the ground potential via the resistors 32 and 31, respectively, the semiconductor switches M4 and M2 are both connected to the sink-side semiconductor switching element. Call it.

When a pulse is transmitted from the primary side using the pulse output stage 41 and the pulse output stage 42, for example, the pulse output stage 41 turns on the P-type semiconductor switch M1 and the N-type semiconductor switch M4. , Low gate voltage _{V M1} of the control signals applied to the gates of the P-type semiconductor switch M1 and the N-type semiconductor switch M2 (P-type, oN), Low (N-type gate voltage _{V M2} of the control signal, OFF).
At the same time, in the pulse output stage 42, the gate voltage V _M3 of the control signal applied to the gates of the P-type semiconductor switch M3 and the N-type semiconductor switch M4 is set to High (P type, OFF), and the control signal gate is supplied. The voltage _VM4 is controlled to be High (N type, ON).

By this control, approximately V _{DD1 is} output from the pulse output stage 41 and approximately ground potential is output from the pulse output stage 42, and a voltage is applied to the primary side of the transformer 8 to output a pulse.
In addition, the P-type semiconductor switch M1 and the N-type semiconductor switch M2 of the pulse output stage 41 and the P-type semiconductor switch M3 and the N-type semiconductor switch M4 of the pulse output stage 42 are voltages having a reverse combination of the above-described voltages. In this case, a reverse polarity voltage is applied to the primary side of the transformer 8 and a pulse is output.

  As described above, by controlling the pulse output stage 41 and the pulse output stage 42, it is possible to apply the ± bipolar pulse and the pulse to the primary winding N1 of the transformer 8.

At this time, the conduction current _{IPL1 of the} transformer is monitored by the terminal voltage V _IF2 of the resistor 32 or the terminal voltage V _{IF1 of the} resistor 31.
Therefore, the resistor 31 (resistor unit) and the resistor 32 (resistor unit) are current detectors (31, 32) that detect a current flowing through the pulse drive circuit (first pulse driver) 13.
The pulse output stage 41 and the pulse output stage 42 can also be used for the pulse drive circuit (second pulse drive unit) 23 of the secondary circuit 201.
FIG interference detection circuit 16 shown in 3, it is possible to detect an interference of transmit and receive signal pulses based on information S _DI1 transformer conduction current I _PL1 was monitored by the terminal voltage V _IF2 described above.
Here, since the terminal voltage V _IF2 increases when the short-circuit current is generated, the resistance of the N-type semiconductor switch M4 increases, so that the effect of reducing the short-circuit current more rapidly can be expected.

<< Second example of pulse output stage >>
FIG. 5 shows a second example of the specific configuration of the pulse output stages 51 and 52 included in the transformer 8 and the pulse driving circuit 3 in the bidirectional communication system SY3 according to the third embodiment of the present invention shown in FIG. FIG. Only the pulse output stages 51 and 52 are specified, and other notations are omitted.
Moreover, the pulse output stages 51 and 52 of FIG. 5 are modifications of the pulse output stages 41 and 42 shown in FIG.
In FIG. 5, a pulse output stage 51 is formed by connecting a series circuit of a P-type semiconductor switch M1, an N-type semiconductor switch M2, and an N-type semiconductor switch M5 made of MOSFETs between a DC power supply _VDD1 and a ground. ing.

Also inputs the control signal of the gate voltage V _M2 is the gate control signal, N-type semiconductor switch M2 gate voltage V _M1 to the gate of the P-type semiconductor switch M1. The gate and drain of the N-type semiconductor switch M5 are connected to each other.
In addition, a series circuit of a resistor 33, a resistor 34, and an N-type semiconductor switch M6 is connected between the DC power supply _VDD1 and the ground.
The gate of the N-type semiconductor switch M6 is connected to the gate of the N-type semiconductor switch M5.
_Further , the signal of the terminal voltage V _IF3 is output from the connection point between the resistor 33 and the resistor 34.
The configuration of the pulse output stage 51, to transfer the conduction current _{I PL1} of the transformer 8 by the current mirror circuit (semiconductor switches M1, M2, M5, M6, resistors 34 and 33), the terminal voltage _{V IF3,} is monitored by The point is different.

In the pulse output stage 52, a series circuit of a P-type semiconductor switch M3, an N-type semiconductor switch M4, and an N-type semiconductor switch M7 made of MOSFETs is connected between the DC power supply V _DD1 and the ground. .
Also inputs the control signal of the gate voltage V _M4 is the gate of the control signal, N-type semiconductor switch M4 of the gate voltage V _M3 to the gate of the P-type semiconductor switch M3. The gate and drain of the N-type semiconductor switch M7 are connected to each other.
In addition, a series circuit of a resistor 35, a resistor 36, and an N-type semiconductor switch M8 is connected between the DC power supply _VDD1 and the ground.
The gate of the N-type semiconductor switch M8 is connected to the gate of the N-type semiconductor switch M7.
_Further, a signal of the terminal voltage V _IF4 is output from the connection point between the resistor 35 and the resistor 36.

The configuration of the pulse output stage 52 is to transfer the conduction current _{I PL1} of the transformer 8 by the current mirror circuit (semiconductor switches M3, M4, M7, M8, resistors 35 and 36), the terminal voltage _{V IF4,} are monitored by The point is different.
The function of detecting the pulse interference of the transmission / reception signal associated with the pulse output stages 51 and 52 of FIG. 5 is compared with the function of detecting the interference of the pulse of the transmission / reception signal associated with the pulse output stages 41 and 42 of FIG. There is an effect that the detection sensitivity is high.

<Fourth embodiment>
[Configuration of semiconductor drive device]
Next, a semiconductor drive device according to a fourth embodiment using the bidirectional communication system of the present invention will be described.
FIG. 6 is a diagram showing a configuration of a semiconductor drive device GD1 according to the fourth embodiment using the bidirectional communication system of the present invention.
In FIG. 6, the primary side circuit 103 has the same configuration as the primary side circuit 103 of the third embodiment shown in FIG. A duplicate description is omitted.
In the secondary side circuit 204, the configuration of the transmission signal generation circuit 21, the decoded signal generation circuit 22, the pulse drive circuit 23, the pulse reception circuit 24, and the synchronization control circuit 20 is substantially the same as the secondary side circuit 201 of the third embodiment. It is a configuration. A duplicate description is omitted.

The difference is that the secondary side circuit 204 is newly provided with a state determination circuit 28 and a gate drive circuit 29.
The semiconductor drive device GD1 is configured by including the primary side circuit 103, the secondary side circuit 204, and the transformer 8.
A load R1 and a DC power supply (voltage V _B ) 39 are connected in series to the semiconductor drive device GD1 via a semiconductor switching element Q1 (switching element).
That is, the semiconductor drive device GD1 shown in FIG. 6 uses the two-way communication system SY3 according to the third embodiment of the present invention shown in FIG. 3 in the drive command signal and the semiconductor switching element for controlling the semiconductor switching element Q1. This is applied to a communication means for two-way communication with a status signal indicating the operating state of Q1.

As shown in FIG. 6, the semiconductor drive device GD1 converts a drive command signal for commanding on / off of the semiconductor switching element Q1 generated by a high-order logic unit (not shown) such as a microcomputer into a pulse signal sequence. To the secondary side and output to the gate drive circuit 29.
By controlling this circuit, on / off of the semiconductor switching element Q1 can be controlled.
Further, the semiconductor drive device GD1 determines the ON state of the semiconductor switching element Q1 by the state determination circuit 28, converts the state signal into a pulse signal sequence, and transmits it to the primary side, via the decoded signal generation circuit 12 , To a higher-order logic unit (not shown).

That is, as the semiconductor drive device GD1, the state determination circuit 28 and the gate drive circuit 29 are newly provided in the secondary side circuit 204, so that the signal SI1 input to the primary side circuit 103 of the semiconductor drive device GD1 is a drive command. A signal S _O1 that is a signal input and that is output from the primary side circuit 103 is used as a status signal output signal.
The higher-order logic unit can take an appropriate action (command) according to the status signal.
In the example shown in FIG. 6, the semiconductor switching element Q1 is used as a switch for controlling on / off of power supply from the DC power supply (voltage V _B ) 39 to the load R1.
FIG. 6 shows an example in which an IGBT (Insulated Gate Bipolar Transistor) is used as the semiconductor switching element Q1.

<Fifth Embodiment>
[Configuration of semiconductor drive device]
Next, a semiconductor drive device according to a fifth embodiment using the bidirectional communication system of the present invention will be described.
FIG. 7 is a diagram showing a configuration of a semiconductor drive device GD2 according to the fifth embodiment of the present invention.
The semiconductor drive device GD2 shown in FIG. 7 is obtained by adding an abnormality detection circuit 30 to the secondary side circuit 205 to the semiconductor drive device GD1 shown in FIG. The configuration of the secondary side circuit 205 other than the abnormality detection circuit 30 is the same. The overlapping description will be omitted as appropriate.
The configuration of the primary side circuit 104 is the same as the configuration of the primary side circuit 103 shown in FIG. 6, but the output of the decoded signal generation circuit 72 (FIG. 7) is a state signal output and an abnormal state signal output. It is different from the decoded signal generation circuit 12 (one output signal) of FIG. Since other configurations are the same, redundant description will be omitted as appropriate.

In FIG. 7, the abnormality detection circuit 30 detects an abnormality in the power supply voltage V _DD2 on the secondary side, and the abnormality state signal is sent to the transmission signal generation circuit 21 and referred to the control of the semiconductor drive device GD2. Is done.
More specifically, the abnormal state signal further passes from the transmission signal generation circuit 21 via the pulse drive circuit 23, the transformer 8, the pulse reception circuit 14, and the decoded signal generation circuit 72.
Then, the decoded signal generation circuit 72 transmits the abnormal state signal output S _E1 to the higher-order logic unit (not shown). In the example of FIG. 7, the abnormal state signal is preferentially transmitted asynchronously with the primary side clock.

In the above case, the abnormality detection circuit 30 is also referred to as a voltage abnormality determination circuit (30) because it detects an abnormality in the power supply voltage _VDD2 and determines the abnormality.
Further, since the semiconductor drive device GD2 has a configuration in which the abnormality detection circuit 30 is added to the semiconductor drive device GD1, functions other than the abnormality detection of the power supply voltage _VDD2 are the same. Therefore, the signal S _I1 input to the primary side circuit 103 is a drive command signal input, and the signal S _O1 output from the primary side circuit 103 is used as a status signal output signal. Further, as described above, the signal S _E1 is used as an abnormal state signal output.

<Sixth Embodiment>
[Power converter]
Next, a power conversion device according to a sixth embodiment using the semiconductor drive device of the present invention will be described.
FIG. 8 is a diagram showing a configuration of a power conversion device PT1 according to the sixth embodiment of the present invention.
In the power conversion device PT1 of the sixth embodiment, the semiconductor drive device GD1 according to the fourth embodiment described above or the semiconductor drive device GD2 according to the fifth embodiment is applied as a drive device for a semiconductor switching element in the power conversion device. Is.
As shown in FIG. 8, the power conversion device PT1 according to the sixth embodiment includes semiconductor switching elements Q11 to Q16 made of IGBT, diodes D11 to D16, semiconductor driving devices GD11 to GD16, and semiconductor driving devices GD11 to GD16. Thus, the semiconductor switching elements Q11 to Q16 are configured to include a higher-order logic unit L1 that generates a drive command signal that is a control signal for switching operation.

The power conversion device PT1 is an inverter device that converts the DC power of the DC power source 69 having the voltage V _B into AC power.
The power conversion device PT1 includes three sets of upper and lower arms in which two semiconductor switching elements (Q11 and Q12, Q13 and Q14, Q15 and Q16) are connected in series between the positive and negative terminals of the DC power supply 69 with the same polarity. It is connected.
Further, diodes D11 to D16 for circulating the load current are connected in reverse polarity and in parallel between the emitters and collectors of the semiconductor switching elements Q11 to Q16, respectively.
In addition, semiconductor drive devices GD11 to GD16 that output switching drive command signals are connected to the gate terminals of the semiconductor switching elements Q11 to Q16, respectively.

The connection points of the two semiconductor switching elements (Q11 and Q12, Q13 and Q14, Q15 and Q16) connected in series are AC output terminals, and are connected to the three-phase AC motor MO as a load. .
The power conversion device PT1 controls the switching operation of the semiconductor switching elements Q11 to Q16 via the semiconductor driving devices GD11 to GD16 by the higher-order logic unit L1, respectively, and the three-phase AC motor MO connected to the AC terminal. To supply AC power.
Here, the power conversion device PT1 generates a drive command signal for each of the semiconductor switching elements Q11 to Q16 by the higher-order logic unit L1, and passes this drive command signal to the semiconductor switching device Q11 via the semiconductor drive devices GD11 to GD16. The power conversion operation is performed by transmitting to the gate terminal (control terminal) of Q16.
At this time, since power conversion device PT1 transmits a drive command signal by insulated communication by semiconductor drive device GD11, the influence of noise generated during switching of semiconductor switching elements Q11 to Q16 is reduced. Therefore, the power conversion device PT1 can perform power conversion with high reliability.

<Other embodiments>
As mentioned above, although embodiment of this invention was explained in full detail with reference to drawings, this invention is not limited to these embodiment and its deformation | transformation, There exists a design change etc. of the range which does not deviate from the summary of this invention. Well, here are some examples:

<Current sensor / pulse receiving circuit>
In the first embodiment shown in FIG. 1, the pulse receiving circuit 14 is assumed to determine the differential voltage _VPL1 of the transformer 8. Therefore, in the case of determining the conduction current _IPL1 of the transformer 8 that is the drive current, an example using the current sensor 15 is shown.
However, when the pulse reception circuit 14 determines the conduction current _IPL1 of the transformer 8 that is a drive current, a signal is sent to the interference detection circuit 16 using a current sensor (not shown) included in the pulse reception circuit 14. Thus, the interference state can be detected. Therefore, the current sensor 15 can be omitted.
Further, the pulse receiving circuit 14 may determine both the transformer differential voltage _VPL1 and the transformer 8 conduction current _IPL1 .

《Interference detection means》
Further, in the first embodiment shown in FIG. 1, the case where there is an interference detection means (interference detection circuit 16) on the primary side is shown, but the case where there is an interference detection means (not shown) on the secondary side. Is the same.
Furthermore, interference detection means are provided on both the primary side and the secondary side, and it is possible to switch the priority signal among the primary side signal and the secondary side signal according to the type and timing of the signal. is there.

《Interference information transmission means》
In addition, in the configuration of the first embodiment shown in FIG. 1, when the clock desynchronization due to noise does not become a problem, that is, within a range that does not affect transmission and reception even if a signal interferes to some extent. In particular, by transmitting a pulse during the pulse reception period to generate interference, the interference of the transmission / reception pulse can be made into one information transmission means.
That is, in addition to the normal transmission / reception signal, the output signal indicating the presence or absence of interference of the interference detection circuit 16 can be used as the third signal to increase the signal amount and the information amount.

<Abnormality detection circuit>
In the fifth embodiment shown in FIG. 7, an example is shown in which the abnormality detection circuit 30 is provided for detecting an abnormality in the power supply voltage V _DD2 on the secondary side and determining the abnormality. In this case, as described above, the abnormality detection circuit 30 becomes the voltage abnormality determination circuit (30).
However, the detection of abnormality is not limited to the power supply voltage V _DD2 on the secondary side.
For example, as another example, it may be provided as one that detects an abnormality of the semiconductor switching element Q1 (FIG. 7) or another one that detects an abnormality of the secondary side circuit.
When the abnormality detection circuit 30 is used to detect a short circuit of the load R1 of the main circuit to which the semiconductor switching element Q1 is connected, a short circuit detection circuit (30) is provided.
When the abnormality detection circuit 30 is used to detect an abnormality in the current of the semiconductor switching element Q1, that is, the current flowing in the secondary circuit, the current abnormality detection circuit (30) is provided.
Further, when the abnormality detection circuit 30 is used to detect an abnormality of the voltage carried by the semiconductor switching element Q1, it becomes a voltage abnormality detection circuit (30).
Moreover, the abnormality detection circuit 30 may be provided with the functions of the voltage abnormality determination circuit (30), the short circuit detection circuit (30), the current abnormality detection circuit (30), and the voltage abnormality detection circuit (30) at the same time. A plurality of abnormality detection circuits 30 having different functions may be provided.

<< Application to other power converters >>
Further, in the sixth embodiment shown in FIG. 8, as an application example of the semiconductor drive device of the present invention to the power conversion device, an inverter device (DC-three-phase AC) for supplying AC power to the three-phase AC motor MO. Explained the case.
However, the application example is not limited to the power conversion device of the semiconductor drive device, and can be applied to other power conversion devices such as a DC-DC converter and an AC-DC converter.

<One-way communication>
Moreover, although the semiconductor drive device (GD11-GD16) in 6th Embodiment shown in FIG. 8 demonstrated that it was semiconductor drive device GD1 provided with the bidirectional | two-way communication system (SY3) shown in FIG. It is not limited to what performs bidirectional communication.
That is, unidirectional communication may be performed in which a control signal is input from the higher-order logic unit L1 and the decoded control signal is output to the semiconductor switching elements Q11 to Q16.

<Semiconductor switching element>
The semiconductor switching element Q1 in FIG. 6 and the semiconductor switching elements Q11 to Q16 as shown in FIG. 8 are represented by general symbols of IGBTs (Insulated Gate Bipolar Transistors) in FIGS. However, since it only needs to have a function as a switching element, it is not limited to IGBT. For example, MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), BJT (Bipolar junction transistor), BiCMOS (Bipolar Complementary Metal Oxide Semiconductor), or other suitable devices may be used. Furthermore, it may be a switching element having a switching function as described above even if it is not a semiconductor device.

《Semiconductor switch》
In FIGS. 4 and 5, the semiconductor switches (M1 to M8) are described as MOSFETs. However, it is not limited to MOSFET. The switching element by other devices as described above may be used.

11, 21 Transmission signal generation circuit 12, 22 Decoded signal generation circuit 13 Pulse drive circuit (first pulse drive unit)
14 Pulse receiving circuit (first pulse receiving unit)
15 Current sensor 16 Interference detection circuit (means for detecting interference)
17 Output stage control circuit 18 Voltage determination circuit 101, 102, 103 Primary side circuit (first circuit)
20 Synchronization control circuit (means for synchronizing)
23 Pulse drive circuit (second pulse drive unit)
24 Pulse receiving circuit (second pulse receiving unit)
201, 204, 205 Secondary circuit (second circuit)
28 State determination circuit 29 Gate drive circuit 30 Abnormality detection circuit, voltage abnormality detection circuit, short circuit detection circuit, current abnormality detection circuit 31, 32 Resistance (resistance means), current detection means 33-36 Resistance 39, 69 DC power supply 41, 42 , 51, 52 Pulse output stage 8 Transformers D11 to D16 Diodes GD1, GD2, GD11 to GD16 Semiconductor drive device L1 Upper logic part M1, M3 Semiconductor switch, P-type semiconductor switch M2, M4 Semiconductor switch, N-type semiconductor switch, Sink-side semiconductor switching element M5 to M8 Semiconductor switch, N-type semiconductor switch MO motor N1 winding, primary winding N2 winding, secondary winding PT1 power conversion device Q1, Q11 to Q16 Semiconductor switching element (switching element)
R1 load SY1, SY2, SY3 bidirectional communication system

Claims (14)

A transformer, and a first circuit and a second circuit that perform communication via the transformer,
The first circuit includes a first pulse driver that transmits a pulse to the second circuit, and a first pulse receiver that receives a pulse from the second circuit,
The second circuit includes a second pulse driver that transmits a pulse to the first circuit, and a second pulse receiver that receives a pulse from the first circuit,
further,
Two-way communication characterized in that at least one of the first circuit and the second circuit includes means for detecting interference of the transmission / reception pulse by determining a conduction current or a terminal voltage of the transformer. system. The bidirectional communication system according to claim 1,
When the first circuit or the second circuit detects interference of the transmission / reception pulse by means for detecting interference of the transmission / reception pulse during the transmission period of the pulse, the first circuit or the second circuit Stops transmitting pulses, and makes the first pulse receiving unit or the second pulse receiving unit receivable. The bidirectional communication system according to claim 1,
Furthermore, at least one of the first circuit and the second circuit includes means for synchronizing the clocks of the first circuit and the second circuit,
The pulse signal transmitted from the first pulse driver and the pulse signal transmitted from the second pulse driver are transmitted and received in half duplex using the means for synchronizing the clocks. Two-way communication system. The bidirectional communication system according to claim 1,
A bidirectional communication system, wherein the first circuit or the second circuit transmits a pulse during a pulse reception period, generates interference between transmission and reception pulses, and uses the presence or absence of the interference as information. The bidirectional communication system according to claim 1,
An output stage of the first pulse driving unit or the second pulse driving unit is provided with a current detection means for detecting a current flowing in the pulse driving unit;
A bidirectional communication system, wherein interference of the transmission / reception pulse is detected based on the current detection means. The bidirectional communication system according to claim 5, wherein
The bidirectional communication system, wherein the current detection means is a resistance means provided between a sink-side semiconductor switching element provided in an output stage of the pulse drive circuit and a ground. The bidirectional communication system according to claim 5, wherein
A current mirror circuit is provided at the output stage of the pulse drive circuit,
A bidirectional communication system, wherein interference between transmission and reception pulses is detected based on a current transferred by the current mirror circuit. The command signal output from the higher-order logic unit is input as an input signal to the first circuit connected to the primary side of the transformer, and is decoded by the second circuit connected to the secondary side of the transformer. With a two-way communication system,
Based on the command signal to control the on / off of the switching element,
The semiconductor communication apparatus according to claim 1, wherein the bidirectional communication system is the bidirectional communication system according to claim 1. The semiconductor drive device according to claim 8,
The bidirectional communication system further includes a state determination circuit that determines an on / off state of the switching element.
The second circuit transmits a determination result by the state determination circuit to the first circuit via the transformer, and the first circuit outputs the determination result to the higher-order logic unit. Semiconductor drive device. The semiconductor drive device according to claim 9,
The bidirectional communication system further includes a voltage abnormality determination circuit that determines a voltage abnormality of the second circuit,
The second circuit transmits a determination result based on the voltage abnormality determination time to the first circuit via the transformer, and the first circuit outputs the determination result to the upper logic unit. A semiconductor drive device. The semiconductor drive device according to claim 9,
Further, the bidirectional communication system includes a short circuit detection circuit that detects a load short circuit of the main circuit to which the switching element is connected,
The second circuit transmits a determination result by the short-circuit detection circuit to the first circuit via the transformer, and the first circuit outputs the determination result to the higher-order logic unit. Semiconductor drive device. The semiconductor drive device according to claim 9,
Furthermore, a current abnormality detection circuit for detecting an abnormality in the current flowing through the switching element is provided,
The second circuit transmits a determination result by the current abnormality detection circuit to the first circuit via the transformer, and the first circuit outputs the determination result to the higher-order logic unit. A semiconductor drive device. The semiconductor drive device according to claim 9,
Furthermore, a voltage abnormality detection circuit for detecting an abnormality of the voltage carried by the switching element is provided,
The second circuit transmits a determination result by the voltage abnormality detection circuit to the first circuit via the transformer, and the first circuit outputs the determination result to the upper logic unit. A semiconductor drive device. A power conversion device comprising a plurality of upper and lower arms configured by connecting two semiconductor switching elements in series, and a plurality of semiconductor drive devices for controlling on / off of the plurality of semiconductor switching elements,
14. The power conversion device according to claim 9, wherein the semiconductor drive device is the semiconductor drive device according to any one of claims 9 to 13.

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