JP2013251038A - Eetフィードバックを含むデータ処理のためのシステム及び方法 - Google Patents

Eetフィードバックを含むデータ処理のためのシステム及び方法 Download PDF

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Publication number
JP2013251038A
JP2013251038A JP2013076760A JP2013076760A JP2013251038A JP 2013251038 A JP2013251038 A JP 2013251038A JP 2013076760 A JP2013076760 A JP 2013076760A JP 2013076760 A JP2013076760 A JP 2013076760A JP 2013251038 A JP2013251038 A JP 2013251038A
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Japan
Prior art keywords
data
output
circuit
error count
data processing
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JP2013076760A
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English (en)
Japanese (ja)
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JP2013251038A5 (enExample
Inventor
Fan Zhang
チャン,ファン
Chung-Li Wang
ワン,チュン−リー
Yang Han
ハン,ヤン
Shaohua Yan
ヤン,シャオフア
Xuebin Wu
ウー,シュエビン
Haitao Xia
シア,ハイタオ
Ming Jin
ジン,ミン
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LSI Corp
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LSI Corp
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Publication date
Application filed by LSI Corp filed Critical LSI Corp
Publication of JP2013251038A publication Critical patent/JP2013251038A/ja
Publication of JP2013251038A5 publication Critical patent/JP2013251038A5/ja
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/6331Error control coding in combination with equalisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • H03M13/1111Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • H03M13/1128Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957Turbo codes and decoding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0047Decoding adapted to other signal detection operation
    • H04L1/005Iterative decoding, including iteration between signal detection and decoding operation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515Reed-Solomon codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/067DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Debugging And Monitoring (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
JP2013076760A 2012-05-30 2013-04-02 Eetフィードバックを含むデータ処理のためのシステム及び方法 Withdrawn JP2013251038A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/483,100 US20130322578A1 (en) 2012-05-30 2012-05-30 Systems and Methods for Data Processing Including EET Feedback
US13/483100 2012-05-30

Publications (2)

Publication Number Publication Date
JP2013251038A true JP2013251038A (ja) 2013-12-12
JP2013251038A5 JP2013251038A5 (enExample) 2016-05-19

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JP2013076760A Withdrawn JP2013251038A (ja) 2012-05-30 2013-04-02 Eetフィードバックを含むデータ処理のためのシステム及び方法

Country Status (6)

Country Link
US (1) US20130322578A1 (enExample)
EP (1) EP2670074A3 (enExample)
JP (1) JP2013251038A (enExample)
KR (1) KR20130135045A (enExample)
CN (1) CN103457613A (enExample)
TW (1) TW201349756A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9378765B2 (en) 2014-04-03 2016-06-28 Seagate Technology Llc Systems and methods for differential message scaling in a decoding process

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5912898A (en) * 1997-02-27 1999-06-15 Integrated Device Technology, Inc. Convolutional interleaver/de-interleaver
US6915479B2 (en) * 2001-05-17 2005-07-05 Matsushita Electric Industrial Co., Ltd. Apparatus and method for error correction
JP4277260B2 (ja) * 2003-05-15 2009-06-10 富士通株式会社 磁気ディスク装置、リードゲート最適化方法及びプログラム
US8347155B2 (en) * 2009-04-17 2013-01-01 Lsi Corporation Systems and methods for predicting failure of a storage medium

Also Published As

Publication number Publication date
US20130322578A1 (en) 2013-12-05
EP2670074A3 (en) 2014-10-29
TW201349756A (zh) 2013-12-01
KR20130135045A (ko) 2013-12-10
CN103457613A (zh) 2013-12-18
EP2670074A2 (en) 2013-12-04

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