JP2013249802A - Electronic control device for vehicle - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic control device for a vehicle easily synchronizing processing parts with each other without changing a reference time in each processing part.SOLUTION: A master CPU calculates a time difference (Td=Tm-Ts) of a receiving time Tm of a G2 signal in a self CPU and a receiving time Ts receiving from a slave CPU (S422) and calculates an injection time (Ti+Td) in a master CPU by adding the calculated time difference Td and the injection time Ti (S424) when receiving the injection time Ti instructing the master CPU set by the reference time of the self CPU by the slave CPU and the newest receiving time Ts receiving the G2 signal received by the slave CPU from the slave CPU (S420). The master CPU executes injection control processing to an injector (S428) when the injection time (Ti+Td) calculated in the S424 comes (S426:Yes).

Description

  The present invention relates to a vehicular electronic control device including a plurality of processing units.

  Conventionally, when processing units such as a plurality of CPUs are connected by communication, various configurations for synchronizing processing with each other have been proposed (see, for example, Patent Document 1). In Patent Document 1, a deviation value between a reference timing generated by a reference timing transmission unit of a processing unit and a reception timing of a synchronization frame received from another processing unit via communication is calculated, and based on this deviation value The reference timing is corrected. Thereby, it is going to synchronize the process of the other process part which transmitted the synchronous frame, and a self-process part.

JP 2009-182659 A

  The processing unit may include a process that is executed in synchronization with another processing unit and a process that does not require synchronization with the other processing unit. Therefore, if the reference timing is corrected and changed, the execution timing that has been executed based on the reference timing until correction is corrected for the processing that does not require synchronization with other processing units. Shift. As a result, there is a risk of malfunction.

  Further, since the reference timing generated by the reference timing transmission unit is corrected in order to correct the deviation of the reference timing from other processing units, there is a problem that the process for synchronization is complicated.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a vehicle electronic control device that easily synchronizes the processing units without changing the reference time in each processing unit.

  According to the vehicle electronic control device of the present invention, in the configuration in which the plurality of processing units receive the same signal that is periodically generated, at least one first processing unit of the plurality of processing units is each of the plurality of processing units. The reception time of the same signal stored in at least one other second processing unit other than the own processing unit is acquired, and the difference between the reception time of the second processing unit and the reception time stored in the own processing unit Then, the processing time when the processing unit executes processing is corrected, and the processing time of the processing unit is synchronized with the reference time of the second processing unit.

  As a result, the first processing unit can synchronize the processing time with the reference time of the second processing unit without correcting the reference time itself of the own processing unit. The timing of processing executed based on

  Further, in the first processing unit, even when different reception times are acquired from the plurality of second processing units, the different second processing units based on the difference between the respective reception times and the reception time of the first processing unit. The process can be executed in synchronization with the reference time.

  In addition, since the processing time when the processing unit executes processing is corrected based on the difference in reception time when the first processing unit and the second processing unit receive the same signal, the processing time of the processing unit is changed to the first processing unit. It is possible to easily synchronize with the reference time of the two processing units.

  According to the vehicle electronic control device of the present invention, the information acquisition means of the first processing unit is a first process that the second processing unit sets based on the execution command of the process executed by the first processing unit and the reference time. The processing time of the unit and the reception time of the second processing unit may be acquired from the second processing unit.

  According to this configuration, the first processing unit corrects the processing time acquired from the second processing unit with the time difference of the reception time, thereby changing the processing commanded by the second processing unit to the reference time of the second processing unit. Can be executed synchronously with

  The functions of the plurality of means provided in the present invention are realized by hardware resources whose functions are specified by the configuration itself, hardware resources whose functions are specified by a program, or a combination thereof. The functions of the plurality of means are not limited to those realized by hardware resources that are physically independent of each other.

The block diagram which shows the electronic controller for vehicles by 1st Embodiment. The time chart which shows the gap | deviation of reference | standard time. The flowchart which shows the reception process of G2 signal. The flowchart which shows the process information transmission process from a slave to a master. The flowchart which shows the synchronous process in a master. The block diagram which shows the electronic controller for vehicles by 2nd Embodiment. The block diagram which shows the vehicle electronic control apparatus by 3rd Embodiment.

[First Embodiment]
The vehicle electronic control device (vehicle ECU: Electronic Control Unit) 10 shown in FIG. 1 executes, for example, injection control and ignition control for an automobile gasoline engine (hereinafter also simply referred to as “engine”). It is. A vehicle ECU (hereinafter also simply referred to as an ECU) 10 is mainly composed of a master CPU 20, a slave CPU 30, and an input / output circuit (not shown).

  The master CPU 20 controls the injection time of the injector and the ignition time of the spark plug in synchronization with the crank angle. The slave CPU 30 performs AD conversion on the output signals of the various sensors, and determines the injection time of the injector and the ignition time of the spark plug in synchronization with the crank angle signal (NE signal) based on the AD conversion results. Then, the slave CPU 30 instructs the master CPU 20 to perform the injection control process and the ignition plug ignition control process by notifying the master CPU 20 of the injection time and the ignition time of the injector.

  The master CPU 20 and the slave CPU 30 have time measuring units 22 and 32, respectively. Further, the master CPU 20 has a deviation value calculation unit 24. The CPUs 20 and 30 are periodically generated in one combustion cycle (720 ° CA) represented by intake, compression, combustion, and exhaust, and a cylinder discrimination signal (G2) for discriminating which stroke each cylinder is performing. Signal) is input as the same signal. Furthermore, the slave CPU 30 inputs an NE signal in order to determine the injection time and the ignition time of the spark plug.

  The time measuring units 22 and 32 measure the reference time in the CPUs 20 and 30 as the built-in timers of the CPUs 20 and 30 based on the count number of the free run counter that counts up in synchronization with the clock. The reference time is a reference for the processing time when the master CPU 20 and the slave CPU 30 execute processing. The free-run counter is a counter that returns to an initial value when it overflows. The timer for measuring the reference time may be a timer provided outside the CPUs 20 and 30.

The deviation value calculation unit 24 calculates the difference between the reception times when the master CPU 20 and the slave CPU 30 input the G2 signal as the difference between the reference times measured by the time measurement units 22 and 32.
(Time difference)
Based on FIG. 2, the difference in reference time between the master CPU 20 and the slave CPU 30 will be described. The reference time measured by the free run counter in the master CPU 20 and the slave CPU 30 is shifted due to the difference in the start time between the master CPU 20 and the slave CPU 30 and the increase or decrease in the count number of the free run counter caused by noise or the like.

  Therefore, in this embodiment, the master CPU 20 and the slave CPU 30 store the reception times Tm and Ts when the G2 signal is input, respectively. Then, the slave CPU 30 notifies the master CPU 20 of the reception time Ts when the self CPU receives the G2 signal.

  The slave CPU 30 notifies the master CPU 20 of the injection time Ti of the injector determined at the reference time of the own CPU in synchronization with the NE signal before the injection time Ti. The slave CPU 30 instructs the master CPU 20 to perform the injection control process for the injector by notifying the master CPU 20 of the injection time Ti.

  When the master CPU 20 is notified of the injection time Ti and the reception time Ts at the slave CPU 30 from the slave CPU 30, the master CPU 20 calculates a time difference (Td = Tm−Ts) between the reception times of the master CPU 20 and the slave CPU 30 and the injection time Ti. By adding the time difference Td to the injector, the injector is caused to perform fuel injection at the time (Ti + Td) in the master CPU 20 synchronized with the injection time Ti determined by the slave CPU 30.

  Next, processing executed by the master CPU 20 and the slave CPU 30 according to a control program stored in the ROM or the like will be described. The following processing will be described for the injection control processing, but substantially the same processing is executed for the ignition control processing except that the processing time is different.

(Reception time storage process)
In S400 of FIG. 3, each time the G20 signal is received (S400: Yes), the CPUs 20 and 30 determine the reception time based on the reference time measured by the CPU, and store it in the RAM as a storage unit (S402). .

(Processing information transmission process)
The slave CPU 30 executes the process information transmission process of FIG. The slave CPU 30 calculates the injection time Ti of the injector in synchronization with the NE signal based on the output signals of various sensors (S410), and the latest reception time Ts at which the slave CPU 30 receives the G2 signal. As processing information to the master CPU 20 (S412).

(Synchronous processing)
The master CPU 20 executes the synchronization process of FIG. When the master CPU 20 receives the injection time Ti and the latest reception time Ts at which the slave CPU 30 receives the G2 signal (S420), the master CPU 20 receives the reception time Tm of the G2 signal at the own CPU 20 and the reception time Ts received from the slave CPU 30. A time difference (Td = Tm−Ts) is calculated (S422), and the calculated time difference Td and the injection time Ti are added to calculate the injection time (Ti + Td) in the master CPU 20 (S424).

Thereby, the injection time commanded to the injector by the master CPU 20 in synchronization with the reference time of the slave CPU 30 can be calculated.
When the injection time (Ti + Td) calculated in S424 is reached (S426: Yes), an injection control process for the injector is executed (S428).

  In the first embodiment, the slave CPU 30 notifies the master CPU 20 by communication of the injection time Ti and the reception time Ts of the G2 signal in the slave CPU 30, so that the master CPU 20 acquires the injection time Ti and the reception time Ts of the G2 signal. Even when there is no shared memory, the slave CPU 30 can instruct the master CPU 20 to perform the injection control process for the injector at the injection time Ti.

[Second Embodiment]
In the ECU 12 of the second embodiment shown in FIG. 6, the slave CPU 30 determines the injection time Ti of the injector determined at the reference time of its own CPU in synchronization with the NE signal, and the reception time Ts when its own CPU 20 receives the G2 signal. Are stored in the shared memory 40. Thus, the slave CPU 30 does not need to transmit the injection time Ti and the reception time Ts to the master CPU 20 when instructing the master CPU 20 to perform the injection control process by communication.

  When the master CPU 20 is instructed to perform the injection process control from the slave CPU 30, the master CPU 20 reads the injection time Ti and the reception time Ts of the slave CPU 30 from the shared memory 40, and the read reception time Ts and the reception time Tm of the G2 signal in the CPU 20 itself. The time difference Td is calculated. Then, the calculated time difference Td and the injection time Ti are added to determine the injection time (Ti + Td) in the master CPU 20.

  In the second embodiment, since the slave CPU 30 stores the injection time Ti and the reception time Ts of the CPU 30 in the shared memory 40 and does not transmit it to the master CPU 20, the transmission load can be reduced.

  In the first and second embodiments, the master CPU 20 corrects the injection time and the ignition time acquired from the slave CPU 30 from the time difference between the reception times of the master CPU 20 and the slave CPU 30 that receive the G2 signal. An injection time and an ignition time are calculated.

  Thereby, the injection time and ignition time in the master CPU 20 can be easily synchronized with the reference time of the slave CPU 30 without correcting the reference time of the master CPU 20.

  Further, when processing other than injection control and ignition control is executed in the master CPU 20 in synchronization with the reference time of the master CPU 20, it can be executed without deviating from the reference time of the own CPU.

[Third Embodiment]
In the ECU 14 of the third embodiment shown in FIG. 7, the CPUs 50 and 60 have time measuring units 52 and 62 and deviation value calculating units 54 and 64, respectively. Then, the CPUs 50 and 60 obtain the processing execution command, the processing time when executing the processing synchronized with the NE signal, and the reception time of the G2 signal from the other CPU, and mutually detect the deviation value calculation unit 54, 64, the time difference of the reception time is calculated, the processing time of the own CPU is corrected with the calculated time difference, and is synchronized with the reference time of the other CPU.

That is, one CPU executes the functions of both the first processing unit and the second processing unit described in the claims.
[Other Embodiments]
In the above embodiment, one CPU obtains the reception time of the G2 signal and the processing time when the processing is executed from the other one CPU. On the other hand, one CPU obtains a process execution command and a process time when the process is executed from a plurality of CPUs and a reception time of the G2 signal, and corrects the commanded process time with a time difference between the reception times Thus, the processing time may be synchronized with the reference time of each of the plurality of CPUs.

  Also in this case, since the CPU instructed to process does not correct the reference time of the own CPU, the processing time is corrected by the time difference between the reception times received from the other plural CPUs and the reception time of the own CPU. Thus, the processing time can be synchronized with the reference time of each of the plurality of CPUs.

  In addition, one common CPU notifies a plurality of CPUs of processing execution instructions and processing times when the processes are executed and reception times of the G2 signals, and the processing times of the processes instructed by each CPU are shared by the CPUs. It may be synchronized with the reference time.

In the present invention, the processing unit is not limited to the CPU, and each processor core may be used as the processing unit of the present invention when the CPU is configured with multiple cores.
The same signal in which each CPU stores the reception time may be any signal as long as it is a signal generated periodically. For example, instead of the G2 signal, a signal output in synchronism with the rotation by the valve timing adjustment device that adjusts the opening / closing timing of the valve that opens and closes the camshaft by controlling the rotation phase of the camshaft relative to the crankshaft is adopted as the same signal May be.

  Further, when the CPU is provided with a plurality of timers, the reference time may be measured by each timer according to the processing executed by the CPU, and the reception time when the G2 signal is received may be stored for each reference time. . That is, a plurality of reference times may be provided in the CPU. Then, the reception time of the G2 signal and the processing time when each process is executed are acquired from the other CPU, and the commanded processing time is corrected by the time difference between the corresponding reception times, thereby obtaining the reference of the other CPU. Synchronize processing time with time.

  In this case, the reception time of the G2 signal acquired from the other CPU and the processing time when each process is executed may be obtained from one reference time in the other CPU, or a plurality of timers in the other CPU. When the reference time is measured by the above, it may be obtained from the reference time corresponding to each commanded process.

  In the above-described embodiment, the functions of the reference time unit, the storage unit, the information acquisition unit, and the synchronization unit are realized by the CPU whose functions are specified by the control program. On the other hand, at least some of the functions of the plurality of means may be realized by hardware whose functions are specified by the circuit configuration itself.

  As described above, the present invention is not limited to the above-described embodiment, and can be applied to various embodiments without departing from the gist thereof.

10, 12, 14: ECU (electronic control device for vehicle), 20: Master CPU (first processing unit, reference time means, storage means, information acquisition means, synchronization means), 22, 32, 52, 62: Time measurement Part (reference time means), 24, 54, 64: deviation value calculation part (synchronization means), 30: slave CPU (second processing part, reference time means, storage means), 40: shared memory, 50, 60: CPU (First processing unit, second processing unit, reference time unit, storage unit, information acquisition unit, synchronization unit)

Claims (11)

A plurality of processing units (20, 30, 50, 60) for receiving the same signal generated periodically,
Each processing unit
A reference time means (22, 32, 52, 62) for acquiring a reference time as a reference of the processing time when the processing is executed in each processing unit;
Storage means (20, 30, 50, 60, S402) for storing the reference time when receiving the same signal as a reception time in a storage unit;
Have
At least one first processing unit (20, 50, 60) of the plurality of processing units, respectively,
Information acquisition means (S420) for acquiring the reception time of at least one other second processing unit (30, 50, 60) other than the processing unit among the plurality of processing units;
The processing time of the own processing unit is corrected by correcting the processing time of the own processing unit by the difference between the reception time of the second processing unit acquired by the information acquisition unit and the reception time stored in the own processing unit. Synchronizing means (S422, S424) for synchronizing the reference time with the reference time of the second processing unit,
Having
An electronic control device for a vehicle.   2. The vehicle electronic control device according to claim 1, wherein the same signal is a cylinder discrimination signal.   The same signal is a signal that is output in synchronization with rotation by a valve timing adjusting device that adjusts an opening / closing timing of a valve that opens and closes the camshaft by controlling a rotation phase of the camshaft with respect to a crankshaft. The vehicle electronic control device according to claim 1.   The information acquisition means of the first processing unit includes an execution command for processing executed by the first processing unit, and the processing time of the first processing unit set by the second processing unit based on the reference time. The vehicle electronic control device according to any one of claims 1 to 3, wherein the reception time of the second processing unit is acquired from the second processing unit.   The information acquisition means of the first processing unit is configured to execute an injection control and ignition control command executed by the first processing unit, and the injection control and ignition set by the second processing unit based on the reference time. The vehicle electronic control device according to claim 4, wherein the processing time of control and the reception time of the second processing unit are acquired from the second processing unit.   6. The vehicle according to claim 1, wherein the information acquisition unit of the first processing unit acquires the reception time stored in the second processing unit through communication. Electronic control device. The storage means of the second processing unit stores the reception time in a shared memory (40),
The information acquisition means of the first processing unit acquires the reception time of the second processing unit from the shared memory;
The vehicular electronic control device according to any one of claims 1 to 5, wherein   8. The vehicular electronic control device according to claim 1, wherein the reference time means acquires the reference time from a timer built in each processing unit. 9.   The vehicular electronic control device according to any one of claims 1 to 8, wherein each of the plurality of processing units is a CPU.   The vehicular electronic control device according to any one of claims 1 to 8, wherein each of the plurality of processing units is a different processor core in a multi-core CPU. The reference time means acquires a plurality of the reference times,
The storage means stores each reference time when receiving the same signal in the storage unit as the reception time.
The vehicular electronic control device according to any one of claims 1 to 10, wherein

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