JP2013240008A - Semiconductor integrated circuit and signal amplifying device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To supply a test signal to an external load without making a user notice the test signal.SOLUTION: A signal amplifying device 1 includes a semiconductor integrated circuit 10 and an internal load 71. The semiconductor integrated circuit 10 includes: an amplifying section 20 for amplifying an input signal Sin, and outputting an output signal Sout to a first terminal T1; a resistor 40 of which one end is connected to a second terminal T2; a test signal generating section 30 for generating a test signal TS obtained by extracting a first wavelength of a cosine wave, and supplying the test signal to the other end of the resistor 40; an AD converting section 50 for detecting an amplitude of the test signal TS in the second terminal T2; and a control section 60 for controlling a gain of the amplifying section 20 based on detection data D. The output signal Sout is supplied to the first terminal T1, the internal load 71, a first external terminal TA, an external load 2 and a second external terminal TB in this route.

Description

  The present invention relates to a technique for measuring impedance by supplying a test signal to an external load.

  In a signal amplifying circuit that amplifies an input signal and outputs it to an external load, a technique for supplying a test signal to the external load and determining whether the external load is a stereo plug or a monaural plug is known (patent) Reference 1). In this technique, the test signal is set so as not to be heard by the user by setting the frequency of the test signal to a high frequency outside the audible band.

Japanese Patent No. 4182802

By the way, a speaker or headphones connected as an external load includes a reactance component, and the impedance changes depending on the frequency. Therefore, if the test signal is set to a high frequency outside the audible band, the high frequency impedance may shift from the impedance in the audible band. Therefore, the impedance in the required audible band cannot be obtained accurately. In addition, at a high frequency, the test signal is attenuated in an external load, and it may be difficult to measure impedance with a high S / N ratio. Furthermore, it is necessary to extend the frequency characteristics of the circuit that generates the test signal to a high frequency outside the audible band, and it is necessary to make components such as transistors constituting the signal amplifier circuit correspond to the high frequency.
An object of the present invention is to make it possible to measure the impedance of an external load without the user's knowledge without setting the frequency of the test signal to a high frequency outside the audible band.

In order to solve the above problems, a semiconductor integrated circuit according to the present invention is used in a signal amplifying device including an external terminal to which an external load can be connected and an internal load having one end connected to the external terminal. An amplifier for amplifying an input signal and outputting an output signal to the other end of the internal load; a resistor having one end connected to the external terminal or the other end of the internal load; and a waveform of one wavelength of a cosine wave Is generated as a test signal and supplied to the other end of the resistor, a detection unit for detecting the amplitude of the test signal at one end of the resistor, and the amplification based on the detection result of the detection unit A control unit that controls the gain of the unit.
According to the present invention, since the waveform of one wavelength of the cosine wave is adopted as the test signal, the measurement of the impedance of the external load is completed in a short time. Therefore, it is possible to prevent the test signal from being perceived as abnormal noise by the user.

  Here, the waveform of one wavelength of the cosine wave is preferably a waveform from the upper peak of the cosine wave to the next upper peak. In this case, since the shoulder portion of the test signal can be gently changed, generation of harmonic components can be suppressed.

  The input signal is an audio signal, and the frequency of the test signal is preferably lower than the highest frequency in the audible band. When the frequency of the test signal is within the audible band, the impedance can be measured at a frequency at which the external load operates as a headphone or a speaker, so that the impedance of the external load can be accurately measured. In addition, when the frequency of the test signal is lower than the lowest frequency of the audible band, the test signal is hardly attenuated by stray capacitance, stray inductance, wiring resistance, etc., so that it is possible to accurately measure the impedance of the external load. .

The signal amplifying device according to the present invention includes a first external terminal which is the external terminal, a second external terminal to which a predetermined potential is supplied, an internal load having one end connected to the first external terminal, The semiconductor integrated circuit includes a first terminal connected to the other end of the internal load, a first terminal connected to the first external terminal, and a first terminal connected to the one end of the resistor. And two terminals.
According to the present invention, in the semiconductor integrated circuit, the first terminal that outputs the output signal and the second terminal that outputs the test signal are provided independently, and the second terminal is connected to the first external terminal. Yes. Therefore, the output signal is supplied to the external load through the path of the first terminal → the internal load → the first external terminal → the external load, while the test signal is externally transmitted through the path of the second terminal → the first external terminal → the external load. Supplied to the load. As a result, since the test signal is not supplied to the internal load, the gain of the amplifying unit can be adjusted according to the accurate impedance of the external load.

It is a block diagram which shows the structure of the signal amplification apparatus which concerns on embodiment of this invention. It is a circuit diagram which shows the structure of the output stage of amplifier. It is explanatory drawing for demonstrating the waveform of a test signal. It is explanatory drawing for demonstrating the comparative example of a test signal. It is explanatory drawing for demonstrating the comparative example of a test signal. It is explanatory drawing for demonstrating the comparative example of a test signal. It is explanatory drawing for demonstrating the spectrum of a test signal. It is explanatory drawing which shows the path | route through which an output signal is supplied in periods other than a test period. It is explanatory drawing which shows the path | route through which a test signal is supplied in a test period. It is explanatory drawing for demonstrating the waveform of the test signal which concerns on a modification. It is a block diagram which shows the structure of the signal amplifier which concerns on a modification. It is a block diagram which shows the structure of the semiconductor integrated circuit which concerns on a modification.

<1. Embodiment>
Embodiments according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a main configuration of a signal amplifying apparatus 1 according to an embodiment of the present invention. The signal amplifying device 1 includes a semiconductor integrated circuit 10 configured by an IC or an IC module, a first external terminal TA, a second external terminal TB, and an internal load 71.
The first external terminal TA and the second external terminal TB correspond to a connection point between a headphone jack and a plug, for example. An external load 2 is connected to the first external terminal TA and the second external terminal TB. The external load 2 corresponds to headphones or speakers having different impedances. In this example, the test signal TS or the output signal Sout is output from the first external terminal TA, and the ground potential (predetermined potential) is supplied to the second external terminal TB. The semiconductor integrated circuit 10 supplies the test signal TS to the external load 2 in the test period, and adjusts the amplitude of the output signal Sout in a period other than the test period according to the impedance of the external load 2.

  The internal load 71 is provided between the first external terminal TA and the semiconductor integrated circuit 10, and the external load 2 such as a speaker or a headphone from a ferrite bead for removing high frequency noise or a large amplitude signal. You may comprise including the protection resistance for protecting.

The semiconductor integrated circuit 10 includes a first terminal T1 connected to the internal load 71 and a second terminal T2 connected to the first external terminal TA.
The semiconductor integrated circuit 10 further includes an amplifying unit 20 that amplifies the differential input signal Sin to generate a single-ended output signal Sout and supplies the output signal Sout to the first terminal T1. More specifically, the amplification unit 20 includes a signal adjustment unit 21 and an amplifier 22 that adjust the amplitude of the input signal Sin based on the first control signal CTL1. In this example, the gain of the amplifier 22 is fixed, and the gain of the amplification unit 20 is controlled by the signal adjustment unit 21. In this example, the input signal Sin is in the differential format, but it is needless to say that it may be in a single-ended format. In this case, the signal adjustment unit 21 and the amplifier 22 are configured in a single-ended format.

  The amplifier 22 is supplied with a second control signal CTL2 that is at a high level during the test period and is at a low level during periods other than the test period. In the output stage of the amplifier 22, for example, as shown in FIG. 2, a P-channel transistor 221 and an N-channel transistor 222 are connected in series. During the test period, the gate potential of the P-channel transistor 221 is pulled up to the power supply voltage Vdd. Then, the gate potential of the N-channel transistor 222 is pulled down to the ground potential. On the other hand, in periods other than the test period, the gates of the P-channel transistor 221 and the N-channel transistor 222 are appropriately biased, and the output signal Sout is output with low impedance. Thereby, in the test period, the output impedance of the amplifying unit 20 is in a high impedance state, and in a period other than the test period, the output signal Sout is output from the amplifying unit 20 to the first external terminal TA, and the headphones are connected via the internal load 71. Or the like to the external load 2.

Furthermore, the semiconductor integrated circuit 10 includes a test signal generation unit 30, a resistor 40, an AD conversion unit 50, and a control unit 60. The test signal generator 30 includes a signal generator 31 that generates a differential test signal TS and an amplifier 32.
Here, the test signal TS will be described with reference to FIG. The test signal TS includes a portion obtained by cutting out a waveform F1 of one wavelength from a continuous cosine wave F. More specifically, the test signal TS is 1 from the upper peak P1 of the cosine wave F (hereinafter referred to as the first upper peak P1) to the next upper peak P2 (hereinafter referred to as the second upper peak). The waveform F1 of the wavelength is cut out, and the first upper peak P1 and the second upper peak P2 are level-shifted so as to become the amplitude center potential Vc of the output signal Sout. In this example, the test signal TS generated by the signal generator 31 is in a differential format, but it is needless to say that it may be in a single end format. In this case, the signal generator 31 and the amplifier 32 are configured in a single-ended format. The amplitude center potential Vc is, for example, the ground potential GND supplied as a predetermined potential to the second external terminal TB.

The reason why the test signal TS is generated in this way is to prevent the user from feeling abnormal noise. In order to prevent the user from noticing even when playing back with headphones or speakers, 1) reducing the frequency component of the test signal TS to such an extent that it cannot be felt by human hearing in the audible band,
2) It is necessary to shorten the generation time of the test signal TS to such an extent that it cannot be felt by human hearing.

For example, if the waveform of the test signal TS is a continuous cosine wave as shown in FIG. 4, the frequency component has a large energy at the fundamental frequency f, so that it is easily felt by human hearing. In order to reduce the energy of the fundamental frequency f, the amplitude of the test signal TS may be reduced. However, if the amplitude of the test signal TS is reduced to such an extent that it cannot be perceived by human hearing, when the impedance of the external load 2 is measured, the S / N ratio decreases and the measured impedance becomes inaccurate.
Further, for example, when the waveform of the test signal TS is a square wave as shown in FIG. 5, the frequency component of the test signal TS has a large energy at the fundamental frequency f and its harmonics, so that it is easily perceived by human hearing. .

Therefore, in this embodiment, the test signal TS is set to one wavelength F1 cut out from the cosine wave, so that the generation time of the test signal TS is shortened and almost no harmonic component is generated. For example, as shown in FIG. 6, when the waveform W obtained by cutting out the half wavelength of the cosine wave is compared with the test signal TS, it can be seen that the waveform W changes more rapidly in the shoulder portion SD. Therefore, the waveform W obtained by cutting out the half wavelength of the cosine wave generates a harmonic component, but the test signal TS changes gently, so that almost no harmonic component is generated.
As a result, the spectrum of the test signal TS is as shown in FIG. 7, and the energy of the fundamental frequency f can be greatly reduced as compared with the case where the cosine wave shown in FIG. 4 continues. Moreover, since the generation time is short, the amplitude Vx (see FIG. 3) of the test signal TS can be set large, and the impedance of the external load 2 can be measured with a high S / N ratio.
In the present embodiment, the basic frequency f of the test signal TS is 3 Hz. Since the audible band is 20 Hz to 20 KHz, the basic frequency f of the test signal TS is lower than the lowest frequency of the audible band. Generally, the higher the frequency of the test signal TS, the more the measurement error of the impedance of the external load 2 increases because the level of the test signal TS is attenuated due to the influence of stray capacitance, stray inductance or wiring resistance. On the other hand, at a frequency lower than the lowest frequency of the audible band, the test signal TS is hardly attenuated due to the influence of stray capacitance, stray inductance, or wiring resistance. Moreover, since the harmonic component of the test signal TS is extremely small, no harmonics that humans feel as abnormal sounds in the audible band are generated. As a result, it is possible to accurately measure the impedance of the external load 2 using the test signal TS that the user does not care about.

  Returning to FIG. Next, the amplifier 32 amplifies the test signal TS with a predetermined gain and supplies it to the resistor 40. Further, the output stage of the amplifier 32 is configured as shown in FIG. In the test period in which the second control signal CTL2 is at a high level, the gates of the P-channel transistor 221 and the N-channel transistor 222 are appropriately biased and turned off in periods other than the test period in which the second control signal CTL2 is at a low level. It is comprised so that it may be in a state. As a result, the test signal TS is supplied from the test signal generator 30 to the external load 2 such as the headphones via the resistor 40 in the test period, and the output side of the test signal generator 30 is in the high impedance state in the period other than the test period. As a result, the second terminal T2 enters a high impedance state.

  Next, the AD conversion unit 50 outputs detection data D obtained by AD converting the potential of the second terminal T <b> 2 to the control unit 60. That is, the AD conversion unit 50 functions as a detection unit that detects the amplitude of the test signal TS at the second terminal T2 during the test period.

Next, a detection signal CTL that is activated when an external load 2 such as headphones is connected to the first external terminal TA and the second external terminal TB from the external device is supplied to the control unit 60. The control unit 60 sets the second control signal CTL2 to the high level for a predetermined time after the detection signal CTL becomes active. A period during which the second control signal CTL2 is at a high level is a test period.
Then, based on the detection data D in the test period, the impedance of the external load 2 is measured, and the first control signal CTL1 is generated according to the impedance of the external load 2. More specifically, the impedance may be calculated based on the detection data D at time Tx when the amplitude of the test signal TS is maximum (signal level is minimum) as shown in FIG.

The amplitude of the test signal TS generated by the signal generator 31 is known, and the gain of the amplifier 32 is also known. Therefore, the amplitude of the test signal TS output from the test signal generator 30 is also known. Here, if the amplitude of the test signal TS output from the test signal generator 30 is V2, the amplitude of the test signal TS at the second terminal is V1, the impedance of the resistor 40 is Zy, and the impedance of the external load 2 is Zx, The impedance Zx of the external load 2 is given by the following formula (1).
Zx = ZyV1 / (V2-V1) (1)

  The control unit 60 calculates the impedance Zx according to the equation (1), generates the first control signal CTL1 corresponding to the impedance Zx, and adjusts the gain of the amplification unit 20. As a result, even if different types of external loads 2 are connected, an appropriate sound volume can be output.

  According to the present embodiment, in a period other than the test period, the output signal Sout output from the first terminal T1 is supplied to the external load 2 via the internal load 71 as shown in FIG. T2 is in a high impedance state. Therefore, the output signal Sout can be supplied to the external load 2 independently of the test signal TS. In addition, since the output signal Sout is supplied via the internal load 71, the semiconductor integrated circuit 10 can be protected even if the external load 2 is short-circuited due to a failure or the like. Further, the output signal Sout having a large amplitude is output. The external load 2 can be protected even if output from the semiconductor integrated circuit 10.

  Next, in the test period, as shown in FIG. 9, the first terminal T1 is in a high impedance state, while the test signal TS output from the second terminal T2 does not pass through the internal load 71 but directly to the external load 2. Supplied. As a result, the impedance of the external load 2 can be accurately specified without being affected by the internal load 71, and an appropriate volume can be output even when different types of external loads 2 are connected. .

<2. Modification>
The present invention is not limited to the above-described embodiments, and for example, various modifications described below are possible. Of course, the above-described embodiment and each modification may be appropriately combined.

(1) In the above-described embodiment, the test signal TS having a peak on the negative side with respect to the amplitude center potential Vc has been described as an example. However, the present invention is not limited to this, and the test signal TS is As long as the waveform is obtained by cutting out one wavelength of the cosine wave, it may be cut out at any timing. For example, the test signal TS is changed from the lower peak P3 of the cosine wave F (hereinafter referred to as the first lower peak P3) to the next lower peak P4 (hereinafter referred to as the second lower peak) as shown in FIG. A waveform F1 of one wavelength up to P4) is cut out, and the first lower peak P3 and the second lower peak P4 are level-shifted so as to be the amplitude center potential Vc of the output signal Sout. Also good.
In the above-described embodiment, the basic frequency f of the test signal TS is set to be lower than 20 Hz, which is the lowest frequency of the audible band. However, the present invention is not limited to this and is not noticed by the user. In this case, the frequency of the test signal TS may be set in any way. However, in consideration of the attenuation of the test signal TS, it is preferably lower than 20 KHz which is the highest frequency of the audible band.
In addition, although the audible band is 20 Hz to 20 KHz in the above-described embodiment, the audible band is different depending on the purpose of use of the signal amplifier circuit 1. For example, in a telephone, the audible band is 300 Hz to 3.5 KHz or 100 Hz to 7 KHz.

(2) In the above-described embodiment, the semiconductor integrated circuit 10 is provided with the second terminal T2, and is connected to the second terminal T2 and the first external terminal TA to bypass the internal load 71 and to output the test signal TS. Although supplied to the external load 2, the present invention is not limited to this. The test signal TS is supplied to the external load 2 in the test period, and the output signal Sout is supplied to the external load 2 in a period other than the test period. As long as it is, any configuration may be used.
For example, like the signal amplifier circuit 1Z shown in FIG. 11, the semiconductor integrated circuit 10Z may not be provided with the second terminal T2, and the resistor 40 may be connected to the first terminal T1. In this case, the test signal TS is supplied to the external load 2 via the internal load 71. When the size of the internal load 71 is small, it is possible to measure the impedance of the external load 2 with necessary accuracy even in this modification. If the size of the internal load 71 is known, the impedance of the external load 2 may be measured in consideration of this.
Also in this case, since the test signal TS obtained by cutting out one wavelength F1 of the cosine wave is used, even if the test signal TS is supplied to headphones, a speaker, etc., it is possible to prevent the user from being noticed.

(3) In the above-described embodiment, the amplitude V2 of the test signal TS output from the test signal generation unit 30 is known. However, the present invention is not limited to this, and the test signal generation unit 30 The impedance of the external load 2 may be specified by measuring the amplitude V2 of the output test signal TS.

  For example, the signal amplifying apparatus 1 may be configured using the semiconductor integrated circuit 10A shown in FIG. In this case, the AD converter 50A that AD converts the amplitude V2 of the test signal TS output from the test signal generator 30 and outputs the detection data Da, and AD converts the amplitude V1 of the test signal TS at the second terminal T2. The AD conversion unit 50B that outputs the detection data Db is provided, and the control unit 60 may specify the impedance of the external load 2 based on the detection data Da and the detection data Db.

  As described above, when the amplitude V2 of the test signal TS is measured, even if the amplitude V2 of the test signal TS changes due to manufacturing variations, temperature characteristics, or changes over time of the test signal generation unit 30, this is actually measured, so that it is more accurate. The impedance of the external load 2 can be measured.

(4) In the embodiment and the modification described above, the control unit 60 calculates the impedance of the external load 2 based on the equation (1), but the present invention is not limited to this, The first control signal CTL1 may be generated based on the amplitude V1 of the test signal TS at the two terminals T2. Since the amplitude V2 of the test signal TS output from the test signal generator 30 is fixed, the impedance of the external load 2 corresponds to the amplitude V1 of the test signal TS at the second terminal T2. Since the gain of the amplifying unit 20 is determined in accordance with the impedance of the external load 2, if the relationship between the amplitude V1 of the test signal TS and the gain of the amplifying unit 20 is determined in advance, the impedance can be calculated without calculating the impedance. One control signal CTL1 can be directly generated. Specifically, the amplitude V1 of the test signal TS and the magnitude of the first control signal CTL1 may be stored in a table, and the first control signal CTL1 may be generated with reference to the table.

(5) Although the two-pole type plug has been described in the above-described embodiment, it is needless to say that the present invention may be applied to a three-pole or four-pole type plug. By the way, the 4-pole type plug has a first mode in which Lch, Rch, GND, and MIC are arranged from the tip, and a second mode in which Lch, Rch, MIC, and GND are arranged from the tip. In this case, the GND is connected to the third electrode from the tip in the first mode, while the MIC is connected in the second mode. When the above-described embodiment is applied to a four-pole type plug, the first mode and the second mode can be determined by calculating the impedance of the third electrode from the tip. In the first mode, the impedance is zero because it is connected to GND, but in the second mode, a microphone is connected, so the impedance of the microphone is calculated. Therefore, the type of plug can be determined based on the impedance.

DESCRIPTION OF SYMBOLS 1,1Z ...... Signal amplification device, 2 ... External load, 10,10A, 10Z ... Semiconductor integrated circuit, 20 ... Amplification part, 21 ... Signal adjustment part, 22 ... Amplifier, 30 ... Test signal generation , 31... Signal generator, 32... Amplifier, 40... Resistor, 50... AD converter, 60. 2 external terminals, T1... 1st terminal, T2... 2nd terminal, Sin... Input signal, Sout ... output signal, CTL1... First control signal, CTL2.

Claims (4)

A semiconductor integrated circuit used in a signal amplifying device comprising an external terminal to which an external load can be connected and an internal load having one end connected to the external terminal,
An amplifier for amplifying an input signal and outputting an output signal to the other end of the internal load;
A resistor having one end connected to the external terminal or the other end of the internal load;
A test signal generation unit that generates a waveform of one wavelength of a cosine wave as a test signal and supplies the waveform to the other end of the resistor;
A detector for detecting the amplitude of the test signal at one end of the resistor;
A control unit for controlling the gain of the amplification unit based on the detection result of the detection unit;
A semiconductor integrated circuit provided.   2. The semiconductor integrated circuit according to claim 1, wherein the waveform of one wavelength of the cosine wave is a waveform from an upper peak of the cosine wave to a next upper peak.   3. The semiconductor integrated circuit according to claim 1, wherein the input signal is an audio signal, and a frequency of the test signal is lower than a maximum frequency of an audible band. A first external terminal which is the external terminal;
A second external terminal to which a predetermined potential is supplied;
An internal load having one end connected to the first external terminal;
A semiconductor integrated circuit according to any one of claims 1 to 3,
The semiconductor integrated circuit is:
A first terminal connected to the other end of the internal load;
A second terminal connected to the first external terminal and connected to one end of the resistor;
A signal amplifying device.

Images